if_ipw.c revision 159487
1/* $FreeBSD: head/sys/dev/ipw/if_ipw.c 159487 2006-06-10 17:29:40Z iedowse $ */ 2 3/*- 4 * Copyright (c) 2004-2006 5 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h> 31__FBSDID("$FreeBSD: head/sys/dev/ipw/if_ipw.c 159487 2006-06-10 17:29:40Z iedowse $"); 32 33/*- 34 * Intel(R) PRO/Wireless 2100 MiniPCI driver 35 * http://www.intel.com/network/connectivity/products/wireless/prowireless_mobile.htm 36 */ 37 38#include <sys/param.h> 39#include <sys/sysctl.h> 40#include <sys/sockio.h> 41#include <sys/mbuf.h> 42#include <sys/kernel.h> 43#include <sys/socket.h> 44#include <sys/systm.h> 45#include <sys/malloc.h> 46#include <sys/queue.h> 47#include <sys/taskqueue.h> 48#include <sys/module.h> 49#include <sys/bus.h> 50#include <sys/endian.h> 51#include <sys/linker.h> 52#include <sys/firmware.h> 53 54#include <machine/bus.h> 55#include <machine/resource.h> 56#include <sys/rman.h> 57 58#include <dev/pci/pcireg.h> 59#include <dev/pci/pcivar.h> 60 61#include <net/bpf.h> 62#include <net/if.h> 63#include <net/if_arp.h> 64#include <net/ethernet.h> 65#include <net/if_dl.h> 66#include <net/if_media.h> 67#include <net/if_types.h> 68 69#include <net80211/ieee80211_var.h> 70#include <net80211/ieee80211_radiotap.h> 71 72#include <netinet/in.h> 73#include <netinet/in_systm.h> 74#include <netinet/in_var.h> 75#include <netinet/ip.h> 76#include <netinet/if_ether.h> 77 78#include <dev/ipw/if_ipwreg.h> 79#include <dev/ipw/if_ipwvar.h> 80 81#ifdef IPW_DEBUG 82#define DPRINTF(x) do { if (ipw_debug > 0) printf x; } while (0) 83#define DPRINTFN(n, x) do { if (ipw_debug >= (n)) printf x; } while (0) 84int ipw_debug = 0; 85SYSCTL_INT(_debug, OID_AUTO, ipw, CTLFLAG_RW, &ipw_debug, 0, "ipw debug level"); 86#else 87#define DPRINTF(x) 88#define DPRINTFN(n, x) 89#endif 90 91MODULE_DEPEND(ipw, pci, 1, 1, 1); 92MODULE_DEPEND(ipw, wlan, 1, 1, 1); 93MODULE_DEPEND(ipw, firmware, 1, 1, 1); 94 95struct ipw_ident { 96 uint16_t vendor; 97 uint16_t device; 98 const char *name; 99}; 100 101static const struct ipw_ident ipw_ident_table[] = { 102 { 0x8086, 0x1043, "Intel(R) PRO/Wireless 2100 MiniPCI" }, 103 104 { 0, 0, NULL } 105}; 106 107static int ipw_dma_alloc(struct ipw_softc *); 108static void ipw_release(struct ipw_softc *); 109static int ipw_media_change(struct ifnet *); 110static void ipw_media_status(struct ifnet *, struct ifmediareq *); 111static int ipw_newstate(struct ieee80211com *, enum ieee80211_state, int); 112static uint16_t ipw_read_prom_word(struct ipw_softc *, uint8_t); 113static void ipw_command_intr(struct ipw_softc *, struct ipw_soft_buf *); 114static void ipw_newstate_intr(struct ipw_softc *, struct ipw_soft_buf *); 115static void ipw_data_intr(struct ipw_softc *, struct ipw_status *, 116 struct ipw_soft_bd *, struct ipw_soft_buf *); 117static void ipw_rx_intr(struct ipw_softc *); 118static void ipw_release_sbd(struct ipw_softc *, struct ipw_soft_bd *); 119static void ipw_tx_intr(struct ipw_softc *); 120static void ipw_intr(void *); 121static void ipw_dma_map_addr(void *, bus_dma_segment_t *, int, int); 122static int ipw_cmd(struct ipw_softc *, uint32_t, void *, uint32_t); 123static int ipw_tx_start(struct ifnet *, struct mbuf *, 124 struct ieee80211_node *); 125static void ipw_start(struct ifnet *); 126static void ipw_watchdog(struct ifnet *); 127static int ipw_ioctl(struct ifnet *, u_long, caddr_t); 128static void ipw_stop_master(struct ipw_softc *); 129static int ipw_reset(struct ipw_softc *); 130static int ipw_load_ucode(struct ipw_softc *, const char *, int); 131static int ipw_load_firmware(struct ipw_softc *, const char *, int); 132static int ipw_config(struct ipw_softc *); 133static void ipw_init_task(void *, int); 134static void ipw_init(void *); 135static void ipw_stop(void *); 136static int ipw_sysctl_stats(SYSCTL_HANDLER_ARGS); 137static int ipw_sysctl_radio(SYSCTL_HANDLER_ARGS); 138static uint32_t ipw_read_table1(struct ipw_softc *, uint32_t); 139static void ipw_write_table1(struct ipw_softc *, uint32_t, uint32_t); 140static int ipw_read_table2(struct ipw_softc *, uint32_t, void *, 141 uint32_t *); 142static void ipw_read_mem_1(struct ipw_softc *, bus_size_t, uint8_t *, 143 bus_size_t); 144static void ipw_write_mem_1(struct ipw_softc *, bus_size_t, 145 const uint8_t *, bus_size_t); 146 147static int ipw_probe(device_t); 148static int ipw_attach(device_t); 149static int ipw_detach(device_t); 150static int ipw_shutdown(device_t); 151static int ipw_suspend(device_t); 152static int ipw_resume(device_t); 153 154static device_method_t ipw_methods[] = { 155 /* Device interface */ 156 DEVMETHOD(device_probe, ipw_probe), 157 DEVMETHOD(device_attach, ipw_attach), 158 DEVMETHOD(device_detach, ipw_detach), 159 DEVMETHOD(device_shutdown, ipw_shutdown), 160 DEVMETHOD(device_suspend, ipw_suspend), 161 DEVMETHOD(device_resume, ipw_resume), 162 163 { 0, 0 } 164}; 165 166static driver_t ipw_driver = { 167 "ipw", 168 ipw_methods, 169 sizeof (struct ipw_softc) 170}; 171 172static devclass_t ipw_devclass; 173 174DRIVER_MODULE(ipw, pci, ipw_driver, ipw_devclass, 0, 0); 175 176/* 177 * Supported rates for 802.11b mode (in 500Kbps unit). 178 */ 179static const struct ieee80211_rateset ipw_rateset_11b = 180 { 4, { 2, 4, 11, 22 } }; 181 182static int 183ipw_probe(device_t dev) 184{ 185 const struct ipw_ident *ident; 186 187 for (ident = ipw_ident_table; ident->name != NULL; ident++) { 188 if (pci_get_vendor(dev) == ident->vendor && 189 pci_get_device(dev) == ident->device) { 190 device_set_desc(dev, ident->name); 191 return 0; 192 } 193 } 194 return ENXIO; 195} 196 197/* Base Address Register */ 198#define IPW_PCI_BAR0 0x10 199 200static int 201ipw_attach(device_t dev) 202{ 203 struct ipw_softc *sc = device_get_softc(dev); 204 struct ifnet *ifp; 205 struct ieee80211com *ic = &sc->sc_ic; 206 uint16_t val; 207 int error, i; 208 209 sc->sc_dev = dev; 210 211 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 212 MTX_DEF | MTX_RECURSE); 213 214 TASK_INIT(&sc->sc_init_task, 0, ipw_init_task, sc); 215 216 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 217 device_printf(dev, "chip is in D%d power mode " 218 "-- setting to D0\n", pci_get_powerstate(dev)); 219 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 220 } 221 222 pci_write_config(dev, 0x41, 0, 1); 223 224 /* enable bus-mastering */ 225 pci_enable_busmaster(dev); 226 227 sc->mem_rid = IPW_PCI_BAR0; 228 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid, 229 RF_ACTIVE); 230 if (sc->mem == NULL) { 231 device_printf(dev, "could not allocate memory resource\n"); 232 goto fail; 233 } 234 235 sc->sc_st = rman_get_bustag(sc->mem); 236 sc->sc_sh = rman_get_bushandle(sc->mem); 237 238 sc->irq_rid = 0; 239 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid, 240 RF_ACTIVE | RF_SHAREABLE); 241 if (sc->irq == NULL) { 242 device_printf(dev, "could not allocate interrupt resource\n"); 243 goto fail; 244 } 245 246 if (ipw_reset(sc) != 0) { 247 device_printf(dev, "could not reset adapter\n"); 248 goto fail; 249 } 250 251 if (ipw_dma_alloc(sc) != 0) { 252 device_printf(dev, "could not allocate DMA resources\n"); 253 goto fail; 254 } 255 256 ifp = sc->sc_ifp = if_alloc(IFT_ETHER); 257 if (ifp == NULL) { 258 device_printf(dev, "can not if_alloc()\n"); 259 goto fail; 260 } 261 262 ifp->if_softc = sc; 263 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 264 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 265 ifp->if_init = ipw_init; 266 ifp->if_ioctl = ipw_ioctl; 267 ifp->if_start = ipw_start; 268 ifp->if_watchdog = ipw_watchdog; 269 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 270 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 271 IFQ_SET_READY(&ifp->if_snd); 272 273 ic->ic_ifp = ifp; 274 ic->ic_phytype = IEEE80211_T_DS; 275 ic->ic_opmode = IEEE80211_M_STA; 276 ic->ic_state = IEEE80211_S_INIT; 277 278 /* set device capabilities */ 279 ic->ic_caps = 280 IEEE80211_C_IBSS | /* IBSS mode supported */ 281 IEEE80211_C_MONITOR | /* monitor mode supported */ 282 IEEE80211_C_TXPMGT | /* tx power management */ 283 IEEE80211_C_SHPREAMBLE; /* short preamble supported */ 284 285 /* read MAC address from EEPROM */ 286 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0); 287 ic->ic_myaddr[0] = val >> 8; 288 ic->ic_myaddr[1] = val & 0xff; 289 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1); 290 ic->ic_myaddr[2] = val >> 8; 291 ic->ic_myaddr[3] = val & 0xff; 292 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2); 293 ic->ic_myaddr[4] = val >> 8; 294 ic->ic_myaddr[5] = val & 0xff; 295 296 /* set supported .11b rates */ 297 ic->ic_sup_rates[IEEE80211_MODE_11B] = ipw_rateset_11b; 298 299 /* set supported .11b channels */ 300 for (i = 1; i < 14; i++) { 301 ic->ic_channels[i].ic_freq = 302 ieee80211_ieee2mhz(i, IEEE80211_CHAN_B); 303 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_B; 304 } 305 306 /* check support for radio transmitter switch in EEPROM */ 307 if (!(ipw_read_prom_word(sc, IPW_EEPROM_RADIO) & 8)) 308 sc->flags |= IPW_FLAG_HAS_RADIO_SWITCH; 309 310 ieee80211_ifattach(ic); 311 /* override state transition machine */ 312 sc->sc_newstate = ic->ic_newstate; 313 ic->ic_newstate = ipw_newstate; 314 ieee80211_media_init(ic, ipw_media_change, ipw_media_status); 315 316 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 317 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 318 319 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 320 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 321 sc->sc_rxtap.wr_ihdr.it_present = htole32(IPW_RX_RADIOTAP_PRESENT); 322 323 sc->sc_txtap_len = sizeof sc->sc_txtapu; 324 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 325 sc->sc_txtap.wt_ihdr.it_present = htole32(IPW_TX_RADIOTAP_PRESENT); 326 327 /* 328 * Add a few sysctl knobs. 329 */ 330 sc->dwelltime = 100; 331 332 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 333 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "radio", 334 CTLTYPE_INT | CTLFLAG_RD, sc, 0, ipw_sysctl_radio, "I", 335 "radio transmitter switch state (0=off, 1=on)"); 336 337 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 338 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "stats", 339 CTLTYPE_OPAQUE | CTLFLAG_RD, sc, 0, ipw_sysctl_stats, "S", 340 "statistics"); 341 342 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 343 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "dwell", 344 CTLFLAG_RW, &sc->dwelltime, 0, 345 "channel dwell time (ms) for AP/station scanning"); 346 347 /* 348 * Hook our interrupt after all initialization is complete. 349 */ 350 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE, 351 ipw_intr, sc, &sc->sc_ih); 352 if (error != 0) { 353 device_printf(dev, "could not set up interrupt\n"); 354 goto fail; 355 } 356 357 if (bootverbose) 358 ieee80211_announce(ic); 359 360 return 0; 361 362fail: ipw_detach(dev); 363 return ENXIO; 364} 365 366static int 367ipw_detach(device_t dev) 368{ 369 struct ipw_softc *sc = device_get_softc(dev); 370 struct ieee80211com *ic = &sc->sc_ic; 371 struct ifnet *ifp = ic->ic_ifp; 372 373 ipw_stop(sc); 374 375 if (ifp != NULL) { 376 bpfdetach(ifp); 377 ieee80211_ifdetach(ic); 378 } 379 380 ipw_release(sc); 381 382 if (sc->irq != NULL) { 383 bus_teardown_intr(dev, sc->irq, sc->sc_ih); 384 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq); 385 } 386 387 if (sc->mem != NULL) 388 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem); 389 390 if (ifp != NULL) 391 if_free(ifp); 392 393 if (sc->sc_firmware != NULL) { 394 firmware_put(sc->sc_firmware, FIRMWARE_UNLOAD); 395 sc->sc_firmware = NULL; 396 } 397 398 mtx_destroy(&sc->sc_mtx); 399 400 return 0; 401} 402 403static int 404ipw_dma_alloc(struct ipw_softc *sc) 405{ 406 struct ipw_soft_bd *sbd; 407 struct ipw_soft_hdr *shdr; 408 struct ipw_soft_buf *sbuf; 409 bus_addr_t physaddr; 410 int error, i; 411 412 /* 413 * Allocate and map tx ring. 414 */ 415 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 416 BUS_SPACE_MAXADDR, NULL, NULL, IPW_TBD_SZ, 1, IPW_TBD_SZ, 0, NULL, 417 NULL, &sc->tbd_dmat); 418 if (error != 0) { 419 device_printf(sc->sc_dev, "could not create tx ring DMA tag\n"); 420 goto fail; 421 } 422 423 error = bus_dmamem_alloc(sc->tbd_dmat, (void **)&sc->tbd_list, 424 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->tbd_map); 425 if (error != 0) { 426 device_printf(sc->sc_dev, 427 "could not allocate tx ring DMA memory\n"); 428 goto fail; 429 } 430 431 error = bus_dmamap_load(sc->tbd_dmat, sc->tbd_map, sc->tbd_list, 432 IPW_TBD_SZ, ipw_dma_map_addr, &sc->tbd_phys, 0); 433 if (error != 0) { 434 device_printf(sc->sc_dev, "could not map tx ring DMA memory\n"); 435 goto fail; 436 } 437 438 /* 439 * Allocate and map rx ring. 440 */ 441 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 442 BUS_SPACE_MAXADDR, NULL, NULL, IPW_RBD_SZ, 1, IPW_RBD_SZ, 0, NULL, 443 NULL, &sc->rbd_dmat); 444 if (error != 0) { 445 device_printf(sc->sc_dev, "could not create rx ring DMA tag\n"); 446 goto fail; 447 } 448 449 error = bus_dmamem_alloc(sc->rbd_dmat, (void **)&sc->rbd_list, 450 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->rbd_map); 451 if (error != 0) { 452 device_printf(sc->sc_dev, 453 "could not allocate rx ring DMA memory\n"); 454 goto fail; 455 } 456 457 error = bus_dmamap_load(sc->rbd_dmat, sc->rbd_map, sc->rbd_list, 458 IPW_RBD_SZ, ipw_dma_map_addr, &sc->rbd_phys, 0); 459 if (error != 0) { 460 device_printf(sc->sc_dev, "could not map rx ring DMA memory\n"); 461 goto fail; 462 } 463 464 /* 465 * Allocate and map status ring. 466 */ 467 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 468 BUS_SPACE_MAXADDR, NULL, NULL, IPW_STATUS_SZ, 1, IPW_STATUS_SZ, 0, 469 NULL, NULL, &sc->status_dmat); 470 if (error != 0) { 471 device_printf(sc->sc_dev, 472 "could not create status ring DMA tag\n"); 473 goto fail; 474 } 475 476 error = bus_dmamem_alloc(sc->status_dmat, (void **)&sc->status_list, 477 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->status_map); 478 if (error != 0) { 479 device_printf(sc->sc_dev, 480 "could not allocate status ring DMA memory\n"); 481 goto fail; 482 } 483 484 error = bus_dmamap_load(sc->status_dmat, sc->status_map, 485 sc->status_list, IPW_STATUS_SZ, ipw_dma_map_addr, &sc->status_phys, 486 0); 487 if (error != 0) { 488 device_printf(sc->sc_dev, 489 "could not map status ring DMA memory\n"); 490 goto fail; 491 } 492 493 /* 494 * Allocate command DMA map. 495 */ 496 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 497 BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_cmd), 1, 498 sizeof (struct ipw_cmd), 0, NULL, NULL, &sc->cmd_dmat); 499 if (error != 0) { 500 device_printf(sc->sc_dev, "could not create command DMA tag\n"); 501 goto fail; 502 } 503 504 error = bus_dmamap_create(sc->cmd_dmat, 0, &sc->cmd_map); 505 if (error != 0) { 506 device_printf(sc->sc_dev, 507 "could not create command DMA map\n"); 508 goto fail; 509 } 510 511 /* 512 * Allocate headers DMA maps. 513 */ 514 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 515 BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_hdr), 1, 516 sizeof (struct ipw_hdr), 0, NULL, NULL, &sc->hdr_dmat); 517 if (error != 0) { 518 device_printf(sc->sc_dev, "could not create header DMA tag\n"); 519 goto fail; 520 } 521 522 SLIST_INIT(&sc->free_shdr); 523 for (i = 0; i < IPW_NDATA; i++) { 524 shdr = &sc->shdr_list[i]; 525 error = bus_dmamap_create(sc->hdr_dmat, 0, &shdr->map); 526 if (error != 0) { 527 device_printf(sc->sc_dev, 528 "could not create header DMA map\n"); 529 goto fail; 530 } 531 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next); 532 } 533 534 /* 535 * Allocate tx buffers DMA maps. 536 */ 537 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 538 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_MAX_NSEG, MCLBYTES, 0, 539 NULL, NULL, &sc->txbuf_dmat); 540 if (error != 0) { 541 device_printf(sc->sc_dev, "could not create tx DMA tag\n"); 542 goto fail; 543 } 544 545 SLIST_INIT(&sc->free_sbuf); 546 for (i = 0; i < IPW_NDATA; i++) { 547 sbuf = &sc->tx_sbuf_list[i]; 548 error = bus_dmamap_create(sc->txbuf_dmat, 0, &sbuf->map); 549 if (error != 0) { 550 device_printf(sc->sc_dev, 551 "could not create tx DMA map\n"); 552 goto fail; 553 } 554 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next); 555 } 556 557 /* 558 * Initialize tx ring. 559 */ 560 for (i = 0; i < IPW_NTBD; i++) { 561 sbd = &sc->stbd_list[i]; 562 sbd->bd = &sc->tbd_list[i]; 563 sbd->type = IPW_SBD_TYPE_NOASSOC; 564 } 565 566 /* 567 * Pre-allocate rx buffers and DMA maps. 568 */ 569 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 570 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0, NULL, 571 NULL, &sc->rxbuf_dmat); 572 if (error != 0) { 573 device_printf(sc->sc_dev, "could not create rx DMA tag\n"); 574 goto fail; 575 } 576 577 for (i = 0; i < IPW_NRBD; i++) { 578 sbd = &sc->srbd_list[i]; 579 sbuf = &sc->rx_sbuf_list[i]; 580 sbd->bd = &sc->rbd_list[i]; 581 582 sbuf->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 583 if (sbuf->m == NULL) { 584 device_printf(sc->sc_dev, 585 "could not allocate rx mbuf\n"); 586 error = ENOMEM; 587 goto fail; 588 } 589 590 error = bus_dmamap_create(sc->rxbuf_dmat, 0, &sbuf->map); 591 if (error != 0) { 592 device_printf(sc->sc_dev, 593 "could not create rx DMA map\n"); 594 goto fail; 595 } 596 597 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, 598 mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr, 599 &physaddr, 0); 600 if (error != 0) { 601 device_printf(sc->sc_dev, 602 "could not map rx DMA memory\n"); 603 goto fail; 604 } 605 606 sbd->type = IPW_SBD_TYPE_DATA; 607 sbd->priv = sbuf; 608 sbd->bd->physaddr = htole32(physaddr); 609 sbd->bd->len = htole32(MCLBYTES); 610 } 611 612 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE); 613 614 return 0; 615 616fail: ipw_release(sc); 617 return error; 618} 619 620static void 621ipw_release(struct ipw_softc *sc) 622{ 623 struct ipw_soft_buf *sbuf; 624 int i; 625 626 if (sc->tbd_dmat != NULL) { 627 if (sc->stbd_list != NULL) { 628 bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map); 629 bus_dmamem_free(sc->tbd_dmat, sc->tbd_list, 630 sc->tbd_map); 631 } 632 bus_dma_tag_destroy(sc->tbd_dmat); 633 } 634 635 if (sc->rbd_dmat != NULL) { 636 if (sc->rbd_list != NULL) { 637 bus_dmamap_unload(sc->rbd_dmat, sc->rbd_map); 638 bus_dmamem_free(sc->rbd_dmat, sc->rbd_list, 639 sc->rbd_map); 640 } 641 bus_dma_tag_destroy(sc->rbd_dmat); 642 } 643 644 if (sc->status_dmat != NULL) { 645 if (sc->status_list != NULL) { 646 bus_dmamap_unload(sc->status_dmat, sc->status_map); 647 bus_dmamem_free(sc->status_dmat, sc->status_list, 648 sc->status_map); 649 } 650 bus_dma_tag_destroy(sc->status_dmat); 651 } 652 653 for (i = 0; i < IPW_NTBD; i++) 654 ipw_release_sbd(sc, &sc->stbd_list[i]); 655 656 if (sc->cmd_dmat != NULL) { 657 bus_dmamap_destroy(sc->cmd_dmat, sc->cmd_map); 658 bus_dma_tag_destroy(sc->cmd_dmat); 659 } 660 661 if (sc->hdr_dmat != NULL) { 662 for (i = 0; i < IPW_NDATA; i++) 663 bus_dmamap_destroy(sc->hdr_dmat, sc->shdr_list[i].map); 664 bus_dma_tag_destroy(sc->hdr_dmat); 665 } 666 667 if (sc->txbuf_dmat != NULL) { 668 for (i = 0; i < IPW_NDATA; i++) { 669 bus_dmamap_destroy(sc->txbuf_dmat, 670 sc->tx_sbuf_list[i].map); 671 } 672 bus_dma_tag_destroy(sc->txbuf_dmat); 673 } 674 675 if (sc->rxbuf_dmat != NULL) { 676 for (i = 0; i < IPW_NRBD; i++) { 677 sbuf = &sc->rx_sbuf_list[i]; 678 if (sbuf->m != NULL) { 679 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, 680 BUS_DMASYNC_POSTREAD); 681 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map); 682 m_freem(sbuf->m); 683 } 684 bus_dmamap_destroy(sc->rxbuf_dmat, sbuf->map); 685 } 686 bus_dma_tag_destroy(sc->rxbuf_dmat); 687 } 688} 689 690static int 691ipw_shutdown(device_t dev) 692{ 693 struct ipw_softc *sc = device_get_softc(dev); 694 695 ipw_stop(sc); 696 697 return 0; 698} 699 700static int 701ipw_suspend(device_t dev) 702{ 703 struct ipw_softc *sc = device_get_softc(dev); 704 705 ipw_stop(sc); 706 707 return 0; 708} 709 710static int 711ipw_resume(device_t dev) 712{ 713 struct ipw_softc *sc = device_get_softc(dev); 714 struct ifnet *ifp = sc->sc_ic.ic_ifp; 715 716 mtx_lock(&sc->sc_mtx); 717 718 pci_write_config(dev, 0x41, 0, 1); 719 720 if (ifp->if_flags & IFF_UP) { 721 ifp->if_init(ifp->if_softc); 722 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 723 ifp->if_start(ifp); 724 } 725 726 mtx_unlock(&sc->sc_mtx); 727 728 return 0; 729} 730 731static int 732ipw_media_change(struct ifnet *ifp) 733{ 734 struct ipw_softc *sc = ifp->if_softc; 735 int error; 736 737 mtx_lock(&sc->sc_mtx); 738 739 error = ieee80211_media_change(ifp); 740 if (error != ENETRESET) { 741 mtx_unlock(&sc->sc_mtx); 742 return error; 743 } 744 745 if ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 746 ipw_init(sc); 747 748 mtx_unlock(&sc->sc_mtx); 749 750 return 0; 751} 752 753/* 754 * The firmware automatically adapts the transmit speed. We report its current 755 * value here. 756 */ 757static void 758ipw_media_status(struct ifnet *ifp, struct ifmediareq *imr) 759{ 760#define N(a) (sizeof (a) / sizeof (a[0])) 761 struct ipw_softc *sc = ifp->if_softc; 762 struct ieee80211com *ic = &sc->sc_ic; 763 static const struct { 764 uint32_t val; 765 int rate; 766 } rates[] = { 767 { IPW_RATE_DS1, 2 }, 768 { IPW_RATE_DS2, 4 }, 769 { IPW_RATE_DS5, 11 }, 770 { IPW_RATE_DS11, 22 }, 771 }; 772 uint32_t val; 773 int rate, i; 774 775 imr->ifm_status = IFM_AVALID; 776 imr->ifm_active = IFM_IEEE80211; 777 if (ic->ic_state == IEEE80211_S_RUN) 778 imr->ifm_status |= IFM_ACTIVE; 779 780 /* read current transmission rate from adapter */ 781 val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE) & 0xf; 782 783 /* convert ipw rate to 802.11 rate */ 784 for (i = 0; i < N(rates) && rates[i].val != val; i++); 785 rate = (i < N(rates)) ? rates[i].rate : 0; 786 787 imr->ifm_active |= IFM_IEEE80211_11B; 788 imr->ifm_active |= ieee80211_rate2media(ic, rate, IEEE80211_MODE_11B); 789 switch (ic->ic_opmode) { 790 case IEEE80211_M_STA: 791 break; 792 793 case IEEE80211_M_IBSS: 794 imr->ifm_active |= IFM_IEEE80211_IBSS; 795 break; 796 797 case IEEE80211_M_MONITOR: 798 imr->ifm_active |= IFM_IEEE80211_MONITOR; 799 break; 800 801 case IEEE80211_M_AHDEMO: 802 case IEEE80211_M_HOSTAP: 803 /* should not get there */ 804 break; 805 } 806#undef N 807} 808 809static int 810ipw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 811{ 812 struct ifnet *ifp = ic->ic_ifp; 813 struct ipw_softc *sc = ifp->if_softc; 814 struct ieee80211_node *ni; 815 uint8_t macaddr[IEEE80211_ADDR_LEN]; 816 uint32_t len; 817 818 switch (nstate) { 819 case IEEE80211_S_RUN: 820 DELAY(200); /* firmware needs a short delay here */ 821 822 len = IEEE80211_ADDR_LEN; 823 ipw_read_table2(sc, IPW_INFO_CURRENT_BSSID, macaddr, &len); 824 825 ni = ieee80211_find_node(&ic->ic_scan, macaddr); 826 if (ni == NULL) 827 break; 828 829 ieee80211_ref_node(ni); 830 ieee80211_sta_join(ic, ni); 831 ieee80211_node_authorize(ni); 832 833 if (ic->ic_opmode == IEEE80211_M_STA) 834 ieee80211_notify_node_join(ic, ni, 1); 835 break; 836 837 case IEEE80211_S_INIT: 838 case IEEE80211_S_SCAN: 839 case IEEE80211_S_AUTH: 840 case IEEE80211_S_ASSOC: 841 break; 842 } 843 844 ic->ic_state = nstate; 845 846 return 0; 847} 848 849/* 850 * Read 16 bits at address 'addr' from the serial EEPROM. 851 */ 852static uint16_t 853ipw_read_prom_word(struct ipw_softc *sc, uint8_t addr) 854{ 855 uint32_t tmp; 856 uint16_t val; 857 int n; 858 859 /* clock C once before the first command */ 860 IPW_EEPROM_CTL(sc, 0); 861 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 862 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C); 863 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 864 865 /* write start bit (1) */ 866 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D); 867 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C); 868 869 /* write READ opcode (10) */ 870 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D); 871 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C); 872 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 873 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C); 874 875 /* write address A7-A0 */ 876 for (n = 7; n >= 0; n--) { 877 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | 878 (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D)); 879 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | 880 (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D) | IPW_EEPROM_C); 881 } 882 883 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 884 885 /* read data Q15-Q0 */ 886 val = 0; 887 for (n = 15; n >= 0; n--) { 888 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C); 889 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 890 tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL); 891 val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n; 892 } 893 894 IPW_EEPROM_CTL(sc, 0); 895 896 /* clear Chip Select and clock C */ 897 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 898 IPW_EEPROM_CTL(sc, 0); 899 IPW_EEPROM_CTL(sc, IPW_EEPROM_C); 900 901 return le16toh(val); 902} 903 904static void 905ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf) 906{ 907 struct ipw_cmd *cmd; 908 909 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD); 910 911 cmd = mtod(sbuf->m, struct ipw_cmd *); 912 913 DPRINTFN(2, ("cmd ack'ed (%u, %u, %u, %u, %u)\n", le32toh(cmd->type), 914 le32toh(cmd->subtype), le32toh(cmd->seq), le32toh(cmd->len), 915 le32toh(cmd->status))); 916 917 wakeup(sc); 918} 919 920static void 921ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf) 922{ 923 struct ieee80211com *ic = &sc->sc_ic; 924 uint32_t state; 925 926 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD); 927 928 state = le32toh(*mtod(sbuf->m, uint32_t *)); 929 930 DPRINTFN(2, ("entering state %u\n", state)); 931 932 switch (state) { 933 case IPW_STATE_ASSOCIATED: 934 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 935 break; 936 937 case IPW_STATE_SCANNING: 938 /* don't leave run state on background scan */ 939 if (ic->ic_state != IEEE80211_S_RUN) 940 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 941 942 ic->ic_flags |= IEEE80211_F_SCAN; 943 break; 944 945 case IPW_STATE_SCAN_COMPLETE: 946 ieee80211_notify_scan_done(ic); 947 ic->ic_flags &= ~IEEE80211_F_SCAN; 948 break; 949 950 case IPW_STATE_ASSOCIATION_LOST: 951 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 952 break; 953 954 case IPW_STATE_RADIO_DISABLED: 955 ic->ic_ifp->if_flags &= ~IFF_UP; 956 ipw_stop(sc); 957 break; 958 } 959} 960 961/* 962 * XXX: Hack to set the current channel to the value advertised in beacons or 963 * probe responses. Only used during AP detection. 964 */ 965static void 966ipw_fix_channel(struct ieee80211com *ic, struct mbuf *m) 967{ 968 struct ieee80211_frame *wh; 969 uint8_t subtype; 970 uint8_t *frm, *efrm; 971 972 wh = mtod(m, struct ieee80211_frame *); 973 974 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_MGT) 975 return; 976 977 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 978 979 if (subtype != IEEE80211_FC0_SUBTYPE_BEACON && 980 subtype != IEEE80211_FC0_SUBTYPE_PROBE_RESP) 981 return; 982 983 frm = (uint8_t *)(wh + 1); 984 efrm = mtod(m, uint8_t *) + m->m_len; 985 986 frm += 12; /* skip tstamp, bintval and capinfo fields */ 987 while (frm < efrm) { 988 if (*frm == IEEE80211_ELEMID_DSPARMS) 989#if IEEE80211_CHAN_MAX < 255 990 if (frm[2] <= IEEE80211_CHAN_MAX) 991#endif 992 ic->ic_curchan = &ic->ic_channels[frm[2]]; 993 994 frm += frm[1] + 2; 995 } 996} 997 998static void 999ipw_data_intr(struct ipw_softc *sc, struct ipw_status *status, 1000 struct ipw_soft_bd *sbd, struct ipw_soft_buf *sbuf) 1001{ 1002 struct ieee80211com *ic = &sc->sc_ic; 1003 struct ifnet *ifp = ic->ic_ifp; 1004 struct mbuf *mnew, *m; 1005 struct ieee80211_frame *wh; 1006 struct ieee80211_node *ni; 1007 bus_addr_t physaddr; 1008 int error; 1009 1010 DPRINTFN(5, ("received frame len=%u, rssi=%u\n", le32toh(status->len), 1011 status->rssi)); 1012 1013 if (le32toh(status->len) < sizeof (struct ieee80211_frame_min) || 1014 le32toh(status->len) > MCLBYTES) 1015 return; 1016 1017 /* 1018 * Try to allocate a new mbuf for this ring element and load it before 1019 * processing the current mbuf. If the ring element cannot be loaded, 1020 * drop the received packet and reuse the old mbuf. In the unlikely 1021 * case that the old mbuf can't be reloaded either, explicitly panic. 1022 */ 1023 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1024 if (mnew == NULL) { 1025 ifp->if_ierrors++; 1026 return; 1027 } 1028 1029 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD); 1030 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map); 1031 1032 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, mtod(mnew, void *), 1033 MCLBYTES, ipw_dma_map_addr, &physaddr, 0); 1034 if (error != 0) { 1035 m_freem(mnew); 1036 1037 /* try to reload the old mbuf */ 1038 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, 1039 mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr, 1040 &physaddr, 0); 1041 if (error != 0) { 1042 /* very unlikely that it will fail... */ 1043 panic("%s: could not load old rx mbuf", 1044 device_get_name(sc->sc_dev)); 1045 } 1046 ifp->if_ierrors++; 1047 return; 1048 } 1049 1050 /* 1051 * New mbuf successfully loaded, update Rx ring and continue 1052 * processing. 1053 */ 1054 m = sbuf->m; 1055 sbuf->m = mnew; 1056 sbd->bd->physaddr = htole32(physaddr); 1057 1058 /* finalize mbuf */ 1059 m->m_pkthdr.rcvif = ifp; 1060 m->m_pkthdr.len = m->m_len = le32toh(status->len); 1061 1062 if (bpf_peers_present(sc->sc_drvbpf)) { 1063 struct ipw_rx_radiotap_header *tap = &sc->sc_rxtap; 1064 1065 tap->wr_flags = 0; 1066 tap->wr_antsignal = status->rssi; 1067 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1068 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1069 1070 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1071 } 1072 1073 if (ic->ic_state == IEEE80211_S_SCAN) 1074 ipw_fix_channel(ic, m); 1075 1076 wh = mtod(m, struct ieee80211_frame *); 1077 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1078 1079 /* send the frame to the 802.11 layer */ 1080 ieee80211_input(ic, m, ni, status->rssi, 0); 1081 1082 /* node is no longer needed */ 1083 ieee80211_free_node(ni); 1084 1085 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE); 1086} 1087 1088static void 1089ipw_rx_intr(struct ipw_softc *sc) 1090{ 1091 struct ipw_status *status; 1092 struct ipw_soft_bd *sbd; 1093 struct ipw_soft_buf *sbuf; 1094 uint32_t r, i; 1095 1096 if (!(sc->flags & IPW_FLAG_FW_INITED)) 1097 return; 1098 1099 r = CSR_READ_4(sc, IPW_CSR_RX_READ); 1100 1101 bus_dmamap_sync(sc->status_dmat, sc->status_map, BUS_DMASYNC_POSTREAD); 1102 1103 for (i = (sc->rxcur + 1) % IPW_NRBD; i != r; i = (i + 1) % IPW_NRBD) { 1104 status = &sc->status_list[i]; 1105 sbd = &sc->srbd_list[i]; 1106 sbuf = sbd->priv; 1107 1108 switch (le16toh(status->code) & 0xf) { 1109 case IPW_STATUS_CODE_COMMAND: 1110 ipw_command_intr(sc, sbuf); 1111 break; 1112 1113 case IPW_STATUS_CODE_NEWSTATE: 1114 ipw_newstate_intr(sc, sbuf); 1115 break; 1116 1117 case IPW_STATUS_CODE_DATA_802_3: 1118 case IPW_STATUS_CODE_DATA_802_11: 1119 ipw_data_intr(sc, status, sbd, sbuf); 1120 break; 1121 1122 case IPW_STATUS_CODE_NOTIFICATION: 1123 DPRINTFN(2, ("received notification\n")); 1124 break; 1125 1126 default: 1127 device_printf(sc->sc_dev, "unknown status code %u\n", 1128 le16toh(status->code)); 1129 } 1130 1131 /* firmware was killed, stop processing received frames */ 1132 if (!(sc->flags & IPW_FLAG_FW_INITED)) 1133 return; 1134 1135 sbd->bd->flags = 0; 1136 } 1137 1138 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE); 1139 1140 /* kick the firmware */ 1141 sc->rxcur = (r == 0) ? IPW_NRBD - 1 : r - 1; 1142 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur); 1143} 1144 1145static void 1146ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd) 1147{ 1148 struct ipw_soft_hdr *shdr; 1149 struct ipw_soft_buf *sbuf; 1150 1151 switch (sbd->type) { 1152 case IPW_SBD_TYPE_COMMAND: 1153 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, 1154 BUS_DMASYNC_POSTWRITE); 1155 bus_dmamap_unload(sc->cmd_dmat, sc->cmd_map); 1156 break; 1157 1158 case IPW_SBD_TYPE_HEADER: 1159 shdr = sbd->priv; 1160 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_POSTWRITE); 1161 bus_dmamap_unload(sc->hdr_dmat, shdr->map); 1162 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next); 1163 break; 1164 1165 case IPW_SBD_TYPE_DATA: 1166 sbuf = sbd->priv; 1167 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, 1168 BUS_DMASYNC_POSTWRITE); 1169 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map); 1170 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next); 1171 1172 m_freem(sbuf->m); 1173 ieee80211_free_node(sbuf->ni); 1174 1175 sc->sc_tx_timer = 0; 1176 break; 1177 } 1178 1179 sbd->type = IPW_SBD_TYPE_NOASSOC; 1180} 1181 1182static void 1183ipw_tx_intr(struct ipw_softc *sc) 1184{ 1185 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1186 struct ipw_soft_bd *sbd; 1187 uint32_t r, i; 1188 1189 if (!(sc->flags & IPW_FLAG_FW_INITED)) 1190 return; 1191 1192 r = CSR_READ_4(sc, IPW_CSR_TX_READ); 1193 1194 for (i = (sc->txold + 1) % IPW_NTBD; i != r; i = (i + 1) % IPW_NTBD) { 1195 sbd = &sc->stbd_list[i]; 1196 1197 if (sbd->type == IPW_SBD_TYPE_DATA) 1198 ifp->if_opackets++; 1199 1200 ipw_release_sbd(sc, sbd); 1201 sc->txfree++; 1202 } 1203 1204 /* remember what the firmware has processed */ 1205 sc->txold = (r == 0) ? IPW_NTBD - 1 : r - 1; 1206 1207 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1208 ipw_start(ifp); 1209} 1210 1211static void 1212ipw_intr(void *arg) 1213{ 1214 struct ipw_softc *sc = arg; 1215 uint32_t r; 1216 1217 mtx_lock(&sc->sc_mtx); 1218 1219 if ((r = CSR_READ_4(sc, IPW_CSR_INTR)) == 0 || r == 0xffffffff) { 1220 mtx_unlock(&sc->sc_mtx); 1221 return; 1222 } 1223 1224 /* disable interrupts */ 1225 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0); 1226 1227 /* acknowledge all interrupts */ 1228 CSR_WRITE_4(sc, IPW_CSR_INTR, r); 1229 1230 if (r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)) { 1231 device_printf(sc->sc_dev, "firmware error\n"); 1232 taskqueue_enqueue_fast(taskqueue_fast, &sc->sc_init_task); 1233 r = 0; /* don't process more interrupts */ 1234 } 1235 1236 if (r & IPW_INTR_FW_INIT_DONE) 1237 wakeup(sc); 1238 1239 if (r & IPW_INTR_RX_TRANSFER) 1240 ipw_rx_intr(sc); 1241 1242 if (r & IPW_INTR_TX_TRANSFER) 1243 ipw_tx_intr(sc); 1244 1245 /* re-enable interrupts */ 1246 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK); 1247 1248 mtx_unlock(&sc->sc_mtx); 1249} 1250 1251static void 1252ipw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1253{ 1254 if (error != 0) 1255 return; 1256 1257 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 1258 1259 *(bus_addr_t *)arg = segs[0].ds_addr; 1260} 1261 1262/* 1263 * Send a command to the firmware and wait for the acknowledgement. 1264 */ 1265static int 1266ipw_cmd(struct ipw_softc *sc, uint32_t type, void *data, uint32_t len) 1267{ 1268 struct ipw_soft_bd *sbd; 1269 bus_addr_t physaddr; 1270 int error; 1271 1272 sbd = &sc->stbd_list[sc->txcur]; 1273 1274 error = bus_dmamap_load(sc->cmd_dmat, sc->cmd_map, &sc->cmd, 1275 sizeof (struct ipw_cmd), ipw_dma_map_addr, &physaddr, 0); 1276 if (error != 0) { 1277 device_printf(sc->sc_dev, "could not map command DMA memory\n"); 1278 return error; 1279 } 1280 1281 sc->cmd.type = htole32(type); 1282 sc->cmd.subtype = 0; 1283 sc->cmd.len = htole32(len); 1284 sc->cmd.seq = 0; 1285 memcpy(sc->cmd.data, data, len); 1286 1287 sbd->type = IPW_SBD_TYPE_COMMAND; 1288 sbd->bd->physaddr = htole32(physaddr); 1289 sbd->bd->len = htole32(sizeof (struct ipw_cmd)); 1290 sbd->bd->nfrag = 1; 1291 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_COMMAND | 1292 IPW_BD_FLAG_TX_LAST_FRAGMENT; 1293 1294 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, BUS_DMASYNC_PREWRITE); 1295 bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE); 1296 1297 DPRINTFN(2, ("sending command (%u, %u, %u, %u)\n", type, 0, 0, len)); 1298 1299 /* kick firmware */ 1300 sc->txfree--; 1301 sc->txcur = (sc->txcur + 1) % IPW_NTBD; 1302 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 1303 1304 /* wait at most one second for command to complete */ 1305 return msleep(sc, &sc->sc_mtx, 0, "ipwcmd", hz); 1306} 1307 1308static int 1309ipw_tx_start(struct ifnet *ifp, struct mbuf *m0, struct ieee80211_node *ni) 1310{ 1311 struct ipw_softc *sc = ifp->if_softc; 1312 struct ieee80211com *ic = &sc->sc_ic; 1313 struct ieee80211_frame *wh; 1314 struct ipw_soft_bd *sbd; 1315 struct ipw_soft_hdr *shdr; 1316 struct ipw_soft_buf *sbuf; 1317 struct ieee80211_key *k; 1318 struct mbuf *mnew; 1319 bus_dma_segment_t segs[IPW_MAX_NSEG]; 1320 bus_addr_t physaddr; 1321 int nsegs, error, i; 1322 1323 wh = mtod(m0, struct ieee80211_frame *); 1324 1325 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1326 k = ieee80211_crypto_encap(ic, ni, m0); 1327 if (k == NULL) { 1328 m_freem(m0); 1329 return ENOBUFS; 1330 } 1331 1332 /* packet header may have moved, reset our local pointer */ 1333 wh = mtod(m0, struct ieee80211_frame *); 1334 } 1335 1336 if (bpf_peers_present(sc->sc_drvbpf)) { 1337 struct ipw_tx_radiotap_header *tap = &sc->sc_txtap; 1338 1339 tap->wt_flags = 0; 1340 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1341 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1342 1343 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1344 } 1345 1346 shdr = SLIST_FIRST(&sc->free_shdr); 1347 sbuf = SLIST_FIRST(&sc->free_sbuf); 1348 KASSERT(shdr != NULL && sbuf != NULL, ("empty sw hdr/buf pool")); 1349 1350 shdr->hdr.type = htole32(IPW_HDR_TYPE_SEND); 1351 shdr->hdr.subtype = 0; 1352 shdr->hdr.encrypted = (wh->i_fc[1] & IEEE80211_FC1_WEP) ? 1 : 0; 1353 shdr->hdr.encrypt = 0; 1354 shdr->hdr.keyidx = 0; 1355 shdr->hdr.keysz = 0; 1356 shdr->hdr.fragmentsz = 0; 1357 IEEE80211_ADDR_COPY(shdr->hdr.src_addr, wh->i_addr2); 1358 if (ic->ic_opmode == IEEE80211_M_STA) 1359 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr3); 1360 else 1361 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr1); 1362 1363 /* trim IEEE802.11 header */ 1364 m_adj(m0, sizeof (struct ieee80211_frame)); 1365 1366 error = bus_dmamap_load_mbuf_sg(sc->txbuf_dmat, sbuf->map, m0, segs, 1367 &nsegs, 0); 1368 if (error != 0 && error != EFBIG) { 1369 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1370 error); 1371 m_freem(m0); 1372 return error; 1373 } 1374 if (error != 0) { 1375 mnew = m_defrag(m0, M_DONTWAIT); 1376 if (mnew == NULL) { 1377 device_printf(sc->sc_dev, 1378 "could not defragment mbuf\n"); 1379 m_freem(m0); 1380 return ENOBUFS; 1381 } 1382 m0 = mnew; 1383 1384 error = bus_dmamap_load_mbuf_sg(sc->txbuf_dmat, sbuf->map, m0, 1385 segs, &nsegs, 0); 1386 if (error != 0) { 1387 device_printf(sc->sc_dev, 1388 "could not map mbuf (error %d)\n", error); 1389 m_freem(m0); 1390 return error; 1391 } 1392 } 1393 1394 error = bus_dmamap_load(sc->hdr_dmat, shdr->map, &shdr->hdr, 1395 sizeof (struct ipw_hdr), ipw_dma_map_addr, &physaddr, 0); 1396 if (error != 0) { 1397 device_printf(sc->sc_dev, "could not map header DMA memory\n"); 1398 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map); 1399 m_freem(m0); 1400 return error; 1401 } 1402 1403 SLIST_REMOVE_HEAD(&sc->free_sbuf, next); 1404 SLIST_REMOVE_HEAD(&sc->free_shdr, next); 1405 1406 sbd = &sc->stbd_list[sc->txcur]; 1407 sbd->type = IPW_SBD_TYPE_HEADER; 1408 sbd->priv = shdr; 1409 sbd->bd->physaddr = htole32(physaddr); 1410 sbd->bd->len = htole32(sizeof (struct ipw_hdr)); 1411 sbd->bd->nfrag = 1 + nsegs; 1412 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3 | 1413 IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT; 1414 1415 DPRINTFN(5, ("sending tx hdr (%u, %u, %u, %u, %6D, %6D)\n", 1416 shdr->hdr.type, shdr->hdr.subtype, shdr->hdr.encrypted, 1417 shdr->hdr.encrypt, shdr->hdr.src_addr, ":", shdr->hdr.dst_addr, 1418 ":")); 1419 1420 sc->txfree--; 1421 sc->txcur = (sc->txcur + 1) % IPW_NTBD; 1422 1423 sbuf->m = m0; 1424 sbuf->ni = ni; 1425 1426 for (i = 0; i < nsegs; i++) { 1427 sbd = &sc->stbd_list[sc->txcur]; 1428 1429 sbd->bd->physaddr = htole32(segs[i].ds_addr); 1430 sbd->bd->len = htole32(segs[i].ds_len); 1431 sbd->bd->nfrag = 0; 1432 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3; 1433 if (i == nsegs - 1) { 1434 sbd->type = IPW_SBD_TYPE_DATA; 1435 sbd->priv = sbuf; 1436 sbd->bd->flags |= IPW_BD_FLAG_TX_LAST_FRAGMENT; 1437 } else { 1438 sbd->type = IPW_SBD_TYPE_NOASSOC; 1439 sbd->bd->flags |= IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT; 1440 } 1441 1442 DPRINTFN(5, ("sending fragment (%d, %d)\n", i, segs[i].ds_len)); 1443 1444 sc->txfree--; 1445 sc->txcur = (sc->txcur + 1) % IPW_NTBD; 1446 } 1447 1448 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_PREWRITE); 1449 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, BUS_DMASYNC_PREWRITE); 1450 bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE); 1451 1452 /* kick firmware */ 1453 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 1454 1455 return 0; 1456} 1457 1458static void 1459ipw_start(struct ifnet *ifp) 1460{ 1461 struct ipw_softc *sc = ifp->if_softc; 1462 struct ieee80211com *ic = &sc->sc_ic; 1463 struct mbuf *m0; 1464 struct ether_header *eh; 1465 struct ieee80211_node *ni; 1466 1467 mtx_lock(&sc->sc_mtx); 1468 1469 if (ic->ic_state != IEEE80211_S_RUN) { 1470 mtx_unlock(&sc->sc_mtx); 1471 return; 1472 } 1473 1474 for (;;) { 1475 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0); 1476 if (m0 == NULL) 1477 break; 1478 1479 if (sc->txfree < 1 + IPW_MAX_NSEG) { 1480 IFQ_DRV_PREPEND(&ifp->if_snd, m0); 1481 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1482 break; 1483 } 1484 1485 if (m0->m_len < sizeof (struct ether_header) && 1486 (m0 = m_pullup(m0, sizeof (struct ether_header))) == NULL) 1487 continue; 1488 1489 eh = mtod(m0, struct ether_header *); 1490 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1491 if (ni == NULL) { 1492 m_freem(m0); 1493 continue; 1494 } 1495 BPF_MTAP(ifp, m0); 1496 1497 m0 = ieee80211_encap(ic, m0, ni); 1498 if (m0 == NULL) { 1499 ieee80211_free_node(ni); 1500 continue; 1501 } 1502 1503 if (bpf_peers_present(ic->ic_rawbpf)) 1504 bpf_mtap(ic->ic_rawbpf, m0); 1505 1506 if (ipw_tx_start(ifp, m0, ni) != 0) { 1507 ieee80211_free_node(ni); 1508 ifp->if_oerrors++; 1509 break; 1510 } 1511 1512 /* start watchdog timer */ 1513 sc->sc_tx_timer = 5; 1514 ifp->if_timer = 1; 1515 } 1516 1517 mtx_unlock(&sc->sc_mtx); 1518} 1519 1520static void 1521ipw_watchdog(struct ifnet *ifp) 1522{ 1523 struct ipw_softc *sc = ifp->if_softc; 1524 struct ieee80211com *ic = &sc->sc_ic; 1525 1526 mtx_lock(&sc->sc_mtx); 1527 1528 ifp->if_timer = 0; 1529 1530 if (sc->sc_tx_timer > 0) { 1531 if (--sc->sc_tx_timer == 0) { 1532 if_printf(ifp, "device timeout\n"); 1533 ifp->if_oerrors++; 1534 taskqueue_enqueue_fast(taskqueue_fast, 1535 &sc->sc_init_task); 1536 mtx_unlock(&sc->sc_mtx); 1537 return; 1538 } 1539 ifp->if_timer = 1; 1540 } 1541 1542 ieee80211_watchdog(ic); 1543 1544 mtx_unlock(&sc->sc_mtx); 1545} 1546 1547static int 1548ipw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1549{ 1550 struct ipw_softc *sc = ifp->if_softc; 1551 struct ieee80211com *ic = &sc->sc_ic; 1552 int error = 0; 1553 1554 mtx_lock(&sc->sc_mtx); 1555 1556 switch (cmd) { 1557 case SIOCSIFFLAGS: 1558 if (ifp->if_flags & IFF_UP) { 1559 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1560 ipw_init(sc); 1561 } else { 1562 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1563 ipw_stop(sc); 1564 } 1565 break; 1566 1567 default: 1568 error = ieee80211_ioctl(ic, cmd, data); 1569 } 1570 1571 if (error == ENETRESET) { 1572 if ((ifp->if_flags & IFF_UP) && 1573 (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1574 ipw_init(sc); 1575 error = 0; 1576 } 1577 1578 mtx_unlock(&sc->sc_mtx); 1579 1580 return error; 1581} 1582 1583static void 1584ipw_stop_master(struct ipw_softc *sc) 1585{ 1586 uint32_t tmp; 1587 int ntries; 1588 1589 /* disable interrupts */ 1590 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0); 1591 1592 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER); 1593 for (ntries = 0; ntries < 50; ntries++) { 1594 if (CSR_READ_4(sc, IPW_CSR_RST) & IPW_RST_MASTER_DISABLED) 1595 break; 1596 DELAY(10); 1597 } 1598 if (ntries == 50) 1599 device_printf(sc->sc_dev, "timeout waiting for master\n"); 1600 1601 tmp = CSR_READ_4(sc, IPW_CSR_RST); 1602 CSR_WRITE_4(sc, IPW_CSR_RST, tmp | IPW_RST_PRINCETON_RESET); 1603 1604 sc->flags &= ~IPW_FLAG_FW_INITED; 1605} 1606 1607static int 1608ipw_reset(struct ipw_softc *sc) 1609{ 1610 uint32_t tmp; 1611 int ntries; 1612 1613 ipw_stop_master(sc); 1614 1615 /* move adapter to D0 state */ 1616 tmp = CSR_READ_4(sc, IPW_CSR_CTL); 1617 CSR_WRITE_4(sc, IPW_CSR_CTL, tmp | IPW_CTL_INIT); 1618 1619 /* wait for clock stabilization */ 1620 for (ntries = 0; ntries < 1000; ntries++) { 1621 if (CSR_READ_4(sc, IPW_CSR_CTL) & IPW_CTL_CLOCK_READY) 1622 break; 1623 DELAY(200); 1624 } 1625 if (ntries == 1000) 1626 return EIO; 1627 1628 tmp = CSR_READ_4(sc, IPW_CSR_RST); 1629 CSR_WRITE_4(sc, IPW_CSR_RST, tmp | IPW_RST_SW_RESET); 1630 1631 DELAY(10); 1632 1633 tmp = CSR_READ_4(sc, IPW_CSR_CTL); 1634 CSR_WRITE_4(sc, IPW_CSR_CTL, tmp | IPW_CTL_INIT); 1635 1636 return 0; 1637} 1638 1639/* 1640 * Upload the microcode to the device. 1641 */ 1642static int 1643ipw_load_ucode(struct ipw_softc *sc, const char *uc, int size) 1644{ 1645 int ntries; 1646 1647 MEM_WRITE_4(sc, 0x3000e0, 0x80000000); 1648 CSR_WRITE_4(sc, IPW_CSR_RST, 0); 1649 1650 MEM_WRITE_2(sc, 0x220000, 0x0703); 1651 MEM_WRITE_2(sc, 0x220000, 0x0707); 1652 1653 MEM_WRITE_1(sc, 0x210014, 0x72); 1654 MEM_WRITE_1(sc, 0x210014, 0x72); 1655 1656 MEM_WRITE_1(sc, 0x210000, 0x40); 1657 MEM_WRITE_1(sc, 0x210000, 0x00); 1658 MEM_WRITE_1(sc, 0x210000, 0x40); 1659 1660 MEM_WRITE_MULTI_1(sc, 0x210010, uc, size); 1661 1662 MEM_WRITE_1(sc, 0x210000, 0x00); 1663 MEM_WRITE_1(sc, 0x210000, 0x00); 1664 MEM_WRITE_1(sc, 0x210000, 0x80); 1665 1666 MEM_WRITE_2(sc, 0x220000, 0x0703); 1667 MEM_WRITE_2(sc, 0x220000, 0x0707); 1668 1669 MEM_WRITE_1(sc, 0x210014, 0x72); 1670 MEM_WRITE_1(sc, 0x210014, 0x72); 1671 1672 MEM_WRITE_1(sc, 0x210000, 0x00); 1673 MEM_WRITE_1(sc, 0x210000, 0x80); 1674 1675 for (ntries = 0; ntries < 10; ntries++) { 1676 if (MEM_READ_1(sc, 0x210000) & 1) 1677 break; 1678 DELAY(10); 1679 } 1680 if (ntries == 10) { 1681 device_printf(sc->sc_dev, 1682 "timeout waiting for ucode to initialize\n"); 1683 return EIO; 1684 } 1685 1686 MEM_WRITE_4(sc, 0x3000e0, 0); 1687 1688 return 0; 1689} 1690 1691/* set of macros to handle unaligned little endian data in firmware image */ 1692#define GETLE32(p) ((p)[0] | (p)[1] << 8 | (p)[2] << 16 | (p)[3] << 24) 1693#define GETLE16(p) ((p)[0] | (p)[1] << 8) 1694static int 1695ipw_load_firmware(struct ipw_softc *sc, const char *fw, int size) 1696{ 1697 const uint8_t *p, *end; 1698 uint32_t tmp, dst; 1699 uint16_t len; 1700 int error; 1701 1702 p = fw; 1703 end = fw + size; 1704 while (p < end) { 1705 dst = GETLE32(p); p += 4; 1706 len = GETLE16(p); p += 2; 1707 1708 ipw_write_mem_1(sc, dst, p, len); 1709 p += len; 1710 } 1711 1712 CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK | 1713 IPW_IO_LED_OFF); 1714 1715 /* enable interrupts */ 1716 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK); 1717 1718 /* kick the firmware */ 1719 CSR_WRITE_4(sc, IPW_CSR_RST, 0); 1720 1721 tmp = CSR_READ_4(sc, IPW_CSR_CTL); 1722 CSR_WRITE_4(sc, IPW_CSR_CTL, tmp | IPW_CTL_ALLOW_STANDBY); 1723 1724 /* wait at most one second for firmware initialization to complete */ 1725 if ((error = msleep(sc, &sc->sc_mtx, 0, "ipwinit", hz)) != 0) { 1726 device_printf(sc->sc_dev, "timeout waiting for firmware " 1727 "initialization to complete\n"); 1728 return error; 1729 } 1730 1731 tmp = CSR_READ_4(sc, IPW_CSR_IO); 1732 CSR_WRITE_4(sc, IPW_CSR_IO, tmp | IPW_IO_GPIO1_MASK | 1733 IPW_IO_GPIO3_MASK); 1734 1735 return 0; 1736} 1737 1738static int 1739ipw_config(struct ipw_softc *sc) 1740{ 1741 struct ieee80211com *ic = &sc->sc_ic; 1742 struct ifnet *ifp = ic->ic_ifp; 1743 struct ipw_security security; 1744 struct ieee80211_key *k; 1745 struct ipw_wep_key wepkey; 1746 struct ipw_scan_options options; 1747 struct ipw_configuration config; 1748 uint32_t data; 1749 int error, i; 1750 1751 switch (ic->ic_opmode) { 1752 case IEEE80211_M_STA: 1753 case IEEE80211_M_HOSTAP: 1754 data = htole32(IPW_MODE_BSS); 1755 break; 1756 case IEEE80211_M_IBSS: 1757 case IEEE80211_M_AHDEMO: 1758 data = htole32(IPW_MODE_IBSS); 1759 break; 1760 case IEEE80211_M_MONITOR: 1761 data = htole32(IPW_MODE_MONITOR); 1762 break; 1763 } 1764 DPRINTF(("Setting mode to %u\n", le32toh(data))); 1765 error = ipw_cmd(sc, IPW_CMD_SET_MODE, &data, sizeof data); 1766 if (error != 0) 1767 return error; 1768 1769 if (ic->ic_opmode == IEEE80211_M_IBSS || 1770 ic->ic_opmode == IEEE80211_M_MONITOR) { 1771 data = htole32(ieee80211_chan2ieee(ic, ic->ic_curchan)); 1772 DPRINTF(("Setting channel to %u\n", le32toh(data))); 1773 error = ipw_cmd(sc, IPW_CMD_SET_CHANNEL, &data, sizeof data); 1774 if (error != 0) 1775 return error; 1776 } 1777 1778 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 1779 DPRINTF(("Enabling adapter\n")); 1780 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0); 1781 } 1782 1783 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp)); 1784 DPRINTF(("Setting MAC address to %6D\n", ic->ic_myaddr, ":")); 1785 error = ipw_cmd(sc, IPW_CMD_SET_MAC_ADDRESS, ic->ic_myaddr, 1786 IEEE80211_ADDR_LEN); 1787 if (error != 0) 1788 return error; 1789 1790 config.flags = htole32(IPW_CFG_BSS_MASK | IPW_CFG_IBSS_MASK | 1791 IPW_CFG_PREAMBLE_AUTO | IPW_CFG_802_1x_ENABLE); 1792 if (ic->ic_opmode == IEEE80211_M_IBSS) 1793 config.flags |= htole32(IPW_CFG_IBSS_AUTO_START); 1794 if (ifp->if_flags & IFF_PROMISC) 1795 config.flags |= htole32(IPW_CFG_PROMISCUOUS); 1796 config.bss_chan = htole32(0x3fff); /* channels 1-14 */ 1797 config.ibss_chan = htole32(0x7ff); /* channels 1-11 */ 1798 DPRINTF(("Setting configuration to 0x%x\n", le32toh(config.flags))); 1799 error = ipw_cmd(sc, IPW_CMD_SET_CONFIGURATION, &config, sizeof config); 1800 if (error != 0) 1801 return error; 1802 1803 data = htole32(0x3); /* 1, 2 */ 1804 DPRINTF(("Setting basic tx rates to 0x%x\n", le32toh(data))); 1805 error = ipw_cmd(sc, IPW_CMD_SET_BASIC_TX_RATES, &data, sizeof data); 1806 if (error != 0) 1807 return error; 1808 1809 data = htole32(0xf); /* 1, 2, 5.5, 11 */ 1810 DPRINTF(("Setting tx rates to 0x%x\n", le32toh(data))); 1811 error = ipw_cmd(sc, IPW_CMD_SET_TX_RATES, &data, sizeof data); 1812 if (error != 0) 1813 return error; 1814 1815 data = htole32(IPW_POWER_MODE_CAM); 1816 DPRINTF(("Setting power mode to %u\n", le32toh(data))); 1817 error = ipw_cmd(sc, IPW_CMD_SET_POWER_MODE, &data, sizeof data); 1818 if (error != 0) 1819 return error; 1820 1821 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1822 data = htole32(32); /* default value */ 1823 DPRINTF(("Setting tx power index to %u\n", le32toh(data))); 1824 error = ipw_cmd(sc, IPW_CMD_SET_TX_POWER_INDEX, &data, 1825 sizeof data); 1826 if (error != 0) 1827 return error; 1828 } 1829 1830 data = htole32(ic->ic_rtsthreshold); 1831 DPRINTF(("Setting RTS threshold to %u\n", le32toh(data))); 1832 error = ipw_cmd(sc, IPW_CMD_SET_RTS_THRESHOLD, &data, sizeof data); 1833 if (error != 0) 1834 return error; 1835 1836 data = htole32(ic->ic_fragthreshold); 1837 DPRINTF(("Setting frag threshold to %u\n", le32toh(data))); 1838 error = ipw_cmd(sc, IPW_CMD_SET_FRAG_THRESHOLD, &data, sizeof data); 1839 if (error != 0) 1840 return error; 1841 1842#ifdef IPW_DEBUG 1843 if (ipw_debug > 0) { 1844 printf("Setting ESSID to "); 1845 ieee80211_print_essid(ic->ic_des_essid, ic->ic_des_esslen); 1846 printf("\n"); 1847 } 1848#endif 1849 error = ipw_cmd(sc, IPW_CMD_SET_ESSID, ic->ic_des_essid, 1850 ic->ic_des_esslen); 1851 if (error != 0) 1852 return error; 1853 1854 /* no mandatory BSSID */ 1855 DPRINTF(("Setting mandatory BSSID to null\n")); 1856 error = ipw_cmd(sc, IPW_CMD_SET_MANDATORY_BSSID, NULL, 0); 1857 if (error != 0) 1858 return error; 1859 1860 if (ic->ic_flags & IEEE80211_F_DESBSSID) { 1861 DPRINTF(("Setting desired BSSID to %6D\n", ic->ic_des_bssid, 1862 ":")); 1863 error = ipw_cmd(sc, IPW_CMD_SET_DESIRED_BSSID, 1864 ic->ic_des_bssid, IEEE80211_ADDR_LEN); 1865 if (error != 0) 1866 return error; 1867 } 1868 1869 memset(&security, 0, sizeof security); 1870 security.authmode = (ic->ic_bss->ni_authmode == IEEE80211_AUTH_SHARED) ? 1871 IPW_AUTH_SHARED : IPW_AUTH_OPEN; 1872 security.ciphers = htole32(IPW_CIPHER_NONE); 1873 DPRINTF(("Setting authmode to %u\n", security.authmode)); 1874 error = ipw_cmd(sc, IPW_CMD_SET_SECURITY_INFORMATION, &security, 1875 sizeof security); 1876 if (error != 0) 1877 return error; 1878 1879 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 1880 k = ic->ic_crypto.cs_nw_keys; 1881 for (i = 0; i < IEEE80211_WEP_NKID; i++, k++) { 1882 if (k->wk_keylen == 0) 1883 continue; 1884 1885 wepkey.idx = i; 1886 wepkey.len = k->wk_keylen; 1887 memset(wepkey.key, 0, sizeof wepkey.key); 1888 memcpy(wepkey.key, k->wk_key, k->wk_keylen); 1889 DPRINTF(("Setting wep key index %u len %u\n", 1890 wepkey.idx, wepkey.len)); 1891 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY, &wepkey, 1892 sizeof wepkey); 1893 if (error != 0) 1894 return error; 1895 } 1896 1897 data = htole32(ic->ic_crypto.cs_def_txkey); 1898 DPRINTF(("Setting wep tx key index to %u\n", le32toh(data))); 1899 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY_INDEX, &data, 1900 sizeof data); 1901 if (error != 0) 1902 return error; 1903 } 1904 1905 data = htole32((ic->ic_flags & IEEE80211_F_PRIVACY) ? IPW_WEPON : 0); 1906 DPRINTF(("Setting wep flags to 0x%x\n", le32toh(data))); 1907 error = ipw_cmd(sc, IPW_CMD_SET_WEP_FLAGS, &data, sizeof data); 1908 if (error != 0) 1909 return error; 1910 1911#if 0 1912 struct ipw_wpa_ie ie; 1913 1914 memset(&ie, 0, sizeof ie); 1915 ie.len = htole32(sizeof (struct ieee80211_ie_wpa)); 1916 DPRINTF(("Setting wpa ie\n")); 1917 error = ipw_cmd(sc, IPW_CMD_SET_WPA_IE, &ie, sizeof ie); 1918 if (error != 0) 1919 return error; 1920#endif 1921 1922 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1923 data = htole32(ic->ic_bintval); 1924 DPRINTF(("Setting beacon interval to %u\n", le32toh(data))); 1925 error = ipw_cmd(sc, IPW_CMD_SET_BEACON_INTERVAL, &data, 1926 sizeof data); 1927 if (error != 0) 1928 return error; 1929 } 1930 1931 options.flags = 0; 1932 options.channels = htole32(0x3fff); /* scan channels 1-14 */ 1933 DPRINTF(("Setting scan options to 0x%x\n", le32toh(options.flags))); 1934 error = ipw_cmd(sc, IPW_CMD_SET_SCAN_OPTIONS, &options, sizeof options); 1935 if (error != 0) 1936 return error; 1937 1938 /* finally, enable adapter (start scanning for an access point) */ 1939 DPRINTF(("Enabling adapter\n")); 1940 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0); 1941} 1942 1943/* 1944 * Handler for sc_init_task. This is a simple wrapper around ipw_init(). 1945 * It is called on firmware panics or on watchdog timeouts. 1946 */ 1947static void 1948ipw_init_task(void *context, int pending) 1949{ 1950 ipw_init(context); 1951} 1952 1953static void 1954ipw_init(void *priv) 1955{ 1956 struct ipw_softc *sc = priv; 1957 struct ieee80211com *ic = &sc->sc_ic; 1958 struct ifnet *ifp = ic->ic_ifp; 1959 struct firmware *fp; 1960 const struct ipw_firmware_hdr *hdr; 1961 const char *imagename, *fw; 1962 int owned; 1963 1964 /* 1965 * ipw_init() is exposed through ifp->if_init so it might be called 1966 * without the driver's lock held. Since msleep() doesn't like being 1967 * called on a recursed mutex, we acquire the driver's lock only if 1968 * we're not already holding it. 1969 */ 1970 if (!(owned = mtx_owned(&sc->sc_mtx))) 1971 mtx_lock(&sc->sc_mtx); 1972 1973 /* 1974 * Avoid re-entrant calls. We need to release the mutex in ipw_init() 1975 * when loading the firmware and we don't want to be called during this 1976 * operation. 1977 */ 1978 if (sc->flags & IPW_FLAG_INIT_LOCKED) { 1979 if (!owned) 1980 mtx_unlock(&sc->sc_mtx); 1981 return; 1982 } 1983 sc->flags |= IPW_FLAG_INIT_LOCKED; 1984 1985 ipw_stop(sc); 1986 1987 if (ipw_reset(sc) != 0) { 1988 device_printf(sc->sc_dev, "could not reset adapter\n"); 1989 goto fail1; 1990 } 1991 1992 switch (ic->ic_opmode) { 1993 case IEEE80211_M_STA: 1994 imagename = "ipw_bss"; 1995 break; 1996 case IEEE80211_M_IBSS: 1997 imagename = "ipw_ibss"; 1998 break; 1999 case IEEE80211_M_MONITOR: 2000 imagename = "ipw_monitor"; 2001 break; 2002 default: 2003 imagename = NULL; /* should not get there */ 2004 } 2005 2006 /* 2007 * Load firmware image using the firmware(9) subsystem. We need to 2008 * release the driver's lock first. 2009 */ 2010 if (sc->sc_firmware == NULL || strcmp(sc->sc_firmware->name, 2011 imagename) != 0) { 2012 mtx_unlock(&sc->sc_mtx); 2013 if (sc->sc_firmware != NULL) 2014 firmware_put(sc->sc_firmware, FIRMWARE_UNLOAD); 2015 sc->sc_firmware = firmware_get(imagename); 2016 mtx_lock(&sc->sc_mtx); 2017 } 2018 2019 if (sc->sc_firmware == NULL) { 2020 device_printf(sc->sc_dev, 2021 "could not load firmware image '%s'\n", imagename); 2022 goto fail1; 2023 } 2024 2025 fp = sc->sc_firmware; 2026 if (fp->datasize < sizeof *hdr) { 2027 device_printf(sc->sc_dev, 2028 "firmware image too short %zu\n", fp->datasize); 2029 goto fail2; 2030 } 2031 2032 hdr = (const struct ipw_firmware_hdr *)fp->data; 2033 2034 if (fp->datasize < sizeof *hdr + le32toh(hdr->mainsz) + 2035 le32toh(hdr->ucodesz)) { 2036 device_printf(sc->sc_dev, 2037 "firmware image too short %zu\n", fp->datasize); 2038 goto fail2; 2039 } 2040 2041 fw = (const char *)fp->data + sizeof *hdr + le32toh(hdr->mainsz); 2042 if (ipw_load_ucode(sc, fw, le32toh(hdr->ucodesz)) != 0) { 2043 device_printf(sc->sc_dev, "could not load microcode\n"); 2044 goto fail2; 2045 } 2046 2047 ipw_stop_master(sc); 2048 2049 /* 2050 * Setup tx, rx and status rings. 2051 */ 2052 sc->txold = IPW_NTBD - 1; 2053 sc->txcur = 0; 2054 sc->txfree = IPW_NTBD - 2; 2055 sc->rxcur = IPW_NRBD - 1; 2056 2057 CSR_WRITE_4(sc, IPW_CSR_TX_BASE, sc->tbd_phys); 2058 CSR_WRITE_4(sc, IPW_CSR_TX_SIZE, IPW_NTBD); 2059 CSR_WRITE_4(sc, IPW_CSR_TX_READ, 0); 2060 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 2061 2062 CSR_WRITE_4(sc, IPW_CSR_RX_BASE, sc->rbd_phys); 2063 CSR_WRITE_4(sc, IPW_CSR_RX_SIZE, IPW_NRBD); 2064 CSR_WRITE_4(sc, IPW_CSR_RX_READ, 0); 2065 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur); 2066 2067 CSR_WRITE_4(sc, IPW_CSR_STATUS_BASE, sc->status_phys); 2068 2069 fw = (const char *)fp->data + sizeof *hdr; 2070 if (ipw_load_firmware(sc, fw, le32toh(hdr->mainsz)) != 0) { 2071 device_printf(sc->sc_dev, "could not load firmware\n"); 2072 goto fail2; 2073 } 2074 2075 sc->flags |= IPW_FLAG_FW_INITED; 2076 2077 /* retrieve information tables base addresses */ 2078 sc->table1_base = CSR_READ_4(sc, IPW_CSR_TABLE1_BASE); 2079 sc->table2_base = CSR_READ_4(sc, IPW_CSR_TABLE2_BASE); 2080 2081 ipw_write_table1(sc, IPW_INFO_LOCK, 0); 2082 2083 if (ipw_config(sc) != 0) { 2084 device_printf(sc->sc_dev, "device configuration failed\n"); 2085 goto fail1; 2086 } 2087 2088 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2089 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2090 2091 sc->flags &=~ IPW_FLAG_INIT_LOCKED; 2092 2093 if (!owned) 2094 mtx_unlock(&sc->sc_mtx); 2095 2096 return; 2097 2098fail2: firmware_put(fp, FIRMWARE_UNLOAD); 2099 sc->sc_firmware = NULL; 2100fail1: ifp->if_flags &= ~IFF_UP; 2101 ipw_stop(sc); 2102 sc->flags &=~ IPW_FLAG_INIT_LOCKED; 2103 if (!owned) 2104 mtx_unlock(&sc->sc_mtx); 2105} 2106 2107static void 2108ipw_stop(void *priv) 2109{ 2110 struct ipw_softc *sc = priv; 2111 struct ieee80211com *ic = &sc->sc_ic; 2112 struct ifnet *ifp = ic->ic_ifp; 2113 int i; 2114 2115 mtx_lock(&sc->sc_mtx); 2116 2117 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2118 2119 ipw_stop_master(sc); 2120 2121 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET); 2122 2123 /* 2124 * Release tx buffers. 2125 */ 2126 for (i = 0; i < IPW_NTBD; i++) 2127 ipw_release_sbd(sc, &sc->stbd_list[i]); 2128 2129 sc->sc_tx_timer = 0; 2130 ifp->if_timer = 0; 2131 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2132 2133 mtx_unlock(&sc->sc_mtx); 2134} 2135 2136static int 2137ipw_sysctl_stats(SYSCTL_HANDLER_ARGS) 2138{ 2139 struct ipw_softc *sc = arg1; 2140 uint32_t i, size, buf[256]; 2141 2142 if (!(sc->flags & IPW_FLAG_FW_INITED)) { 2143 memset(buf, 0, sizeof buf); 2144 return SYSCTL_OUT(req, buf, sizeof buf); 2145 } 2146 2147 CSR_WRITE_4(sc, IPW_CSR_AUTOINC_ADDR, sc->table1_base); 2148 2149 size = min(CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA), 256); 2150 for (i = 1; i < size; i++) 2151 buf[i] = MEM_READ_4(sc, CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA)); 2152 2153 return SYSCTL_OUT(req, buf, sizeof buf); 2154} 2155 2156static int 2157ipw_sysctl_radio(SYSCTL_HANDLER_ARGS) 2158{ 2159 struct ipw_softc *sc = arg1; 2160 int val; 2161 2162 val = !((sc->flags & IPW_FLAG_HAS_RADIO_SWITCH) && 2163 (CSR_READ_4(sc, IPW_CSR_IO) & IPW_IO_RADIO_DISABLED)); 2164 2165 return SYSCTL_OUT(req, &val, sizeof val); 2166} 2167 2168static uint32_t 2169ipw_read_table1(struct ipw_softc *sc, uint32_t off) 2170{ 2171 return MEM_READ_4(sc, MEM_READ_4(sc, sc->table1_base + off)); 2172} 2173 2174static void 2175ipw_write_table1(struct ipw_softc *sc, uint32_t off, uint32_t info) 2176{ 2177 MEM_WRITE_4(sc, MEM_READ_4(sc, sc->table1_base + off), info); 2178} 2179 2180static int 2181ipw_read_table2(struct ipw_softc *sc, uint32_t off, void *buf, uint32_t *len) 2182{ 2183 uint32_t addr, info; 2184 uint16_t count, size; 2185 uint32_t total; 2186 2187 /* addr[4] + count[2] + size[2] */ 2188 addr = MEM_READ_4(sc, sc->table2_base + off); 2189 info = MEM_READ_4(sc, sc->table2_base + off + 4); 2190 2191 count = info >> 16; 2192 size = info & 0xffff; 2193 total = count * size; 2194 2195 if (total > *len) { 2196 *len = total; 2197 return EINVAL; 2198 } 2199 2200 *len = total; 2201 ipw_read_mem_1(sc, addr, buf, total); 2202 2203 return 0; 2204} 2205 2206static void 2207ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap, 2208 bus_size_t count) 2209{ 2210 for (; count > 0; offset++, datap++, count--) { 2211 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3); 2212 *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3)); 2213 } 2214} 2215 2216static void 2217ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, const uint8_t *datap, 2218 bus_size_t count) 2219{ 2220 for (; count > 0; offset++, datap++, count--) { 2221 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3); 2222 CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap); 2223 } 2224} 2225