if_ipw.c revision 152385
1/* $FreeBSD: head/sys/dev/ipw/if_ipw.c 152385 2005-11-13 17:17:40Z damien $ */ 2 3/*- 4 * Copyright (c) 2004, 2005 5 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h> 31__FBSDID("$FreeBSD: head/sys/dev/ipw/if_ipw.c 152385 2005-11-13 17:17:40Z damien $"); 32 33/*- 34 * Intel(R) PRO/Wireless 2100 MiniPCI driver 35 * http://www.intel.com/network/connectivity/products/wireless/prowireless_mobile.htm 36 */ 37 38#include <sys/param.h> 39#include <sys/sysctl.h> 40#include <sys/sockio.h> 41#include <sys/mbuf.h> 42#include <sys/kernel.h> 43#include <sys/socket.h> 44#include <sys/systm.h> 45#include <sys/malloc.h> 46#include <sys/module.h> 47#include <sys/bus.h> 48#include <sys/endian.h> 49 50#include <machine/bus.h> 51#include <machine/resource.h> 52#include <machine/clock.h> 53#include <sys/rman.h> 54 55#include <dev/pci/pcireg.h> 56#include <dev/pci/pcivar.h> 57 58#include <net/bpf.h> 59#include <net/if.h> 60#include <net/if_arp.h> 61#include <net/ethernet.h> 62#include <net/if_dl.h> 63#include <net/if_media.h> 64#include <net/if_types.h> 65 66#include <netinet/in.h> 67#include <netinet/in_systm.h> 68#include <netinet/in_var.h> 69#include <netinet/ip.h> 70#include <netinet/if_ether.h> 71 72#include <net80211/ieee80211_var.h> 73#include <net80211/ieee80211_radiotap.h> 74 75#include <dev/ipw/if_ipwreg.h> 76#include <dev/ipw/if_ipwvar.h> 77 78#ifdef IPW_DEBUG 79#define DPRINTF(x) do { if (ipw_debug > 0) printf x; } while (0) 80#define DPRINTFN(n, x) do { if (ipw_debug >= (n)) printf x; } while (0) 81int ipw_debug = 0; 82SYSCTL_INT(_debug, OID_AUTO, ipw, CTLFLAG_RW, &ipw_debug, 0, "ipw debug level"); 83#else 84#define DPRINTF(x) 85#define DPRINTFN(n, x) 86#endif 87 88MODULE_DEPEND(ipw, pci, 1, 1, 1); 89MODULE_DEPEND(ipw, wlan, 1, 1, 1); 90 91struct ipw_ident { 92 uint16_t vendor; 93 uint16_t device; 94 const char *name; 95}; 96 97static const struct ipw_ident ipw_ident_table[] = { 98 { 0x8086, 0x1043, "Intel(R) PRO/Wireless 2100 MiniPCI" }, 99 100 { 0, 0, NULL } 101}; 102 103static int ipw_dma_alloc(struct ipw_softc *); 104static void ipw_release(struct ipw_softc *); 105static int ipw_media_change(struct ifnet *); 106static void ipw_media_status(struct ifnet *, struct ifmediareq *); 107static int ipw_newstate(struct ieee80211com *, enum ieee80211_state, int); 108static uint16_t ipw_read_prom_word(struct ipw_softc *, uint8_t); 109static void ipw_command_intr(struct ipw_softc *, struct ipw_soft_buf *); 110static void ipw_newstate_intr(struct ipw_softc *, struct ipw_soft_buf *); 111static void ipw_data_intr(struct ipw_softc *, struct ipw_status *, 112 struct ipw_soft_bd *, struct ipw_soft_buf *); 113static void ipw_rx_intr(struct ipw_softc *); 114static void ipw_release_sbd(struct ipw_softc *, struct ipw_soft_bd *); 115static void ipw_tx_intr(struct ipw_softc *); 116static void ipw_intr(void *); 117static void ipw_dma_map_addr(void *, bus_dma_segment_t *, int, int); 118static int ipw_cmd(struct ipw_softc *, uint32_t, void *, uint32_t); 119static int ipw_tx_start(struct ifnet *, struct mbuf *, 120 struct ieee80211_node *); 121static void ipw_start(struct ifnet *); 122static void ipw_watchdog(struct ifnet *); 123static int ipw_ioctl(struct ifnet *, u_long, caddr_t); 124static void ipw_stop_master(struct ipw_softc *); 125static int ipw_reset(struct ipw_softc *); 126static int ipw_load_ucode(struct ipw_softc *, u_char *, int); 127static int ipw_load_firmware(struct ipw_softc *, u_char *, int); 128static int ipw_cache_firmware(struct ipw_softc *, void *); 129static void ipw_free_firmware(struct ipw_softc *); 130static int ipw_config(struct ipw_softc *); 131static void ipw_init(void *); 132static void ipw_stop(void *); 133static int ipw_sysctl_stats(SYSCTL_HANDLER_ARGS); 134static int ipw_sysctl_radio(SYSCTL_HANDLER_ARGS); 135static uint32_t ipw_read_table1(struct ipw_softc *, uint32_t); 136static void ipw_write_table1(struct ipw_softc *, uint32_t, uint32_t); 137static int ipw_read_table2(struct ipw_softc *, uint32_t, void *, 138 uint32_t *); 139static void ipw_read_mem_1(struct ipw_softc *, bus_size_t, uint8_t *, 140 bus_size_t); 141static void ipw_write_mem_1(struct ipw_softc *, bus_size_t, uint8_t *, 142 bus_size_t); 143 144static int ipw_probe(device_t); 145static int ipw_attach(device_t); 146static int ipw_detach(device_t); 147static int ipw_shutdown(device_t); 148static int ipw_suspend(device_t); 149static int ipw_resume(device_t); 150 151static device_method_t ipw_methods[] = { 152 /* Device interface */ 153 DEVMETHOD(device_probe, ipw_probe), 154 DEVMETHOD(device_attach, ipw_attach), 155 DEVMETHOD(device_detach, ipw_detach), 156 DEVMETHOD(device_shutdown, ipw_shutdown), 157 DEVMETHOD(device_suspend, ipw_suspend), 158 DEVMETHOD(device_resume, ipw_resume), 159 160 { 0, 0 } 161}; 162 163static driver_t ipw_driver = { 164 "ipw", 165 ipw_methods, 166 sizeof (struct ipw_softc) 167}; 168 169static devclass_t ipw_devclass; 170 171DRIVER_MODULE(ipw, pci, ipw_driver, ipw_devclass, 0, 0); 172 173/* 174 * Supported rates for 802.11b mode (in 500Kbps unit). 175 */ 176static const struct ieee80211_rateset ipw_rateset_11b = 177 { 4, { 2, 4, 11, 22 } }; 178 179static __inline uint8_t 180MEM_READ_1(struct ipw_softc *sc, uint32_t addr) 181{ 182 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr); 183 return CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA); 184} 185 186static __inline uint32_t 187MEM_READ_4(struct ipw_softc *sc, uint32_t addr) 188{ 189 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr); 190 return CSR_READ_4(sc, IPW_CSR_INDIRECT_DATA); 191} 192 193static int 194ipw_probe(device_t dev) 195{ 196 const struct ipw_ident *ident; 197 198 for (ident = ipw_ident_table; ident->name != NULL; ident++) { 199 if (pci_get_vendor(dev) == ident->vendor && 200 pci_get_device(dev) == ident->device) { 201 device_set_desc(dev, ident->name); 202 return 0; 203 } 204 } 205 return ENXIO; 206} 207 208/* Base Address Register */ 209#define IPW_PCI_BAR0 0x10 210 211static int 212ipw_attach(device_t dev) 213{ 214 struct ipw_softc *sc = device_get_softc(dev); 215 struct ifnet *ifp; 216 struct ieee80211com *ic = &sc->sc_ic; 217 uint16_t val; 218 int error, i; 219 220 sc->sc_dev = dev; 221 222 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 223 MTX_DEF | MTX_RECURSE); 224 225 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 226 device_printf(dev, "chip is in D%d power mode " 227 "-- setting to D0\n", pci_get_powerstate(dev)); 228 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 229 } 230 231 pci_write_config(dev, 0x41, 0, 1); 232 233 /* enable bus-mastering */ 234 pci_enable_busmaster(dev); 235 236 sc->mem_rid = IPW_PCI_BAR0; 237 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid, 238 RF_ACTIVE); 239 if (sc->mem == NULL) { 240 device_printf(dev, "could not allocate memory resource\n"); 241 goto fail; 242 } 243 244 sc->sc_st = rman_get_bustag(sc->mem); 245 sc->sc_sh = rman_get_bushandle(sc->mem); 246 247 sc->irq_rid = 0; 248 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid, 249 RF_ACTIVE | RF_SHAREABLE); 250 if (sc->irq == NULL) { 251 device_printf(dev, "could not allocate interrupt resource\n"); 252 goto fail; 253 } 254 255 if (ipw_reset(sc) != 0) { 256 device_printf(dev, "could not reset adapter\n"); 257 goto fail; 258 } 259 260 if (ipw_dma_alloc(sc) != 0) { 261 device_printf(dev, "could not allocate DMA resources\n"); 262 goto fail; 263 } 264 265 ifp = sc->sc_ifp = if_alloc(IFT_ETHER); 266 if (ifp == NULL) { 267 device_printf(dev, "can not if_alloc()\n"); 268 goto fail; 269 } 270 271 ifp->if_softc = sc; 272 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 273 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 274 ifp->if_init = ipw_init; 275 ifp->if_ioctl = ipw_ioctl; 276 ifp->if_start = ipw_start; 277 ifp->if_watchdog = ipw_watchdog; 278 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 279 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 280 IFQ_SET_READY(&ifp->if_snd); 281 282 ic->ic_ifp = ifp; 283 ic->ic_phytype = IEEE80211_T_DS; 284 ic->ic_opmode = IEEE80211_M_STA; 285 ic->ic_state = IEEE80211_S_INIT; 286 287 /* set device capabilities */ 288 ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT | 289 IEEE80211_C_PMGT | IEEE80211_C_IBSS | IEEE80211_C_MONITOR; 290 291 /* read MAC address from EEPROM */ 292 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0); 293 ic->ic_myaddr[0] = val >> 8; 294 ic->ic_myaddr[1] = val & 0xff; 295 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1); 296 ic->ic_myaddr[2] = val >> 8; 297 ic->ic_myaddr[3] = val & 0xff; 298 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2); 299 ic->ic_myaddr[4] = val >> 8; 300 ic->ic_myaddr[5] = val & 0xff; 301 302 /* set supported .11b rates */ 303 ic->ic_sup_rates[IEEE80211_MODE_11B] = ipw_rateset_11b; 304 305 /* set supported .11b channels (read from EEPROM) */ 306 if ((val = ipw_read_prom_word(sc, IPW_EEPROM_CHANNEL_LIST)) == 0) 307 val = 0x7ff; /* default to channels 1-11 */ 308 val <<= 1; 309 for (i = 1; i < 16; i++) { 310 if (val & (1 << i)) { 311 ic->ic_channels[i].ic_freq = 312 ieee80211_ieee2mhz(i, IEEE80211_CHAN_B); 313 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_B; 314 } 315 } 316 317 /* check support for radio transmitter switch in EEPROM */ 318 if (!(ipw_read_prom_word(sc, IPW_EEPROM_RADIO) & 8)) 319 sc->flags |= IPW_FLAG_HAS_RADIO_SWITCH; 320 321 ieee80211_ifattach(ic); 322 /* override state transition machine */ 323 sc->sc_newstate = ic->ic_newstate; 324 ic->ic_newstate = ipw_newstate; 325 ieee80211_media_init(ic, ipw_media_change, ipw_media_status); 326 327 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 328 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 329 330 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 331 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 332 sc->sc_rxtap.wr_ihdr.it_present = htole32(IPW_RX_RADIOTAP_PRESENT); 333 334 sc->sc_txtap_len = sizeof sc->sc_txtapu; 335 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 336 sc->sc_txtap.wt_ihdr.it_present = htole32(IPW_TX_RADIOTAP_PRESENT); 337 338 /* 339 * Add a few sysctl knobs. 340 */ 341 sc->dwelltime = 100; 342 343 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 344 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "radio", 345 CTLTYPE_INT | CTLFLAG_RD, sc, 0, ipw_sysctl_radio, "I", 346 "radio transmitter switch state (0=off, 1=on)"); 347 348 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 349 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "stats", 350 CTLTYPE_OPAQUE | CTLFLAG_RD, sc, 0, ipw_sysctl_stats, "S", 351 "statistics"); 352 353 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 354 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "dwell", 355 CTLFLAG_RW, &sc->dwelltime, 0, 356 "channel dwell time (ms) for AP/station scanning"); 357 358 /* 359 * Hook our interrupt after all initialization is complete. 360 */ 361 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE, 362 ipw_intr, sc, &sc->sc_ih); 363 if (error != 0) { 364 device_printf(dev, "could not set up interrupt\n"); 365 goto fail; 366 } 367 368 if (bootverbose) 369 ieee80211_announce(ic); 370 371 return 0; 372 373fail: ipw_detach(dev); 374 return ENXIO; 375} 376 377static int 378ipw_detach(device_t dev) 379{ 380 struct ipw_softc *sc = device_get_softc(dev); 381 struct ieee80211com *ic = &sc->sc_ic; 382 struct ifnet *ifp = ic->ic_ifp; 383 384 IPW_LOCK(sc); 385 386 ipw_stop(sc); 387 ipw_free_firmware(sc); 388 389 IPW_UNLOCK(sc); 390 391 if (ifp != NULL) { 392 bpfdetach(ifp); 393 ieee80211_ifdetach(ic); 394 } 395 396 ipw_release(sc); 397 398 if (sc->irq != NULL) { 399 bus_teardown_intr(dev, sc->irq, sc->sc_ih); 400 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq); 401 } 402 403 if (sc->mem != NULL) 404 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem); 405 if (ifp != NULL) 406 if_free(ifp); 407 408 mtx_destroy(&sc->sc_mtx); 409 410 return 0; 411} 412 413static int 414ipw_dma_alloc(struct ipw_softc *sc) 415{ 416 struct ipw_soft_bd *sbd; 417 struct ipw_soft_hdr *shdr; 418 struct ipw_soft_buf *sbuf; 419 bus_addr_t physaddr; 420 int error, i; 421 422 /* 423 * Allocate and map tx ring. 424 */ 425 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 426 BUS_SPACE_MAXADDR, NULL, NULL, IPW_TBD_SZ, 1, IPW_TBD_SZ, 0, NULL, 427 NULL, &sc->tbd_dmat); 428 if (error != 0) { 429 device_printf(sc->sc_dev, "could not create tx ring DMA tag\n"); 430 goto fail; 431 } 432 433 error = bus_dmamem_alloc(sc->tbd_dmat, (void **)&sc->tbd_list, 434 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->tbd_map); 435 if (error != 0) { 436 device_printf(sc->sc_dev, 437 "could not allocate tx ring DMA memory\n"); 438 goto fail; 439 } 440 441 error = bus_dmamap_load(sc->tbd_dmat, sc->tbd_map, sc->tbd_list, 442 IPW_TBD_SZ, ipw_dma_map_addr, &sc->tbd_phys, 0); 443 if (error != 0) { 444 device_printf(sc->sc_dev, "could not map tx ring DMA memory\n"); 445 goto fail; 446 } 447 448 /* 449 * Allocate and map rx ring. 450 */ 451 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 452 BUS_SPACE_MAXADDR, NULL, NULL, IPW_RBD_SZ, 1, IPW_RBD_SZ, 0, NULL, 453 NULL, &sc->rbd_dmat); 454 if (error != 0) { 455 device_printf(sc->sc_dev, "could not create rx ring DMA tag\n"); 456 goto fail; 457 } 458 459 error = bus_dmamem_alloc(sc->rbd_dmat, (void **)&sc->rbd_list, 460 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->rbd_map); 461 if (error != 0) { 462 device_printf(sc->sc_dev, 463 "could not allocate rx ring DMA memory\n"); 464 goto fail; 465 } 466 467 error = bus_dmamap_load(sc->rbd_dmat, sc->rbd_map, sc->rbd_list, 468 IPW_RBD_SZ, ipw_dma_map_addr, &sc->rbd_phys, 0); 469 if (error != 0) { 470 device_printf(sc->sc_dev, "could not map rx ring DMA memory\n"); 471 goto fail; 472 } 473 474 /* 475 * Allocate and map status ring. 476 */ 477 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 478 BUS_SPACE_MAXADDR, NULL, NULL, IPW_STATUS_SZ, 1, IPW_STATUS_SZ, 0, 479 NULL, NULL, &sc->status_dmat); 480 if (error != 0) { 481 device_printf(sc->sc_dev, 482 "could not create status ring DMA tag\n"); 483 goto fail; 484 } 485 486 error = bus_dmamem_alloc(sc->status_dmat, (void **)&sc->status_list, 487 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->status_map); 488 if (error != 0) { 489 device_printf(sc->sc_dev, 490 "could not allocate status ring DMA memory\n"); 491 goto fail; 492 } 493 494 error = bus_dmamap_load(sc->status_dmat, sc->status_map, 495 sc->status_list, IPW_STATUS_SZ, ipw_dma_map_addr, &sc->status_phys, 496 0); 497 if (error != 0) { 498 device_printf(sc->sc_dev, 499 "could not map status ring DMA memory\n"); 500 goto fail; 501 } 502 503 /* 504 * Allocate command DMA map. 505 */ 506 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 507 BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_cmd), 1, 508 sizeof (struct ipw_cmd), 0, NULL, NULL, &sc->cmd_dmat); 509 if (error != 0) { 510 device_printf(sc->sc_dev, "could not create command DMA tag\n"); 511 goto fail; 512 } 513 514 error = bus_dmamap_create(sc->cmd_dmat, 0, &sc->cmd_map); 515 if (error != 0) { 516 device_printf(sc->sc_dev, 517 "could not create command DMA map\n"); 518 goto fail; 519 } 520 521 /* 522 * Allocate headers DMA maps. 523 */ 524 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 525 BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_hdr), 1, 526 sizeof (struct ipw_hdr), 0, NULL, NULL, &sc->hdr_dmat); 527 if (error != 0) { 528 device_printf(sc->sc_dev, "could not create header DMA tag\n"); 529 goto fail; 530 } 531 532 SLIST_INIT(&sc->free_shdr); 533 for (i = 0; i < IPW_NDATA; i++) { 534 shdr = &sc->shdr_list[i]; 535 error = bus_dmamap_create(sc->hdr_dmat, 0, &shdr->map); 536 if (error != 0) { 537 device_printf(sc->sc_dev, 538 "could not create header DMA map\n"); 539 goto fail; 540 } 541 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next); 542 } 543 544 /* 545 * Allocate tx buffers DMA maps. 546 */ 547 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 548 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_MAX_NSEG, MCLBYTES, 0, 549 NULL, NULL, &sc->txbuf_dmat); 550 if (error != 0) { 551 device_printf(sc->sc_dev, "could not create tx DMA tag\n"); 552 goto fail; 553 } 554 555 SLIST_INIT(&sc->free_sbuf); 556 for (i = 0; i < IPW_NDATA; i++) { 557 sbuf = &sc->tx_sbuf_list[i]; 558 error = bus_dmamap_create(sc->txbuf_dmat, 0, &sbuf->map); 559 if (error != 0) { 560 device_printf(sc->sc_dev, 561 "could not create tx DMA map\n"); 562 goto fail; 563 } 564 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next); 565 } 566 567 /* 568 * Initialize tx ring. 569 */ 570 for (i = 0; i < IPW_NTBD; i++) { 571 sbd = &sc->stbd_list[i]; 572 sbd->bd = &sc->tbd_list[i]; 573 sbd->type = IPW_SBD_TYPE_NOASSOC; 574 } 575 576 /* 577 * Pre-allocate rx buffers and DMA maps. 578 */ 579 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 580 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0, NULL, 581 NULL, &sc->rxbuf_dmat); 582 if (error != 0) { 583 device_printf(sc->sc_dev, "could not create rx DMA tag\n"); 584 goto fail; 585 } 586 587 for (i = 0; i < IPW_NRBD; i++) { 588 sbd = &sc->srbd_list[i]; 589 sbuf = &sc->rx_sbuf_list[i]; 590 sbd->bd = &sc->rbd_list[i]; 591 592 sbuf->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 593 if (sbuf->m == NULL) { 594 device_printf(sc->sc_dev, 595 "could not allocate rx mbuf\n"); 596 error = ENOMEM; 597 goto fail; 598 } 599 600 error = bus_dmamap_create(sc->rxbuf_dmat, 0, &sbuf->map); 601 if (error != 0) { 602 device_printf(sc->sc_dev, 603 "could not create rx DMA map\n"); 604 goto fail; 605 } 606 607 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, 608 mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr, 609 &physaddr, 0); 610 if (error != 0) { 611 device_printf(sc->sc_dev, 612 "could not map rx DMA memory\n"); 613 goto fail; 614 } 615 616 sbd->type = IPW_SBD_TYPE_DATA; 617 sbd->priv = sbuf; 618 sbd->bd->physaddr = htole32(physaddr); 619 sbd->bd->len = htole32(MCLBYTES); 620 } 621 622 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE); 623 624 return 0; 625 626fail: ipw_release(sc); 627 return error; 628} 629 630static void 631ipw_release(struct ipw_softc *sc) 632{ 633 struct ipw_soft_buf *sbuf; 634 int i; 635 636 if (sc->tbd_dmat != NULL) { 637 if (sc->stbd_list != NULL) { 638 bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map); 639 bus_dmamem_free(sc->tbd_dmat, sc->tbd_list, 640 sc->tbd_map); 641 } 642 bus_dma_tag_destroy(sc->tbd_dmat); 643 } 644 645 if (sc->rbd_dmat != NULL) { 646 if (sc->rbd_list != NULL) { 647 bus_dmamap_unload(sc->rbd_dmat, sc->rbd_map); 648 bus_dmamem_free(sc->rbd_dmat, sc->rbd_list, 649 sc->rbd_map); 650 } 651 bus_dma_tag_destroy(sc->rbd_dmat); 652 } 653 654 if (sc->status_dmat != NULL) { 655 if (sc->status_list != NULL) { 656 bus_dmamap_unload(sc->status_dmat, sc->status_map); 657 bus_dmamem_free(sc->status_dmat, sc->status_list, 658 sc->status_map); 659 } 660 bus_dma_tag_destroy(sc->status_dmat); 661 } 662 663 for (i = 0; i < IPW_NTBD; i++) 664 ipw_release_sbd(sc, &sc->stbd_list[i]); 665 666 if (sc->cmd_dmat != NULL) { 667 bus_dmamap_destroy(sc->cmd_dmat, sc->cmd_map); 668 bus_dma_tag_destroy(sc->cmd_dmat); 669 } 670 671 if (sc->hdr_dmat != NULL) { 672 for (i = 0; i < IPW_NDATA; i++) 673 bus_dmamap_destroy(sc->hdr_dmat, sc->shdr_list[i].map); 674 bus_dma_tag_destroy(sc->hdr_dmat); 675 } 676 677 if (sc->txbuf_dmat != NULL) { 678 for (i = 0; i < IPW_NDATA; i++) { 679 bus_dmamap_destroy(sc->txbuf_dmat, 680 sc->tx_sbuf_list[i].map); 681 } 682 bus_dma_tag_destroy(sc->txbuf_dmat); 683 } 684 685 if (sc->rxbuf_dmat != NULL) { 686 for (i = 0; i < IPW_NRBD; i++) { 687 sbuf = &sc->rx_sbuf_list[i]; 688 if (sbuf->m != NULL) { 689 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, 690 BUS_DMASYNC_POSTREAD); 691 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map); 692 m_freem(sbuf->m); 693 } 694 bus_dmamap_destroy(sc->rxbuf_dmat, sbuf->map); 695 } 696 bus_dma_tag_destroy(sc->rxbuf_dmat); 697 } 698} 699 700static int 701ipw_shutdown(device_t dev) 702{ 703 struct ipw_softc *sc = device_get_softc(dev); 704 705 ipw_stop(sc); 706 707 return 0; 708} 709 710static int 711ipw_suspend(device_t dev) 712{ 713 struct ipw_softc *sc = device_get_softc(dev); 714 715 ipw_stop(sc); 716 717 return 0; 718} 719 720static int 721ipw_resume(device_t dev) 722{ 723 struct ipw_softc *sc = device_get_softc(dev); 724 struct ifnet *ifp = sc->sc_ic.ic_ifp; 725 726 IPW_LOCK(sc); 727 728 pci_write_config(dev, 0x41, 0, 1); 729 730 if (ifp->if_flags & IFF_UP) { 731 ifp->if_init(ifp->if_softc); 732 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 733 ifp->if_start(ifp); 734 } 735 736 IPW_UNLOCK(sc); 737 738 return 0; 739} 740 741static int 742ipw_media_change(struct ifnet *ifp) 743{ 744 struct ipw_softc *sc = ifp->if_softc; 745 int error; 746 747 IPW_LOCK(sc); 748 749 error = ieee80211_media_change(ifp); 750 if (error != ENETRESET) { 751 IPW_UNLOCK(sc); 752 return error; 753 } 754 755 if ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 756 ipw_init(sc); 757 758 IPW_UNLOCK(sc); 759 760 return 0; 761} 762 763/* 764 * The firmware automaticly adapt the transmit speed. We report the current 765 * transmit speed here. 766 */ 767static void 768ipw_media_status(struct ifnet *ifp, struct ifmediareq *imr) 769{ 770#define N(a) (sizeof (a) / sizeof (a[0])) 771 struct ipw_softc *sc = ifp->if_softc; 772 struct ieee80211com *ic = &sc->sc_ic; 773 static const struct { 774 uint32_t val; 775 int rate; 776 } rates[] = { 777 { IPW_RATE_DS1, 2 }, 778 { IPW_RATE_DS2, 4 }, 779 { IPW_RATE_DS5, 11 }, 780 { IPW_RATE_DS11, 22 }, 781 }; 782 uint32_t val; 783 int rate, i; 784 785 imr->ifm_status = IFM_AVALID; 786 imr->ifm_active = IFM_IEEE80211; 787 if (ic->ic_state == IEEE80211_S_RUN) 788 imr->ifm_status |= IFM_ACTIVE; 789 790 /* read current transmission rate from adapter */ 791 val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE) & 0xf; 792 793 /* convert ipw rate to 802.11 rate */ 794 for (i = 0; i < N(rates) && rates[i].val != val; i++); 795 rate = (i < N(rates)) ? rates[i].rate : 0; 796 797 imr->ifm_active |= IFM_IEEE80211_11B; 798 imr->ifm_active |= ieee80211_rate2media(ic, rate, IEEE80211_MODE_11B); 799 switch (ic->ic_opmode) { 800 case IEEE80211_M_STA: 801 break; 802 803 case IEEE80211_M_IBSS: 804 imr->ifm_active |= IFM_IEEE80211_IBSS; 805 break; 806 807 case IEEE80211_M_MONITOR: 808 imr->ifm_active |= IFM_IEEE80211_MONITOR; 809 break; 810 811 case IEEE80211_M_AHDEMO: 812 case IEEE80211_M_HOSTAP: 813 /* should not get there */ 814 break; 815 } 816#undef N 817} 818 819static int 820ipw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 821{ 822 struct ifnet *ifp = ic->ic_ifp; 823 struct ipw_softc *sc = ifp->if_softc; 824 struct ieee80211_node *ni; 825 uint8_t macaddr[IEEE80211_ADDR_LEN]; 826 uint32_t len; 827 828 switch (nstate) { 829 case IEEE80211_S_RUN: 830 DELAY(200); /* firmware needs a short delay here */ 831 832 len = IEEE80211_ADDR_LEN; 833 ipw_read_table2(sc, IPW_INFO_CURRENT_BSSID, macaddr, &len); 834 835 ni = ieee80211_find_node(&ic->ic_scan, macaddr); 836 if (ni == NULL) 837 break; 838 839 ieee80211_ref_node(ni); 840 ieee80211_sta_join(ic, ni); 841 ieee80211_node_authorize(ni); 842 843 if (ic->ic_opmode == IEEE80211_M_STA) 844 ieee80211_notify_node_join(ic, ni, 1); 845 break; 846 847 case IEEE80211_S_INIT: 848 case IEEE80211_S_SCAN: 849 case IEEE80211_S_AUTH: 850 case IEEE80211_S_ASSOC: 851 break; 852 } 853 854 ic->ic_state = nstate; 855 return 0; 856} 857 858/* 859 * Read 16 bits at address 'addr' from the serial EEPROM. 860 */ 861static uint16_t 862ipw_read_prom_word(struct ipw_softc *sc, uint8_t addr) 863{ 864 uint32_t tmp; 865 uint16_t val; 866 int n; 867 868 /* clock C once before the first command */ 869 IPW_EEPROM_CTL(sc, 0); 870 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 871 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C); 872 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 873 874 /* write start bit (1) */ 875 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D); 876 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C); 877 878 /* write READ opcode (10) */ 879 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D); 880 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C); 881 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 882 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C); 883 884 /* write address A7-A0 */ 885 for (n = 7; n >= 0; n--) { 886 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | 887 (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D)); 888 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | 889 (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D) | IPW_EEPROM_C); 890 } 891 892 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 893 894 /* read data Q15-Q0 */ 895 val = 0; 896 for (n = 15; n >= 0; n--) { 897 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C); 898 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 899 tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL); 900 val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n; 901 } 902 903 IPW_EEPROM_CTL(sc, 0); 904 905 /* clear Chip Select and clock C */ 906 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 907 IPW_EEPROM_CTL(sc, 0); 908 IPW_EEPROM_CTL(sc, IPW_EEPROM_C); 909 910 return le16toh(val); 911} 912 913static void 914ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf) 915{ 916 struct ipw_cmd *cmd; 917 918 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD); 919 920 cmd = mtod(sbuf->m, struct ipw_cmd *); 921 922 DPRINTFN(2, ("cmd ack'ed (%u, %u, %u, %u, %u)\n", le32toh(cmd->type), 923 le32toh(cmd->subtype), le32toh(cmd->seq), le32toh(cmd->len), 924 le32toh(cmd->status))); 925 926 wakeup(sc); 927} 928 929static void 930ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf) 931{ 932 struct ieee80211com *ic = &sc->sc_ic; 933 uint32_t state; 934 935 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD); 936 937 state = le32toh(*mtod(sbuf->m, uint32_t *)); 938 939 DPRINTFN(2, ("entering state %u\n", state)); 940 941 switch (state) { 942 case IPW_STATE_ASSOCIATED: 943 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 944 break; 945 946 case IPW_STATE_SCANNING: 947 /* don't leave run state on background scan */ 948 if (ic->ic_state != IEEE80211_S_RUN) 949 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 950 951 ic->ic_flags |= IEEE80211_F_SCAN; 952 break; 953 954 case IPW_STATE_SCAN_COMPLETE: 955 ieee80211_notify_scan_done(ic); 956 ic->ic_flags &= ~IEEE80211_F_SCAN; 957 break; 958 959 case IPW_STATE_ASSOCIATION_LOST: 960 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 961 break; 962 963 case IPW_STATE_RADIO_DISABLED: 964 ic->ic_ifp->if_flags &= ~IFF_UP; 965 ipw_stop(sc); 966 break; 967 } 968} 969 970/* 971 * XXX: Hack to set the current channel to the value advertised in beacons or 972 * probe responses. Only used during AP detection. 973 */ 974static void 975ipw_fix_channel(struct ieee80211com *ic, struct mbuf *m) 976{ 977 struct ieee80211_frame *wh; 978 uint8_t subtype; 979 uint8_t *frm, *efrm; 980 981 wh = mtod(m, struct ieee80211_frame *); 982 983 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_MGT) 984 return; 985 986 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 987 988 if (subtype != IEEE80211_FC0_SUBTYPE_BEACON && 989 subtype != IEEE80211_FC0_SUBTYPE_PROBE_RESP) 990 return; 991 992 frm = (uint8_t *)(wh + 1); 993 efrm = mtod(m, uint8_t *) + m->m_len; 994 995 frm += 12; /* skip tstamp, bintval and capinfo fields */ 996 while (frm < efrm) { 997 if (*frm == IEEE80211_ELEMID_DSPARMS) 998#if IEEE80211_CHAN_MAX < 255 999 if (frm[2] <= IEEE80211_CHAN_MAX) 1000#endif 1001 ic->ic_curchan = &ic->ic_channels[frm[2]]; 1002 1003 frm += frm[1] + 2; 1004 } 1005} 1006 1007static void 1008ipw_data_intr(struct ipw_softc *sc, struct ipw_status *status, 1009 struct ipw_soft_bd *sbd, struct ipw_soft_buf *sbuf) 1010{ 1011 struct ieee80211com *ic = &sc->sc_ic; 1012 struct ifnet *ifp = ic->ic_ifp; 1013 struct mbuf *mnew, *m; 1014 struct ieee80211_frame *wh; 1015 struct ieee80211_node *ni; 1016 bus_addr_t physaddr; 1017 int error; 1018 1019 DPRINTFN(5, ("received frame len=%u, rssi=%u\n", le32toh(status->len), 1020 status->rssi)); 1021 1022 if (le32toh(status->len) < sizeof (struct ieee80211_frame_min) || 1023 le32toh(status->len) > MCLBYTES) 1024 return; 1025 1026 /* 1027 * Try to allocate a new mbuf for this ring element and load it before 1028 * processing the current mbuf. If the ring element cannot be loaded, 1029 * drop the received packet and reuse the old mbuf. In the unlikely 1030 * case that the old mbuf can't be reloaded either, explicitly panic. 1031 */ 1032 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1033 if (mnew == NULL) { 1034 ifp->if_ierrors++; 1035 return; 1036 } 1037 1038 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD); 1039 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map); 1040 1041 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, mtod(mnew, void *), 1042 MCLBYTES, ipw_dma_map_addr, &physaddr, 0); 1043 if (error != 0) { 1044 m_freem(mnew); 1045 1046 /* try to reload the old mbuf */ 1047 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, 1048 mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr, 1049 &physaddr, 0); 1050 if (error != 0) { 1051 /* very unlikely that it will fail... */ 1052 panic("%s: could not load old rx mbuf", 1053 device_get_name(sc->sc_dev)); 1054 } 1055 ifp->if_ierrors++; 1056 return; 1057 } 1058 1059 /* 1060 * New mbuf successfully loaded, update Rx ring and continue 1061 * processing. 1062 */ 1063 m = sbuf->m; 1064 sbuf->m = mnew; 1065 sbd->bd->physaddr = htole32(physaddr); 1066 1067 /* finalize mbuf */ 1068 m->m_pkthdr.rcvif = ifp; 1069 m->m_pkthdr.len = m->m_len = le32toh(status->len); 1070 1071 if (sc->sc_drvbpf != NULL) { 1072 struct ipw_rx_radiotap_header *tap = &sc->sc_rxtap; 1073 1074 tap->wr_flags = 0; 1075 tap->wr_antsignal = status->rssi; 1076 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1077 tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1078 1079 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1080 } 1081 1082 if (ic->ic_state == IEEE80211_S_SCAN) 1083 ipw_fix_channel(ic, m); 1084 1085 wh = mtod(m, struct ieee80211_frame *); 1086 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1087 1088 /* send the frame to the 802.11 layer */ 1089 ieee80211_input(ic, m, ni, status->rssi, 0); 1090 1091 /* node is no longer needed */ 1092 ieee80211_free_node(ni); 1093 1094 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE); 1095} 1096 1097static void 1098ipw_rx_intr(struct ipw_softc *sc) 1099{ 1100 struct ipw_status *status; 1101 struct ipw_soft_bd *sbd; 1102 struct ipw_soft_buf *sbuf; 1103 uint32_t r, i; 1104 1105 if (!(sc->flags & IPW_FLAG_FW_INITED)) 1106 return; 1107 1108 r = CSR_READ_4(sc, IPW_CSR_RX_READ); 1109 1110 bus_dmamap_sync(sc->status_dmat, sc->status_map, BUS_DMASYNC_POSTREAD); 1111 1112 for (i = (sc->rxcur + 1) % IPW_NRBD; i != r; i = (i + 1) % IPW_NRBD) { 1113 status = &sc->status_list[i]; 1114 sbd = &sc->srbd_list[i]; 1115 sbuf = sbd->priv; 1116 1117 switch (le16toh(status->code) & 0xf) { 1118 case IPW_STATUS_CODE_COMMAND: 1119 ipw_command_intr(sc, sbuf); 1120 break; 1121 1122 case IPW_STATUS_CODE_NEWSTATE: 1123 ipw_newstate_intr(sc, sbuf); 1124 break; 1125 1126 case IPW_STATUS_CODE_DATA_802_3: 1127 case IPW_STATUS_CODE_DATA_802_11: 1128 ipw_data_intr(sc, status, sbd, sbuf); 1129 break; 1130 1131 case IPW_STATUS_CODE_NOTIFICATION: 1132 DPRINTFN(2, ("received notification\n")); 1133 break; 1134 1135 default: 1136 device_printf(sc->sc_dev, "unknown status code %u\n", 1137 le16toh(status->code)); 1138 } 1139 1140 /* firmware was killed, stop processing received frames */ 1141 if (!(sc->flags & IPW_FLAG_FW_INITED)) 1142 return; 1143 1144 sbd->bd->flags = 0; 1145 } 1146 1147 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE); 1148 1149 /* kick the firmware */ 1150 sc->rxcur = (r == 0) ? IPW_NRBD - 1 : r - 1; 1151 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur); 1152} 1153 1154static void 1155ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd) 1156{ 1157 struct ipw_soft_hdr *shdr; 1158 struct ipw_soft_buf *sbuf; 1159 1160 switch (sbd->type) { 1161 case IPW_SBD_TYPE_COMMAND: 1162 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, 1163 BUS_DMASYNC_POSTWRITE); 1164 bus_dmamap_unload(sc->cmd_dmat, sc->cmd_map); 1165 break; 1166 1167 case IPW_SBD_TYPE_HEADER: 1168 shdr = sbd->priv; 1169 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_POSTWRITE); 1170 bus_dmamap_unload(sc->hdr_dmat, shdr->map); 1171 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next); 1172 break; 1173 1174 case IPW_SBD_TYPE_DATA: 1175 sbuf = sbd->priv; 1176 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, 1177 BUS_DMASYNC_POSTWRITE); 1178 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map); 1179 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next); 1180 1181 m_freem(sbuf->m); 1182 ieee80211_free_node(sbuf->ni); 1183 1184 sc->sc_tx_timer = 0; 1185 break; 1186 } 1187 1188 sbd->type = IPW_SBD_TYPE_NOASSOC; 1189} 1190 1191static void 1192ipw_tx_intr(struct ipw_softc *sc) 1193{ 1194 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1195 struct ipw_soft_bd *sbd; 1196 uint32_t r, i; 1197 1198 if (!(sc->flags & IPW_FLAG_FW_INITED)) 1199 return; 1200 1201 r = CSR_READ_4(sc, IPW_CSR_TX_READ); 1202 1203 for (i = (sc->txold + 1) % IPW_NTBD; i != r; i = (i + 1) % IPW_NTBD) { 1204 sbd = &sc->stbd_list[i]; 1205 1206 if (sbd->type == IPW_SBD_TYPE_DATA) 1207 ifp->if_opackets++; 1208 1209 ipw_release_sbd(sc, sbd); 1210 sc->txfree++; 1211 } 1212 1213 /* remember what the firmware has processed */ 1214 sc->txold = (r == 0) ? IPW_NTBD - 1 : r - 1; 1215 1216 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1217 ipw_start(ifp); 1218} 1219 1220static void 1221ipw_intr(void *arg) 1222{ 1223 struct ipw_softc *sc = arg; 1224 uint32_t r; 1225 1226 IPW_LOCK(sc); 1227 1228 if ((r = CSR_READ_4(sc, IPW_CSR_INTR)) == 0 || r == 0xffffffff) { 1229 IPW_UNLOCK(sc); 1230 return; 1231 } 1232 1233 /* disable interrupts */ 1234 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0); 1235 1236 if (r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)) { 1237 device_printf(sc->sc_dev, "fatal error\n"); 1238 sc->sc_ic.ic_ifp->if_flags &= ~IFF_UP; 1239 ipw_stop(sc); 1240 } 1241 1242 if (r & IPW_INTR_FW_INIT_DONE) { 1243 if (!(r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR))) 1244 wakeup(sc); 1245 } 1246 1247 if (r & IPW_INTR_RX_TRANSFER) 1248 ipw_rx_intr(sc); 1249 1250 if (r & IPW_INTR_TX_TRANSFER) 1251 ipw_tx_intr(sc); 1252 1253 /* acknowledge all interrupts */ 1254 CSR_WRITE_4(sc, IPW_CSR_INTR, r); 1255 1256 /* re-enable interrupts */ 1257 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK); 1258 1259 IPW_UNLOCK(sc); 1260} 1261 1262static void 1263ipw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1264{ 1265 if (error != 0) 1266 return; 1267 1268 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 1269 1270 *(bus_addr_t *)arg = segs[0].ds_addr; 1271} 1272 1273/* 1274 * Send a command to the firmware and wait for the acknowledgement. 1275 */ 1276static int 1277ipw_cmd(struct ipw_softc *sc, uint32_t type, void *data, uint32_t len) 1278{ 1279 struct ipw_soft_bd *sbd; 1280 bus_addr_t physaddr; 1281 int error; 1282 1283 sbd = &sc->stbd_list[sc->txcur]; 1284 1285 error = bus_dmamap_load(sc->cmd_dmat, sc->cmd_map, &sc->cmd, 1286 sizeof (struct ipw_cmd), ipw_dma_map_addr, &physaddr, 0); 1287 if (error != 0) { 1288 device_printf(sc->sc_dev, "could not map command DMA memory\n"); 1289 return error; 1290 } 1291 1292 sc->cmd.type = htole32(type); 1293 sc->cmd.subtype = 0; 1294 sc->cmd.len = htole32(len); 1295 sc->cmd.seq = 0; 1296 bcopy(data, sc->cmd.data, len); 1297 1298 sbd->type = IPW_SBD_TYPE_COMMAND; 1299 sbd->bd->physaddr = htole32(physaddr); 1300 sbd->bd->len = htole32(sizeof (struct ipw_cmd)); 1301 sbd->bd->nfrag = 1; 1302 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_COMMAND | 1303 IPW_BD_FLAG_TX_LAST_FRAGMENT; 1304 1305 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, BUS_DMASYNC_PREWRITE); 1306 bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE); 1307 1308 DPRINTFN(2, ("sending command (%u, %u, %u, %u)\n", type, 0, 0, len)); 1309 1310 /* kick firmware */ 1311 sc->txfree--; 1312 sc->txcur = (sc->txcur + 1) % IPW_NTBD; 1313 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 1314 1315 /* wait at most one second for command to complete */ 1316 return msleep(sc, &sc->sc_mtx, 0, "ipwcmd", hz); 1317} 1318 1319static int 1320ipw_tx_start(struct ifnet *ifp, struct mbuf *m0, struct ieee80211_node *ni) 1321{ 1322 struct ipw_softc *sc = ifp->if_softc; 1323 struct ieee80211com *ic = &sc->sc_ic; 1324 struct ieee80211_frame *wh; 1325 struct ipw_soft_bd *sbd; 1326 struct ipw_soft_hdr *shdr; 1327 struct ipw_soft_buf *sbuf; 1328 struct ieee80211_key *k; 1329 struct mbuf *mnew; 1330 bus_dma_segment_t segs[IPW_MAX_NSEG]; 1331 bus_addr_t physaddr; 1332 int nsegs, error, i; 1333 1334 wh = mtod(m0, struct ieee80211_frame *); 1335 1336 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1337 k = ieee80211_crypto_encap(ic, ni, m0); 1338 if (k == NULL) { 1339 m_freem(m0); 1340 return ENOBUFS; 1341 } 1342 1343 /* packet header may have moved, reset our local pointer */ 1344 wh = mtod(m0, struct ieee80211_frame *); 1345 } 1346 1347 if (sc->sc_drvbpf != NULL) { 1348 struct ipw_tx_radiotap_header *tap = &sc->sc_txtap; 1349 1350 tap->wt_flags = 0; 1351 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1352 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1353 1354 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1355 } 1356 1357 shdr = SLIST_FIRST(&sc->free_shdr); 1358 sbuf = SLIST_FIRST(&sc->free_sbuf); 1359 KASSERT(shdr != NULL && sbuf != NULL, ("empty sw hdr/buf pool")); 1360 1361 shdr->hdr.type = htole32(IPW_HDR_TYPE_SEND); 1362 shdr->hdr.subtype = 0; 1363 shdr->hdr.encrypted = (wh->i_fc[1] & IEEE80211_FC1_WEP) ? 1 : 0; 1364 shdr->hdr.encrypt = 0; 1365 shdr->hdr.keyidx = 0; 1366 shdr->hdr.keysz = 0; 1367 shdr->hdr.fragmentsz = 0; 1368 IEEE80211_ADDR_COPY(shdr->hdr.src_addr, wh->i_addr2); 1369 if (ic->ic_opmode == IEEE80211_M_STA) 1370 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr3); 1371 else 1372 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr1); 1373 1374 /* trim IEEE802.11 header */ 1375 m_adj(m0, sizeof (struct ieee80211_frame)); 1376 1377 error = bus_dmamap_load_mbuf_sg(sc->txbuf_dmat, sbuf->map, m0, segs, 1378 &nsegs, 0); 1379 if (error != 0 && error != EFBIG) { 1380 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1381 error); 1382 m_freem(m0); 1383 return error; 1384 } 1385 if (error != 0) { 1386 mnew = m_defrag(m0, M_DONTWAIT); 1387 if (mnew == NULL) { 1388 device_printf(sc->sc_dev, 1389 "could not defragment mbuf\n"); 1390 m_freem(m0); 1391 return ENOBUFS; 1392 } 1393 m0 = mnew; 1394 1395 error = bus_dmamap_load_mbuf_sg(sc->txbuf_dmat, sbuf->map, m0, 1396 segs, &nsegs, 0); 1397 if (error != 0) { 1398 device_printf(sc->sc_dev, 1399 "could not map mbuf (error %d)\n", error); 1400 m_freem(m0); 1401 return error; 1402 } 1403 } 1404 1405 error = bus_dmamap_load(sc->hdr_dmat, shdr->map, &shdr->hdr, 1406 sizeof (struct ipw_hdr), ipw_dma_map_addr, &physaddr, 0); 1407 if (error != 0) { 1408 device_printf(sc->sc_dev, "could not map header DMA memory\n"); 1409 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map); 1410 m_freem(m0); 1411 return error; 1412 } 1413 1414 SLIST_REMOVE_HEAD(&sc->free_sbuf, next); 1415 SLIST_REMOVE_HEAD(&sc->free_shdr, next); 1416 1417 sbd = &sc->stbd_list[sc->txcur]; 1418 sbd->type = IPW_SBD_TYPE_HEADER; 1419 sbd->priv = shdr; 1420 sbd->bd->physaddr = htole32(physaddr); 1421 sbd->bd->len = htole32(sizeof (struct ipw_hdr)); 1422 sbd->bd->nfrag = 1 + nsegs; 1423 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3 | 1424 IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT; 1425 1426 DPRINTFN(5, ("sending tx hdr (%u, %u, %u, %u, %6D, %6D)\n", 1427 shdr->hdr.type, shdr->hdr.subtype, shdr->hdr.encrypted, 1428 shdr->hdr.encrypt, shdr->hdr.src_addr, ":", shdr->hdr.dst_addr, 1429 ":")); 1430 1431 sc->txfree--; 1432 sc->txcur = (sc->txcur + 1) % IPW_NTBD; 1433 1434 sbuf->m = m0; 1435 sbuf->ni = ni; 1436 1437 for (i = 0; i < nsegs; i++) { 1438 sbd = &sc->stbd_list[sc->txcur]; 1439 1440 sbd->bd->physaddr = htole32(segs[i].ds_addr); 1441 sbd->bd->len = htole32(segs[i].ds_len); 1442 sbd->bd->nfrag = 0; 1443 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3; 1444 if (i == nsegs - 1) { 1445 sbd->type = IPW_SBD_TYPE_DATA; 1446 sbd->priv = sbuf; 1447 sbd->bd->flags |= IPW_BD_FLAG_TX_LAST_FRAGMENT; 1448 } else { 1449 sbd->type = IPW_SBD_TYPE_NOASSOC; 1450 sbd->bd->flags |= IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT; 1451 } 1452 1453 DPRINTFN(5, ("sending fragment (%d, %d)\n", i, segs[i].ds_len)); 1454 1455 sc->txfree--; 1456 sc->txcur = (sc->txcur + 1) % IPW_NTBD; 1457 } 1458 1459 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_PREWRITE); 1460 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, BUS_DMASYNC_PREWRITE); 1461 bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE); 1462 1463 /* kick firmware */ 1464 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 1465 1466 return 0; 1467} 1468 1469static void 1470ipw_start(struct ifnet *ifp) 1471{ 1472 struct ipw_softc *sc = ifp->if_softc; 1473 struct ieee80211com *ic = &sc->sc_ic; 1474 struct mbuf *m0; 1475 struct ether_header *eh; 1476 struct ieee80211_node *ni; 1477 1478 IPW_LOCK(sc); 1479 1480 if (ic->ic_state != IEEE80211_S_RUN) { 1481 IPW_UNLOCK(sc); 1482 return; 1483 } 1484 1485 for (;;) { 1486 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0); 1487 if (m0 == NULL) 1488 break; 1489 1490 if (sc->txfree < 1 + IPW_MAX_NSEG) { 1491 IFQ_DRV_PREPEND(&ifp->if_snd, m0); 1492 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1493 break; 1494 } 1495 1496 if (m0->m_len < sizeof (struct ether_header) && 1497 (m0 = m_pullup(m0, sizeof (struct ether_header))) == NULL) 1498 continue; 1499 1500 eh = mtod(m0, struct ether_header *); 1501 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1502 if (ni == NULL) { 1503 m_freem(m0); 1504 continue; 1505 } 1506 BPF_MTAP(ifp, m0); 1507 1508 m0 = ieee80211_encap(ic, m0, ni); 1509 if (m0 == NULL) { 1510 ieee80211_free_node(ni); 1511 continue; 1512 } 1513 1514 if (ic->ic_rawbpf != NULL) 1515 bpf_mtap(ic->ic_rawbpf, m0); 1516 1517 if (ipw_tx_start(ifp, m0, ni) != 0) { 1518 ieee80211_free_node(ni); 1519 ifp->if_oerrors++; 1520 break; 1521 } 1522 1523 /* start watchdog timer */ 1524 sc->sc_tx_timer = 5; 1525 ifp->if_timer = 1; 1526 } 1527 1528 IPW_UNLOCK(sc); 1529} 1530 1531static void 1532ipw_watchdog(struct ifnet *ifp) 1533{ 1534 struct ipw_softc *sc = ifp->if_softc; 1535 struct ieee80211com *ic = &sc->sc_ic; 1536 1537 ifp->if_timer = 0; 1538 1539 if (sc->sc_tx_timer > 0) { 1540 if (--sc->sc_tx_timer == 0) { 1541 if_printf(ifp, "device timeout\n"); 1542 ifp->if_oerrors++; 1543 ifp->if_flags &= ~IFF_UP; 1544 ipw_stop(sc); 1545 return; 1546 } 1547 ifp->if_timer = 1; 1548 } 1549 1550 ieee80211_watchdog(ic); 1551} 1552 1553static int 1554ipw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1555{ 1556 struct ipw_softc *sc = ifp->if_softc; 1557 struct ieee80211com *ic = &sc->sc_ic; 1558 struct ifreq *ifr; 1559 int error = 0; 1560 1561 IPW_LOCK(sc); 1562 1563 switch (cmd) { 1564 case SIOCSIFFLAGS: 1565 if (ifp->if_flags & IFF_UP) { 1566 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1567 ipw_init(sc); 1568 } else { 1569 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1570 ipw_stop(sc); 1571 } 1572 break; 1573 1574 case SIOCSLOADFW: 1575 /* only super-user can do that! */ 1576 if ((error = suser(curthread)) != 0) 1577 break; 1578 1579 ifr = (struct ifreq *)data; 1580 error = ipw_cache_firmware(sc, ifr->ifr_data); 1581 break; 1582 1583 case SIOCSKILLFW: 1584 /* only super-user can do that! */ 1585 if ((error = suser(curthread)) != 0) 1586 break; 1587 1588 ifp->if_flags &= ~IFF_UP; 1589 ipw_stop(sc); 1590 ipw_free_firmware(sc); 1591 break; 1592 1593 default: 1594 error = ieee80211_ioctl(ic, cmd, data); 1595 } 1596 1597 if (error == ENETRESET) { 1598 if ((ifp->if_flags & IFF_UP) && 1599 (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1600 ipw_init(sc); 1601 error = 0; 1602 } 1603 1604 IPW_UNLOCK(sc); 1605 1606 return error; 1607} 1608 1609static void 1610ipw_stop_master(struct ipw_softc *sc) 1611{ 1612 int ntries; 1613 1614 /* disable interrupts */ 1615 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0); 1616 1617 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER); 1618 for (ntries = 0; ntries < 50; ntries++) { 1619 if (CSR_READ_4(sc, IPW_CSR_RST) & IPW_RST_MASTER_DISABLED) 1620 break; 1621 DELAY(10); 1622 } 1623 if (ntries == 50) 1624 device_printf(sc->sc_dev, "timeout waiting for master\n"); 1625 1626 CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) | 1627 IPW_RST_PRINCETON_RESET); 1628 1629 sc->flags &= ~IPW_FLAG_FW_INITED; 1630} 1631 1632static int 1633ipw_reset(struct ipw_softc *sc) 1634{ 1635 int ntries; 1636 1637 ipw_stop_master(sc); 1638 1639 /* move adapter to D0 state */ 1640 CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) | 1641 IPW_CTL_INIT); 1642 1643 /* wait for clock stabilization */ 1644 for (ntries = 0; ntries < 1000; ntries++) { 1645 if (CSR_READ_4(sc, IPW_CSR_CTL) & IPW_CTL_CLOCK_READY) 1646 break; 1647 DELAY(200); 1648 } 1649 if (ntries == 1000) 1650 return EIO; 1651 1652 CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) | 1653 IPW_RST_SW_RESET); 1654 1655 DELAY(10); 1656 1657 CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) | 1658 IPW_CTL_INIT); 1659 1660 return 0; 1661} 1662 1663/* 1664 * Upload the microcode to the device. 1665 */ 1666static int 1667ipw_load_ucode(struct ipw_softc *sc, u_char *uc, int size) 1668{ 1669 int ntries; 1670 1671 MEM_WRITE_4(sc, 0x3000e0, 0x80000000); 1672 CSR_WRITE_4(sc, IPW_CSR_RST, 0); 1673 1674 MEM_WRITE_2(sc, 0x220000, 0x0703); 1675 MEM_WRITE_2(sc, 0x220000, 0x0707); 1676 1677 MEM_WRITE_1(sc, 0x210014, 0x72); 1678 MEM_WRITE_1(sc, 0x210014, 0x72); 1679 1680 MEM_WRITE_1(sc, 0x210000, 0x40); 1681 MEM_WRITE_1(sc, 0x210000, 0x00); 1682 MEM_WRITE_1(sc, 0x210000, 0x40); 1683 1684 MEM_WRITE_MULTI_1(sc, 0x210010, uc, size); 1685 1686 MEM_WRITE_1(sc, 0x210000, 0x00); 1687 MEM_WRITE_1(sc, 0x210000, 0x00); 1688 MEM_WRITE_1(sc, 0x210000, 0x80); 1689 1690 MEM_WRITE_2(sc, 0x220000, 0x0703); 1691 MEM_WRITE_2(sc, 0x220000, 0x0707); 1692 1693 MEM_WRITE_1(sc, 0x210014, 0x72); 1694 MEM_WRITE_1(sc, 0x210014, 0x72); 1695 1696 MEM_WRITE_1(sc, 0x210000, 0x00); 1697 MEM_WRITE_1(sc, 0x210000, 0x80); 1698 1699 for (ntries = 0; ntries < 10; ntries++) { 1700 if (MEM_READ_1(sc, 0x210000) & 1) 1701 break; 1702 DELAY(10); 1703 } 1704 if (ntries == 10) { 1705 device_printf(sc->sc_dev, 1706 "timeout waiting for ucode to initialize\n"); 1707 return EIO; 1708 } 1709 1710 MEM_WRITE_4(sc, 0x3000e0, 0); 1711 1712 return 0; 1713} 1714 1715/* set of macros to handle unaligned little endian data in firmware image */ 1716#define GETLE32(p) ((p)[0] | (p)[1] << 8 | (p)[2] << 16 | (p)[3] << 24) 1717#define GETLE16(p) ((p)[0] | (p)[1] << 8) 1718static int 1719ipw_load_firmware(struct ipw_softc *sc, u_char *fw, int size) 1720{ 1721 u_char *p, *end; 1722 uint32_t dst; 1723 uint16_t len; 1724 int error; 1725 1726 p = fw; 1727 end = fw + size; 1728 while (p < end) { 1729 dst = GETLE32(p); p += 4; 1730 len = GETLE16(p); p += 2; 1731 1732 ipw_write_mem_1(sc, dst, p, len); 1733 p += len; 1734 } 1735 1736 CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK | 1737 IPW_IO_LED_OFF); 1738 1739 /* enable interrupts */ 1740 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK); 1741 1742 /* kick the firmware */ 1743 CSR_WRITE_4(sc, IPW_CSR_RST, 0); 1744 1745 CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) | 1746 IPW_CTL_ALLOW_STANDBY); 1747 1748 /* wait at most one second for firmware initialization to complete */ 1749 if ((error = msleep(sc, &sc->sc_mtx, 0, "ipwinit", hz)) != 0) { 1750 device_printf(sc->sc_dev, "timeout waiting for firmware " 1751 "initialization to complete\n"); 1752 return error; 1753 } 1754 1755 CSR_WRITE_4(sc, IPW_CSR_IO, CSR_READ_4(sc, IPW_CSR_IO) | 1756 IPW_IO_GPIO1_MASK | IPW_IO_GPIO3_MASK); 1757 1758 return 0; 1759} 1760 1761/* 1762 * Store firmware into kernel memory so we can download it when we need to, 1763 * e.g when the adapter wakes up from suspend mode. 1764 */ 1765static int 1766ipw_cache_firmware(struct ipw_softc *sc, void *data) 1767{ 1768 struct ipw_firmware *fw = &sc->fw; 1769 struct ipw_firmware_hdr hdr; 1770 u_char *p = data; 1771 int error; 1772 1773 ipw_free_firmware(sc); 1774 1775 IPW_UNLOCK(sc); 1776 1777 if ((error = copyin(data, &hdr, sizeof hdr)) != 0) 1778 goto fail1; 1779 1780 fw->main_size = le32toh(hdr.main_size); 1781 fw->ucode_size = le32toh(hdr.ucode_size); 1782 p += sizeof hdr; 1783 1784 fw->main = malloc(fw->main_size, M_DEVBUF, M_NOWAIT); 1785 if (fw->main == NULL) { 1786 error = ENOMEM; 1787 goto fail1; 1788 } 1789 1790 fw->ucode = malloc(fw->ucode_size, M_DEVBUF, M_NOWAIT); 1791 if (fw->ucode == NULL) { 1792 error = ENOMEM; 1793 goto fail2; 1794 } 1795 1796 if ((error = copyin(p, fw->main, fw->main_size)) != 0) 1797 goto fail3; 1798 1799 p += fw->main_size; 1800 if ((error = copyin(p, fw->ucode, fw->ucode_size)) != 0) 1801 goto fail3; 1802 1803 DPRINTF(("Firmware cached: main %u, ucode %u\n", fw->main_size, 1804 fw->ucode_size)); 1805 1806 IPW_LOCK(sc); 1807 1808 sc->flags |= IPW_FLAG_FW_CACHED; 1809 1810 return 0; 1811 1812fail3: free(fw->ucode, M_DEVBUF); 1813fail2: free(fw->main, M_DEVBUF); 1814fail1: IPW_LOCK(sc); 1815 1816 return error; 1817} 1818 1819static void 1820ipw_free_firmware(struct ipw_softc *sc) 1821{ 1822 if (!(sc->flags & IPW_FLAG_FW_CACHED)) 1823 return; 1824 1825 free(sc->fw.main, M_DEVBUF); 1826 free(sc->fw.ucode, M_DEVBUF); 1827 1828 sc->flags &= ~IPW_FLAG_FW_CACHED; 1829} 1830 1831static int 1832ipw_config(struct ipw_softc *sc) 1833{ 1834 struct ieee80211com *ic = &sc->sc_ic; 1835 struct ifnet *ifp = ic->ic_ifp; 1836 struct ipw_security security; 1837 struct ieee80211_key *k; 1838 struct ipw_wep_key wepkey; 1839 struct ipw_scan_options options; 1840 struct ipw_configuration config; 1841 uint32_t data; 1842 int error, i; 1843 1844 switch (ic->ic_opmode) { 1845 case IEEE80211_M_STA: 1846 case IEEE80211_M_HOSTAP: 1847 data = htole32(IPW_MODE_BSS); 1848 break; 1849 1850 case IEEE80211_M_IBSS: 1851 case IEEE80211_M_AHDEMO: 1852 data = htole32(IPW_MODE_IBSS); 1853 break; 1854 1855 case IEEE80211_M_MONITOR: 1856 data = htole32(IPW_MODE_MONITOR); 1857 break; 1858 } 1859 DPRINTF(("Setting mode to %u\n", le32toh(data))); 1860 error = ipw_cmd(sc, IPW_CMD_SET_MODE, &data, sizeof data); 1861 if (error != 0) 1862 return error; 1863 1864 if (ic->ic_opmode == IEEE80211_M_IBSS || 1865 ic->ic_opmode == IEEE80211_M_MONITOR) { 1866 data = htole32(ieee80211_chan2ieee(ic, ic->ic_ibss_chan)); 1867 DPRINTF(("Setting channel to %u\n", le32toh(data))); 1868 error = ipw_cmd(sc, IPW_CMD_SET_CHANNEL, &data, sizeof data); 1869 if (error != 0) 1870 return error; 1871 } 1872 1873 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 1874 DPRINTF(("Enabling adapter\n")); 1875 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0); 1876 } 1877 1878 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp)); 1879 DPRINTF(("Setting MAC address to %6D\n", ic->ic_myaddr, ":")); 1880 error = ipw_cmd(sc, IPW_CMD_SET_MAC_ADDRESS, ic->ic_myaddr, 1881 IEEE80211_ADDR_LEN); 1882 if (error != 0) 1883 return error; 1884 1885 config.flags = htole32(IPW_CFG_BSS_MASK | IPW_CFG_IBSS_MASK | 1886 IPW_CFG_PREAMBLE_AUTO | IPW_CFG_802_1x_ENABLE); 1887 if (ic->ic_opmode == IEEE80211_M_IBSS) 1888 config.flags |= htole32(IPW_CFG_IBSS_AUTO_START); 1889 if (ifp->if_flags & IFF_PROMISC) 1890 config.flags |= htole32(IPW_CFG_PROMISCUOUS); 1891 config.bss_chan = htole32(0x3fff); /* channels 1-14 */ 1892 config.ibss_chan = htole32(0x7ff); /* channels 1-11 */ 1893 DPRINTF(("Setting configuration to 0x%x\n", le32toh(config.flags))); 1894 error = ipw_cmd(sc, IPW_CMD_SET_CONFIGURATION, &config, sizeof config); 1895 if (error != 0) 1896 return error; 1897 1898 data = htole32(0x3); /* 1, 2 */ 1899 DPRINTF(("Setting basic tx rates to 0x%x\n", le32toh(data))); 1900 error = ipw_cmd(sc, IPW_CMD_SET_BASIC_TX_RATES, &data, sizeof data); 1901 if (error != 0) 1902 return error; 1903 1904 data = htole32(0xf); /* 1, 2, 5.5, 11 */ 1905 DPRINTF(("Setting tx rates to 0x%x\n", le32toh(data))); 1906 error = ipw_cmd(sc, IPW_CMD_SET_TX_RATES, &data, sizeof data); 1907 if (error != 0) 1908 return error; 1909 1910 data = htole32(IPW_POWER_MODE_CAM); 1911 DPRINTF(("Setting power mode to %u\n", le32toh(data))); 1912 error = ipw_cmd(sc, IPW_CMD_SET_POWER_MODE, &data, sizeof data); 1913 if (error != 0) 1914 return error; 1915 1916 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1917 data = htole32(32); /* default value */ 1918 DPRINTF(("Setting tx power index to %u\n", le32toh(data))); 1919 error = ipw_cmd(sc, IPW_CMD_SET_TX_POWER_INDEX, &data, 1920 sizeof data); 1921 if (error != 0) 1922 return error; 1923 } 1924 1925 data = htole32(ic->ic_rtsthreshold); 1926 DPRINTF(("Setting RTS threshold to %u\n", le32toh(data))); 1927 error = ipw_cmd(sc, IPW_CMD_SET_RTS_THRESHOLD, &data, sizeof data); 1928 if (error != 0) 1929 return error; 1930 1931 data = htole32(ic->ic_fragthreshold); 1932 DPRINTF(("Setting frag threshold to %u\n", le32toh(data))); 1933 error = ipw_cmd(sc, IPW_CMD_SET_FRAG_THRESHOLD, &data, sizeof data); 1934 if (error != 0) 1935 return error; 1936 1937#ifdef IPW_DEBUG 1938 if (ipw_debug > 0) { 1939 printf("Setting ESSID to "); 1940 ieee80211_print_essid(ic->ic_des_essid, ic->ic_des_esslen); 1941 printf("\n"); 1942 } 1943#endif 1944 error = ipw_cmd(sc, IPW_CMD_SET_ESSID, ic->ic_des_essid, 1945 ic->ic_des_esslen); 1946 if (error != 0) 1947 return error; 1948 1949 /* no mandatory BSSID */ 1950 DPRINTF(("Setting mandatory BSSID to null\n")); 1951 error = ipw_cmd(sc, IPW_CMD_SET_MANDATORY_BSSID, NULL, 0); 1952 if (error != 0) 1953 return error; 1954 1955 if (ic->ic_flags & IEEE80211_F_DESBSSID) { 1956 DPRINTF(("Setting desired BSSID to %6D\n", ic->ic_des_bssid, 1957 ":")); 1958 error = ipw_cmd(sc, IPW_CMD_SET_DESIRED_BSSID, 1959 ic->ic_des_bssid, IEEE80211_ADDR_LEN); 1960 if (error != 0) 1961 return error; 1962 } 1963 1964 bzero(&security, sizeof security); 1965 security.authmode = (ic->ic_bss->ni_authmode == IEEE80211_AUTH_SHARED) ? 1966 IPW_AUTH_SHARED : IPW_AUTH_OPEN; 1967 security.ciphers = htole32(IPW_CIPHER_NONE); 1968 DPRINTF(("Setting authmode to %u\n", security.authmode)); 1969 error = ipw_cmd(sc, IPW_CMD_SET_SECURITY_INFORMATION, &security, 1970 sizeof security); 1971 if (error != 0) 1972 return error; 1973 1974 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 1975 k = ic->ic_crypto.cs_nw_keys; 1976 for (i = 0; i < IEEE80211_WEP_NKID; i++, k++) { 1977 if (k->wk_keylen == 0) 1978 continue; 1979 1980 wepkey.idx = i; 1981 wepkey.len = k->wk_keylen; 1982 bzero(wepkey.key, sizeof wepkey.key); 1983 bcopy(k->wk_key, wepkey.key, k->wk_keylen); 1984 DPRINTF(("Setting wep key index %u len %u\n", 1985 wepkey.idx, wepkey.len)); 1986 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY, &wepkey, 1987 sizeof wepkey); 1988 if (error != 0) 1989 return error; 1990 } 1991 1992 data = htole32(ic->ic_crypto.cs_def_txkey); 1993 DPRINTF(("Setting wep tx key index to %u\n", le32toh(data))); 1994 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY_INDEX, &data, 1995 sizeof data); 1996 if (error != 0) 1997 return error; 1998 } 1999 2000 data = htole32((ic->ic_flags & IEEE80211_F_PRIVACY) ? IPW_WEPON : 0); 2001 DPRINTF(("Setting wep flags to 0x%x\n", le32toh(data))); 2002 error = ipw_cmd(sc, IPW_CMD_SET_WEP_FLAGS, &data, sizeof data); 2003 if (error != 0) 2004 return error; 2005 2006#if 0 2007 struct ipw_wpa_ie ie; 2008 2009 bzero(&ie, sizeof ie); 2010 ie.len = htole32(sizeof (struct ieee80211_ie_wpa)); 2011 DPRINTF(("Setting wpa ie\n")); 2012 error = ipw_cmd(sc, IPW_CMD_SET_WPA_IE, &ie, sizeof ie); 2013 if (error != 0) 2014 return error; 2015#endif 2016 2017 if (ic->ic_opmode == IEEE80211_M_IBSS) { 2018 data = htole32(ic->ic_bintval); 2019 DPRINTF(("Setting beacon interval to %u\n", le32toh(data))); 2020 error = ipw_cmd(sc, IPW_CMD_SET_BEACON_INTERVAL, &data, 2021 sizeof data); 2022 if (error != 0) 2023 return error; 2024 } 2025 2026 options.flags = 0; 2027 options.channels = htole32(0x3fff); /* scan channels 1-14 */ 2028 DPRINTF(("Setting scan options to 0x%x\n", le32toh(options.flags))); 2029 error = ipw_cmd(sc, IPW_CMD_SET_SCAN_OPTIONS, &options, sizeof options); 2030 if (error != 0) 2031 return error; 2032 2033 /* finally, enable adapter (start scanning for an access point) */ 2034 DPRINTF(("Enabling adapter\n")); 2035 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0); 2036} 2037 2038static void 2039ipw_init(void *priv) 2040{ 2041 struct ipw_softc *sc = priv; 2042 struct ieee80211com *ic = &sc->sc_ic; 2043 struct ifnet *ifp = ic->ic_ifp; 2044 struct ipw_firmware *fw = &sc->fw; 2045 2046 /* exit immediately if firmware has not been ioctl'd */ 2047 if (!(sc->flags & IPW_FLAG_FW_CACHED)) { 2048 if (!(sc->flags & IPW_FLAG_FW_WARNED)) 2049 device_printf(sc->sc_dev, "Please load firmware\n"); 2050 sc->flags |= IPW_FLAG_FW_WARNED; 2051 ifp->if_flags &= ~IFF_UP; 2052 return; 2053 } 2054 2055 ipw_stop(sc); 2056 2057 if (ipw_reset(sc) != 0) { 2058 device_printf(sc->sc_dev, "could not reset adapter\n"); 2059 goto fail; 2060 } 2061 2062 if (ipw_load_ucode(sc, fw->ucode, fw->ucode_size) != 0) { 2063 device_printf(sc->sc_dev, "could not load microcode\n"); 2064 goto fail; 2065 } 2066 2067 ipw_stop_master(sc); 2068 2069 /* 2070 * Setup tx, rx and status rings. 2071 */ 2072 sc->txold = IPW_NTBD - 1; 2073 sc->txcur = 0; 2074 sc->txfree = IPW_NTBD - 2; 2075 sc->rxcur = IPW_NRBD - 1; 2076 2077 CSR_WRITE_4(sc, IPW_CSR_TX_BASE, sc->tbd_phys); 2078 CSR_WRITE_4(sc, IPW_CSR_TX_SIZE, IPW_NTBD); 2079 CSR_WRITE_4(sc, IPW_CSR_TX_READ, 0); 2080 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 2081 2082 CSR_WRITE_4(sc, IPW_CSR_RX_BASE, sc->rbd_phys); 2083 CSR_WRITE_4(sc, IPW_CSR_RX_SIZE, IPW_NRBD); 2084 CSR_WRITE_4(sc, IPW_CSR_RX_READ, 0); 2085 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur); 2086 2087 CSR_WRITE_4(sc, IPW_CSR_STATUS_BASE, sc->status_phys); 2088 2089 if (ipw_load_firmware(sc, fw->main, fw->main_size) != 0) { 2090 device_printf(sc->sc_dev, "could not load firmware\n"); 2091 goto fail; 2092 } 2093 2094 sc->flags |= IPW_FLAG_FW_INITED; 2095 2096 /* retrieve information tables base addresses */ 2097 sc->table1_base = CSR_READ_4(sc, IPW_CSR_TABLE1_BASE); 2098 sc->table2_base = CSR_READ_4(sc, IPW_CSR_TABLE2_BASE); 2099 2100 ipw_write_table1(sc, IPW_INFO_LOCK, 0); 2101 2102 if (ipw_config(sc) != 0) { 2103 device_printf(sc->sc_dev, "device configuration failed\n"); 2104 goto fail; 2105 } 2106 2107 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2108 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2109 2110 return; 2111 2112fail: ifp->if_flags &= ~IFF_UP; 2113 ipw_stop(sc); 2114} 2115 2116static void 2117ipw_stop(void *priv) 2118{ 2119 struct ipw_softc *sc = priv; 2120 struct ieee80211com *ic = &sc->sc_ic; 2121 struct ifnet *ifp = ic->ic_ifp; 2122 int i; 2123 2124 ipw_stop_master(sc); 2125 2126 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET); 2127 2128 /* 2129 * Release tx buffers. 2130 */ 2131 for (i = 0; i < IPW_NTBD; i++) 2132 ipw_release_sbd(sc, &sc->stbd_list[i]); 2133 2134 sc->sc_tx_timer = 0; 2135 ifp->if_timer = 0; 2136 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2137 2138 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2139} 2140 2141static int 2142ipw_sysctl_stats(SYSCTL_HANDLER_ARGS) 2143{ 2144 struct ipw_softc *sc = arg1; 2145 uint32_t i, size, buf[256]; 2146 2147 if (!(sc->flags & IPW_FLAG_FW_INITED)) { 2148 bzero(buf, sizeof buf); 2149 return SYSCTL_OUT(req, buf, sizeof buf); 2150 } 2151 2152 CSR_WRITE_4(sc, IPW_CSR_AUTOINC_ADDR, sc->table1_base); 2153 2154 size = min(CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA), 256); 2155 for (i = 1; i < size; i++) 2156 buf[i] = MEM_READ_4(sc, CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA)); 2157 2158 return SYSCTL_OUT(req, buf, sizeof buf); 2159} 2160 2161static int 2162ipw_sysctl_radio(SYSCTL_HANDLER_ARGS) 2163{ 2164 struct ipw_softc *sc = arg1; 2165 int val; 2166 2167 val = !((sc->flags & IPW_FLAG_HAS_RADIO_SWITCH) && 2168 (CSR_READ_4(sc, IPW_CSR_IO) & IPW_IO_RADIO_DISABLED)); 2169 2170 return SYSCTL_OUT(req, &val, sizeof val); 2171} 2172 2173static uint32_t 2174ipw_read_table1(struct ipw_softc *sc, uint32_t off) 2175{ 2176 return MEM_READ_4(sc, MEM_READ_4(sc, sc->table1_base + off)); 2177} 2178 2179static void 2180ipw_write_table1(struct ipw_softc *sc, uint32_t off, uint32_t info) 2181{ 2182 MEM_WRITE_4(sc, MEM_READ_4(sc, sc->table1_base + off), info); 2183} 2184 2185static int 2186ipw_read_table2(struct ipw_softc *sc, uint32_t off, void *buf, uint32_t *len) 2187{ 2188 uint32_t addr, info; 2189 uint16_t count, size; 2190 uint32_t total; 2191 2192 /* addr[4] + count[2] + size[2] */ 2193 addr = MEM_READ_4(sc, sc->table2_base + off); 2194 info = MEM_READ_4(sc, sc->table2_base + off + 4); 2195 2196 count = info >> 16; 2197 size = info & 0xffff; 2198 total = count * size; 2199 2200 if (total > *len) { 2201 *len = total; 2202 return EINVAL; 2203 } 2204 2205 *len = total; 2206 ipw_read_mem_1(sc, addr, buf, total); 2207 2208 return 0; 2209} 2210 2211static void 2212ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap, 2213 bus_size_t count) 2214{ 2215 for (; count > 0; offset++, datap++, count--) { 2216 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3); 2217 *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3)); 2218 } 2219} 2220 2221static void 2222ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap, 2223 bus_size_t count) 2224{ 2225 for (; count > 0; offset++, datap++, count--) { 2226 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3); 2227 CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap); 2228 } 2229} 2230