1/*-
2 * Copyright (c) 2008 Joseph Koshy
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD$");
29
30#include <sys/param.h>
31#include <sys/pmc.h>
32#include <sys/pmckern.h>
33#include <sys/systm.h>
34
35#include <machine/specialreg.h>
36
37/*
38 * TSC support.
39 */
40
41#define	TSC_CAPS	PMC_CAP_READ
42
43struct tsc_descr {
44	struct pmc_descr pm_descr;  /* "base class" */
45};
46
47static struct tsc_descr tsc_pmcdesc[TSC_NPMCS] =
48{
49    {
50	.pm_descr =
51	{
52		.pd_name  = "TSC",
53		.pd_class = PMC_CLASS_TSC,
54		.pd_caps  = TSC_CAPS,
55		.pd_width = 64
56	}
57    }
58};
59
60/*
61 * Per-CPU data structure for TSCs.
62 */
63
64struct tsc_cpu {
65	struct pmc_hw	tc_hw;
66};
67
68static struct tsc_cpu **tsc_pcpu;
69
70static int
71tsc_allocate_pmc(int cpu, int ri, struct pmc *pm,
72    const struct pmc_op_pmcallocate *a)
73{
74	(void) cpu;
75
76	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
77	    ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
78	KASSERT(ri >= 0 && ri < TSC_NPMCS,
79	    ("[tsc,%d] illegal row index %d", __LINE__, ri));
80
81	if (a->pm_class != PMC_CLASS_TSC)
82		return (EINVAL);
83
84	if ((pm->pm_caps & TSC_CAPS) == 0)
85		return (EINVAL);
86
87	if ((pm->pm_caps & ~TSC_CAPS) != 0)
88		return (EPERM);
89
90	if (a->pm_ev != PMC_EV_TSC_TSC ||
91	    a->pm_mode != PMC_MODE_SC)
92		return (EINVAL);
93
94	return (0);
95}
96
97static int
98tsc_config_pmc(int cpu, int ri, struct pmc *pm)
99{
100	struct pmc_hw *phw;
101
102	PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
103
104	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
105	    ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
106	KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
107
108	phw = &tsc_pcpu[cpu]->tc_hw;
109
110	KASSERT(pm == NULL || phw->phw_pmc == NULL,
111	    ("[tsc,%d] pm=%p phw->pm=%p hwpmc not unconfigured", __LINE__,
112	    pm, phw->phw_pmc));
113
114	phw->phw_pmc = pm;
115
116	return (0);
117}
118
119static int
120tsc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
121{
122	int error;
123	size_t copied;
124	const struct tsc_descr *pd;
125	struct pmc_hw *phw;
126
127	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
128	    ("[tsc,%d] illegal CPU %d", __LINE__, cpu));
129	KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
130
131	phw = &tsc_pcpu[cpu]->tc_hw;
132	pd  = &tsc_pmcdesc[ri];
133
134	if ((error = copystr(pd->pm_descr.pd_name, pi->pm_name,
135	    PMC_NAME_MAX, &copied)) != 0)
136		return (error);
137
138	pi->pm_class = pd->pm_descr.pd_class;
139
140	if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
141		pi->pm_enabled = TRUE;
142		*ppmc          = phw->phw_pmc;
143	} else {
144		pi->pm_enabled = FALSE;
145		*ppmc          = NULL;
146	}
147
148	return (0);
149}
150
151static int
152tsc_get_config(int cpu, int ri, struct pmc **ppm)
153{
154	(void) ri;
155
156	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
157	    ("[tsc,%d] illegal CPU %d", __LINE__, cpu));
158	KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
159
160	*ppm = tsc_pcpu[cpu]->tc_hw.phw_pmc;
161
162	return (0);
163}
164
165static int
166tsc_get_msr(int ri, uint32_t *msr)
167{
168	(void) ri;
169
170	KASSERT(ri >= 0 && ri < TSC_NPMCS,
171	    ("[tsc,%d] ri %d out of range", __LINE__, ri));
172
173	*msr = MSR_TSC;
174
175	return (0);
176}
177
178static int
179tsc_pcpu_fini(struct pmc_mdep *md, int cpu)
180{
181	int ri;
182	struct pmc_cpu *pc;
183
184	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
185	    ("[tsc,%d] illegal cpu %d", __LINE__, cpu));
186	KASSERT(tsc_pcpu[cpu] != NULL, ("[tsc,%d] null pcpu", __LINE__));
187
188	free(tsc_pcpu[cpu], M_PMC);
189	tsc_pcpu[cpu] = NULL;
190
191	ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri;
192
193	pc = pmc_pcpu[cpu];
194	pc->pc_hwpmcs[ri] = NULL;
195
196	return (0);
197}
198
199static int
200tsc_pcpu_init(struct pmc_mdep *md, int cpu)
201{
202	int ri;
203	struct pmc_cpu *pc;
204	struct tsc_cpu *tsc_pc;
205
206
207	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
208	    ("[tsc,%d] illegal cpu %d", __LINE__, cpu));
209	KASSERT(tsc_pcpu, ("[tsc,%d] null pcpu", __LINE__));
210	KASSERT(tsc_pcpu[cpu] == NULL, ("[tsc,%d] non-null per-cpu",
211	    __LINE__));
212
213	tsc_pc = malloc(sizeof(struct tsc_cpu), M_PMC, M_WAITOK|M_ZERO);
214
215	tsc_pc->tc_hw.phw_state = PMC_PHW_FLAG_IS_ENABLED |
216	    PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(0) |
217	    PMC_PHW_FLAG_IS_SHAREABLE;
218
219	tsc_pcpu[cpu] = tsc_pc;
220
221	ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri;
222
223	KASSERT(pmc_pcpu, ("[tsc,%d] null generic pcpu", __LINE__));
224
225	pc = pmc_pcpu[cpu];
226
227	KASSERT(pc, ("[tsc,%d] null generic per-cpu", __LINE__));
228
229	pc->pc_hwpmcs[ri] = &tsc_pc->tc_hw;
230
231	return (0);
232}
233
234static int
235tsc_read_pmc(int cpu, int ri, pmc_value_t *v)
236{
237	struct pmc *pm;
238	enum pmc_mode mode;
239	const struct pmc_hw *phw;
240
241	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
242	    ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
243	KASSERT(ri == 0, ("[tsc,%d] illegal ri %d", __LINE__, ri));
244
245	phw = &tsc_pcpu[cpu]->tc_hw;
246	pm  = phw->phw_pmc;
247
248	KASSERT(pm != NULL,
249	    ("[tsc,%d] no owner for PHW [cpu%d,pmc%d]", __LINE__, cpu, ri));
250
251	mode = PMC_TO_MODE(pm);
252
253	KASSERT(mode == PMC_MODE_SC,
254	    ("[tsc,%d] illegal pmc mode %d", __LINE__, mode));
255
256	PMCDBG1(MDP,REA,1,"tsc-read id=%d", ri);
257
258	*v = rdtsc();
259
260	return (0);
261}
262
263static int
264tsc_release_pmc(int cpu, int ri, struct pmc *pmc)
265{
266	struct pmc_hw *phw;
267
268	(void) pmc;
269
270	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
271	    ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
272	KASSERT(ri == 0,
273	    ("[tsc,%d] illegal row-index %d", __LINE__, ri));
274
275	phw = &tsc_pcpu[cpu]->tc_hw;
276
277	KASSERT(phw->phw_pmc == NULL,
278	    ("[tsc,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc));
279
280	/*
281	 * Nothing to do.
282	 */
283	return (0);
284}
285
286static int
287tsc_start_pmc(int cpu, int ri)
288{
289	(void) cpu;
290
291	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
292	    ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
293	KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
294
295	return (0);	/* TSCs are always running. */
296}
297
298static int
299tsc_stop_pmc(int cpu, int ri)
300{
301	(void) cpu; (void) ri;
302
303	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
304	    ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
305	KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
306
307	return (0);	/* Cannot actually stop a TSC. */
308}
309
310static int
311tsc_write_pmc(int cpu, int ri, pmc_value_t v)
312{
313	(void) cpu; (void) ri; (void) v;
314
315	KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
316	    ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
317	KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
318
319	/*
320	 * The TSCs are used as timecounters by the kernel, so even
321	 * though some i386 CPUs support writeable TSCs, we don't
322	 * support writing changing TSC values through the HWPMC API.
323	 */
324	return (0);
325}
326
327int
328pmc_tsc_initialize(struct pmc_mdep *md, int maxcpu)
329{
330	struct pmc_classdep *pcd;
331
332	KASSERT(md != NULL, ("[tsc,%d] md is NULL", __LINE__));
333	KASSERT(md->pmd_nclass >= 1, ("[tsc,%d] dubious md->nclass %d",
334	    __LINE__, md->pmd_nclass));
335
336	tsc_pcpu = malloc(sizeof(struct tsc_cpu *) * maxcpu, M_PMC,
337	    M_ZERO|M_WAITOK);
338
339	pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC];
340
341	pcd->pcd_caps	= PMC_CAP_READ;
342	pcd->pcd_class	= PMC_CLASS_TSC;
343	pcd->pcd_num	= TSC_NPMCS;
344	pcd->pcd_ri	= md->pmd_npmc;
345	pcd->pcd_width	= 64;
346
347	pcd->pcd_allocate_pmc = tsc_allocate_pmc;
348	pcd->pcd_config_pmc   = tsc_config_pmc;
349	pcd->pcd_describe     = tsc_describe;
350	pcd->pcd_get_config   = tsc_get_config;
351	pcd->pcd_get_msr      = tsc_get_msr;
352	pcd->pcd_pcpu_init    = tsc_pcpu_init;
353	pcd->pcd_pcpu_fini    = tsc_pcpu_fini;
354	pcd->pcd_read_pmc     = tsc_read_pmc;
355	pcd->pcd_release_pmc  = tsc_release_pmc;
356	pcd->pcd_start_pmc    = tsc_start_pmc;
357	pcd->pcd_stop_pmc     = tsc_stop_pmc;
358	pcd->pcd_write_pmc    = tsc_write_pmc;
359
360	md->pmd_npmc += TSC_NPMCS;
361
362	return (0);
363}
364
365void
366pmc_tsc_finalize(struct pmc_mdep *md)
367{
368#ifdef	INVARIANTS
369	int i, ncpus;
370
371	ncpus = pmc_cpu_max();
372	for (i = 0; i < ncpus; i++)
373		KASSERT(tsc_pcpu[i] == NULL, ("[tsc,%d] non-null pcpu cpu %d",
374		    __LINE__, i));
375
376	KASSERT(md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_class ==
377	    PMC_CLASS_TSC, ("[tsc,%d] class mismatch", __LINE__));
378
379#else
380	(void) md;
381#endif
382
383	free(tsc_pcpu, M_PMC);
384	tsc_pcpu = NULL;
385}
386