1/* 2 * Copyright (c) HighPoint Technologies, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28#include <dev/hptrr/hptrr_config.h> 29 30 31#ifndef HPT_INTF_H 32#define HPT_INTF_H 33 34#if defined(__BIG_ENDIAN__)&&!defined(__BIG_ENDIAN_BITFIELD) 35#define __BIG_ENDIAN_BITFIELD 36#endif 37 38#ifdef __cplusplus 39extern "C" { 40#endif 41 42#ifndef __GNUC__ 43#define __attribute__(x) 44#endif 45 46#pragma pack(1) 47 48/* 49 * Version of this interface. 50 * The user mode application must first issue a hpt_get_version() call to 51 * check HPT_INTERFACE_VERSION. When an utility using newer version interface 52 * is used with old version drivers, it must call only the functions that 53 * driver supported. 54 * A new version interface should only add ioctl functions; it should implement 55 * all old version functions without change their definition. 56 */ 57#define __this_HPT_INTERFACE_VERSION 0x02000001 58 59#ifndef HPT_INTERFACE_VERSION 60#error "You must define HPT_INTERFACE_VERSION you implemented" 61#endif 62 63#if HPT_INTERFACE_VERSION > __this_HPT_INTERFACE_VERSION 64#error "HPT_INTERFACE_VERSION is invalid" 65#endif 66 67/* 68 * DEFINITION 69 * Logical device --- a device that can be accessed by OS. 70 * Physical device --- device attached to the controller. 71 * A logical device can be simply a physical device. 72 * 73 * Each logical and physical device has a 32bit ID. GUI will use this ID 74 * to identify devices. 75 * 1. The ID must be unique. 76 * 2. The ID must be immutable. Once an ID is assigned to a device, it 77 * must not change when system is running and the device exists. 78 * 3. The ID of logical device must be NOT reusable. If a device is 79 * removed, other newly created logical device must not use the same ID. 80 * 4. The ID must not be zero or 0xFFFFFFFF. 81 */ 82typedef HPT_U32 DEVICEID; 83 84/* 85 * logical device type. 86 * Identify array (logical device) and physical device. 87 */ 88#define LDT_ARRAY 1 89#define LDT_DEVICE 2 90 91/* 92 * Array types 93 * GUI will treat all array as 1-level RAID. No RAID0/1 or RAID1/0. 94 * A RAID0/1 device is type AT_RAID1. A RAID1/0 device is type AT_RAID0. 95 * Their members may be another array of type RAID0 or RAID1. 96 */ 97#define AT_UNKNOWN 0 98#define AT_RAID0 1 99#define AT_RAID1 2 100#define AT_RAID5 3 101#define AT_RAID6 4 102#define AT_RAID3 5 103#define AT_RAID4 6 104#define AT_JBOD 7 105#define AT_RAID1E 8 106 107/* 108 * physical device type 109 */ 110#define PDT_UNKNOWN 0 111#define PDT_HARDDISK 1 112#define PDT_CDROM 2 113#define PDT_TAPE 3 114 115/* 116 * Some constants. 117 */ 118#define MAX_NAME_LENGTH 36 119#define MAX_ARRAYNAME_LEN 16 120 121#define MAX_ARRAY_MEMBERS_V1 8 122 123#ifndef MAX_ARRAY_MEMBERS_V2 124#define MAX_ARRAY_MEMBERS_V2 16 125#endif 126 127#ifndef MAX_ARRAY_MEMBERS_V3 128#define MAX_ARRAY_MEMBERS_V3 64 129#endif 130 131/* keep definition for source code compatibility */ 132#define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1 133 134/* 135 * io commands 136 * GUI use these commands to do IO on logical/physical devices. 137 */ 138#define IO_COMMAND_READ 1 139#define IO_COMMAND_WRITE 2 140 141 142 143/* 144 * array flags 145 */ 146#define ARRAY_FLAG_DISABLED 0x00000001 /* The array is disabled */ 147#define ARRAY_FLAG_NEEDBUILDING 0x00000002 /* array data need to be rebuilt */ 148#define ARRAY_FLAG_REBUILDING 0x00000004 /* array is in rebuilding process */ 149#define ARRAY_FLAG_BROKEN 0x00000008 /* broken but may still working */ 150#define ARRAY_FLAG_BOOTDISK 0x00000010 /* array has a active partition */ 151 152#define ARRAY_FLAG_BOOTMARK 0x00000040 /* array has boot mark set */ 153#define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */ 154#define ARRAY_FLAG_VERIFYING 0x00000100 /* is being verified */ 155#define ARRAY_FLAG_INITIALIZING 0x00000200 /* is being initialized */ 156#define ARRAY_FLAG_TRANSFORMING 0x00000400 /* transform in progress */ 157#define ARRAY_FLAG_NEEDTRANSFORM 0x00000800 /* array need transform */ 158#define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* the array's initialization hasn't finished*/ 159#define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant (raid6) */ 160#define ARRAY_FLAG_RAID15PLUS 0x80000000 /* display this RAID 1 as RAID 1.5 */ 161/* 162 * device flags 163 */ 164#define DEVICE_FLAG_DISABLED 0x00000001 /* device is disabled */ 165#define DEVICE_FLAG_BOOTDISK 0x00000002 /* disk has a active partition */ 166#define DEVICE_FLAG_BOOTMARK 0x00000004 /* disk has boot mark set */ 167#define DEVICE_FLAG_WITH_601 0x00000008 /* has HPT601 connected */ 168#define DEVICE_FLAG_SATA 0x00000010 /* SATA or SAS device */ 169#define DEVICE_FLAG_ON_PM_PORT 0x00000020 /* PM port */ 170#define DEVICE_FLAG_SAS 0x00000040 /* SAS device */ 171 172#define DEVICE_FLAG_UNINITIALIZED 0x00010000 /* device is not initialized, can't be used to create array */ 173#define DEVICE_FLAG_LEGACY 0x00020000 /* single disk & mbr contains at least one partition */ 174 175#define DEVICE_FLAG_IS_SPARE 0x80000000 /* is a spare disk */ 176 177/* 178 * array states used by hpt_set_array_state() 179 */ 180/* old defines */ 181#define MIRROR_REBUILD_START 1 182#define MIRROR_REBUILD_ABORT 2 183#define MIRROR_REBUILD_COMPLETE 3 184/* new defines */ 185#define AS_REBUILD_START 1 186#define AS_REBUILD_ABORT 2 187#define AS_REBUILD_PAUSE AS_REBUILD_ABORT 188#define AS_REBUILD_COMPLETE 3 189#define AS_VERIFY_START 4 190#define AS_VERIFY_ABORT 5 191#define AS_VERIFY_COMPLETE 6 192#define AS_INITIALIZE_START 7 193#define AS_INITIALIZE_ABORT 8 194#define AS_INITIALIZE_COMPLETE 9 195#define AS_VERIFY_FAILED 10 196#define AS_REBUILD_STOP 11 197#define AS_SAVE_STATE 12 198#define AS_TRANSFORM_START 13 199#define AS_TRANSFORM_ABORT 14 200 201/************************************************************************ 202 * ioctl code 203 * It would be better if ioctl code are the same on different platforms, 204 * but we must not conflict with system defined ioctl code. 205 ************************************************************************/ 206#if defined(LINUX) || defined(__FreeBSD_version) || defined(linux) 207#define HPT_CTL_CODE(x) (x+0xFF00) 208#define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00) 209#elif defined(_MS_WIN32_) || defined(WIN32) 210 211#ifndef CTL_CODE 212#define CTL_CODE( DeviceType, Function, Method, Access ) \ 213 (((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method)) 214#endif 215#define HPT_CTL_CODE(x) CTL_CODE(0x370, 0x900+(x), 0, 0) 216#define HPT_CTL_CODE_WIN32_TO_IOP(x) ((((x) & 0xffff)>>2)-0x900) 217 218#else 219#define HPT_CTL_CODE(x) (x) 220#endif 221 222#define HPT_IOCTL_GET_VERSION HPT_CTL_CODE(0) 223#define HPT_IOCTL_GET_CONTROLLER_COUNT HPT_CTL_CODE(1) 224#define HPT_IOCTL_GET_CONTROLLER_INFO HPT_CTL_CODE(2) 225#define HPT_IOCTL_GET_CHANNEL_INFO HPT_CTL_CODE(3) 226#define HPT_IOCTL_GET_LOGICAL_DEVICES HPT_CTL_CODE(4) 227#define HPT_IOCTL_GET_DEVICE_INFO HPT_CTL_CODE(5) 228#define HPT_IOCTL_CREATE_ARRAY HPT_CTL_CODE(6) 229#define HPT_IOCTL_DELETE_ARRAY HPT_CTL_CODE(7) 230#define HPT_IOCTL_ARRAY_IO HPT_CTL_CODE(8) 231#define HPT_IOCTL_DEVICE_IO HPT_CTL_CODE(9) 232#define HPT_IOCTL_GET_EVENT HPT_CTL_CODE(10) 233#define HPT_IOCTL_REBUILD_MIRROR HPT_CTL_CODE(11) 234/* use HPT_IOCTL_REBUILD_DATA_BLOCK from now on */ 235#define HPT_IOCTL_REBUILD_DATA_BLOCK HPT_IOCTL_REBUILD_MIRROR 236#define HPT_IOCTL_ADD_SPARE_DISK HPT_CTL_CODE(12) 237#define HPT_IOCTL_REMOVE_SPARE_DISK HPT_CTL_CODE(13) 238#define HPT_IOCTL_ADD_DISK_TO_ARRAY HPT_CTL_CODE(14) 239#define HPT_IOCTL_SET_ARRAY_STATE HPT_CTL_CODE(15) 240#define HPT_IOCTL_SET_ARRAY_INFO HPT_CTL_CODE(16) 241#define HPT_IOCTL_SET_DEVICE_INFO HPT_CTL_CODE(17) 242#define HPT_IOCTL_RESCAN_DEVICES HPT_CTL_CODE(18) 243#define HPT_IOCTL_GET_DRIVER_CAPABILITIES HPT_CTL_CODE(19) 244#define HPT_IOCTL_GET_601_INFO HPT_CTL_CODE(20) 245#define HPT_IOCTL_SET_601_INFO HPT_CTL_CODE(21) 246#define HPT_IOCTL_LOCK_DEVICE HPT_CTL_CODE(22) 247#define HPT_IOCTL_UNLOCK_DEVICE HPT_CTL_CODE(23) 248#define HPT_IOCTL_IDE_PASS_THROUGH HPT_CTL_CODE(24) 249#define HPT_IOCTL_VERIFY_DATA_BLOCK HPT_CTL_CODE(25) 250#define HPT_IOCTL_INITIALIZE_DATA_BLOCK HPT_CTL_CODE(26) 251#define HPT_IOCTL_ADD_DEDICATED_SPARE HPT_CTL_CODE(27) 252#define HPT_IOCTL_DEVICE_IO_EX HPT_CTL_CODE(28) 253#define HPT_IOCTL_SET_BOOT_MARK HPT_CTL_CODE(29) 254#define HPT_IOCTL_QUERY_REMOVE HPT_CTL_CODE(30) 255#define HPT_IOCTL_REMOVE_DEVICES HPT_CTL_CODE(31) 256#define HPT_IOCTL_CREATE_ARRAY_V2 HPT_CTL_CODE(32) 257#define HPT_IOCTL_GET_DEVICE_INFO_V2 HPT_CTL_CODE(33) 258#define HPT_IOCTL_SET_DEVICE_INFO_V2 HPT_CTL_CODE(34) 259#define HPT_IOCTL_REBUILD_DATA_BLOCK_V2 HPT_CTL_CODE(35) 260#define HPT_IOCTL_VERIFY_DATA_BLOCK_V2 HPT_CTL_CODE(36) 261#define HPT_IOCTL_INITIALIZE_DATA_BLOCK_V2 HPT_CTL_CODE(37) 262#define HPT_IOCTL_LOCK_DEVICE_V2 HPT_CTL_CODE(38) 263#define HPT_IOCTL_DEVICE_IO_V2 HPT_CTL_CODE(39) 264#define HPT_IOCTL_DEVICE_IO_EX_V2 HPT_CTL_CODE(40) 265#define HPT_IOCTL_CREATE_TRANSFORM HPT_CTL_CODE(41) 266#define HPT_IOCTL_STEP_TRANSFORM HPT_CTL_CODE(42) 267#define HPT_IOCTL_SET_VDEV_INFO HPT_CTL_CODE(43) 268#define HPT_IOCTL_CALC_MAX_CAPACITY HPT_CTL_CODE(44) 269#define HPT_IOCTL_INIT_DISKS HPT_CTL_CODE(45) 270#define HPT_IOCTL_GET_DEVICE_INFO_V3 HPT_CTL_CODE(46) 271#define HPT_IOCTL_GET_CONTROLLER_INFO_V2 HPT_CTL_CODE(47) 272#define HPT_IOCTL_I2C_TRANSACTION HPT_CTL_CODE(48) 273#define HPT_IOCTL_GET_PARAMETER_LIST HPT_CTL_CODE(49) 274#define HPT_IOCTL_GET_PARAMETER HPT_CTL_CODE(50) 275#define HPT_IOCTL_SET_PARAMETER HPT_CTL_CODE(51) 276#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_V2 HPT_CTL_CODE(52) 277#define HPT_IOCTL_GET_CHANNEL_INFO_V2 HPT_CTL_CODE(53) 278#define HPT_IOCTL_GET_CONTROLLER_INFO_V3 HPT_CTL_CODE(54) 279#define HPT_IOCTL_GET_DEVICE_INFO_V4 HPT_CTL_CODE(55) 280#define HPT_IOCTL_CREATE_ARRAY_V3 HPT_CTL_CODE(56) 281#define HPT_IOCTL_CREATE_TRANSFORM_V2 HPT_CTL_CODE(57) 282#define HPT_IOCTL_CALC_MAX_CAPACITY_V2 HPT_CTL_CODE(58) 283#define HPT_IOCTL_SCSI_PASSTHROUGH HPT_CTL_CODE(59) 284 285 286#define HPT_IOCTL_GET_CONTROLLER_IDS HPT_CTL_CODE(100) 287#define HPT_IOCTL_GET_DCB HPT_CTL_CODE(101) 288 289#define HPT_IOCTL_EPROM_IO HPT_CTL_CODE(102) 290#define HPT_IOCTL_GET_CONTROLLER_VENID HPT_CTL_CODE(103) 291 292/************************************************************************ 293 * shared data structures 294 ************************************************************************/ 295 296/* 297 * Chip Type 298 */ 299#define CHIP_TYPE_HPT366 1 300#define CHIP_TYPE_HPT368 2 301#define CHIP_TYPE_HPT370 3 302#define CHIP_TYPE_HPT370A 4 303#define CHIP_TYPE_HPT370B 5 304#define CHIP_TYPE_HPT374 6 305#define CHIP_TYPE_HPT372 7 306#define CHIP_TYPE_HPT372A 8 307#define CHIP_TYPE_HPT302 9 308#define CHIP_TYPE_HPT371 10 309#define CHIP_TYPE_HPT372N 11 310#define CHIP_TYPE_HPT302N 12 311#define CHIP_TYPE_HPT371N 13 312#define CHIP_TYPE_SI3112A 14 313#define CHIP_TYPE_ICH5 15 314#define CHIP_TYPE_ICH5R 16 315#define CHIP_TYPE_MV50XX 20 316#define CHIP_TYPE_MV60X1 21 317#define CHIP_TYPE_MV60X2 22 318#define CHIP_TYPE_MV70X2 23 319#define CHIP_TYPE_MV5182 24 320#define CHIP_TYPE_IOP331 31 321#define CHIP_TYPE_IOP333 32 322#define CHIP_TYPE_IOP341 33 323#define CHIP_TYPE_IOP348 34 324 325/* 326 * Chip Flags 327 */ 328#define CHIP_SUPPORT_ULTRA_66 0x20 329#define CHIP_SUPPORT_ULTRA_100 0x40 330#define CHIP_HPT3XX_DPLL_MODE 0x80 331#define CHIP_SUPPORT_ULTRA_133 0x01 332#define CHIP_SUPPORT_ULTRA_150 0x02 333#define CHIP_MASTER 0x04 334#define CHIP_SUPPORT_SATA_300 0x08 335 336#define HPT_SPIN_UP_MODE_NOSUPPORT 0 337#define HPT_SPIN_UP_MODE_FULL 1 338#define HPT_SPIN_UP_MODE_STANDBY 2 339 340typedef struct _DRIVER_CAPABILITIES { 341 HPT_U32 dwSize; 342 343 HPT_U8 MaximumControllers; /* maximum controllers the driver can support */ 344 HPT_U8 SupportCrossControllerRAID; /* 1-support, 0-not support */ 345 HPT_U8 MinimumBlockSizeShift; /* minimum block size shift */ 346 HPT_U8 MaximumBlockSizeShift; /* maximum block size shift */ 347 348 HPT_U8 SupportDiskModeSetting; 349 HPT_U8 SupportSparePool; 350 HPT_U8 MaximumArrayNameLength; 351 /* only one HPT_U8 left here! */ 352#ifdef __BIG_ENDIAN_BITFIELD 353 HPT_U8 reserved: 3; 354 HPT_U8 SupportVariableSectorSize: 1; 355 HPT_U8 SupportHotSwap: 1; 356 HPT_U8 HighPerformanceRAID1: 1; 357 HPT_U8 RebuildProcessInDriver: 1; 358 HPT_U8 SupportDedicatedSpare: 1; 359#else 360 HPT_U8 SupportDedicatedSpare: 1; /* call hpt_add_dedicated_spare() for dedicated spare. */ 361 HPT_U8 RebuildProcessInDriver: 1; /* Windows only. used by mid layer for rebuild control. */ 362 HPT_U8 HighPerformanceRAID1: 1; 363 HPT_U8 SupportHotSwap: 1; 364 HPT_U8 SupportVariableSectorSize: 1; 365 HPT_U8 reserved: 3; 366#endif 367 368 369 HPT_U8 SupportedRAIDTypes[16]; 370 /* maximum members in an array corresponding to SupportedRAIDTypes */ 371 HPT_U8 MaximumArrayMembers[16]; 372} 373DRIVER_CAPABILITIES, *PDRIVER_CAPABILITIES; 374 375typedef struct _DRIVER_CAPABILITIES_V2 { 376 DRIVER_CAPABILITIES v1; 377 HPT_U8 SupportedCachePolicies[16]; 378 HPT_U32 reserved[17]; 379} 380DRIVER_CAPABILITIES_V2, *PDRIVER_CAPABILITIES_V2; 381 382/* 383 * Controller information. 384 */ 385typedef struct _CONTROLLER_INFO { 386 HPT_U8 ChipType; /* chip type */ 387 HPT_U8 InterruptLevel; /* IRQ level */ 388 HPT_U8 NumBuses; /* bus count */ 389 HPT_U8 ChipFlags; 390 391 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */ 392 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */ 393 394} CONTROLLER_INFO, *PCONTROLLER_INFO; 395 396#if HPT_INTERFACE_VERSION>=0x01020000 397typedef struct _CONTROLLER_INFO_V2 { 398 HPT_U8 ChipType; /* chip type */ 399 HPT_U8 InterruptLevel; /* IRQ level */ 400 HPT_U8 NumBuses; /* bus count */ 401 HPT_U8 ChipFlags; 402 403 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */ 404 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */ 405 406 HPT_U32 GroupId; /* low 32bit of vbus pointer the controller belongs 407 * the master controller has CHIP_MASTER flag set*/ 408 HPT_U8 pci_tree; 409 HPT_U8 pci_bus; 410 HPT_U8 pci_device; 411 HPT_U8 pci_function; 412 413 HPT_U32 ExFlags; 414} CONTROLLER_INFO_V2, *PCONTROLLER_INFO_V2; 415 416 417#define CEXF_IOPModel 1 418#define CEXF_SDRAMSize 2 419#define CEXF_BatteryInstalled 4 420#define CEXF_BatteryStatus 8 421#define CEXF_BatteryVoltage 0x10 422#define CEXF_BatteryBackupTime 0x20 423#define CEXF_FirmwareVersion 0x40 424#define CEXF_SerialNumber 0x80 425#define CEXF_BatteryTemperature 0x100 426 427typedef struct _CONTROLLER_INFO_V3 { 428 HPT_U8 ChipType; 429 HPT_U8 InterruptLevel; 430 HPT_U8 NumBuses; 431 HPT_U8 ChipFlags; 432 HPT_U8 szProductID[MAX_NAME_LENGTH]; 433 HPT_U8 szVendorID[MAX_NAME_LENGTH]; 434 HPT_U32 GroupId; 435 HPT_U8 pci_tree; 436 HPT_U8 pci_bus; 437 HPT_U8 pci_device; 438 HPT_U8 pci_function; 439 HPT_U32 ExFlags; 440 HPT_U8 IOPModel[32]; 441 HPT_U32 SDRAMSize; 442 HPT_U8 BatteryInstalled; 443 HPT_U8 BatteryStatus; 444 HPT_U16 BatteryVoltage; 445 HPT_U32 BatteryBackupTime; 446 HPT_U32 FirmwareVersion; 447 HPT_U8 SerialNumber[32]; 448 HPT_U8 BatteryMBInstalled; 449 HPT_U8 BatteryTemperature; 450 HPT_U8 reserve[86]; 451} 452CONTROLLER_INFO_V3, *PCONTROLLER_INFO_V3; 453typedef char check_CONTROLLER_INFO_V3[sizeof(CONTROLLER_INFO_V3)==256? 1:-1]; 454#endif 455/* 456 * Channel information. 457 */ 458typedef struct _CHANNEL_INFO { 459 HPT_U32 IoPort; /* IDE Base Port Address */ 460 HPT_U32 ControlPort; /* IDE Control Port Address */ 461 462 DEVICEID Devices[2]; /* device connected to this channel */ 463 464} CHANNEL_INFO, *PCHANNEL_INFO; 465 466typedef struct _CHANNEL_INFO_V2 { 467 HPT_U32 IoPort; /* IDE Base Port Address */ 468 HPT_U32 ControlPort; /* IDE Control Port Address */ 469 470 DEVICEID Devices[2+13]; /* device connected to this channel, PMPort max=15 */ 471} CHANNEL_INFO_V2, *PCHANNEL_INFO_V2; 472 473#ifndef __KERNEL__ 474/* 475 * time represented in HPT_U32 format 476 */ 477typedef struct _TIME_RECORD { 478 HPT_U32 seconds:6; /* 0 - 59 */ 479 HPT_U32 minutes:6; /* 0 - 59 */ 480 HPT_U32 month:4; /* 1 - 12 */ 481 HPT_U32 hours:6; /* 0 - 59 */ 482 HPT_U32 day:5; /* 1 - 31 */ 483 HPT_U32 year:5; /* 0=2000, 31=2031 */ 484} TIME_RECORD; 485#endif 486 487/* 488 * Array information. 489 */ 490typedef struct _HPT_ARRAY_INFO { 491 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 492 HPT_U8 Description[64]; /* array description */ 493 HPT_U8 CreateManager[16]; /* who created it */ 494 TIME_RECORD CreateTime; /* when created it */ 495 496 HPT_U8 ArrayType; /* array type */ 497 HPT_U8 BlockSizeShift; /* stripe size */ 498 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 499 HPT_U8 SubArrayType; 500 501 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 502 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1]; /* member array/disks */ 503 504 /* 505 * rebuilding progress, xx.xx% = sprintf(s, "%.2f%%", RebuildingProgress/100.0); 506 * only valid if rebuilding is done by driver code. 507 * Member Flags will have ARRAY_FLAG_REBUILDING set at this case. 508 * Verify operation use same fields below, the only difference is 509 * ARRAY_FLAG_VERIFYING is set. 510 */ 511 HPT_U32 RebuildingProgress; 512 HPT_U32 RebuiltSectors; /* rebuilding point (LBA) for single member */ 513 514} HPT_ARRAY_INFO, *PHPT_ARRAY_INFO; 515 516#if HPT_INTERFACE_VERSION>=0x01010000 517typedef struct _HPT_ARRAY_INFO_V2 { 518 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 519 HPT_U8 Description[64]; /* array description */ 520 HPT_U8 CreateManager[16]; /* who created it */ 521 TIME_RECORD CreateTime; /* when created it */ 522 523 HPT_U8 ArrayType; /* array type */ 524 HPT_U8 BlockSizeShift; /* stripe size */ 525 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 526 HPT_U8 SubArrayType; 527 528 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 529 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */ 530 531 HPT_U32 RebuildingProgress; 532 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 533 534 HPT_U32 reserve4[4]; 535} HPT_ARRAY_INFO_V2, *PHPT_ARRAY_INFO_V2; 536#endif 537 538#if HPT_INTERFACE_VERSION>=0x01020000 539typedef struct _HPT_ARRAY_INFO_V3 { 540 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 541 HPT_U8 Description[64]; /* array description */ 542 HPT_U8 CreateManager[16]; /* who created it */ 543 TIME_RECORD CreateTime; /* when created it */ 544 545 HPT_U8 ArrayType; /* array type */ 546 HPT_U8 BlockSizeShift; /* stripe size */ 547 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 548 HPT_U8 SubArrayType; 549 550 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 551 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */ 552 553 HPT_U32 RebuildingProgress; 554 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 555 556 DEVICEID TransformSource; 557 DEVICEID TransformTarget; /* destination device ID */ 558 HPT_U32 TransformingProgress; 559 HPT_U32 Signature; /* persistent identification*/ 560#if MAX_ARRAY_MEMBERS_V2==16 561 HPT_U16 Critical_Members; /* bit mask of critical members */ 562 HPT_U16 reserve2; 563 HPT_U32 reserve; 564#else 565 HPT_U32 Critical_Members; 566 HPT_U32 reserve; 567#endif 568} HPT_ARRAY_INFO_V3, *PHPT_ARRAY_INFO_V3; 569#endif 570 571#if HPT_INTERFACE_VERSION>=0x02000001 572typedef struct _HPT_ARRAY_INFO_V4 { 573 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 574 HPT_U8 Description[64]; /* array description */ 575 HPT_U8 CreateManager[16]; /* who created it */ 576 TIME_RECORD CreateTime; /* when created it */ 577 578 HPT_U8 ArrayType; /* array type */ 579 HPT_U8 BlockSizeShift; /* stripe size */ 580 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 581 HPT_U8 SubArrayType; 582 583 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 584 585 HPT_U32 RebuildingProgress; 586 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 587 588 DEVICEID TransformSource; 589 DEVICEID TransformTarget; /* destination device ID */ 590 HPT_U32 TransformingProgress; 591 HPT_U32 Signature; /* persistent identification*/ 592 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/ 593 HPT_U8 reserved2[7]; 594 HPT_U64 Critical_Members; 595 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3]; /* member array/disks */ 596} HPT_ARRAY_INFO_V4, *PHPT_ARRAY_INFO_V4; 597#endif 598 599 600#ifndef __KERNEL__ 601/* 602 * ATA/ATAPI Device identify data without the Reserved4. 603 */ 604typedef struct _IDENTIFY_DATA2 { 605 HPT_U16 GeneralConfiguration; 606 HPT_U16 NumberOfCylinders; 607 HPT_U16 Reserved1; 608 HPT_U16 NumberOfHeads; 609 HPT_U16 UnformattedBytesPerTrack; 610 HPT_U16 UnformattedBytesPerSector; 611 HPT_U16 SectorsPerTrack; 612 HPT_U16 VendorUnique1[3]; 613 HPT_U16 SerialNumber[10]; 614 HPT_U16 BufferType; 615 HPT_U16 BufferSectorSize; 616 HPT_U16 NumberOfEccBytes; 617 HPT_U16 FirmwareRevision[4]; 618 HPT_U16 ModelNumber[20]; 619 HPT_U8 MaximumBlockTransfer; 620 HPT_U8 VendorUnique2; 621 HPT_U16 DoubleWordIo; 622 HPT_U16 Capabilities; 623 HPT_U16 Reserved2; 624 HPT_U8 VendorUnique3; 625 HPT_U8 PioCycleTimingMode; 626 HPT_U8 VendorUnique4; 627 HPT_U8 DmaCycleTimingMode; 628 HPT_U16 TranslationFieldsValid; 629 HPT_U16 NumberOfCurrentCylinders; 630 HPT_U16 NumberOfCurrentHeads; 631 HPT_U16 CurrentSectorsPerTrack; 632 HPT_U32 CurrentSectorCapacity; 633 HPT_U16 CurrentMultiSectorSetting; 634 HPT_U32 UserAddressableSectors; 635 HPT_U8 SingleWordDMASupport; 636 HPT_U8 SingleWordDMAActive; 637 HPT_U8 MultiWordDMASupport; 638 HPT_U8 MultiWordDMAActive; 639 HPT_U8 AdvancedPIOModes; 640 HPT_U8 Reserved4; 641 HPT_U16 MinimumMWXferCycleTime; 642 HPT_U16 RecommendedMWXferCycleTime; 643 HPT_U16 MinimumPIOCycleTime; 644 HPT_U16 MinimumPIOCycleTimeIORDY; 645 HPT_U16 Reserved5[2]; 646 HPT_U16 ReleaseTimeOverlapped; 647 HPT_U16 ReleaseTimeServiceCommand; 648 HPT_U16 MajorRevision; 649 HPT_U16 MinorRevision; 650} __attribute__((packed)) IDENTIFY_DATA2, *PIDENTIFY_DATA2; 651#endif 652 653/* 654 * physical device information. 655 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data. 656 */ 657typedef struct _DEVICE_INFO { 658 HPT_U8 ControllerId; /* controller id */ 659 HPT_U8 PathId; /* bus */ 660 HPT_U8 TargetId; /* id */ 661 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */ 662 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 663 HPT_U8 DeviceType; /* device type */ 664 HPT_U8 UsableMode; /* highest usable mode */ 665 666#ifdef __BIG_ENDIAN_BITFIELD 667 HPT_U8 NCQEnabled: 1; 668 HPT_U8 NCQSupported: 1; 669 HPT_U8 TCQEnabled: 1; 670 HPT_U8 TCQSupported: 1; 671 HPT_U8 WriteCacheEnabled: 1; 672 HPT_U8 WriteCacheSupported: 1; 673 HPT_U8 ReadAheadEnabled: 1; 674 HPT_U8 ReadAheadSupported: 1; 675 HPT_U8 reserved6: 6; 676 HPT_U8 SpinUpMode: 2; 677#else 678 HPT_U8 ReadAheadSupported: 1; 679 HPT_U8 ReadAheadEnabled: 1; 680 HPT_U8 WriteCacheSupported: 1; 681 HPT_U8 WriteCacheEnabled: 1; 682 HPT_U8 TCQSupported: 1; 683 HPT_U8 TCQEnabled: 1; 684 HPT_U8 NCQSupported: 1; 685 HPT_U8 NCQEnabled: 1; 686 HPT_U8 SpinUpMode: 2; 687 HPT_U8 reserved6: 6; 688#endif 689 690 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */ 691 692 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */ 693 694} 695__attribute__((packed)) DEVICE_INFO, *PDEVICE_INFO; 696 697#if HPT_INTERFACE_VERSION>=0x01020000 698#define MAX_PARENTS_PER_DISK 8 699/* 700 * physical device information. 701 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data. 702 */ 703typedef struct _DEVICE_INFO_V2 { 704 HPT_U8 ControllerId; /* controller id */ 705 HPT_U8 PathId; /* bus */ 706 HPT_U8 TargetId; /* id */ 707 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */ 708 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 709 HPT_U8 DeviceType; /* device type */ 710 HPT_U8 UsableMode; /* highest usable mode */ 711 712#ifdef __BIG_ENDIAN_BITFIELD 713 HPT_U8 NCQEnabled: 1; 714 HPT_U8 NCQSupported: 1; 715 HPT_U8 TCQEnabled: 1; 716 HPT_U8 TCQSupported: 1; 717 HPT_U8 WriteCacheEnabled: 1; 718 HPT_U8 WriteCacheSupported: 1; 719 HPT_U8 ReadAheadEnabled: 1; 720 HPT_U8 ReadAheadSupported: 1; 721 HPT_U8 reserved6: 6; 722 HPT_U8 SpinUpMode: 2; 723#else 724 HPT_U8 ReadAheadSupported: 1; 725 HPT_U8 ReadAheadEnabled: 1; 726 HPT_U8 WriteCacheSupported: 1; 727 HPT_U8 WriteCacheEnabled: 1; 728 HPT_U8 TCQSupported: 1; 729 HPT_U8 TCQEnabled: 1; 730 HPT_U8 NCQSupported: 1; 731 HPT_U8 NCQEnabled: 1; 732 HPT_U8 SpinUpMode: 2; 733 HPT_U8 reserved6: 6; 734#endif 735 736 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */ 737 738 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */ 739 740 HPT_U64 TotalFree; 741 HPT_U64 MaxFree; 742 HPT_U64 BadSectors; 743 DEVICEID ParentArrays[MAX_PARENTS_PER_DISK]; 744 745} 746__attribute__((packed)) DEVICE_INFO_V2, *PDEVICE_INFO_V2, DEVICE_INFO_V3, *PDEVICE_INFO_V3; 747 748/* 749 * HPT601 information 750 */ 751#endif 752/* 753 * HPT601 information 754 */ 755#define HPT601_INFO_DEVICEID 1 756#define HPT601_INFO_TEMPERATURE 2 757#define HPT601_INFO_FANSTATUS 4 758#define HPT601_INFO_BEEPERCONTROL 8 759#define HPT601_INFO_LED1CONTROL 0x10 760#define HPT601_INFO_LED2CONTROL 0x20 761#define HPT601_INFO_POWERSTATUS 0x40 762 763typedef struct _HPT601_INFO_ { 764 HPT_U16 ValidFields; /* mark valid fields below */ 765 HPT_U16 DeviceId; /* 0x5A3E */ 766 HPT_U16 Temperature; /* Read: temperature sensor value. Write: temperature limit */ 767 HPT_U16 FanStatus; /* Fan status */ 768 HPT_U16 BeeperControl; /* bit4: beeper control bit. bit0-3: frequency bits */ 769 HPT_U16 LED1Control; /* bit4: twinkling control bit. bit0-3: frequency bits */ 770 HPT_U16 LED2Control; /* bit4: twinkling control bit. bit0-3: frequency bits */ 771 HPT_U16 PowerStatus; /* 1: has power 2: no power */ 772} HPT601_INFO, *PHPT601_INFO; 773 774#if HPT_INTERFACE_VERSION>=0x01010000 775#ifndef __KERNEL__ 776/* cache policy for each vdev, copied from ldm.h */ 777#define CACHE_POLICY_NONE 0 778#define CACHE_POLICY_WRITE_THROUGH 1 779#define CACHE_POLICY_WRITE_BACK 2 780 781#endif 782#endif 783/* 784 * Logical device information. 785 * Union of ArrayInfo and DeviceInfo. 786 * Common properties will be put in logical device information. 787 */ 788typedef struct _LOGICAL_DEVICE_INFO { 789 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 790 HPT_U8 reserved[3]; 791 792 HPT_U32 Capacity; /* array capacity */ 793 DEVICEID ParentArray; 794 795 union { 796 HPT_ARRAY_INFO array; 797 DEVICE_INFO device; 798 } __attribute__((packed)) u; 799 800} __attribute__((packed)) LOGICAL_DEVICE_INFO, *PLOGICAL_DEVICE_INFO; 801 802#if HPT_INTERFACE_VERSION>=0x01010000 803typedef struct _LOGICAL_DEVICE_INFO_V2 { 804 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 805 HPT_U8 reserved[3]; 806 807 HPT_U64 Capacity; /* array capacity */ 808 DEVICEID ParentArray; /* for physical device, Please don't use this field. 809 * use ParentArrays field in DEVICE_INFO_V2 810 */ 811 812 union { 813 HPT_ARRAY_INFO_V2 array; 814 DEVICE_INFO device; 815 } __attribute__((packed)) u; 816 817} __attribute__((packed)) LOGICAL_DEVICE_INFO_V2, *PLOGICAL_DEVICE_INFO_V2; 818#endif 819 820#if HPT_INTERFACE_VERSION>=0x01020000 821#define INVALID_TARGET_ID 0xFF 822#define INVALID_BUS_ID 0xFF 823typedef struct _LOGICAL_DEVICE_INFO_V3 { 824 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 825 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */ 826 HPT_U8 VBusId; /* vbus sequence in vbus_list */ 827 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */ 828 /* OS disk name: HPT DISK $VBusId_$TargetId */ 829 HPT_U64 Capacity; /* array capacity */ 830 DEVICEID ParentArray; /* for physical device, don't use this field. 831 * use ParentArrays field in DEVICE_INFO_V2 instead. 832 */ 833 HPT_U32 TotalIOs; 834 HPT_U32 TobalMBs; 835 HPT_U32 IOPerSec; 836 HPT_U32 MBPerSec; 837 838 union { 839 HPT_ARRAY_INFO_V3 array; 840 DEVICE_INFO_V2 device; 841 } __attribute__((packed)) u; 842 843} 844__attribute__((packed)) LOGICAL_DEVICE_INFO_V3, *PLOGICAL_DEVICE_INFO_V3; 845#endif 846 847#if HPT_INTERFACE_VERSION>=0x02000001 848typedef struct _LOGICAL_DEVICE_INFO_V4 { 849 HPT_U32 dwSize; 850 HPT_U8 revision; 851 HPT_U8 reserved[7]; 852 853 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 854 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */ 855 HPT_U8 VBusId; /* vbus sequence in vbus_list */ 856 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */ 857 /* OS disk name: HPT DISK $VBusId_$TargetId */ 858 HPT_U64 Capacity; /* array capacity */ 859 DEVICEID ParentArray; /* for physical device, don't use this field. 860 * use ParentArrays field in DEVICE_INFO_V2 instead. 861 */ 862 HPT_U32 TotalIOs; 863 HPT_U32 TobalMBs; 864 HPT_U32 IOPerSec; 865 HPT_U32 MBPerSec; 866 867 union { 868 HPT_ARRAY_INFO_V4 array; 869 DEVICE_INFO_V3 device; 870 } __attribute__((packed)) u; 871} 872__attribute__((packed)) LOGICAL_DEVICE_INFO_V4, *PLOGICAL_DEVICE_INFO_V4; 873 874/*LOGICAL_DEVICE_INFO_V4 max revision number*/ 875#define LOGICAL_DEVICE_INFO_V4_REVISION 0 876/*If new revision was defined please check evey revision size*/ 877#define LOGICAL_DEVICE_INFO_V4_R0_SIZE (sizeof(LOGICAL_DEVICE_INFO_V4)) 878#endif 879 880/* 881 * ALTERABLE_ARRAY_INFO and ALTERABLE_DEVICE_INFO, used in set_array_info() 882 * and set_device_info(). 883 * When set_xxx_info() is called, the ValidFields member indicates which 884 * fields in the structure are valid. 885 */ 886/* field masks */ 887#define AAIF_NAME 1 888#define AAIF_DESCRIPTION 2 889 890#define ADIF_MODE 1 891#define ADIF_TCQ 2 892#define ADIF_NCQ 4 893#define ADIF_WRITE_CACHE 8 894#define ADIF_READ_AHEAD 0x10 895#define ADIF_SPIN_UP_MODE 0x20 896 897typedef struct _ALTERABLE_ARRAY_INFO { 898 HPT_U32 ValidFields; /* mark valid fields below */ 899 HPT_U8 Name[MAX_ARRAYNAME_LEN]; /* array name */ 900 HPT_U8 Description[64]; /* array description */ 901}__attribute__((packed))ALTERABLE_ARRAY_INFO, *PALTERABLE_ARRAY_INFO; 902 903typedef struct _ALTERABLE_DEVICE_INFO { 904 HPT_U32 ValidFields; /* mark valid fields below */ 905 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 906}__attribute__((packed))ALTERABLE_DEVICE_INFO, *PALTERABLE_DEVICE_INFO; 907 908typedef struct _ALTERABLE_DEVICE_INFO_V2 { 909 HPT_U32 ValidFields; /* mark valid fields below */ 910 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 911 HPT_U8 TCQEnabled; 912 HPT_U8 NCQEnabled; 913 HPT_U8 WriteCacheEnabled; 914 HPT_U8 ReadAheadEnabled; 915 HPT_U8 SpinUpMode; 916 HPT_U8 reserve[2]; 917 HPT_U32 reserve2[13]; /* pad to 64 bytes */ 918}__attribute__((packed))ALTERABLE_DEVICE_INFO_V2, *PALTERABLE_DEVICE_INFO_V2; 919 920#if HPT_INTERFACE_VERSION>=0x01020000 921 922#define TARGET_TYPE_DEVICE 0 923#define TARGET_TYPE_ARRAY 1 924 925 926#define AIT_NAME 0 927#define AIT_DESCRIPTION 1 928#define AIT_CACHE_POLICY 2 929 930 931#define DIT_MODE 0 932#define DIT_READ_AHEAD 1 933#define DIT_WRITE_CACHE 2 934#define DIT_TCQ 3 935#define DIT_NCQ 4 936 937/* param type is determined by target_type and info_type*/ 938typedef struct _SET_DEV_INFO 939{ 940 HPT_U8 target_type; 941 HPT_U8 infor_type; 942 HPT_U16 param_length; 943 #define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO)) 944 /* HPT_U8 param[0]; */ 945} SET_VDEV_INFO, * PSET_VDEV_INFO; 946 947typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ; 948typedef HPT_U8 PARAM_ARRAY_DES[64]; 949typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY; 950 951#endif 952 953/* 954 * CREATE_ARRAY_PARAMS 955 * Param structure used to create an array. 956 */ 957typedef struct _CREATE_ARRAY_PARAMS { 958 HPT_U8 ArrayType; /* 1-level array type */ 959 HPT_U8 nDisk; /* number of elements in Members[] array */ 960 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 961 HPT_U8 CreateFlags; /* See CAF_xxx */ 962 963 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 964 HPT_U8 Description[64]; /* array description */ 965 HPT_U8 CreateManager[16]; /* who created it */ 966 TIME_RECORD CreateTime; /* when created it */ 967 968 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1];/* ID of array members, a member can be an array */ 969 970} CREATE_ARRAY_PARAMS, *PCREATE_ARRAY_PARAMS; 971 972#if HPT_INTERFACE_VERSION>=0x01010000 973typedef struct _CREATE_ARRAY_PARAMS_V2 { 974 HPT_U8 ArrayType; /* 1-level array type */ 975 HPT_U8 nDisk; /* number of elements in Members[] array */ 976 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 977 HPT_U8 CreateFlags; /* See CAF_xxx */ 978 979 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 980 HPT_U8 Description[64]; /* array description */ 981 HPT_U8 CreateManager[16]; /* who created it */ 982 TIME_RECORD CreateTime; /* when created it */ 983 HPT_U64 Capacity; 984 985 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2];/* ID of array members, a member can be an array */ 986 987} CREATE_ARRAY_PARAMS_V2, *PCREATE_ARRAY_PARAMS_V2; 988#endif 989 990#if HPT_INTERFACE_VERSION>=0x02000001 991typedef struct _CREATE_ARRAY_PARAMS_V3 { 992 HPT_U32 dwSize; 993 HPT_U8 revision; /*CREATE_ARRAY_PARAMS_V3_REVISION*/ 994 HPT_U8 reserved[6]; 995 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/ 996 HPT_U8 ArrayType; /* 1-level array type */ 997 HPT_U8 nDisk; /* number of elements in Members[] array */ 998 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 999 HPT_U8 CreateFlags; /* See CAF_xxx */ 1000 1001 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 1002 HPT_U8 Description[64]; /* array description */ 1003 HPT_U8 CreateManager[16]; /* who created it */ 1004 TIME_RECORD CreateTime; /* when created it */ 1005 HPT_U64 Capacity; 1006 1007 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3];/* ID of array members, a member can be an array */ 1008} CREATE_ARRAY_PARAMS_V3, *PCREATE_ARRAY_PARAMS_V3; 1009 1010/*CREATE_ARRAY_PARAMS_V3 current max revision*/ 1011#define CREATE_ARRAY_PARAMS_V3_REVISION 0 1012/*If new revision defined please check evey revision size*/ 1013#define CREATE_ARRAY_PARAMS_V3_R0_SIZE (sizeof(CREATE_ARRAY_PARAMS_V3)) 1014#endif 1015 1016#if HPT_INTERFACE_VERSION < 0x01020000 1017/* 1018 * Flags used for creating an RAID 1 array 1019 * 1020 * CAF_CREATE_AND_DUPLICATE 1021 * Copy source disk contents to target for RAID 1. If user choose "create and duplicate" 1022 * to create an array, GUI will call CreateArray() with this flag set. Then GUI should 1023 * call hpt_get_device_info() with the returned array ID and check returned flags to 1024 * see if ARRAY_FLAG_REBUILDING is set. If not set, driver does not support rebuilding 1025 * and GUI must do duplication itself. 1026 * CAF_DUPLICATE_MUST_DONE 1027 * If the duplication is aborted or fails, do not create the array. 1028 */ 1029#define CAF_CREATE_AND_DUPLICATE 1 1030#define CAF_DUPLICATE_MUST_DONE 2 1031#define CAF_CREATE_AS_RAID15 4 1032/* 1033 * Flags used for creating an RAID 5 array 1034 */ 1035#define CAF_CREATE_R5_NO_BUILD 1 1036#define CAF_CREATE_R5_ZERO_INIT 2 1037#define CAF_CREATE_R5_BUILD_PARITY 4 1038 1039#else 1040/* 1041 * Flags used for creating 1042 */ 1043#define CAF_FOREGROUND_INITIALIZE 1 1044#define CAF_BACKGROUND_INITIALIZE 2 1045#define CAF_CREATE_R5_WRITE_BACK (CACHE_POLICY_WRITE_BACK<<CAF_CACHE_POLICY_SHIFT) 1046 1047 1048#define CAF_CACHE_POLICY_MASK 0x1C 1049#define CAF_CACHE_POLICY_SHIFT 2 1050 1051#endif 1052 1053#define CAF_KEEP_DATA_ALWAYS 0x80 1054 1055/* Flags used for deleting an array 1056 * 1057 * DAF_KEEP_DATA_IF_POSSIBLE 1058 * If this flag is set, deleting a RAID 1 array will not destroy the data on both disks. 1059 * Deleting a JBOD should keep partitions on first disk ( not implement now ). 1060 * Deleting a RAID 0/1 should result as two RAID 0 array ( not implement now ). 1061 */ 1062#define DAF_KEEP_DATA_IF_POSSIBLE 1 1063#define DAF_KEEP_DATA_ALWAYS 2 1064 1065/* 1066 * event types 1067 */ 1068#define ET_DEVICE_REMOVED 1 /* device removed */ 1069#define ET_DEVICE_PLUGGED 2 /* device plugged */ 1070#define ET_DEVICE_ERROR 3 /* device I/O error */ 1071#define ET_REBUILD_STARTED 4 1072#define ET_REBUILD_ABORTED 5 1073#define ET_REBUILD_FINISHED 6 1074#define ET_SPARE_TOOK_OVER 7 1075#define ET_REBUILD_FAILED 8 1076#define ET_VERIFY_STARTED 9 1077#define ET_VERIFY_ABORTED 10 1078#define ET_VERIFY_FAILED 11 1079#define ET_VERIFY_FINISHED 12 1080#define ET_INITIALIZE_STARTED 13 1081#define ET_INITIALIZE_ABORTED 14 1082#define ET_INITIALIZE_FAILED 15 1083#define ET_INITIALIZE_FINISHED 16 1084#define ET_VERIFY_DATA_ERROR 17 1085#define ET_TRANSFORM_STARTED 18 1086#define ET_TRANSFORM_ABORTED 19 1087#define ET_TRANSFORM_FAILED 20 1088#define ET_TRANSFORM_FINISHED 21 1089#define ET_SMART_FAILED 22 1090#define ET_SMART_PASSED 23 1091#define ET_SECTOR_REPAIR_FAIL 24 1092#define ET_SECTOR_REPAIR_SUCCESS 25 1093#define ET_ERASE_FAIL 26 1094#define ET_ERASE_SUCCESS 27 1095#define ET_CONTINUE_REBUILD_ON_ERROR 28 1096 1097 1098/* 1099 * event structure 1100 */ 1101typedef struct _HPT_EVENT { 1102 TIME_RECORD Time; 1103 DEVICEID DeviceID; 1104 HPT_U8 EventType; 1105 HPT_U8 reserved[3]; 1106 1107 HPT_U8 Data[32]; /* various data depend on EventType */ 1108} HPT_EVENT, *PHPT_EVENT; 1109 1110/* 1111 * IDE pass-through command. Use it at your own risk! 1112 */ 1113#ifdef _MSC_VER 1114#pragma warning(disable:4200) 1115#endif 1116typedef struct _IDE_PASS_THROUGH_HEADER { 1117 DEVICEID idDisk; /* disk ID */ 1118 HPT_U8 bFeaturesReg; /* feature register */ 1119 HPT_U8 bSectorCountReg; /* IDE sector count register. */ 1120 HPT_U8 bLbaLowReg; /* IDE LBA low value. */ 1121 HPT_U8 bLbaMidReg; /* IDE LBA mid register. */ 1122 HPT_U8 bLbaHighReg; /* IDE LBA high value. */ 1123 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */ 1124 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */ 1125 HPT_U8 nSectors; /* data size in sectors, if the command has data transfer */ 1126 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */ 1127 HPT_U8 reserve[3]; 1128 #define IDE_PASS_THROUGH_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER)) 1129 /* HPT_U8 DataBuffer[0]; */ 1130} 1131IDE_PASS_THROUGH_HEADER, *PIDE_PASS_THROUGH_HEADER; 1132 1133typedef struct _HPT_SCSI_PASSTHROUGH_IN { 1134 DEVICEID idDisk; 1135 HPT_U8 protocol; 1136 HPT_U8 reserve1; 1137 HPT_U8 reserve2; 1138 HPT_U8 cdbLength; 1139 HPT_U8 cdb[16]; 1140 HPT_U32 dataLength; 1141 /* data follows, if any */ 1142} 1143HPT_SCSI_PASSTHROUGH_IN, *PHPT_SCSI_PASSTHROUGH_IN; 1144 1145typedef struct _HPT_SCSI_PASSTHROUGH_OUT { 1146 HPT_U8 scsiStatus; 1147 HPT_U8 reserve1; 1148 HPT_U8 reserve2; 1149 HPT_U8 reserve3; 1150 HPT_U32 dataLength; 1151 /* data/sense follows if any */ 1152} 1153HPT_SCSI_PASSTHROUGH_OUT, *PHPT_SCSI_PASSTHROUGH_OUT; 1154 1155/* 1156 * device io packet format 1157 */ 1158typedef struct _DEVICE_IO_EX_PARAMS { 1159 DEVICEID idDisk; 1160 HPT_U32 Lba; 1161 HPT_U16 nSectors; 1162 HPT_U8 Command; /* IO_COMMAD_xxx */ 1163 HPT_U8 BufferType; /* BUFFER_TYPE_xxx, see below */ 1164 HPT_U32 BufferPtr; 1165} 1166DEVICE_IO_EX_PARAMS, *PDEVICE_IO_EX_PARAMS; 1167 1168#define BUFFER_TYPE_LOGICAL 1 /* logical pointer to buffer */ 1169#define BUFFER_TYPE_PHYSICAL 2 /* physical address of buffer */ 1170#define BUFFER_TYPE_LOGICAL_LOGICAL_SG 3 /* logical pointer to logical S/G table */ 1171#define BUFFER_TYPE_LOGICAL_PHYSICAL_SG 4 /* logical pointer to physical S/G table */ 1172#define BUFFER_TYPE_PHYSICAL_LOGICAL_SG 5 /* physical address to logical S/G table */ 1173#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG 6 /* physical address of physical S/G table */ 1174#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG_PIO 7 /* non DMA capable physical address of physical S/G table */ 1175 1176typedef struct _HPT_DRIVER_PARAMETER { 1177 char name[32]; 1178 HPT_U8 value[32]; 1179 HPT_U8 type; /* HPT_DRIVER_PARAMETER_TYPE_* */ 1180 HPT_U8 persistent; 1181 HPT_U8 reserve2[2]; 1182 HPT_U8 location; /* 0 - system */ 1183 HPT_U8 controller; 1184 HPT_U8 bus; 1185 HPT_U8 reserve1; 1186 char desc[128]; 1187} 1188HPT_DRIVER_PARAMETER, *PHPT_DRIVER_PARAMETER; 1189 1190#define HPT_DRIVER_PARAMETER_TYPE_INT 1 1191#define HPT_DRIVER_PARAMETER_TYPE_BOOL 2 1192 1193 1194 1195/* 1196 * ioctl structure 1197 */ 1198#define HPT_IOCTL_MAGIC32 0x1A2B3C4D 1199#define HPT_IOCTL_MAGIC 0xA1B2C3D4 1200 1201typedef struct _HPT_IOCTL_PARAM { 1202 HPT_U32 Magic; /* used to check if it's a valid ioctl packet */ 1203 HPT_U32 dwIoControlCode; /* operation control code */ 1204 HPT_PTR lpInBuffer; /* input data buffer */ 1205 HPT_U32 nInBufferSize; /* size of input data buffer */ 1206 HPT_PTR lpOutBuffer; /* output data buffer */ 1207 HPT_U32 nOutBufferSize; /* size of output data buffer */ 1208 HPT_PTR lpBytesReturned; /* count of HPT_U8s returned */ 1209} 1210HPT_IOCTL_PARAM, *PHPT_IOCTL_PARAM; 1211 1212/* for 32-bit app running on 64-bit system */ 1213typedef struct _HPT_IOCTL_PARAM32 { 1214 HPT_U32 Magic; 1215 HPT_U32 dwIoControlCode; 1216 HPT_U32 lpInBuffer; 1217 HPT_U32 nInBufferSize; 1218 HPT_U32 lpOutBuffer; 1219 HPT_U32 nOutBufferSize; 1220 HPT_U32 lpBytesReturned; 1221} 1222HPT_IOCTL_PARAM32, *PHPT_IOCTL_PARAM32; 1223 1224#if !defined(__KERNEL__) || defined(SIMULATE) 1225/* 1226 * User-mode ioctl parameter passing conventions: 1227 * The ioctl function implementation is platform specific, so we don't 1228 * have forced rules for it. However, it's suggested to use a parameter 1229 * passing method as below 1230 * 1) Put all input data continuously in an input buffer. 1231 * 2) Prepare an output buffer with enough size if needed. 1232 * 3) Fill a HPT_IOCTL_PARAM structure. 1233 * 4) Pass the structure to driver through a platform-specific method. 1234 * This is implemented in the mid-layer user-mode library. The UI 1235 * programmer needn't care about it. 1236 */ 1237 1238/************************************************************************ 1239 * User mode functions 1240 ************************************************************************/ 1241/* 1242 * hpt_get_version 1243 * Version compatibility: all versions 1244 * Parameters: 1245 * None 1246 * Returns: 1247 * interface version. 0 when fail. 1248 */ 1249HPT_U32 hpt_get_version(void); 1250 1251/* 1252 * hpt_get_driver_capabilities 1253 * Version compatibility: v1.0.0.2 or later 1254 * Parameters: 1255 * Pointer to receive a DRIVE_CAPABILITIES structure. The caller must set 1256 * dwSize member to sizeof(DRIVER_CAPABILITIES). The callee must check this 1257 * member to see if it's correct. 1258 * Returns: 1259 * 0 - Success 1260 */ 1261int hpt_get_driver_capabilities(PDRIVER_CAPABILITIES cap); 1262int hpt_get_driver_capabilities_v2(PDRIVER_CAPABILITIES_V2 cap); 1263 1264/* 1265 * hpt_get_controller_count 1266 * Version compatibility: v1.0.0.1 or later 1267 * Parameters: 1268 * None 1269 * Returns: 1270 * number of controllers 1271 */ 1272int hpt_get_controller_count(void); 1273 1274/* hpt_get_controller_info 1275 * Version compatibility: v1.0.0.1 or later 1276 * Parameters: 1277 * id Controller id 1278 * pInfo pointer to CONTROLLER_INFO buffer 1279 * Returns: 1280 * 0 Success, controller info is put into (*pInfo ). 1281 */ 1282int hpt_get_controller_info(int id, PCONTROLLER_INFO pInfo); 1283 1284#if HPT_INTERFACE_VERSION>=0x01020000 1285/* hpt_get_controller_info_v2 1286 * Version compatibility: v2.0.0.0 or later 1287 * Parameters: 1288 * id Controller id 1289 * pInfo pointer to CONTROLLER_INFO_V2 buffer 1290 * Returns: 1291 * 0 Success, controller info is put into (*pInfo ). 1292 */ 1293int hpt_get_controller_info_v2(int id, PCONTROLLER_INFO_V2 pInfo); 1294 1295/* hpt_get_controller_info_v3 1296 * Version compatibility: v2.0.0.0 or later 1297 * Parameters: 1298 * id Controller id 1299 * pInfo pointer to CONTROLLER_INFO_V3 buffer 1300 * Returns: 1301 * 0 Success, controller info is put into (*pInfo ). 1302 */ 1303int hpt_get_controller_info_v3(int id, PCONTROLLER_INFO_V3 pInfo); 1304#endif 1305 1306/* hpt_get_channel_info 1307 * Version compatibility: v1.0.0.1 or later 1308 * Parameters: 1309 * id Controller id 1310 * bus bus number 1311 * pInfo pointer to CHANNEL_INFO buffer 1312 * Returns: 1313 * 0 Success, channel info is put into (*pInfo ). 1314 */ 1315int hpt_get_channel_info(int id, int bus, PCHANNEL_INFO pInfo); 1316 1317/* hpt_get_channel_info_v2 1318 * Version compatibility: v1.0.0.1 or later 1319 * Parameters: 1320 * id Controller id 1321 * bus bus number 1322 * pInfo pointer to CHANNEL_INFO buffer 1323 * Returns: 1324 * 0 Success, channel info is put into (*pInfo ). 1325 */ 1326int hpt_get_channel_info_v2(int id, int bus, PCHANNEL_INFO_V2 pInfo); 1327 1328/* hpt_get_logical_devices 1329 * Version compatibility: v1.0.0.1 or later 1330 * Parameters: 1331 * pIds pointer to a DEVICEID array 1332 * nMaxCount array size 1333 * Returns: 1334 * Number of ID returned. All logical device IDs are put into pIds array. 1335 * Note: A spare disk is not a logical device. 1336 */ 1337int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount); 1338 1339/* hpt_get_device_info 1340 * Version compatibility: v1.0.0.1 or later 1341 * Parameters: 1342 * id logical device id 1343 * pInfo pointer to LOGICAL_DEVICE_INFO structure 1344 * Returns: 1345 * 0 - Success 1346 */ 1347int hpt_get_device_info(DEVICEID id, PLOGICAL_DEVICE_INFO pInfo); 1348 1349/* hpt_create_array 1350 * Version compatibility: v1.0.0.1 or later 1351 * Parameters: 1352 * pParam pointer to CREATE_ARRAY_PARAMS structure 1353 * Returns: 1354 * 0 failed 1355 * else return array id 1356 */ 1357DEVICEID hpt_create_array(PCREATE_ARRAY_PARAMS pParam); 1358 1359/* hpt_delete_array 1360 * Version compatibility: v1.0.0.1 or later 1361 * Parameters: 1362 * id array id 1363 * Returns: 1364 * 0 Success 1365 */ 1366int hpt_delete_array(DEVICEID id, HPT_U32 options); 1367 1368/* hpt_device_io 1369 * Read/write data on array and physcal device. 1370 * Version compatibility: v1.0.0.1 or later 1371 * Parameters: 1372 * id device id. If it's an array ID, IO will be performed on the array. 1373 * If it's a physical device ID, IO will be performed on the device. 1374 * cmd IO_COMMAND_READ or IO_COMMAND_WRITE 1375 * buffer data buffer 1376 * length data size 1377 * Returns: 1378 * 0 Success 1379 */ 1380int hpt_device_io(DEVICEID id, int cmd, HPT_U32 lba, HPT_U32 nSector, void * buffer); 1381 1382/* hpt_add_disk_to_array 1383 * Used to dynamicly add a disk to an RAID1, RAID0/1, RAID1/0 or RAID5 array. 1384 * Auto-rebuild will start. 1385 * Version compatibility: v1.0.0.1 or later 1386 * Parameters: 1387 * idArray array id 1388 * idDisk disk id 1389 * Returns: 1390 * 0 Success 1391 */ 1392int hpt_add_disk_to_array(DEVICEID idArray, DEVICEID idDisk); 1393 1394/* hpt_add_spare_disk 1395 * Version compatibility: v1.0.0.1 or later 1396 * Add a disk to spare pool. 1397 * Parameters: 1398 * idDisk disk id 1399 * Returns: 1400 * 0 Success 1401 */ 1402int hpt_add_spare_disk(DEVICEID idDisk); 1403 1404/* hpt_add_dedicated_spare 1405 * Version compatibility: v1.0.0.3 or later 1406 * Add a spare disk to an array 1407 * Parameters: 1408 * idDisk disk id 1409 * idArray array id 1410 * Returns: 1411 * 0 Success 1412 */ 1413int hpt_add_dedicated_spare(DEVICEID idDisk, DEVICEID idArray); 1414 1415/* hpt_remove_spare_disk 1416 * remove a disk from spare pool. 1417 * Version compatibility: v1.0.0.1 or later 1418 * Parameters: 1419 * idDisk disk id 1420 * Returns: 1421 * 0 Success 1422 */ 1423int hpt_remove_spare_disk(DEVICEID idDisk); 1424 1425/* hpt_get_event 1426 * Used to poll events from driver. 1427 * Version compatibility: v1.0.0.1 or later 1428 * Parameters: 1429 * pEvent pointer to HPT_EVENT structure 1430 * Returns: 1431 * 0 Success, event info is filled in *pEvent 1432 */ 1433int hpt_get_event(PHPT_EVENT pEvent); 1434 1435/* hpt_rebuild_data_block 1436 * Used to copy data from source disk and mirror disk. 1437 * Version compatibility: v1.0.0.1 or later 1438 * Parameters: 1439 * idArray Array ID (RAID1, 0/1 or RAID5) 1440 * Lba Start LBA for each array member 1441 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter) 1442 * 1443 * Returns: 1444 * 0 Success, event info is filled in *pEvent 1445 */ 1446int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector); 1447#define hpt_rebuild_mirror(p1, p2, p3) hpt_rebuild_data_block(p1, p2, p3) 1448 1449/* hpt_set_array_state 1450 * set array state. 1451 * Version compatibility: v1.0.0.1 or later 1452 * Parameters: 1453 * idArray Array ID 1454 * state See above 'array states' constants, possible values are: 1455 * MIRROR_REBUILD_START 1456 * Indicate that GUI wants to rebuild a mirror array 1457 * MIRROR_REBUILD_ABORT 1458 * GUI wants to abort rebuilding an array 1459 * MIRROR_REBUILD_COMPLETE 1460 * GUI finished to rebuild an array. If rebuild is done by driver this 1461 * state has no use 1462 * 1463 * Returns: 1464 * 0 Success 1465 */ 1466int hpt_set_array_state(DEVICEID idArray, HPT_U32 state); 1467 1468/* hpt_set_array_info 1469 * set array info. 1470 * Version compatibility: v1.0.0.1 or later 1471 * Parameters: 1472 * idArray Array ID 1473 * pInfo pointer to new info 1474 * 1475 * Returns: 1476 * 0 Success 1477 */ 1478int hpt_set_array_info(DEVICEID idArray, PALTERABLE_ARRAY_INFO pInfo); 1479 1480/* hpt_set_device_info 1481 * set device info. 1482 * Version compatibility: v1.0.0.1 or later 1483 * Parameters: 1484 * idDisk device ID 1485 * pInfo pointer to new info 1486 * 1487 * Returns: 1488 * 0 Success 1489 * Additional notes: 1490 * If idDisk==0, call to this function will stop buzzer on the adapter 1491 * (if supported by driver). 1492 */ 1493int hpt_set_device_info(DEVICEID idDisk, PALTERABLE_DEVICE_INFO pInfo); 1494 1495#if HPT_INTERFACE_VERSION >= 0x01000004 1496int hpt_set_device_info_v2(DEVICEID idDisk, PALTERABLE_DEVICE_INFO_V2 pInfo); 1497#endif 1498 1499/* hpt_rescan_devices 1500 * rescan devices 1501 * Version compatibility: v1.0.0.1 or later 1502 * Parameters: 1503 * None 1504 * Returns: 1505 * 0 Success 1506 */ 1507int hpt_rescan_devices(void); 1508 1509/* hpt_get_601_info 1510 * Get HPT601 status 1511 * Version compatibiilty: v1.0.0.3 or later 1512 * Parameters: 1513 * idDisk - Disk handle 1514 * PHPT601_INFO - pointer to HPT601 info buffer 1515 * Returns: 1516 * 0 Success 1517 */ 1518int hpt_get_601_info(DEVICEID idDisk, PHPT601_INFO pInfo); 1519 1520/* hpt_set_601_info 1521 * HPT601 function control 1522 * Version compatibiilty: v1.0.0.3 or later 1523 * Parameters: 1524 * idDisk - Disk handle 1525 * PHPT601_INFO - pointer to HPT601 info buffer 1526 * Returns: 1527 * 0 Success 1528 */ 1529int hpt_set_601_info(DEVICEID idDisk, PHPT601_INFO pInfo); 1530 1531/* hpt_lock_device 1532 * Lock a block on a device (prevent OS accessing it) 1533 * Version compatibiilty: v1.0.0.3 or later 1534 * Parameters: 1535 * idDisk - Disk handle 1536 * Lba - Start LBA 1537 * nSectors - number of sectors 1538 * Returns: 1539 * 0 Success 1540 */ 1541int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors); 1542 1543/* hpt_lock_device 1544 * Unlock a device 1545 * Version compatibiilty: v1.0.0.3 or later 1546 * Parameters: 1547 * idDisk - Disk handle 1548 * Returns: 1549 * 0 Success 1550 */ 1551int hpt_unlock_device(DEVICEID idDisk); 1552 1553/* hpt_ide_pass_through 1554 * send a ATA passthrough command to a device. 1555 * Version compatibility: v1.0.0.3 or later 1556 * Parameters: 1557 * p - IDE_PASS_THROUGH header pointer 1558 * Returns: 1559 * 0 Success 1560 */ 1561int hpt_ide_pass_through(PIDE_PASS_THROUGH_HEADER p); 1562 1563/* hpt_scsi_passthrough 1564 * send a SCSI passthrough command to a device. 1565 * Version compatibility: v2.0.0.0 or later 1566 * Parameters: 1567 * in - HPT_SCSI_PASSTHROUGH_IN header pointer 1568 * out - PHPT_SCSI_PASSTHROUGH_OUT header pointer 1569 * insize, outsize - in/out buffer size 1570 * Returns: 1571 * 0 Success 1572 */ 1573int hpt_scsi_passthrough(PHPT_SCSI_PASSTHROUGH_IN in, HPT_U32 insize, 1574 PHPT_SCSI_PASSTHROUGH_OUT out, HPT_U32 outsize); 1575 1576/* hpt_verify_data_block 1577 * verify data block on RAID1 or RAID5. 1578 * Version compatibility: v1.0.0.3 or later 1579 * Parameters: 1580 * idArray - Array ID 1581 * Lba - block number (on each array member, not logical block!) 1582 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 1583 * Returns: 1584 * 0 Success 1585 * 1 Data compare error 1586 * 2 I/O error 1587 */ 1588int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors); 1589 1590/* hpt_initialize_data_block 1591 * initialize data block (fill with zero) on RAID5 1592 * Version compatibility: v1.0.0.3 or later 1593 * Parameters: 1594 * idArray - Array ID 1595 * Lba - block number (on each array member, not logical block!) 1596 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 1597 * Returns: 1598 * 0 Success 1599 */ 1600int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors); 1601 1602/* hpt_device_io_ex 1603 * extended device I/O function 1604 * Version compatibility: v1.0.0.3 or later 1605 * Parameters: 1606 * idArray - Array ID 1607 * Lba - block number (on each array member, not logical block!) 1608 * nSectors - Sectors for each member 1609 * buffer - I/O buffer or s/g address 1610 * Returns: 1611 * 0 Success 1612 */ 1613int hpt_device_io_ex(PDEVICE_IO_EX_PARAMS param); 1614 1615/* hpt_set_boot_mark 1616 * select boot device 1617 * Version compatibility: v1.0.0.3 or later 1618 * Parameters: 1619 * id - logical device ID. If id is 0 the boot mark will be removed. 1620 * Returns: 1621 * 0 Success 1622 */ 1623int hpt_set_boot_mark(DEVICEID id); 1624 1625/* hpt_query_remove 1626 * check if device can be removed safely 1627 * Version compatibility: v1.0.0.4 or later 1628 * Parameters: 1629 * ndev - number of devices 1630 * pIds - device ID list 1631 * Returns: 1632 * 0 - Success 1633 * -1 - unknown error 1634 * n - the n-th device that can't be removed 1635 */ 1636int hpt_query_remove(HPT_U32 ndev, DEVICEID *pIds); 1637 1638/* hpt_remove_devices 1639 * remove a list of devices 1640 * Version compatibility: v1.0.0.4 or later 1641 * Parameters: 1642 * ndev - number of devices 1643 * pIds - device ID list 1644 * Returns: 1645 * 0 - Success 1646 * -1 - unknown error 1647 * n - the n-th device that can't be removed 1648 */ 1649int hpt_remove_devices(HPT_U32 ndev, DEVICEID *pIds); 1650 1651/* hpt_create_array_v2 1652 * Version compatibility: v1.1.0.0 or later 1653 * Parameters: 1654 * pParam pointer to CREATE_ARRAY_PARAMS_V2 structure 1655 * Returns: 1656 * 0 failed 1657 * else return array id 1658 */ 1659#if HPT_INTERFACE_VERSION>=0x01010000 1660DEVICEID hpt_create_array_v2(PCREATE_ARRAY_PARAMS_V2 pParam); 1661#endif 1662 1663/* hpt_create_array_v3 1664 * Version compatibility: v2.0.0.1 or later 1665 * Parameters: 1666 * pParam pointer to CREATE_ARRAY_PARAMS_V3 structure 1667 * Returns: 1668 * 0 failed 1669 * else return array id 1670 */ 1671#if HPT_INTERFACE_VERSION>=0x02000001 1672DEVICEID hpt_create_array_v3(PCREATE_ARRAY_PARAMS_V3 pParam); 1673#endif 1674 1675/* hpt_get_device_info_v2 1676 * Version compatibility: v1.1.0.0 or later 1677 * Parameters: 1678 * id logical device id 1679 * pInfo pointer to LOGICAL_DEVICE_INFO_V2 structure 1680 * Returns: 1681 * 0 - Success 1682 */ 1683#if HPT_INTERFACE_VERSION>=0x01010000 1684int hpt_get_device_info_v2(DEVICEID id, PLOGICAL_DEVICE_INFO_V2 pInfo); 1685#endif 1686 1687/* hpt_get_device_info_v3 1688 * Version compatibility: v1.2.0.0 or later 1689 * Parameters: 1690 * id logical device id 1691 * pInfo pointer to LOGICAL_DEVICE_INFO_V3 structure 1692 * Returns: 1693 * 0 - Success 1694 */ 1695#if HPT_INTERFACE_VERSION>=0x01020000 1696int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo); 1697#endif 1698 1699/* hpt_get_device_info_v4 1700 * Version compatibility: v2.0.0.1 or later 1701 * Parameters: 1702 * id logical device id 1703 * pInfo pointer to LOGICAL_DEVICE_INFO_V4 structure 1704 * Returns: 1705 * 0 - Success 1706 */ 1707#if HPT_INTERFACE_VERSION>=0x02000001 1708int hpt_get_device_info_v4(DEVICEID id, PLOGICAL_DEVICE_INFO_V4 pInfo); 1709#endif 1710 1711/* hpt_create_transform 1712 * create a transform instance. 1713 * Version compatibility: v2.0.0.0 or later 1714 * Parameters: 1715 * idArray - source array 1716 * destInfo - destination array info 1717 * Returns: 1718 * destination array id 1719 */ 1720#if HPT_INTERFACE_VERSION>=0x02000000 1721DEVICEID hpt_create_transform(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V2 destInfo); 1722#endif 1723 1724/* hpt_create_transform_v2 1725 * create a transform instance. 1726 * Version compatibility: v2.0.0.1 or later 1727 * Parameters: 1728 * idArray - source array 1729 * destInfo - destination array info 1730 * Returns: 1731 * destination array id 1732 */ 1733#if HPT_INTERFACE_VERSION>=0x02000001 1734DEVICEID hpt_create_transform_v2(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V3 destInfo); 1735#endif 1736 1737/* hpt_step_transform 1738 * move a block in a transform progress. 1739 * This function is called by mid-layer, not GUI (which uses set_array_state instead). 1740 * Version compatibility: v2.0.0.0 or later 1741 * Parameters: 1742 * idArray - destination array ID 1743 * the source ID will be invalid when transform complete. 1744 * Returns: 1745 * 0 - Success 1746 */ 1747#if HPT_INTERFACE_VERSION>=0x02000000 1748int hpt_step_transform(DEVICEID idArray); 1749#endif 1750 1751/* hpt_set_vdev_info 1752 * set information for disk or array 1753 * Version compatibility: v1.2.0.0 or later 1754 * Parameters: 1755 * dev - destination device 1756 * 1757 * Returns: 1758 * 0 - Success 1759 */ 1760#if HPT_INTERFACE_VERSION>=0x01020000 1761int hpt_set_vdev_info(DEVICEID dev, PSET_VDEV_INFO pInfo); 1762#endif 1763 1764/* hpt_init_disks 1765 * initialize disks for use 1766 * Version compatibility: v2.0.0.0 or later 1767 * Parameters: 1768 * ndev - number of disks to initialize 1769 * pIds - array of DEVICEID 1770 * 1771 * Returns: 1772 * 0 - Success 1773 */ 1774#if HPT_INTERFACE_VERSION>=0x02000000 1775int hpt_init_disks(HPT_U32 ndev, DEVICEID * pIds); 1776#endif 1777 1778/* hpt_calc_max_array_capacity 1779 * cap max capacity of the array user want to create or transform 1780 * Version compatibility: v1.2.0.0 or later 1781 * Parameters: 1782 * source - if transform, this is the source array, otherwise, it should be zero 1783 * destInfo - target array params 1784 * Returns: 1785 * 0 - Success 1786 * cap - max capacity of the target array 1787 */ 1788#if HPT_INTERFACE_VERSION>=0x01020000 1789int hpt_calc_max_array_capacity(DEVICEID source, PCREATE_ARRAY_PARAMS_V2 destInfo, HPT_U64 * cap); 1790#endif 1791 1792/* hpt_calc_max_array_capacity_v2 1793 * cap max capacity of the array user want to create or transform 1794 * Version compatibility: v2.0.0.1 or later 1795 * Parameters: 1796 * source - if transform, this is the source array, otherwise, it should be zero 1797 * destInfo - target array params 1798 * Returns: 1799 * 0 - Success 1800 * cap - max capacity of the target array 1801 */ 1802#if HPT_INTERFACE_VERSION>=0x02000001 1803int hpt_calc_max_array_capacity_v2(DEVICEID source, PCREATE_ARRAY_PARAMS_V3 destInfo, HPT_U64 * cap); 1804#endif 1805 1806/* hpt_rebuild_data_block2 1807 * Used to copy data from source disk and mirror disk. 1808 * Version compatibility: v1.1.0.0 or later 1809 * Parameters: 1810 * idArray Array ID (RAID1, 0/1 or RAID5) 1811 * Lba Start LBA for each array member 1812 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter) 1813 * 1814 * Returns: 1815 * 0 Success, event info is filled in *pEvent 1816 */ 1817#if HPT_INTERFACE_VERSION>=0x01010000 1818int hpt_rebuild_data_block_v2(DEVICEID idMirror, HPT_U64 Lba, HPT_U16 nSector); 1819#endif 1820 1821/* hpt_verify_data_block2 1822 * verify data block on RAID1 or RAID5. 1823 * Version compatibility: v1.1.0.0 or later 1824 * Parameters: 1825 * idArray - Array ID 1826 * Lba - block number (on each array member, not logical block!) 1827 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 1828 * Returns: 1829 * 0 Success 1830 * 1 Data compare error 1831 * 2 I/O error 1832 */ 1833#if HPT_INTERFACE_VERSION>=0x01010000 1834int hpt_verify_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors); 1835#endif 1836 1837/* hpt_initialize_data_block2 1838 * initialize data block (fill with zero) on RAID5 1839 * Version compatibility: v1.1.0.0 or later 1840 * Parameters: 1841 * idArray - Array ID 1842 * Lba - block number (on each array member, not logical block!) 1843 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 1844 * Returns: 1845 * 0 Success 1846 */ 1847#if HPT_INTERFACE_VERSION>=0x01010000 1848int hpt_initialize_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors); 1849#endif 1850 1851/* hpt_i2c_transaction 1852 * perform an transaction on i2c bus 1853 * Version compatibility: v2.0.0.0 or later 1854 * Parameters: 1855 * indata[0] - controller ID 1856 * Returns: 1857 * 0 Success 1858 */ 1859#if HPT_INTERFACE_VERSION>=0x01020000 1860int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen); 1861#endif 1862 1863/* hpt_get_parameter_list 1864 * get a list of driver parameters. 1865 * Version compatibility: v1.0.0.0 or later 1866 * Parameters: 1867 * location - parameter location 1868 * outBuffer - a buffer to hold the output 1869 * outBufferSize - size of outBuffer 1870 * Returns: 1871 * 0 Success 1872 * put in outBuffer a list of zero terminated parameter names. the whole list 1873 * is terminated with an additional zero byte. 1874 */ 1875int hpt_get_parameter_list(HPT_U32 location, char *outBuffer, HPT_U32 outBufferSize); 1876 1877/* hpt_{get,set}_parameter 1878 * get/set a parameter value. 1879 * Version compatibility: v1.0.0.0 or later 1880 * Parameters: 1881 * pParam - a pointer to HPT_DRIVER_PARAMETER. 1882 * Returns: 1883 * 0 Success 1884 */ 1885int hpt_get_parameter(PHPT_DRIVER_PARAMETER pParam); 1886int hpt_set_parameter(PHPT_DRIVER_PARAMETER pParam); 1887int hpt_reenumerate_device(DEVICEID id); 1888 1889#endif 1890 1891#pragma pack() 1892 1893#ifdef __cplusplus 1894} 1895#endif 1896#endif 1897