1/*
2 * Copyright (c) HighPoint Technologies, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28#include <dev/hptrr/hptrr_config.h>
29/*
30 * $Id: him.h,v 1.47 2007/12/17 08:55:49 gmm Exp $
31 * Copyright (C) 2004-2005 HighPoint Technologies, Inc. All rights reserved.
32 */
33#ifndef _HPT_HIM_H_
34#define _HPT_HIM_H_
35
36#define VERMAGIC_HIM 46
37
38#if defined(__cplusplus)
39extern "C" {
40#endif
41
42#include <dev/hptrr/list.h>
43
44#define SECTOR_TO_BYTE_SHIFT 9
45#define SECTOR_TO_BYTE(x)       ((HPT_U32)(x) << SECTOR_TO_BYTE_SHIFT)
46#define BYTE_TO_SECTOR(x)       ((x)>>SECTOR_TO_BYTE_SHIFT)
47
48typedef struct _PCI_ID
49{
50	HPT_U16 vid;
51	HPT_U16 did;
52	HPT_U32 subsys;
53	HPT_U8  rev;
54	HPT_U8  nbase;
55	HPT_U16 reserve;
56}
57PCI_ID;
58
59typedef struct _PCI_ADDRESS
60{
61	HPT_U8 tree;
62	HPT_U8 bus;
63	HPT_U8 device;
64	HPT_U8 function;
65}
66PCI_ADDRESS;
67
68typedef struct _HIM_ADAPTER_CONFIG
69{
70	PCI_ADDRESS pci_addr;
71	PCI_ID  pci_id;
72
73	HPT_U8  max_devices;
74	HPT_U8  reserve1;
75
76	HPT_U8  bDevsPerBus;
77	HPT_U8  first_on_slot;
78
79	HPT_U8  bChipType;
80	HPT_U8  bChipIntrNum;
81	HPT_U8  bChipFlags;
82	HPT_U8  bNumBuses;
83
84	HPT_U8  szVendorID[36];
85	HPT_U8  szProductID[36];
86}
87HIM_ADAPTER_CONFIG, *PHIM_ADAPTER_CONFIG;
88
89typedef struct _HIM_CHANNEL_CONFIG
90{
91	HPT_U32 io_port;
92	HPT_U32 ctl_port;
93} HIM_CHANNEL_CONFIG, *PHIM_CHANNEL_CONFIG;
94
95typedef struct _HIM_DEVICE_FLAGS
96{
97	HPT_UINT df_atapi               :1;
98	HPT_UINT df_removable_drive     :1;
99	HPT_UINT df_on_line             :1;
100	HPT_UINT df_reduce_mode         :1;
101	HPT_UINT df_sata                :1;
102	HPT_UINT df_on_pm_port          :1;
103	HPT_UINT df_support_read_ahead  :1;
104	HPT_UINT df_read_ahead_enabled  :1;
105	HPT_UINT df_support_write_cache :1;
106	HPT_UINT df_write_cache_enabled :1;
107	HPT_UINT df_cdrom_device        :1;
108	HPT_UINT df_tape_device         :1;
109	HPT_UINT df_support_tcq         :1;
110	HPT_UINT df_tcq_enabled         :1;
111	HPT_UINT df_support_ncq         :1;
112	HPT_UINT df_ncq_enabled         :1;
113	HPT_UINT df_sas                 :1;
114} DEVICE_FLAGS, *PDEVICE_FLAGS;
115
116#pragma pack(1)
117typedef struct _IDENTIFY_DATA2 {
118	HPT_U16 GeneralConfiguration;
119	HPT_U16 NumberOfCylinders;
120	HPT_U16 Reserved1;
121	HPT_U16 NumberOfHeads;
122	HPT_U16 UnformattedBytesPerTrack;
123	HPT_U16 UnformattedBytesPerSector;
124	HPT_U16 SectorsPerTrack;
125	HPT_U16 VendorUnique1[3];
126	HPT_U16 SerialNumber[10];
127	HPT_U16 BufferType;
128	HPT_U16 BufferSectorSize;
129	HPT_U16 NumberOfEccBytes;
130	HPT_U16 FirmwareRevision[4];
131	HPT_U16 ModelNumber[20];
132	HPT_U8  MaximumBlockTransfer;
133	HPT_U8  VendorUnique2;
134	HPT_U16 DoubleWordIo;
135	HPT_U16 Capabilities;
136	HPT_U16 Reserved2;
137	HPT_U8  VendorUnique3;
138	HPT_U8  PioCycleTimingMode;
139	HPT_U8  VendorUnique4;
140	HPT_U8  DmaCycleTimingMode;
141	HPT_U16 TranslationFieldsValid;
142	HPT_U16 NumberOfCurrentCylinders;
143	HPT_U16 NumberOfCurrentHeads;
144	HPT_U16 CurrentSectorsPerTrack;
145	HPT_U32 CurrentSectorCapacity;
146	HPT_U16 CurrentMultiSectorSetting;
147	HPT_U32 UserAddressableSectors;
148	HPT_U8  SingleWordDMASupport;
149	HPT_U8  SingleWordDMAActive;
150	HPT_U8  MultiWordDMASupport;
151	HPT_U8  MultiWordDMAActive;
152	HPT_U8  AdvancedPIOModes;
153	HPT_U8  Reserved4;
154	HPT_U16 MinimumMWXferCycleTime;
155	HPT_U16 RecommendedMWXferCycleTime;
156	HPT_U16 MinimumPIOCycleTime;
157	HPT_U16 MinimumPIOCycleTimeIORDY;
158	HPT_U16 Reserved5[2];
159	HPT_U16 ReleaseTimeOverlapped;
160	HPT_U16 ReleaseTimeServiceCommand;
161	HPT_U16 MajorRevision;
162	HPT_U16 MinorRevision;
163}
164#ifdef __GNUC__
165__attribute__((packed))
166#endif
167IDENTIFY_DATA2, *PIDENTIFY_DATA2;
168#pragma pack()
169
170typedef struct _HIM_DEVICE_CONFIG
171{
172	HPT_U64 capacity;
173
174	DEVICE_FLAGS flags;
175
176	HPT_U8  path_id;
177	HPT_U8  target_id;
178	HPT_U8  max_queue_depth;
179	HPT_U8  spin_up_mode;
180
181	HPT_U8  reserved;
182	HPT_U8  transfer_mode;
183	HPT_U8  bMaxShowMode;
184	HPT_U8  bDeUsable_Mode;
185
186	HPT_U16 max_sectors_per_cmd;
187
188	PIDENTIFY_DATA2 pIdentifyData;
189
190}
191HIM_DEVICE_CONFIG, *PHIM_DEVICE_CONFIG;
192
193
194#define _DIT_MODE               0
195#define _DIT_601                1
196#define _DIT_READ_AHEAD         2
197#define _DIT_WRITE_CACHE        3
198#define _DIT_TCQ                4
199#define _DIT_NCQ                5
200#define _DIT_BEEP_OFF           6
201#define _DIT_SPIN_UP_MODE       7
202#define _DIT_IDLE_STANDBY       8
203#define _DIT_IDENTIFY           9
204
205#define SPIN_UP_MODE_NOSUPPORT 0
206#define SPIN_UP_MODE_FULL      1
207#define SPIN_UP_MODE_STANDBY   2
208
209struct tcq_control {
210	HPT_U8 enable;
211	HPT_U8 depth;
212};
213
214struct ncq_control {
215	HPT_U8 enable;
216	HPT_U8 depth;
217};
218
219typedef struct _HIM_ALTERABLE_DEV_INFO{
220	HPT_U8 type;
221	union {
222		HPT_U8 mode;
223		HPT_U8 enable_read_ahead;
224		HPT_U8 enable_read_cache;
225		HPT_U8 enable_write_cache;
226		struct tcq_control tcq;
227		struct ncq_control ncq;
228		void * adapter;
229		HPT_U8 spin_up_mode;
230		HPT_U8 idle_standby_timeout;
231		HPT_U8 identify_indicator;
232	}u;
233} HIM_ALTERABLE_DEV_INFO, *PHIM_ALTERABLE_DEV_INFO;
234
235struct _COMMAND;
236struct _IOCTL_ARG;
237
238typedef void (*PROBE_CALLBACK)(void *arg, void *dev, int index);
239
240typedef struct _HIM {
241	char *name;
242	struct _HIM *next;
243	HPT_UINT max_sg_descriptors;
244	#define _HIM_INTERFACE(_type, _fn, _args) _type (* _fn) _args;
245	#include <dev/hptrr/himfuncs.h>
246}
247HIM, *PHIM;
248
249
250#pragma pack(1)
251#ifdef SG_FLAG_EOT
252#error "don't use SG_FLAG_EOT with _SG.eot. clean the code!"
253#endif
254
255typedef struct _SG {
256	HPT_U32 size;
257	HPT_UINT eot;
258	union {
259		HPT_U8 FAR * _logical;
260		BUS_ADDRESS bus;
261	}
262	addr;
263}
264SG, *PSG;
265#pragma pack()
266
267typedef struct _AtaCommand
268{
269    HPT_U64     Lba;
270    HPT_U16     nSectors;
271    HPT_U16     pad;
272} AtaComm, *PAtaComm;
273
274#define ATA_CMD_SET_FEATURES    0xef
275#define ATA_CMD_FLUSH           0xE7
276#define ATA_CMD_VERIFY          0x40
277#define ATA_CMD_STANDBY         0xe2
278#define ATA_CMD_READ_MULTI      0xC4
279#define ATA_CMD_READ_MULTI_EXT  0x29
280#define ATA_CMD_WRITE_MULTI     0xC5
281#define ATA_CMD_WRITE_MULTI_EXT 0x39
282#define ATA_CMD_WRITE_MULTI_FUA_EXT     0xCE
283
284#define ATA_SET_FEATURES_XFER 0x3
285#define ATA_SECTOR_SIZE 512
286
287typedef struct _PassthroughCmd {
288	HPT_U16    bFeaturesReg;
289	HPT_U16    bSectorCountReg;
290	HPT_U16    bLbaLowReg;
291	HPT_U16    bLbaMidReg;
292	HPT_U16    bLbaHighReg;
293	HPT_U8     bDriveHeadReg;
294	HPT_U8     bCommandReg;
295	HPT_U8     nSectors;
296	HPT_U8    *pDataBuffer;
297}
298PassthroughCmd;
299
300typedef struct _ScsiComm {
301	HPT_U8  cdbLength;
302	HPT_U8  senseLength;
303	HPT_U8  scsiStatus;
304	HPT_U8  reserve1;
305	HPT_U32 dataLength;
306	HPT_U8 *cdb;
307	HPT_U8 *senseBuffer;
308}
309ScsiComm;
310
311
312#define CTRL_CMD_REBUILD 1
313#define CTRL_CMD_VERIFY  2
314#define CTRL_CMD_INIT    3
315
316
317typedef struct _R5ControlCmd {
318	HPT_U64  StripeLine;
319	HPT_U16 Offset;
320	HPT_U8  Command;
321	HPT_U8  reserve1;
322}
323R5ControlCmd, *PR5ControlCmd;
324
325typedef struct _HPT_ADDRESS
326{
327	HPT_U8 * logical;
328	BUS_ADDRESS bus;
329}
330HPT_ADDRESS;
331
332
333typedef struct ctl_pages {
334	HPT_ADDRESS *pages;
335	HPT_UINT        page_size;
336	HPT_UINT        npages;
337	HPT_UINT min_sg_descriptors;
338} CONTROL_PAGES, *PCONTROL_PAGES;
339
340typedef struct _R1ControlCmd {
341	HPT_U64  Lba;
342	HPT_U16 nSectors;
343	HPT_U8  Command;      /* CTRL_CMD_XXX */
344	HPT_U8  reserve1;
345	PCONTROL_PAGES ctl_pages;
346}
347R1ControlCmd, *PR1ControlCmd;
348
349typedef void (*TQ_PROC)(void *arg);
350
351struct tq_item {
352	TQ_PROC proc;
353	void *arg;
354	struct tq_item *next;
355};
356
357#define INIT_TQ_ITEM(t, p, a) \
358	do { (t)->proc = p; (t)->arg = a; (t)->next = 0; } while (0)
359
360typedef struct _COMMAND
361{
362
363	struct _VBUS * vbus;
364
365	struct freelist *grplist;
366	HPT_UINT grpcnt;
367
368
369	struct list_head q_link;
370	struct tq_item done_dpc;
371
372	HPT_UINT extsize;
373	void *ext;
374
375
376
377	void *target;
378	void *priv;
379	HPT_UPTR priv2;
380
381	int priority;
382	struct lock_request *owned_lock;
383	struct lock_request *lock_req;
384	void (*dtor)(struct _COMMAND *, void *);
385	void *dtor_arg;
386
387	union{
388		AtaComm Ide;
389		PassthroughCmd Passthrough;
390		ScsiComm Scsi;
391		R5ControlCmd R5Control;
392		R1ControlCmd R1Control;
393	} uCmd;
394
395	HPT_U8 type; /* CMD_TYPE_* */
396
397	struct {
398		HPT_U8  physical_sg: 1;
399		HPT_U8  data_in: 1;
400		HPT_U8  data_out: 1;
401		HPT_U8  transform : 1;
402		HPT_U8  hard_flush: 2;
403		HPT_U8  from_cc: 1;
404		HPT_U8  force_cc: 1;
405	} flags;
406
407	/* return status */
408	HPT_U8  Result;
409	/* retry count */
410	HPT_U8  RetryCount;
411
412
413	PSG psg;
414
415
416	int  (*buildsgl)(struct _COMMAND *cmd, PSG psg, int logical);
417	void (*done)(struct _COMMAND *cmd);
418}
419COMMAND, *PCOMMAND;
420
421/* command types */
422#define   CMD_TYPE_IO           0
423#define   CMD_TYPE_CONTROL      1
424#define   CMD_TYPE_ATAPI        2
425#define   CMD_TYPE_SCSI         CMD_TYPE_ATAPI
426#define   CMD_TYPE_PASSTHROUGH  3
427#define   CMD_TYPE_FLUSH                4
428
429/* flush command flags */
430#define   CF_HARD_FLUSH_CACHE   1
431#define   CF_HARD_FLUSH_STANDBY 2
432
433/* command return values */
434#define   RETURN_PENDING             0
435#define   RETURN_SUCCESS             1
436#define   RETURN_BAD_DEVICE          2
437#define   RETURN_BAD_PARAMETER       3
438#define   RETURN_WRITE_NO_DRQ        4
439#define   RETURN_DEVICE_BUSY         5
440#define   RETURN_INVALID_REQUEST     6
441#define   RETURN_SELECTION_TIMEOUT   7
442#define   RETURN_IDE_ERROR           8
443#define   RETURN_NEED_LOGICAL_SG     9
444#define   RETURN_NEED_PHYSICAL_SG    10
445#define   RETURN_RETRY               11
446#define   RETURN_DATA_ERROR          12
447#define   RETURN_BUS_RESET           13
448#define   RETURN_BAD_TRANSFER_LENGTH 14
449#define   RETURN_INSUFFICIENT_MEMORY 15
450#define   RETURN_SECTOR_ERROR        16
451
452#if defined(__cplusplus)
453}
454#endif
455#endif
456