if_fxp.c revision 45720
1/* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Modifications to support NetBSD and media selection: 6 * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $Id: if_fxp.c,v 1.66 1999/03/20 04:51:25 wes Exp $ 31 */ 32 33/* 34 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/mbuf.h> 42#include <sys/malloc.h> 43#include <sys/kernel.h> 44#include <sys/socket.h> 45 46#include <net/if.h> 47#include <net/if_dl.h> 48#include <net/if_media.h> 49 50#ifdef NS 51#include <netns/ns.h> 52#include <netns/ns_if.h> 53#endif 54 55#if NBPFILTER > 0 56#include <net/bpf.h> 57#endif 58 59#if defined(__NetBSD__) 60 61#include <sys/ioctl.h> 62#include <sys/errno.h> 63#include <sys/device.h> 64 65#include <net/if_dl.h> 66#include <net/if_ether.h> 67 68#include <netinet/if_inarp.h> 69 70#include <vm/vm.h> 71 72#include <machine/cpu.h> 73#include <machine/bus.h> 74#include <machine/intr.h> 75 76#include <dev/pci/if_fxpreg.h> 77#include <dev/pci/if_fxpvar.h> 78 79#include <dev/pci/pcivar.h> 80#include <dev/pci/pcireg.h> 81#include <dev/pci/pcidevs.h> 82 83#ifdef __alpha__ /* XXX */ 84/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */ 85#undef vtophys 86#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 87#endif /* __alpha__ */ 88 89#else /* __FreeBSD__ */ 90 91#include <sys/sockio.h> 92#include <sys/bus.h> 93#include <machine/bus.h> 94#include <sys/rman.h> 95#include <machine/resource.h> 96 97#include <net/ethernet.h> 98#include <net/if_arp.h> 99 100#include <vm/vm.h> /* for vtophys */ 101#include <vm/pmap.h> /* for vtophys */ 102#include <machine/clock.h> /* for DELAY */ 103 104#include <pci/pcivar.h> 105#include <pci/pcireg.h> /* for PCIM_CMD_xxx */ 106#include <pci/if_fxpreg.h> 107#include <pci/if_fxpvar.h> 108 109#endif /* __NetBSD__ */ 110 111#include "opt_bdg.h" 112#ifdef BRIDGE 113#include <net/if_types.h> 114#include <net/bridge.h> 115#endif 116 117/* 118 * NOTE! On the Alpha, we have an alignment constraint. The 119 * card DMAs the packet immediately following the RFA. However, 120 * the first thing in the packet is a 14-byte Ethernet header. 121 * This means that the packet is misaligned. To compensate, 122 * we actually offset the RFA 2 bytes into the cluster. This 123 * alignes the packet after the Ethernet header at a 32-bit 124 * boundary. HOWEVER! This means that the RFA is misaligned! 125 */ 126#define RFA_ALIGNMENT_FUDGE 2 127 128/* 129 * Inline function to copy a 16-bit aligned 32-bit quantity. 130 */ 131static __inline void fxp_lwcopy __P((volatile u_int32_t *, 132 volatile u_int32_t *)); 133static __inline void 134fxp_lwcopy(src, dst) 135 volatile u_int32_t *src, *dst; 136{ 137 volatile u_int16_t *a = (volatile u_int16_t *)src; 138 volatile u_int16_t *b = (volatile u_int16_t *)dst; 139 140 b[0] = a[0]; 141 b[1] = a[1]; 142} 143 144/* 145 * Template for default configuration parameters. 146 * See struct fxp_cb_config for the bit definitions. 147 */ 148static u_char fxp_cb_config_template[] = { 149 0x0, 0x0, /* cb_status */ 150 0x80, 0x2, /* cb_command */ 151 0xff, 0xff, 0xff, 0xff, /* link_addr */ 152 0x16, /* 0 */ 153 0x8, /* 1 */ 154 0x0, /* 2 */ 155 0x0, /* 3 */ 156 0x0, /* 4 */ 157 0x80, /* 5 */ 158 0xb2, /* 6 */ 159 0x3, /* 7 */ 160 0x1, /* 8 */ 161 0x0, /* 9 */ 162 0x26, /* 10 */ 163 0x0, /* 11 */ 164 0x60, /* 12 */ 165 0x0, /* 13 */ 166 0xf2, /* 14 */ 167 0x48, /* 15 */ 168 0x0, /* 16 */ 169 0x40, /* 17 */ 170 0xf3, /* 18 */ 171 0x0, /* 19 */ 172 0x3f, /* 20 */ 173 0x5 /* 21 */ 174}; 175 176/* Supported media types. */ 177struct fxp_supported_media { 178 const int fsm_phy; /* PHY type */ 179 const int *fsm_media; /* the media array */ 180 const int fsm_nmedia; /* the number of supported media */ 181 const int fsm_defmedia; /* default media for this PHY */ 182}; 183 184static const int fxp_media_standard[] = { 185 IFM_ETHER|IFM_10_T, 186 IFM_ETHER|IFM_10_T|IFM_FDX, 187 IFM_ETHER|IFM_100_TX, 188 IFM_ETHER|IFM_100_TX|IFM_FDX, 189 IFM_ETHER|IFM_AUTO, 190}; 191#define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO) 192 193static const int fxp_media_default[] = { 194 IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */ 195}; 196#define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL) 197 198static const struct fxp_supported_media fxp_media[] = { 199 { FXP_PHY_DP83840, fxp_media_standard, 200 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 201 FXP_MEDIA_STANDARD_DEFMEDIA }, 202 { FXP_PHY_DP83840A, fxp_media_standard, 203 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 204 FXP_MEDIA_STANDARD_DEFMEDIA }, 205 { FXP_PHY_82553A, fxp_media_standard, 206 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 207 FXP_MEDIA_STANDARD_DEFMEDIA }, 208 { FXP_PHY_82553C, fxp_media_standard, 209 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 210 FXP_MEDIA_STANDARD_DEFMEDIA }, 211 { FXP_PHY_82555, fxp_media_standard, 212 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 213 FXP_MEDIA_STANDARD_DEFMEDIA }, 214 { FXP_PHY_82555B, fxp_media_standard, 215 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 216 FXP_MEDIA_STANDARD_DEFMEDIA }, 217 { FXP_PHY_80C24, fxp_media_default, 218 sizeof(fxp_media_default) / sizeof(fxp_media_default[0]), 219 FXP_MEDIA_DEFAULT_DEFMEDIA }, 220}; 221#define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0])) 222 223static int fxp_mediachange __P((struct ifnet *)); 224static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *)); 225static void fxp_set_media __P((struct fxp_softc *, int)); 226static __inline void fxp_scb_wait __P((struct fxp_softc *)); 227static FXP_INTR_TYPE fxp_intr __P((void *)); 228static void fxp_start __P((struct ifnet *)); 229static int fxp_ioctl __P((struct ifnet *, 230 FXP_IOCTLCMD_TYPE, caddr_t)); 231static void fxp_init __P((void *)); 232static void fxp_stop __P((struct fxp_softc *)); 233static void fxp_watchdog __P((struct ifnet *)); 234static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *)); 235static int fxp_mdi_read __P((struct fxp_softc *, int, int)); 236static void fxp_mdi_write __P((struct fxp_softc *, int, int, int)); 237static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *, 238 int, int)); 239static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *)); 240static void fxp_stats_update __P((void *)); 241static void fxp_mc_setup __P((struct fxp_softc *)); 242 243/* 244 * Set initial transmit threshold at 64 (512 bytes). This is 245 * increased by 64 (512 bytes) at a time, to maximum of 192 246 * (1536 bytes), if an underrun occurs. 247 */ 248static int tx_threshold = 64; 249 250/* 251 * Number of transmit control blocks. This determines the number 252 * of transmit buffers that can be chained in the CB list. 253 * This must be a power of two. 254 */ 255#define FXP_NTXCB 128 256 257/* 258 * Number of completed TX commands at which point an interrupt 259 * will be generated to garbage collect the attached buffers. 260 * Must be at least one less than FXP_NTXCB, and should be 261 * enough less so that the transmitter doesn't becomes idle 262 * during the buffer rundown (which would reduce performance). 263 */ 264#define FXP_CXINT_THRESH 120 265 266/* 267 * TxCB list index mask. This is used to do list wrap-around. 268 */ 269#define FXP_TXCB_MASK (FXP_NTXCB - 1) 270 271/* 272 * Number of receive frame area buffers. These are large so chose 273 * wisely. 274 */ 275#define FXP_NRFABUFS 64 276 277/* 278 * Maximum number of seconds that the receiver can be idle before we 279 * assume it's dead and attempt to reset it by reprogramming the 280 * multicast filter. This is part of a work-around for a bug in the 281 * NIC. See fxp_stats_update(). 282 */ 283#define FXP_MAX_RX_IDLE 15 284 285/* 286 * Wait for the previous command to be accepted (but not necessarily 287 * completed). 288 */ 289static __inline void 290fxp_scb_wait(sc) 291 struct fxp_softc *sc; 292{ 293 int i = 10000; 294 295 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i); 296} 297 298/************************************************************* 299 * Operating system-specific autoconfiguration glue 300 *************************************************************/ 301 302#if defined(__NetBSD__) 303 304#ifdef __BROKEN_INDIRECT_CONFIG 305static int fxp_match __P((struct device *, void *, void *)); 306#else 307static int fxp_match __P((struct device *, struct cfdata *, void *)); 308#endif 309static void fxp_attach __P((struct device *, struct device *, void *)); 310 311static void fxp_shutdown __P((void *)); 312 313/* Compensate for lack of a generic ether_ioctl() */ 314static int fxp_ether_ioctl __P((struct ifnet *, 315 FXP_IOCTLCMD_TYPE, caddr_t)); 316#define ether_ioctl fxp_ether_ioctl 317 318struct cfattach fxp_ca = { 319 sizeof(struct fxp_softc), fxp_match, fxp_attach 320}; 321 322struct cfdriver fxp_cd = { 323 NULL, "fxp", DV_IFNET 324}; 325 326/* 327 * Check if a device is an 82557. 328 */ 329static int 330fxp_match(parent, match, aux) 331 struct device *parent; 332#ifdef __BROKEN_INDIRECT_CONFIG 333 void *match; 334#else 335 struct cfdata *match; 336#endif 337 void *aux; 338{ 339 struct pci_attach_args *pa = aux; 340 341 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 342 return (0); 343 344 switch (PCI_PRODUCT(pa->pa_id)) { 345 case PCI_PRODUCT_INTEL_82557: 346 return (1); 347 } 348 349 return (0); 350} 351 352static void 353fxp_attach(parent, self, aux) 354 struct device *parent, *self; 355 void *aux; 356{ 357 struct fxp_softc *sc = (struct fxp_softc *)self; 358 struct pci_attach_args *pa = aux; 359 pci_chipset_tag_t pc = pa->pa_pc; 360 pci_intr_handle_t ih; 361 const char *intrstr = NULL; 362 u_int8_t enaddr[6]; 363 struct ifnet *ifp; 364 365 /* 366 * Map control/status registers. 367 */ 368 if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0, 369 &sc->sc_st, &sc->sc_sh, NULL, NULL)) { 370 printf(": can't map registers\n"); 371 return; 372 } 373 printf(": Intel EtherExpress Pro 10/100B Ethernet\n"); 374 375 /* 376 * Allocate our interrupt. 377 */ 378 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 379 pa->pa_intrline, &ih)) { 380 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 381 return; 382 } 383 intrstr = pci_intr_string(pc, ih); 384 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 385 if (sc->sc_ih == NULL) { 386 printf("%s: couldn't establish interrupt", 387 sc->sc_dev.dv_xname); 388 if (intrstr != NULL) 389 printf(" at %s", intrstr); 390 printf("\n"); 391 return; 392 } 393 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 394 395 /* Do generic parts of attach. */ 396 if (fxp_attach_common(sc, enaddr)) { 397 /* Failed! */ 398 return; 399 } 400 401 printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname, 402 ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : ""); 403 404 ifp = &sc->sc_ethercom.ec_if; 405 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 406 ifp->if_softc = sc; 407 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 408 ifp->if_ioctl = fxp_ioctl; 409 ifp->if_start = fxp_start; 410 ifp->if_watchdog = fxp_watchdog; 411 412 /* 413 * Attach the interface. 414 */ 415 if_attach(ifp); 416 /* 417 * Let the system queue as many packets as we have available 418 * TX descriptors. 419 */ 420 ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1; 421 ether_ifattach(ifp, enaddr); 422#if NBPFILTER > 0 423 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 424 sizeof(struct ether_header)); 425#endif 426 427 /* 428 * Add shutdown hook so that DMA is disabled prior to reboot. Not 429 * doing do could allow DMA to corrupt kernel memory during the 430 * reboot before the driver initializes. 431 */ 432 shutdownhook_establish(fxp_shutdown, sc); 433} 434 435/* 436 * Device shutdown routine. Called at system shutdown after sync. The 437 * main purpose of this routine is to shut off receiver DMA so that 438 * kernel memory doesn't get clobbered during warmboot. 439 */ 440static void 441fxp_shutdown(sc) 442 void *sc; 443{ 444 fxp_stop((struct fxp_softc *) sc); 445} 446 447static int 448fxp_ether_ioctl(ifp, cmd, data) 449 struct ifnet *ifp; 450 FXP_IOCTLCMD_TYPE cmd; 451 caddr_t data; 452{ 453 struct ifaddr *ifa = (struct ifaddr *) data; 454 struct fxp_softc *sc = ifp->if_softc; 455 456 switch (cmd) { 457 case SIOCSIFADDR: 458 ifp->if_flags |= IFF_UP; 459 460 switch (ifa->ifa_addr->sa_family) { 461#ifdef INET 462 case AF_INET: 463 fxp_init(sc); 464 arp_ifinit(ifp, ifa); 465 break; 466#endif 467#ifdef NS 468 case AF_NS: 469 { 470 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 471 472 if (ns_nullhost(*ina)) 473 ina->x_host = *(union ns_host *) 474 LLADDR(ifp->if_sadl); 475 else 476 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 477 ifp->if_addrlen); 478 /* Set new address. */ 479 fxp_init(sc); 480 break; 481 } 482#endif 483 default: 484 fxp_init(sc); 485 break; 486 } 487 break; 488 489 default: 490 return (EINVAL); 491 } 492 493 return (0); 494} 495 496#else /* __FreeBSD__ */ 497 498/* 499 * Return identification string if this is device is ours. 500 */ 501static int 502fxp_probe(device_t dev) 503{ 504 if ((pci_get_vendor(dev) == FXP_VENDORID_INTEL) && 505 (pci_get_device(dev) == FXP_DEVICEID_i82557)) { 506 device_set_desc(dev, "Intel EtherExpress Pro 10/100B Ethernet"); 507 return 0; 508 } 509 510 return ENXIO; 511} 512 513static int 514fxp_attach(device_t dev) 515{ 516 int error = 0; 517 struct fxp_softc *sc = device_get_softc(dev); 518 struct ifnet *ifp; 519 int s; 520 u_long val; 521 int rid; 522 523 callout_handle_init(&sc->stat_ch); 524 525 s = splimp(); 526 527 /* 528 * Enable bus mastering. 529 */ 530 val = pci_read_config(dev, PCIR_COMMAND, 2); 531 val |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 532 pci_write_config(dev, PCIR_COMMAND, val, 2); 533 534 /* 535 * Map control/status registers. 536 */ 537 rid = FXP_PCI_MMBA; 538 sc->mem = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 539 0, ~0, 1, RF_ACTIVE); 540 if (!sc->mem) { 541 device_printf(dev, "could not map memory\n"); 542 error = ENXIO; 543 goto fail; 544 } 545 sc->csr = rman_get_virtual(sc->mem); /* XXX use bus_space */ 546 547 /* 548 * Allocate our interrupt. 549 */ 550 rid = 0; 551 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 552 RF_SHAREABLE | RF_ACTIVE); 553 if (sc->irq == NULL) { 554 device_printf(dev, "could not map interrupt\n"); 555 error = ENXIO; 556 goto fail; 557 } 558 559 error = bus_setup_intr(dev, sc->irq, fxp_intr, sc, &sc->ih); 560 if (error) { 561 device_printf(dev, "could not setup irq\n"); 562 goto fail; 563 } 564 565 /* Do generic parts of attach. */ 566 if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) { 567 /* Failed! */ 568 bus_teardown_intr(dev, sc->irq, sc->ih); 569 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 570 bus_release_resource(dev, SYS_RES_MEMORY, FXP_PCI_MMBA, sc->mem); 571 error = ENXIO; 572 goto fail; 573 } 574 575 device_printf(dev, "Ethernet address %6D%s\n", 576 sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : ""); 577 578 ifp = &sc->arpcom.ac_if; 579 ifp->if_unit = device_get_unit(dev); 580 ifp->if_name = "fxp"; 581 ifp->if_output = ether_output; 582 ifp->if_baudrate = 100000000; 583 ifp->if_init = fxp_init; 584 ifp->if_softc = sc; 585 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 586 ifp->if_ioctl = fxp_ioctl; 587 ifp->if_start = fxp_start; 588 ifp->if_watchdog = fxp_watchdog; 589 590 /* 591 * Attach the interface. 592 */ 593 if_attach(ifp); 594 /* 595 * Let the system queue as many packets as we have available 596 * TX descriptors. 597 */ 598 ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1; 599 ether_ifattach(ifp); 600#if NBPFILTER > 0 601 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 602#endif 603 604 splx(s); 605 return 0; 606 607 fail: 608 splx(s); 609 return error; 610} 611 612/* 613 * Detach interface. 614 */ 615static int 616fxp_detach(device_t dev) 617{ 618 struct fxp_softc *sc = device_get_softc(dev); 619 int s; 620 621 s = splimp(); 622 623 /* 624 * Close down routes etc. 625 */ 626 if_detach(&sc->arpcom.ac_if); 627 628 /* 629 * Stop DMA and drop transmit queue. 630 */ 631 fxp_stop(sc); 632 633 /* 634 * Deallocate resources. 635 */ 636 bus_teardown_intr(dev, sc->irq, sc->ih); 637 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 638 bus_release_resource(dev, SYS_RES_MEMORY, FXP_PCI_MMBA, sc->mem); 639 640 /* 641 * Free all the receive buffers. 642 */ 643 if (sc->rfa_headm != NULL) 644 m_freem(sc->rfa_headm); 645 646 /* 647 * Free all media structures. 648 */ 649 ifmedia_removeall(&sc->sc_media); 650 651 /* 652 * Free anciliary structures. 653 */ 654 free(sc->cbl_base, M_DEVBUF); 655 free(sc->fxp_stats, M_DEVBUF); 656 free(sc->mcsp, M_DEVBUF); 657 658 splx(s); 659 660 return 0; 661} 662 663/* 664 * Device shutdown routine. Called at system shutdown after sync. The 665 * main purpose of this routine is to shut off receiver DMA so that 666 * kernel memory doesn't get clobbered during warmboot. 667 */ 668static int 669fxp_shutdown(device_t dev) 670{ 671 /* 672 * Make sure that DMA is disabled prior to reboot. Not doing 673 * do could allow DMA to corrupt kernel memory during the 674 * reboot before the driver initializes. 675 */ 676 fxp_stop((struct fxp_softc *) device_get_softc(dev)); 677 return 0; 678} 679 680static device_method_t fxp_methods[] = { 681 /* Device interface */ 682 DEVMETHOD(device_probe, fxp_probe), 683 DEVMETHOD(device_attach, fxp_attach), 684 DEVMETHOD(device_detach, fxp_detach), 685 DEVMETHOD(device_shutdown, fxp_shutdown), 686 687 { 0, 0 } 688}; 689 690static driver_t fxp_driver = { 691 "fxp", 692 fxp_methods, 693 DRIVER_TYPE_NET, 694 sizeof(struct fxp_softc), 695}; 696 697static devclass_t fxp_devclass; 698 699DRIVER_MODULE(fxp, pci, fxp_driver, fxp_devclass, 0, 0); 700 701#endif /* __NetBSD__ */ 702 703/************************************************************* 704 * End of operating system-specific autoconfiguration glue 705 *************************************************************/ 706 707/* 708 * Do generic parts of attach. 709 */ 710static int 711fxp_attach_common(sc, enaddr) 712 struct fxp_softc *sc; 713 u_int8_t *enaddr; 714{ 715 u_int16_t data; 716 int i, nmedia, defmedia; 717 const int *media; 718 719 /* 720 * Reset to a stable state. 721 */ 722 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 723 DELAY(10); 724 725 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB, 726 M_DEVBUF, M_NOWAIT); 727 if (sc->cbl_base == NULL) 728 goto fail; 729 bzero(sc->cbl_base, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 730 731 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT); 732 if (sc->fxp_stats == NULL) 733 goto fail; 734 bzero(sc->fxp_stats, sizeof(struct fxp_stats)); 735 736 sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT); 737 if (sc->mcsp == NULL) 738 goto fail; 739 740 /* 741 * Pre-allocate our receive buffers. 742 */ 743 for (i = 0; i < FXP_NRFABUFS; i++) { 744 if (fxp_add_rfabuf(sc, NULL) != 0) { 745 goto fail; 746 } 747 } 748 749 /* 750 * Get info about the primary PHY 751 */ 752 fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1); 753 sc->phy_primary_addr = data & 0xff; 754 sc->phy_primary_device = (data >> 8) & 0x3f; 755 sc->phy_10Mbps_only = data >> 15; 756 757 /* 758 * Read MAC address. 759 */ 760 fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3); 761 762 /* 763 * Initialize the media structures. 764 */ 765 766 media = fxp_media_default; 767 nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]); 768 defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA; 769 770 for (i = 0; i < NFXPMEDIA; i++) { 771 if (sc->phy_primary_device == fxp_media[i].fsm_phy) { 772 media = fxp_media[i].fsm_media; 773 nmedia = fxp_media[i].fsm_nmedia; 774 defmedia = fxp_media[i].fsm_defmedia; 775 } 776 } 777 778 ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus); 779 for (i = 0; i < nmedia; i++) { 780 if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only) 781 continue; 782 ifmedia_add(&sc->sc_media, media[i], 0, NULL); 783 } 784 ifmedia_set(&sc->sc_media, defmedia); 785 786 return (0); 787 788 fail: 789 printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc)); 790 if (sc->cbl_base) 791 free(sc->cbl_base, M_DEVBUF); 792 if (sc->fxp_stats) 793 free(sc->fxp_stats, M_DEVBUF); 794 if (sc->mcsp) 795 free(sc->mcsp, M_DEVBUF); 796 /* frees entire chain */ 797 if (sc->rfa_headm) 798 m_freem(sc->rfa_headm); 799 800 return (ENOMEM); 801} 802 803/* 804 * Read from the serial EEPROM. Basically, you manually shift in 805 * the read opcode (one bit at a time) and then shift in the address, 806 * and then you shift out the data (all of this one bit at a time). 807 * The word size is 16 bits, so you have to provide the address for 808 * every 16 bits of data. 809 */ 810static void 811fxp_read_eeprom(sc, data, offset, words) 812 struct fxp_softc *sc; 813 u_short *data; 814 int offset; 815 int words; 816{ 817 u_int16_t reg; 818 int i, x; 819 820 for (i = 0; i < words; i++) { 821 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 822 /* 823 * Shift in read opcode. 824 */ 825 for (x = 3; x > 0; x--) { 826 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { 827 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 828 } else { 829 reg = FXP_EEPROM_EECS; 830 } 831 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 832 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 833 reg | FXP_EEPROM_EESK); 834 DELAY(1); 835 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 836 DELAY(1); 837 } 838 /* 839 * Shift in address. 840 */ 841 for (x = 6; x > 0; x--) { 842 if ((i + offset) & (1 << (x - 1))) { 843 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 844 } else { 845 reg = FXP_EEPROM_EECS; 846 } 847 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 848 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 849 reg | FXP_EEPROM_EESK); 850 DELAY(1); 851 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 852 DELAY(1); 853 } 854 reg = FXP_EEPROM_EECS; 855 data[i] = 0; 856 /* 857 * Shift out data. 858 */ 859 for (x = 16; x > 0; x--) { 860 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 861 reg | FXP_EEPROM_EESK); 862 DELAY(1); 863 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & 864 FXP_EEPROM_EEDO) 865 data[i] |= (1 << (x - 1)); 866 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 867 DELAY(1); 868 } 869 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 870 DELAY(1); 871 } 872} 873 874/* 875 * Start packet transmission on the interface. 876 */ 877static void 878fxp_start(ifp) 879 struct ifnet *ifp; 880{ 881 struct fxp_softc *sc = ifp->if_softc; 882 struct fxp_cb_tx *txp; 883 884 /* 885 * See if we need to suspend xmit until the multicast filter 886 * has been reprogrammed (which can only be done at the head 887 * of the command chain). 888 */ 889 if (sc->need_mcsetup) 890 return; 891 892 txp = NULL; 893 894 /* 895 * We're finished if there is nothing more to add to the list or if 896 * we're all filled up with buffers to transmit. 897 * NOTE: One TxCB is reserved to guarantee that fxp_mc_setup() can add 898 * a NOP command when needed. 899 */ 900 while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB - 1) { 901 struct mbuf *m, *mb_head; 902 int segment; 903 904 /* 905 * Grab a packet to transmit. 906 */ 907 IF_DEQUEUE(&ifp->if_snd, mb_head); 908 909 /* 910 * Get pointer to next available tx desc. 911 */ 912 txp = sc->cbl_last->next; 913 914 /* 915 * Go through each of the mbufs in the chain and initialize 916 * the transmit buffer descriptors with the physical address 917 * and size of the mbuf. 918 */ 919tbdinit: 920 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 921 if (m->m_len != 0) { 922 if (segment == FXP_NTXSEG) 923 break; 924 txp->tbd[segment].tb_addr = 925 vtophys(mtod(m, vm_offset_t)); 926 txp->tbd[segment].tb_size = m->m_len; 927 segment++; 928 } 929 } 930 if (m != NULL) { 931 struct mbuf *mn; 932 933 /* 934 * We ran out of segments. We have to recopy this mbuf 935 * chain first. Bail out if we can't get the new buffers. 936 */ 937 MGETHDR(mn, M_DONTWAIT, MT_DATA); 938 if (mn == NULL) { 939 m_freem(mb_head); 940 break; 941 } 942 if (mb_head->m_pkthdr.len > MHLEN) { 943 MCLGET(mn, M_DONTWAIT); 944 if ((mn->m_flags & M_EXT) == 0) { 945 m_freem(mn); 946 m_freem(mb_head); 947 break; 948 } 949 } 950 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 951 mtod(mn, caddr_t)); 952 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 953 m_freem(mb_head); 954 mb_head = mn; 955 goto tbdinit; 956 } 957 958 txp->tbd_number = segment; 959 txp->mb_head = mb_head; 960 txp->cb_status = 0; 961 if (sc->tx_queued != FXP_CXINT_THRESH - 1) { 962 txp->cb_command = 963 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S; 964 } else { 965 txp->cb_command = 966 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 967 /* 968 * Set a 5 second timer just in case we don't hear from the 969 * card again. 970 */ 971 ifp->if_timer = 5; 972 } 973 txp->tx_threshold = tx_threshold; 974 975 /* 976 * Advance the end of list forward. 977 */ 978 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 979 sc->cbl_last = txp; 980 981 /* 982 * Advance the beginning of the list forward if there are 983 * no other packets queued (when nothing is queued, cbl_first 984 * sits on the last TxCB that was sent out). 985 */ 986 if (sc->tx_queued == 0) 987 sc->cbl_first = txp; 988 989 sc->tx_queued++; 990 991#if NBPFILTER > 0 992 /* 993 * Pass packet to bpf if there is a listener. 994 */ 995 if (ifp->if_bpf) 996 bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head); 997#endif 998 } 999 1000 /* 1001 * We're finished. If we added to the list, issue a RESUME to get DMA 1002 * going again if suspended. 1003 */ 1004 if (txp != NULL) { 1005 fxp_scb_wait(sc); 1006 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); 1007 } 1008} 1009 1010/* 1011 * Process interface interrupts. 1012 */ 1013static FXP_INTR_TYPE 1014fxp_intr(arg) 1015 void *arg; 1016{ 1017 struct fxp_softc *sc = arg; 1018 struct ifnet *ifp = &sc->sc_if; 1019 u_int8_t statack; 1020#if defined(__NetBSD__) 1021 int claimed = 0; 1022#endif 1023 1024 while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { 1025#if defined(__NetBSD__) 1026 claimed = 1; 1027#endif 1028 /* 1029 * First ACK all the interrupts in this pass. 1030 */ 1031 CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack); 1032 1033 /* 1034 * Free any finished transmit mbuf chains. 1035 */ 1036 if (statack & FXP_SCB_STATACK_CXTNO) { 1037 struct fxp_cb_tx *txp; 1038 1039 for (txp = sc->cbl_first; sc->tx_queued && 1040 (txp->cb_status & FXP_CB_STATUS_C) != 0; 1041 txp = txp->next) { 1042 if (txp->mb_head != NULL) { 1043 m_freem(txp->mb_head); 1044 txp->mb_head = NULL; 1045 } 1046 sc->tx_queued--; 1047 } 1048 sc->cbl_first = txp; 1049 ifp->if_timer = 0; 1050 if (sc->tx_queued == 0) { 1051 if (sc->need_mcsetup) 1052 fxp_mc_setup(sc); 1053 } 1054 /* 1055 * Try to start more packets transmitting. 1056 */ 1057 if (ifp->if_snd.ifq_head != NULL) 1058 fxp_start(ifp); 1059 } 1060 /* 1061 * Process receiver interrupts. If a no-resource (RNR) 1062 * condition exists, get whatever packets we can and 1063 * re-start the receiver. 1064 */ 1065 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) { 1066 struct mbuf *m; 1067 struct fxp_rfa *rfa; 1068rcvloop: 1069 m = sc->rfa_headm; 1070 rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + 1071 RFA_ALIGNMENT_FUDGE); 1072 1073 if (rfa->rfa_status & FXP_RFA_STATUS_C) { 1074 /* 1075 * Remove first packet from the chain. 1076 */ 1077 sc->rfa_headm = m->m_next; 1078 m->m_next = NULL; 1079 1080 /* 1081 * Add a new buffer to the receive chain. 1082 * If this fails, the old buffer is recycled 1083 * instead. 1084 */ 1085 if (fxp_add_rfabuf(sc, m) == 0) { 1086 struct ether_header *eh; 1087 u_int16_t total_len; 1088 1089 total_len = rfa->actual_size & 1090 (MCLBYTES - 1); 1091 if (total_len < 1092 sizeof(struct ether_header)) { 1093 m_freem(m); 1094 goto rcvloop; 1095 } 1096 m->m_pkthdr.rcvif = ifp; 1097 m->m_pkthdr.len = m->m_len = 1098 total_len ; 1099 eh = mtod(m, struct ether_header *); 1100#if NBPFILTER > 0 1101 if (ifp->if_bpf) 1102 bpf_tap(FXP_BPFTAP_ARG(ifp), 1103 mtod(m, caddr_t), 1104 total_len); 1105#endif /* NBPFILTER > 0 */ 1106#ifdef BRIDGE 1107 if (do_bridge) { 1108 struct ifnet *bdg_ifp ; 1109 bdg_ifp = bridge_in(m); 1110 if (bdg_ifp == BDG_DROP) 1111 goto dropit ; 1112 if (bdg_ifp != BDG_LOCAL) 1113 bdg_forward(&m, bdg_ifp); 1114 if (bdg_ifp != BDG_LOCAL && 1115 bdg_ifp != BDG_BCAST && 1116 bdg_ifp != BDG_MCAST) 1117 goto dropit ; 1118 goto getit ; 1119 } 1120#endif 1121 /* 1122 * Only pass this packet up 1123 * if it is for us. 1124 */ 1125 if ((ifp->if_flags & 1126 IFF_PROMISC) && 1127 (rfa->rfa_status & 1128 FXP_RFA_STATUS_IAMATCH) && 1129 (eh->ether_dhost[0] & 1) 1130 == 0) { 1131dropit: 1132 if (m) 1133 m_freem(m); 1134 goto rcvloop; 1135 } 1136getit: 1137 m->m_data += 1138 sizeof(struct ether_header); 1139 m->m_len -= 1140 sizeof(struct ether_header); 1141 m->m_pkthdr.len = m->m_len ; 1142 ether_input(ifp, eh, m); 1143 } 1144 goto rcvloop; 1145 } 1146 if (statack & FXP_SCB_STATACK_RNR) { 1147 fxp_scb_wait(sc); 1148 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1149 vtophys(sc->rfa_headm->m_ext.ext_buf) + 1150 RFA_ALIGNMENT_FUDGE); 1151 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1152 FXP_SCB_COMMAND_RU_START); 1153 } 1154 } 1155 } 1156#if defined(__NetBSD__) 1157 return (claimed); 1158#endif 1159} 1160 1161/* 1162 * Update packet in/out/collision statistics. The i82557 doesn't 1163 * allow you to access these counters without doing a fairly 1164 * expensive DMA to get _all_ of the statistics it maintains, so 1165 * we do this operation here only once per second. The statistics 1166 * counters in the kernel are updated from the previous dump-stats 1167 * DMA and then a new dump-stats DMA is started. The on-chip 1168 * counters are zeroed when the DMA completes. If we can't start 1169 * the DMA immediately, we don't wait - we just prepare to read 1170 * them again next time. 1171 */ 1172static void 1173fxp_stats_update(arg) 1174 void *arg; 1175{ 1176 struct fxp_softc *sc = arg; 1177 struct ifnet *ifp = &sc->sc_if; 1178 struct fxp_stats *sp = sc->fxp_stats; 1179 struct fxp_cb_tx *txp; 1180 int s; 1181 1182 ifp->if_opackets += sp->tx_good; 1183 ifp->if_collisions += sp->tx_total_collisions; 1184 if (sp->rx_good) { 1185 ifp->if_ipackets += sp->rx_good; 1186 sc->rx_idle_secs = 0; 1187 } else { 1188 /* 1189 * Receiver's been idle for another second. 1190 */ 1191 sc->rx_idle_secs++; 1192 } 1193 ifp->if_ierrors += 1194 sp->rx_crc_errors + 1195 sp->rx_alignment_errors + 1196 sp->rx_rnr_errors + 1197 sp->rx_overrun_errors; 1198 /* 1199 * If any transmit underruns occured, bump up the transmit 1200 * threshold by another 512 bytes (64 * 8). 1201 */ 1202 if (sp->tx_underruns) { 1203 ifp->if_oerrors += sp->tx_underruns; 1204 if (tx_threshold < 192) 1205 tx_threshold += 64; 1206 } 1207 s = splimp(); 1208 /* 1209 * Release any xmit buffers that have completed DMA. This isn't 1210 * strictly necessary to do here, but it's advantagous for mbufs 1211 * with external storage to be released in a timely manner rather 1212 * than being defered for a potentially long time. This limits 1213 * the delay to a maximum of one second. 1214 */ 1215 for (txp = sc->cbl_first; sc->tx_queued && 1216 (txp->cb_status & FXP_CB_STATUS_C) != 0; 1217 txp = txp->next) { 1218 if (txp->mb_head != NULL) { 1219 m_freem(txp->mb_head); 1220 txp->mb_head = NULL; 1221 } 1222 sc->tx_queued--; 1223 } 1224 sc->cbl_first = txp; 1225 /* 1226 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1227 * then assume the receiver has locked up and attempt to clear 1228 * the condition by reprogramming the multicast filter. This is 1229 * a work-around for a bug in the 82557 where the receiver locks 1230 * up if it gets certain types of garbage in the syncronization 1231 * bits prior to the packet header. This bug is supposed to only 1232 * occur in 10Mbps mode, but has been seen to occur in 100Mbps 1233 * mode as well (perhaps due to a 10/100 speed transition). 1234 */ 1235 if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { 1236 sc->rx_idle_secs = 0; 1237 fxp_mc_setup(sc); 1238 } 1239 /* 1240 * If there is no pending command, start another stats 1241 * dump. Otherwise punt for now. 1242 */ 1243 if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { 1244 /* 1245 * Start another stats dump. 1246 */ 1247 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1248 FXP_SCB_COMMAND_CU_DUMPRESET); 1249 } else { 1250 /* 1251 * A previous command is still waiting to be accepted. 1252 * Just zero our copy of the stats and wait for the 1253 * next timer event to update them. 1254 */ 1255 sp->tx_good = 0; 1256 sp->tx_underruns = 0; 1257 sp->tx_total_collisions = 0; 1258 1259 sp->rx_good = 0; 1260 sp->rx_crc_errors = 0; 1261 sp->rx_alignment_errors = 0; 1262 sp->rx_rnr_errors = 0; 1263 sp->rx_overrun_errors = 0; 1264 } 1265 splx(s); 1266 /* 1267 * Schedule another timeout one second from now. 1268 */ 1269 sc->stat_ch = timeout(fxp_stats_update, sc, hz); 1270} 1271 1272/* 1273 * Stop the interface. Cancels the statistics updater and resets 1274 * the interface. 1275 */ 1276static void 1277fxp_stop(sc) 1278 struct fxp_softc *sc; 1279{ 1280 struct ifnet *ifp = &sc->sc_if; 1281 struct fxp_cb_tx *txp; 1282 int i; 1283 1284 /* 1285 * Cancel stats updater. 1286 */ 1287 untimeout(fxp_stats_update, sc, sc->stat_ch); 1288 1289 /* 1290 * Issue software reset 1291 */ 1292 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 1293 DELAY(10); 1294 1295 /* 1296 * Release any xmit buffers. 1297 */ 1298 txp = sc->cbl_base; 1299 if (txp != NULL) { 1300 for (i = 0; i < FXP_NTXCB; i++) { 1301 if (txp[i].mb_head != NULL) { 1302 m_freem(txp[i].mb_head); 1303 txp[i].mb_head = NULL; 1304 } 1305 } 1306 } 1307 sc->tx_queued = 0; 1308 1309 /* 1310 * Free all the receive buffers then reallocate/reinitialize 1311 */ 1312 if (sc->rfa_headm != NULL) 1313 m_freem(sc->rfa_headm); 1314 sc->rfa_headm = NULL; 1315 sc->rfa_tailm = NULL; 1316 for (i = 0; i < FXP_NRFABUFS; i++) { 1317 if (fxp_add_rfabuf(sc, NULL) != 0) { 1318 /* 1319 * This "can't happen" - we're at splimp() 1320 * and we just freed all the buffers we need 1321 * above. 1322 */ 1323 panic("fxp_stop: no buffers!"); 1324 } 1325 } 1326 1327 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1328 ifp->if_timer = 0; 1329} 1330 1331/* 1332 * Watchdog/transmission transmit timeout handler. Called when a 1333 * transmission is started on the interface, but no interrupt is 1334 * received before the timeout. This usually indicates that the 1335 * card has wedged for some reason. 1336 */ 1337static void 1338fxp_watchdog(ifp) 1339 struct ifnet *ifp; 1340{ 1341 struct fxp_softc *sc = ifp->if_softc; 1342 1343 printf(FXP_FORMAT ": device timeout\n", FXP_ARGS(sc)); 1344 ifp->if_oerrors++; 1345 1346 fxp_init(sc); 1347} 1348 1349static void 1350fxp_init(xsc) 1351 void *xsc; 1352{ 1353 struct fxp_softc *sc = xsc; 1354 struct ifnet *ifp = &sc->sc_if; 1355 struct fxp_cb_config *cbp; 1356 struct fxp_cb_ias *cb_ias; 1357 struct fxp_cb_tx *txp; 1358 int i, s, prm; 1359 1360 s = splimp(); 1361 /* 1362 * Cancel any pending I/O 1363 */ 1364 fxp_stop(sc); 1365 1366 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 1367 1368 /* 1369 * Initialize base of CBL and RFA memory. Loading with zero 1370 * sets it up for regular linear addressing. 1371 */ 1372 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); 1373 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE); 1374 1375 fxp_scb_wait(sc); 1376 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE); 1377 1378 /* 1379 * Initialize base of dump-stats buffer. 1380 */ 1381 fxp_scb_wait(sc); 1382 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats)); 1383 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR); 1384 1385 /* 1386 * We temporarily use memory that contains the TxCB list to 1387 * construct the config CB. The TxCB list memory is rebuilt 1388 * later. 1389 */ 1390 cbp = (struct fxp_cb_config *) sc->cbl_base; 1391 1392 /* 1393 * This bcopy is kind of disgusting, but there are a bunch of must be 1394 * zero and must be one bits in this structure and this is the easiest 1395 * way to initialize them all to proper values. 1396 */ 1397 bcopy(fxp_cb_config_template, (volatile void *)&cbp->cb_status, 1398 sizeof(fxp_cb_config_template)); 1399 1400 cbp->cb_status = 0; 1401 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 1402 cbp->link_addr = -1; /* (no) next command */ 1403 cbp->byte_count = 22; /* (22) bytes to config */ 1404 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 1405 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 1406 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 1407 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 1408 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 1409 cbp->dma_bce = 0; /* (disable) dma max counters */ 1410 cbp->late_scb = 0; /* (don't) defer SCB update */ 1411 cbp->tno_int = 0; /* (disable) tx not okay interrupt */ 1412 cbp->ci_int = 1; /* interrupt on CU idle */ 1413 cbp->save_bf = prm; /* save bad frames */ 1414 cbp->disc_short_rx = !prm; /* discard short packets */ 1415 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */ 1416 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */ 1417 cbp->nsai = 1; /* (don't) disable source addr insert */ 1418 cbp->preamble_length = 2; /* (7 byte) preamble */ 1419 cbp->loopback = 0; /* (don't) loopback */ 1420 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 1421 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 1422 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 1423 cbp->promiscuous = prm; /* promiscuous mode */ 1424 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 1425 cbp->crscdt = 0; /* (CRS only) */ 1426 cbp->stripping = !prm; /* truncate rx packet to byte count */ 1427 cbp->padding = 1; /* (do) pad short tx packets */ 1428 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 1429 cbp->force_fdx = 0; /* (don't) force full duplex */ 1430 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 1431 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 1432 cbp->mc_all = sc->all_mcasts;/* accept all multicasts */ 1433 1434 /* 1435 * Start the config command/DMA. 1436 */ 1437 fxp_scb_wait(sc); 1438 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status)); 1439 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1440 /* ...and wait for it to complete. */ 1441 while (!(cbp->cb_status & FXP_CB_STATUS_C)); 1442 1443 /* 1444 * Now initialize the station address. Temporarily use the TxCB 1445 * memory area like we did above for the config CB. 1446 */ 1447 cb_ias = (struct fxp_cb_ias *) sc->cbl_base; 1448 cb_ias->cb_status = 0; 1449 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 1450 cb_ias->link_addr = -1; 1451#if defined(__NetBSD__) 1452 bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6); 1453#else 1454 bcopy(sc->arpcom.ac_enaddr, (volatile void *)cb_ias->macaddr, 1455 sizeof(sc->arpcom.ac_enaddr)); 1456#endif /* __NetBSD__ */ 1457 1458 /* 1459 * Start the IAS (Individual Address Setup) command/DMA. 1460 */ 1461 fxp_scb_wait(sc); 1462 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1463 /* ...and wait for it to complete. */ 1464 while (!(cb_ias->cb_status & FXP_CB_STATUS_C)); 1465 1466 /* 1467 * Initialize transmit control block (TxCB) list. 1468 */ 1469 1470 txp = sc->cbl_base; 1471 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 1472 for (i = 0; i < FXP_NTXCB; i++) { 1473 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; 1474 txp[i].cb_command = FXP_CB_COMMAND_NOP; 1475 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status); 1476 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]); 1477 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK]; 1478 } 1479 /* 1480 * Set the suspend flag on the first TxCB and start the control 1481 * unit. It will execute the NOP and then suspend. 1482 */ 1483 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; 1484 sc->cbl_first = sc->cbl_last = txp; 1485 sc->tx_queued = 1; 1486 1487 fxp_scb_wait(sc); 1488 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1489 1490 /* 1491 * Initialize receiver buffer area - RFA. 1492 */ 1493 fxp_scb_wait(sc); 1494 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1495 vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE); 1496 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START); 1497 1498 /* 1499 * Set current media. 1500 */ 1501 fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media); 1502 1503 ifp->if_flags |= IFF_RUNNING; 1504 ifp->if_flags &= ~IFF_OACTIVE; 1505 splx(s); 1506 1507 /* 1508 * Start stats updater. 1509 */ 1510 sc->stat_ch = timeout(fxp_stats_update, sc, hz); 1511} 1512 1513static void 1514fxp_set_media(sc, media) 1515 struct fxp_softc *sc; 1516 int media; 1517{ 1518 1519 switch (sc->phy_primary_device) { 1520 case FXP_PHY_DP83840: 1521 case FXP_PHY_DP83840A: 1522 fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR, 1523 fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) | 1524 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */ 1525 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */ 1526 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */ 1527 /* fall through */ 1528 case FXP_PHY_82553A: 1529 case FXP_PHY_82553C: /* untested */ 1530 case FXP_PHY_82555: 1531 case FXP_PHY_82555B: 1532 if (IFM_SUBTYPE(media) != IFM_AUTO) { 1533 int flags; 1534 1535 flags = (IFM_SUBTYPE(media) == IFM_100_TX) ? 1536 FXP_PHY_BMCR_SPEED_100M : 0; 1537 flags |= (media & IFM_FDX) ? 1538 FXP_PHY_BMCR_FULLDUPLEX : 0; 1539 fxp_mdi_write(sc, sc->phy_primary_addr, 1540 FXP_PHY_BMCR, 1541 (fxp_mdi_read(sc, sc->phy_primary_addr, 1542 FXP_PHY_BMCR) & 1543 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M | 1544 FXP_PHY_BMCR_FULLDUPLEX)) | flags); 1545 } else { 1546 fxp_mdi_write(sc, sc->phy_primary_addr, 1547 FXP_PHY_BMCR, 1548 (fxp_mdi_read(sc, sc->phy_primary_addr, 1549 FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN)); 1550 } 1551 break; 1552 /* 1553 * The Seeq 80c24 doesn't have a PHY programming interface, so do 1554 * nothing. 1555 */ 1556 case FXP_PHY_80C24: 1557 break; 1558 default: 1559 printf(FXP_FORMAT 1560 ": warning: unsupported PHY, type = %d, addr = %d\n", 1561 FXP_ARGS(sc), sc->phy_primary_device, 1562 sc->phy_primary_addr); 1563 } 1564} 1565 1566/* 1567 * Change media according to request. 1568 */ 1569int 1570fxp_mediachange(ifp) 1571 struct ifnet *ifp; 1572{ 1573 struct fxp_softc *sc = ifp->if_softc; 1574 struct ifmedia *ifm = &sc->sc_media; 1575 1576 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1577 return (EINVAL); 1578 1579 fxp_set_media(sc, ifm->ifm_media); 1580 return (0); 1581} 1582 1583/* 1584 * Notify the world which media we're using. 1585 */ 1586void 1587fxp_mediastatus(ifp, ifmr) 1588 struct ifnet *ifp; 1589 struct ifmediareq *ifmr; 1590{ 1591 struct fxp_softc *sc = ifp->if_softc; 1592 int flags, stsflags; 1593 1594 switch (sc->phy_primary_device) { 1595 case FXP_PHY_82555: 1596 case FXP_PHY_82555B: 1597 case FXP_PHY_DP83840: 1598 case FXP_PHY_DP83840A: 1599 ifmr->ifm_status = IFM_AVALID; /* IFM_ACTIVE will be valid */ 1600 ifmr->ifm_active = IFM_ETHER; 1601 /* 1602 * the following is not an error. 1603 * You need to read this register twice to get current 1604 * status. This is correct documented behaviour, the 1605 * first read gets latched values. 1606 */ 1607 stsflags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_STS); 1608 stsflags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_STS); 1609 if (stsflags & FXP_PHY_STS_LINK_STS) 1610 ifmr->ifm_status |= IFM_ACTIVE; 1611 1612 /* 1613 * If we are in auto mode, then try report the result. 1614 */ 1615 flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR); 1616 if (flags & FXP_PHY_BMCR_AUTOEN) { 1617 ifmr->ifm_active |= IFM_AUTO; /* XXX presently 0 */ 1618 if (stsflags & FXP_PHY_STS_AUTO_DONE) { 1619 /* 1620 * Intel and National parts report 1621 * differently on what they found. 1622 */ 1623 if ((sc->phy_primary_device == FXP_PHY_82555) 1624 || (sc->phy_primary_device == FXP_PHY_82555B)) { 1625 flags = fxp_mdi_read(sc, 1626 sc->phy_primary_addr, 1627 FXP_PHY_USC); 1628 1629 if (flags & FXP_PHY_USC_SPEED) 1630 ifmr->ifm_active |= IFM_100_TX; 1631 else 1632 ifmr->ifm_active |= IFM_10_T; 1633 1634 if (flags & FXP_PHY_USC_DUPLEX) 1635 ifmr->ifm_active |= IFM_FDX; 1636 } else { /* it's National. only know speed */ 1637 flags = fxp_mdi_read(sc, 1638 sc->phy_primary_addr, 1639 FXP_DP83840_PAR); 1640 1641 if (flags & FXP_DP83840_PAR_SPEED_10) 1642 ifmr->ifm_active |= IFM_10_T; 1643 else 1644 ifmr->ifm_active |= IFM_100_TX; 1645 } 1646 } 1647 } else { /* in manual mode.. just report what we were set to */ 1648 if (flags & FXP_PHY_BMCR_SPEED_100M) 1649 ifmr->ifm_active |= IFM_100_TX; 1650 else 1651 ifmr->ifm_active |= IFM_10_T; 1652 1653 if (flags & FXP_PHY_BMCR_FULLDUPLEX) 1654 ifmr->ifm_active |= IFM_FDX; 1655 } 1656 break; 1657 1658 case FXP_PHY_80C24: 1659 default: 1660 ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */ 1661 } 1662} 1663 1664/* 1665 * Add a buffer to the end of the RFA buffer list. 1666 * Return 0 if successful, 1 for failure. A failure results in 1667 * adding the 'oldm' (if non-NULL) on to the end of the list - 1668 * tossing out its old contents and recycling it. 1669 * The RFA struct is stuck at the beginning of mbuf cluster and the 1670 * data pointer is fixed up to point just past it. 1671 */ 1672static int 1673fxp_add_rfabuf(sc, oldm) 1674 struct fxp_softc *sc; 1675 struct mbuf *oldm; 1676{ 1677 u_int32_t v; 1678 struct mbuf *m; 1679 struct fxp_rfa *rfa, *p_rfa; 1680 1681 MGETHDR(m, M_DONTWAIT, MT_DATA); 1682 if (m != NULL) { 1683 MCLGET(m, M_DONTWAIT); 1684 if ((m->m_flags & M_EXT) == 0) { 1685 m_freem(m); 1686 if (oldm == NULL) 1687 return 1; 1688 m = oldm; 1689 m->m_data = m->m_ext.ext_buf; 1690 } 1691 } else { 1692 if (oldm == NULL) 1693 return 1; 1694 m = oldm; 1695 m->m_data = m->m_ext.ext_buf; 1696 } 1697 1698 /* 1699 * Move the data pointer up so that the incoming data packet 1700 * will be 32-bit aligned. 1701 */ 1702 m->m_data += RFA_ALIGNMENT_FUDGE; 1703 1704 /* 1705 * Get a pointer to the base of the mbuf cluster and move 1706 * data start past it. 1707 */ 1708 rfa = mtod(m, struct fxp_rfa *); 1709 m->m_data += sizeof(struct fxp_rfa); 1710 rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE; 1711 1712 /* 1713 * Initialize the rest of the RFA. Note that since the RFA 1714 * is misaligned, we cannot store values directly. Instead, 1715 * we use an optimized, inline copy. 1716 */ 1717 rfa->rfa_status = 0; 1718 rfa->rfa_control = FXP_RFA_CONTROL_EL; 1719 rfa->actual_size = 0; 1720 1721 v = -1; 1722 fxp_lwcopy(&v, &rfa->link_addr); 1723 fxp_lwcopy(&v, &rfa->rbd_addr); 1724 1725 /* 1726 * If there are other buffers already on the list, attach this 1727 * one to the end by fixing up the tail to point to this one. 1728 */ 1729 if (sc->rfa_headm != NULL) { 1730 p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf + 1731 RFA_ALIGNMENT_FUDGE); 1732 sc->rfa_tailm->m_next = m; 1733 v = vtophys(rfa); 1734 fxp_lwcopy(&v, &p_rfa->link_addr); 1735 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL; 1736 } else { 1737 sc->rfa_headm = m; 1738 } 1739 sc->rfa_tailm = m; 1740 1741 return (m == oldm); 1742} 1743 1744static volatile int 1745fxp_mdi_read(sc, phy, reg) 1746 struct fxp_softc *sc; 1747 int phy; 1748 int reg; 1749{ 1750 int count = 10000; 1751 int value; 1752 1753 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1754 (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21)); 1755 1756 while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 1757 && count--) 1758 DELAY(10); 1759 1760 if (count <= 0) 1761 printf(FXP_FORMAT ": fxp_mdi_read: timed out\n", 1762 FXP_ARGS(sc)); 1763 1764 return (value & 0xffff); 1765} 1766 1767static void 1768fxp_mdi_write(sc, phy, reg, value) 1769 struct fxp_softc *sc; 1770 int phy; 1771 int reg; 1772 int value; 1773{ 1774 int count = 10000; 1775 1776 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1777 (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | 1778 (value & 0xffff)); 1779 1780 while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && 1781 count--) 1782 DELAY(10); 1783 1784 if (count <= 0) 1785 printf(FXP_FORMAT ": fxp_mdi_write: timed out\n", 1786 FXP_ARGS(sc)); 1787} 1788 1789static int 1790fxp_ioctl(ifp, command, data) 1791 struct ifnet *ifp; 1792 FXP_IOCTLCMD_TYPE command; 1793 caddr_t data; 1794{ 1795 struct fxp_softc *sc = ifp->if_softc; 1796 struct ifreq *ifr = (struct ifreq *)data; 1797 int s, error = 0; 1798 1799 s = splimp(); 1800 1801 switch (command) { 1802 1803 case SIOCSIFADDR: 1804#if !defined(__NetBSD__) 1805 case SIOCGIFADDR: 1806 case SIOCSIFMTU: 1807#endif 1808 error = ether_ioctl(ifp, command, data); 1809 break; 1810 1811 case SIOCSIFFLAGS: 1812 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1813 1814 /* 1815 * If interface is marked up and not running, then start it. 1816 * If it is marked down and running, stop it. 1817 * XXX If it's up then re-initialize it. This is so flags 1818 * such as IFF_PROMISC are handled. 1819 */ 1820 if (ifp->if_flags & IFF_UP) { 1821 fxp_init(sc); 1822 } else { 1823 if (ifp->if_flags & IFF_RUNNING) 1824 fxp_stop(sc); 1825 } 1826 break; 1827 1828 case SIOCADDMULTI: 1829 case SIOCDELMULTI: 1830 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1831#if defined(__NetBSD__) 1832 error = (command == SIOCADDMULTI) ? 1833 ether_addmulti(ifr, &sc->sc_ethercom) : 1834 ether_delmulti(ifr, &sc->sc_ethercom); 1835 1836 if (error == ENETRESET) { 1837 /* 1838 * Multicast list has changed; set the hardware 1839 * filter accordingly. 1840 */ 1841 if (!sc->all_mcasts) 1842 fxp_mc_setup(sc); 1843 /* 1844 * fxp_mc_setup() can turn on all_mcasts if we run 1845 * out of space, so check it again rather than else {}. 1846 */ 1847 if (sc->all_mcasts) 1848 fxp_init(sc); 1849 error = 0; 1850 } 1851#else /* __FreeBSD__ */ 1852 /* 1853 * Multicast list has changed; set the hardware filter 1854 * accordingly. 1855 */ 1856 if (!sc->all_mcasts) 1857 fxp_mc_setup(sc); 1858 /* 1859 * fxp_mc_setup() can turn on sc->all_mcasts, so check it 1860 * again rather than else {}. 1861 */ 1862 if (sc->all_mcasts) 1863 fxp_init(sc); 1864 error = 0; 1865#endif /* __NetBSD__ */ 1866 break; 1867 1868 case SIOCSIFMEDIA: 1869 case SIOCGIFMEDIA: 1870 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); 1871 break; 1872 1873 default: 1874 error = EINVAL; 1875 } 1876 (void) splx(s); 1877 return (error); 1878} 1879 1880/* 1881 * Program the multicast filter. 1882 * 1883 * We have an artificial restriction that the multicast setup command 1884 * must be the first command in the chain, so we take steps to ensure 1885 * this. By requiring this, it allows us to keep up the performance of 1886 * the pre-initialized command ring (esp. link pointers) by not actually 1887 * inserting the mcsetup command in the ring - i.e. its link pointer 1888 * points to the TxCB ring, but the mcsetup descriptor itself is not part 1889 * of it. We then can do 'CU_START' on the mcsetup descriptor and have it 1890 * lead into the regular TxCB ring when it completes. 1891 * 1892 * This function must be called at splimp. 1893 */ 1894static void 1895fxp_mc_setup(sc) 1896 struct fxp_softc *sc; 1897{ 1898 struct fxp_cb_mcs *mcsp = sc->mcsp; 1899 struct ifnet *ifp = &sc->sc_if; 1900 struct ifmultiaddr *ifma; 1901 int nmcasts; 1902 1903 /* 1904 * If there are queued commands, we must wait until they are all 1905 * completed. If we are already waiting, then add a NOP command 1906 * with interrupt option so that we're notified when all commands 1907 * have been completed - fxp_start() ensures that no additional 1908 * TX commands will be added when need_mcsetup is true. 1909 */ 1910 if (sc->tx_queued) { 1911 struct fxp_cb_tx *txp; 1912 1913 /* 1914 * need_mcsetup will be true if we are already waiting for the 1915 * NOP command to be completed (see below). In this case, bail. 1916 */ 1917 if (sc->need_mcsetup) 1918 return; 1919 sc->need_mcsetup = 1; 1920 1921 /* 1922 * Add a NOP command with interrupt so that we are notified when all 1923 * TX commands have been processed. 1924 */ 1925 txp = sc->cbl_last->next; 1926 txp->mb_head = NULL; 1927 txp->cb_status = 0; 1928 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 1929 /* 1930 * Advance the end of list forward. 1931 */ 1932 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 1933 sc->cbl_last = txp; 1934 sc->tx_queued++; 1935 /* 1936 * Issue a resume in case the CU has just suspended. 1937 */ 1938 fxp_scb_wait(sc); 1939 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); 1940 /* 1941 * Set a 5 second timer just in case we don't hear from the 1942 * card again. 1943 */ 1944 ifp->if_timer = 5; 1945 1946 return; 1947 } 1948 sc->need_mcsetup = 0; 1949 1950 /* 1951 * Initialize multicast setup descriptor. 1952 */ 1953 mcsp->next = sc->cbl_base; 1954 mcsp->mb_head = NULL; 1955 mcsp->cb_status = 0; 1956 mcsp->cb_command = FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 1957 mcsp->link_addr = vtophys(&sc->cbl_base->cb_status); 1958 1959 nmcasts = 0; 1960 if (!sc->all_mcasts) { 1961 for (ifma = ifp->if_multiaddrs.lh_first; ifma != NULL; 1962 ifma = ifma->ifma_link.le_next) { 1963 if (ifma->ifma_addr->sa_family != AF_LINK) 1964 continue; 1965 if (nmcasts >= MAXMCADDR) { 1966 sc->all_mcasts = 1; 1967 nmcasts = 0; 1968 break; 1969 } 1970 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1971 (volatile void *) &sc->mcsp->mc_addr[nmcasts][0], 6); 1972 nmcasts++; 1973 } 1974 } 1975 mcsp->mc_cnt = nmcasts * 6; 1976 sc->cbl_first = sc->cbl_last = (struct fxp_cb_tx *) mcsp; 1977 sc->tx_queued = 1; 1978 1979 /* 1980 * Wait until command unit is not active. This should never 1981 * be the case when nothing is queued, but make sure anyway. 1982 */ 1983 while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) == 1984 FXP_SCB_CUS_ACTIVE) ; 1985 1986 /* 1987 * Start the multicast setup command. 1988 */ 1989 fxp_scb_wait(sc); 1990 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&mcsp->cb_status)); 1991 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1992 1993 ifp->if_timer = 2; 1994 return; 1995} 1996