if_fxp.c revision 44907
155714Skris/* 255714Skris * Copyright (c) 1995, David Greenman 355714Skris * All rights reserved. 455714Skris * 555714Skris * Modifications to support NetBSD and media selection: 655714Skris * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. 755714Skris * 855714Skris * Redistribution and use in source and binary forms, with or without 955714Skris * modification, are permitted provided that the following conditions 1055714Skris * are met: 1155714Skris * 1. Redistributions of source code must retain the above copyright 1255714Skris * notice unmodified, this list of conditions, and the following 1355714Skris * disclaimer. 1455714Skris * 2. Redistributions in binary form must reproduce the above copyright 1555714Skris * notice, this list of conditions and the following disclaimer in the 1655714Skris * documentation and/or other materials provided with the distribution. 1755714Skris * 1855714Skris * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1955714Skris * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $Id: if_fxp.c,v 1.65 1999/03/17 16:44:53 luigi Exp $ 31 */ 32 33/* 34 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/mbuf.h> 42#include <sys/malloc.h> 43#include <sys/kernel.h> 44#include <sys/socket.h> 45 46#include <net/if.h> 47#include <net/if_dl.h> 48#include <net/if_media.h> 49 50#ifdef NS 51#include <netns/ns.h> 52#include <netns/ns_if.h> 53#endif 54 55#if NBPFILTER > 0 56#include <net/bpf.h> 57#endif 58 59#if defined(__NetBSD__) 60 61#include <sys/ioctl.h> 62#include <sys/errno.h> 63#include <sys/device.h> 64 65#include <net/if_dl.h> 66#include <net/if_ether.h> 67 68#include <netinet/if_inarp.h> 69 70#include <vm/vm.h> 71 72#include <machine/cpu.h> 73#include <machine/bus.h> 74#include <machine/intr.h> 75 76#include <dev/pci/if_fxpreg.h> 77#include <dev/pci/if_fxpvar.h> 78 79#include <dev/pci/pcivar.h> 80#include <dev/pci/pcireg.h> 81#include <dev/pci/pcidevs.h> 82 83#ifdef __alpha__ /* XXX */ 84/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */ 85#undef vtophys 86#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 87#endif /* __alpha__ */ 88 89#else /* __FreeBSD__ */ 90 91#include <sys/sockio.h> 92 93#include <net/ethernet.h> 94#include <net/if_arp.h> 95 96#include <vm/vm.h> /* for vtophys */ 97#include <vm/pmap.h> /* for vtophys */ 98#include <machine/clock.h> /* for DELAY */ 99 100#include <pci/pcivar.h> 101#include <pci/pcireg.h> /* for PCIM_CMD_xxx */ 102#include <pci/if_fxpreg.h> 103#include <pci/if_fxpvar.h> 104 105#endif /* __NetBSD__ */ 106 107#include "opt_bdg.h" 108#ifdef BRIDGE 109#include <net/if_types.h> 110#include <net/bridge.h> 111#endif 112 113/* 114 * NOTE! On the Alpha, we have an alignment constraint. The 115 * card DMAs the packet immediately following the RFA. However, 116 * the first thing in the packet is a 14-byte Ethernet header. 117 * This means that the packet is misaligned. To compensate, 118 * we actually offset the RFA 2 bytes into the cluster. This 119 * alignes the packet after the Ethernet header at a 32-bit 120 * boundary. HOWEVER! This means that the RFA is misaligned! 121 */ 122#define RFA_ALIGNMENT_FUDGE 2 123 124/* 125 * Inline function to copy a 16-bit aligned 32-bit quantity. 126 */ 127static __inline void fxp_lwcopy __P((volatile u_int32_t *, 128 volatile u_int32_t *)); 129static __inline void 130fxp_lwcopy(src, dst) 131 volatile u_int32_t *src, *dst; 132{ 133 volatile u_int16_t *a = (volatile u_int16_t *)src; 134 volatile u_int16_t *b = (volatile u_int16_t *)dst; 135 136 b[0] = a[0]; 137 b[1] = a[1]; 138} 139 140/* 141 * Template for default configuration parameters. 142 * See struct fxp_cb_config for the bit definitions. 143 */ 144static u_char fxp_cb_config_template[] = { 145 0x0, 0x0, /* cb_status */ 146 0x80, 0x2, /* cb_command */ 147 0xff, 0xff, 0xff, 0xff, /* link_addr */ 148 0x16, /* 0 */ 149 0x8, /* 1 */ 150 0x0, /* 2 */ 151 0x0, /* 3 */ 152 0x0, /* 4 */ 153 0x80, /* 5 */ 154 0xb2, /* 6 */ 155 0x3, /* 7 */ 156 0x1, /* 8 */ 157 0x0, /* 9 */ 158 0x26, /* 10 */ 159 0x0, /* 11 */ 160 0x60, /* 12 */ 161 0x0, /* 13 */ 162 0xf2, /* 14 */ 163 0x48, /* 15 */ 164 0x0, /* 16 */ 165 0x40, /* 17 */ 166 0xf3, /* 18 */ 167 0x0, /* 19 */ 168 0x3f, /* 20 */ 169 0x5 /* 21 */ 170}; 171 172/* Supported media types. */ 173struct fxp_supported_media { 174 const int fsm_phy; /* PHY type */ 175 const int *fsm_media; /* the media array */ 176 const int fsm_nmedia; /* the number of supported media */ 177 const int fsm_defmedia; /* default media for this PHY */ 178}; 179 180static const int fxp_media_standard[] = { 181 IFM_ETHER|IFM_10_T, 182 IFM_ETHER|IFM_10_T|IFM_FDX, 183 IFM_ETHER|IFM_100_TX, 184 IFM_ETHER|IFM_100_TX|IFM_FDX, 185 IFM_ETHER|IFM_AUTO, 186}; 187#define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO) 188 189static const int fxp_media_default[] = { 190 IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */ 191}; 192#define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL) 193 194static const struct fxp_supported_media fxp_media[] = { 195 { FXP_PHY_DP83840, fxp_media_standard, 196 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 197 FXP_MEDIA_STANDARD_DEFMEDIA }, 198 { FXP_PHY_DP83840A, fxp_media_standard, 199 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 200 FXP_MEDIA_STANDARD_DEFMEDIA }, 201 { FXP_PHY_82553A, fxp_media_standard, 202 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 203 FXP_MEDIA_STANDARD_DEFMEDIA }, 204 { FXP_PHY_82553C, fxp_media_standard, 205 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 206 FXP_MEDIA_STANDARD_DEFMEDIA }, 207 { FXP_PHY_82555, fxp_media_standard, 208 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 209 FXP_MEDIA_STANDARD_DEFMEDIA }, 210 { FXP_PHY_82555B, fxp_media_standard, 211 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 212 FXP_MEDIA_STANDARD_DEFMEDIA }, 213 { FXP_PHY_80C24, fxp_media_default, 214 sizeof(fxp_media_default) / sizeof(fxp_media_default[0]), 215 FXP_MEDIA_DEFAULT_DEFMEDIA }, 216}; 217#define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0])) 218 219static int fxp_mediachange __P((struct ifnet *)); 220static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *)); 221static void fxp_set_media __P((struct fxp_softc *, int)); 222static __inline void fxp_scb_wait __P((struct fxp_softc *)); 223static FXP_INTR_TYPE fxp_intr __P((void *)); 224static void fxp_start __P((struct ifnet *)); 225static int fxp_ioctl __P((struct ifnet *, 226 FXP_IOCTLCMD_TYPE, caddr_t)); 227static void fxp_init __P((void *)); 228static void fxp_stop __P((struct fxp_softc *)); 229static void fxp_watchdog __P((struct ifnet *)); 230static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *)); 231static int fxp_mdi_read __P((struct fxp_softc *, int, int)); 232static void fxp_mdi_write __P((struct fxp_softc *, int, int, int)); 233static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *, 234 int, int)); 235static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *)); 236static void fxp_stats_update __P((void *)); 237static void fxp_mc_setup __P((struct fxp_softc *)); 238 239/* 240 * Set initial transmit threshold at 64 (512 bytes). This is 241 * increased by 64 (512 bytes) at a time, to maximum of 192 242 * (1536 bytes), if an underrun occurs. 243 */ 244static int tx_threshold = 64; 245 246/* 247 * Number of transmit control blocks. This determines the number 248 * of transmit buffers that can be chained in the CB list. 249 * This must be a power of two. 250 */ 251#define FXP_NTXCB 128 252 253/* 254 * Number of completed TX commands at which point an interrupt 255 * will be generated to garbage collect the attached buffers. 256 * Must be at least one less than FXP_NTXCB, and should be 257 * enough less so that the transmitter doesn't becomes idle 258 * during the buffer rundown (which would reduce performance). 259 */ 260#define FXP_CXINT_THRESH 120 261 262/* 263 * TxCB list index mask. This is used to do list wrap-around. 264 */ 265#define FXP_TXCB_MASK (FXP_NTXCB - 1) 266 267/* 268 * Number of receive frame area buffers. These are large so chose 269 * wisely. 270 */ 271#define FXP_NRFABUFS 64 272 273/* 274 * Maximum number of seconds that the receiver can be idle before we 275 * assume it's dead and attempt to reset it by reprogramming the 276 * multicast filter. This is part of a work-around for a bug in the 277 * NIC. See fxp_stats_update(). 278 */ 279#define FXP_MAX_RX_IDLE 15 280 281/* 282 * Wait for the previous command to be accepted (but not necessarily 283 * completed). 284 */ 285static __inline void 286fxp_scb_wait(sc) 287 struct fxp_softc *sc; 288{ 289 int i = 10000; 290 291 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i); 292} 293 294/************************************************************* 295 * Operating system-specific autoconfiguration glue 296 *************************************************************/ 297 298#if defined(__NetBSD__) 299 300#ifdef __BROKEN_INDIRECT_CONFIG 301static int fxp_match __P((struct device *, void *, void *)); 302#else 303static int fxp_match __P((struct device *, struct cfdata *, void *)); 304#endif 305static void fxp_attach __P((struct device *, struct device *, void *)); 306 307static void fxp_shutdown __P((void *)); 308 309/* Compensate for lack of a generic ether_ioctl() */ 310static int fxp_ether_ioctl __P((struct ifnet *, 311 FXP_IOCTLCMD_TYPE, caddr_t)); 312#define ether_ioctl fxp_ether_ioctl 313 314struct cfattach fxp_ca = { 315 sizeof(struct fxp_softc), fxp_match, fxp_attach 316}; 317 318struct cfdriver fxp_cd = { 319 NULL, "fxp", DV_IFNET 320}; 321 322/* 323 * Check if a device is an 82557. 324 */ 325static int 326fxp_match(parent, match, aux) 327 struct device *parent; 328#ifdef __BROKEN_INDIRECT_CONFIG 329 void *match; 330#else 331 struct cfdata *match; 332#endif 333 void *aux; 334{ 335 struct pci_attach_args *pa = aux; 336 337 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 338 return (0); 339 340 switch (PCI_PRODUCT(pa->pa_id)) { 341 case PCI_PRODUCT_INTEL_82557: 342 return (1); 343 } 344 345 return (0); 346} 347 348static void 349fxp_attach(parent, self, aux) 350 struct device *parent, *self; 351 void *aux; 352{ 353 struct fxp_softc *sc = (struct fxp_softc *)self; 354 struct pci_attach_args *pa = aux; 355 pci_chipset_tag_t pc = pa->pa_pc; 356 pci_intr_handle_t ih; 357 const char *intrstr = NULL; 358 u_int8_t enaddr[6]; 359 struct ifnet *ifp; 360 361 /* 362 * Map control/status registers. 363 */ 364 if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0, 365 &sc->sc_st, &sc->sc_sh, NULL, NULL)) { 366 printf(": can't map registers\n"); 367 return; 368 } 369 printf(": Intel EtherExpress Pro 10/100B Ethernet\n"); 370 371 /* 372 * Allocate our interrupt. 373 */ 374 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 375 pa->pa_intrline, &ih)) { 376 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 377 return; 378 } 379 intrstr = pci_intr_string(pc, ih); 380 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 381 if (sc->sc_ih == NULL) { 382 printf("%s: couldn't establish interrupt", 383 sc->sc_dev.dv_xname); 384 if (intrstr != NULL) 385 printf(" at %s", intrstr); 386 printf("\n"); 387 return; 388 } 389 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 390 391 /* Do generic parts of attach. */ 392 if (fxp_attach_common(sc, enaddr)) { 393 /* Failed! */ 394 return; 395 } 396 397 printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname, 398 ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : ""); 399 400 ifp = &sc->sc_ethercom.ec_if; 401 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 402 ifp->if_softc = sc; 403 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 404 ifp->if_ioctl = fxp_ioctl; 405 ifp->if_start = fxp_start; 406 ifp->if_watchdog = fxp_watchdog; 407 408 /* 409 * Attach the interface. 410 */ 411 if_attach(ifp); 412 /* 413 * Let the system queue as many packets as we have available 414 * TX descriptors. 415 */ 416 ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1; 417 ether_ifattach(ifp, enaddr); 418#if NBPFILTER > 0 419 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 420 sizeof(struct ether_header)); 421#endif 422 423 /* 424 * Add shutdown hook so that DMA is disabled prior to reboot. Not 425 * doing do could allow DMA to corrupt kernel memory during the 426 * reboot before the driver initializes. 427 */ 428 shutdownhook_establish(fxp_shutdown, sc); 429} 430 431/* 432 * Device shutdown routine. Called at system shutdown after sync. The 433 * main purpose of this routine is to shut off receiver DMA so that 434 * kernel memory doesn't get clobbered during warmboot. 435 */ 436static void 437fxp_shutdown(sc) 438 void *sc; 439{ 440 fxp_stop((struct fxp_softc *) sc); 441} 442 443static int 444fxp_ether_ioctl(ifp, cmd, data) 445 struct ifnet *ifp; 446 FXP_IOCTLCMD_TYPE cmd; 447 caddr_t data; 448{ 449 struct ifaddr *ifa = (struct ifaddr *) data; 450 struct fxp_softc *sc = ifp->if_softc; 451 452 switch (cmd) { 453 case SIOCSIFADDR: 454 ifp->if_flags |= IFF_UP; 455 456 switch (ifa->ifa_addr->sa_family) { 457#ifdef INET 458 case AF_INET: 459 fxp_init(sc); 460 arp_ifinit(ifp, ifa); 461 break; 462#endif 463#ifdef NS 464 case AF_NS: 465 { 466 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 467 468 if (ns_nullhost(*ina)) 469 ina->x_host = *(union ns_host *) 470 LLADDR(ifp->if_sadl); 471 else 472 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 473 ifp->if_addrlen); 474 /* Set new address. */ 475 fxp_init(sc); 476 break; 477 } 478#endif 479 default: 480 fxp_init(sc); 481 break; 482 } 483 break; 484 485 default: 486 return (EINVAL); 487 } 488 489 return (0); 490} 491 492#else /* __FreeBSD__ */ 493 494static u_long fxp_count; 495static const char *fxp_probe __P((pcici_t, pcidi_t)); 496static void fxp_attach __P((pcici_t, int)); 497 498static void fxp_shutdown __P((int, void *)); 499 500static struct pci_device fxp_device = { 501 "fxp", 502 fxp_probe, 503 fxp_attach, 504 &fxp_count, 505 NULL 506}; 507DATA_SET(pcidevice_set, fxp_device); 508 509/* 510 * Return identification string if this is device is ours. 511 */ 512static const char * 513fxp_probe(config_id, device_id) 514 pcici_t config_id; 515 pcidi_t device_id; 516{ 517 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) && 518 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557) 519 return ("Intel EtherExpress Pro 10/100B Ethernet"); 520 521 return NULL; 522} 523 524static void 525fxp_attach(config_id, unit) 526 pcici_t config_id; 527 int unit; 528{ 529 struct fxp_softc *sc; 530 vm_offset_t pbase; 531 struct ifnet *ifp; 532 int s; 533 u_long val; 534 535 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT); 536 if (sc == NULL) 537 return; 538 bzero(sc, sizeof(struct fxp_softc)); 539 callout_handle_init(&sc->stat_ch); 540 541 s = splimp(); 542 543 /* 544 * Enable bus mastering. 545 */ 546 val = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG); 547 val |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 548 pci_conf_write(config_id, PCI_COMMAND_STATUS_REG, val); 549 550 /* 551 * Map control/status registers. 552 */ 553 if (!pci_map_mem(config_id, FXP_PCI_MMBA, 554 (vm_offset_t *)&sc->csr, &pbase)) { 555 printf("fxp%d: couldn't map memory\n", unit); 556 goto fail; 557 } 558 559 /* 560 * Allocate our interrupt. 561 */ 562 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) { 563 printf("fxp%d: couldn't map interrupt\n", unit); 564 goto fail; 565 } 566 567 /* Do generic parts of attach. */ 568 if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) { 569 /* Failed! */ 570 (void) pci_unmap_int(config_id); 571 goto fail; 572 } 573 574 printf("fxp%d: Ethernet address %6D%s\n", unit, 575 sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : ""); 576 577 ifp = &sc->arpcom.ac_if; 578 ifp->if_unit = unit; 579 ifp->if_name = "fxp"; 580 ifp->if_output = ether_output; 581 ifp->if_baudrate = 100000000; 582 ifp->if_init = fxp_init; 583 ifp->if_softc = sc; 584 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 585 ifp->if_ioctl = fxp_ioctl; 586 ifp->if_start = fxp_start; 587 ifp->if_watchdog = fxp_watchdog; 588 589 /* 590 * Attach the interface. 591 */ 592 if_attach(ifp); 593 /* 594 * Let the system queue as many packets as we have available 595 * TX descriptors. 596 */ 597 ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1; 598 ether_ifattach(ifp); 599#if NBPFILTER > 0 600 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 601#endif 602 603 /* 604 * Add shutdown hook so that DMA is disabled prior to reboot. Not 605 * doing do could allow DMA to corrupt kernel memory during the 606 * reboot before the driver initializes. 607 */ 608 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC); 609 610 splx(s); 611 return; 612 613 fail: 614 free(sc, M_DEVBUF); 615 splx(s); 616} 617 618/* 619 * Device shutdown routine. Called at system shutdown after sync. The 620 * main purpose of this routine is to shut off receiver DMA so that 621 * kernel memory doesn't get clobbered during warmboot. 622 */ 623static void 624fxp_shutdown(howto, sc) 625 int howto; 626 void *sc; 627{ 628 fxp_stop((struct fxp_softc *) sc); 629} 630 631#endif /* __NetBSD__ */ 632 633/************************************************************* 634 * End of operating system-specific autoconfiguration glue 635 *************************************************************/ 636 637/* 638 * Do generic parts of attach. 639 */ 640static int 641fxp_attach_common(sc, enaddr) 642 struct fxp_softc *sc; 643 u_int8_t *enaddr; 644{ 645 u_int16_t data; 646 int i, nmedia, defmedia; 647 const int *media; 648 649 /* 650 * Reset to a stable state. 651 */ 652 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 653 DELAY(10); 654 655 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB, 656 M_DEVBUF, M_NOWAIT); 657 if (sc->cbl_base == NULL) 658 goto fail; 659 bzero(sc->cbl_base, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 660 661 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT); 662 if (sc->fxp_stats == NULL) 663 goto fail; 664 bzero(sc->fxp_stats, sizeof(struct fxp_stats)); 665 666 sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT); 667 if (sc->mcsp == NULL) 668 goto fail; 669 670 /* 671 * Pre-allocate our receive buffers. 672 */ 673 for (i = 0; i < FXP_NRFABUFS; i++) { 674 if (fxp_add_rfabuf(sc, NULL) != 0) { 675 goto fail; 676 } 677 } 678 679 /* 680 * Get info about the primary PHY 681 */ 682 fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1); 683 sc->phy_primary_addr = data & 0xff; 684 sc->phy_primary_device = (data >> 8) & 0x3f; 685 sc->phy_10Mbps_only = data >> 15; 686 687 /* 688 * Read MAC address. 689 */ 690 fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3); 691 692 /* 693 * Initialize the media structures. 694 */ 695 696 media = fxp_media_default; 697 nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]); 698 defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA; 699 700 for (i = 0; i < NFXPMEDIA; i++) { 701 if (sc->phy_primary_device == fxp_media[i].fsm_phy) { 702 media = fxp_media[i].fsm_media; 703 nmedia = fxp_media[i].fsm_nmedia; 704 defmedia = fxp_media[i].fsm_defmedia; 705 } 706 } 707 708 ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus); 709 for (i = 0; i < nmedia; i++) { 710 if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only) 711 continue; 712 ifmedia_add(&sc->sc_media, media[i], 0, NULL); 713 } 714 ifmedia_set(&sc->sc_media, defmedia); 715 716 return (0); 717 718 fail: 719 printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc)); 720 if (sc->cbl_base) 721 free(sc->cbl_base, M_DEVBUF); 722 if (sc->fxp_stats) 723 free(sc->fxp_stats, M_DEVBUF); 724 if (sc->mcsp) 725 free(sc->mcsp, M_DEVBUF); 726 /* frees entire chain */ 727 if (sc->rfa_headm) 728 m_freem(sc->rfa_headm); 729 730 return (ENOMEM); 731} 732 733/* 734 * Read from the serial EEPROM. Basically, you manually shift in 735 * the read opcode (one bit at a time) and then shift in the address, 736 * and then you shift out the data (all of this one bit at a time). 737 * The word size is 16 bits, so you have to provide the address for 738 * every 16 bits of data. 739 */ 740static void 741fxp_read_eeprom(sc, data, offset, words) 742 struct fxp_softc *sc; 743 u_short *data; 744 int offset; 745 int words; 746{ 747 u_int16_t reg; 748 int i, x; 749 750 for (i = 0; i < words; i++) { 751 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 752 /* 753 * Shift in read opcode. 754 */ 755 for (x = 3; x > 0; x--) { 756 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { 757 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 758 } else { 759 reg = FXP_EEPROM_EECS; 760 } 761 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 762 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 763 reg | FXP_EEPROM_EESK); 764 DELAY(1); 765 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 766 DELAY(1); 767 } 768 /* 769 * Shift in address. 770 */ 771 for (x = 6; x > 0; x--) { 772 if ((i + offset) & (1 << (x - 1))) { 773 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 774 } else { 775 reg = FXP_EEPROM_EECS; 776 } 777 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 778 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 779 reg | FXP_EEPROM_EESK); 780 DELAY(1); 781 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 782 DELAY(1); 783 } 784 reg = FXP_EEPROM_EECS; 785 data[i] = 0; 786 /* 787 * Shift out data. 788 */ 789 for (x = 16; x > 0; x--) { 790 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 791 reg | FXP_EEPROM_EESK); 792 DELAY(1); 793 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & 794 FXP_EEPROM_EEDO) 795 data[i] |= (1 << (x - 1)); 796 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 797 DELAY(1); 798 } 799 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 800 DELAY(1); 801 } 802} 803 804/* 805 * Start packet transmission on the interface. 806 */ 807static void 808fxp_start(ifp) 809 struct ifnet *ifp; 810{ 811 struct fxp_softc *sc = ifp->if_softc; 812 struct fxp_cb_tx *txp; 813 814 /* 815 * See if we need to suspend xmit until the multicast filter 816 * has been reprogrammed (which can only be done at the head 817 * of the command chain). 818 */ 819 if (sc->need_mcsetup) 820 return; 821 822 txp = NULL; 823 824 /* 825 * We're finished if there is nothing more to add to the list or if 826 * we're all filled up with buffers to transmit. 827 * NOTE: One TxCB is reserved to guarantee that fxp_mc_setup() can add 828 * a NOP command when needed. 829 */ 830 while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB - 1) { 831 struct mbuf *m, *mb_head; 832 int segment; 833 834 /* 835 * Grab a packet to transmit. 836 */ 837 IF_DEQUEUE(&ifp->if_snd, mb_head); 838 839 /* 840 * Get pointer to next available tx desc. 841 */ 842 txp = sc->cbl_last->next; 843 844 /* 845 * Go through each of the mbufs in the chain and initialize 846 * the transmit buffer descriptors with the physical address 847 * and size of the mbuf. 848 */ 849tbdinit: 850 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 851 if (m->m_len != 0) { 852 if (segment == FXP_NTXSEG) 853 break; 854 txp->tbd[segment].tb_addr = 855 vtophys(mtod(m, vm_offset_t)); 856 txp->tbd[segment].tb_size = m->m_len; 857 segment++; 858 } 859 } 860 if (m != NULL) { 861 struct mbuf *mn; 862 863 /* 864 * We ran out of segments. We have to recopy this mbuf 865 * chain first. Bail out if we can't get the new buffers. 866 */ 867 MGETHDR(mn, M_DONTWAIT, MT_DATA); 868 if (mn == NULL) { 869 m_freem(mb_head); 870 break; 871 } 872 if (mb_head->m_pkthdr.len > MHLEN) { 873 MCLGET(mn, M_DONTWAIT); 874 if ((mn->m_flags & M_EXT) == 0) { 875 m_freem(mn); 876 m_freem(mb_head); 877 break; 878 } 879 } 880 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 881 mtod(mn, caddr_t)); 882 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 883 m_freem(mb_head); 884 mb_head = mn; 885 goto tbdinit; 886 } 887 888 txp->tbd_number = segment; 889 txp->mb_head = mb_head; 890 txp->cb_status = 0; 891 if (sc->tx_queued != FXP_CXINT_THRESH - 1) { 892 txp->cb_command = 893 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S; 894 } else { 895 txp->cb_command = 896 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 897 /* 898 * Set a 5 second timer just in case we don't hear from the 899 * card again. 900 */ 901 ifp->if_timer = 5; 902 } 903 txp->tx_threshold = tx_threshold; 904 905 /* 906 * Advance the end of list forward. 907 */ 908 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 909 sc->cbl_last = txp; 910 911 /* 912 * Advance the beginning of the list forward if there are 913 * no other packets queued (when nothing is queued, cbl_first 914 * sits on the last TxCB that was sent out). 915 */ 916 if (sc->tx_queued == 0) 917 sc->cbl_first = txp; 918 919 sc->tx_queued++; 920 921#if NBPFILTER > 0 922 /* 923 * Pass packet to bpf if there is a listener. 924 */ 925 if (ifp->if_bpf) 926 bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head); 927#endif 928 } 929 930 /* 931 * We're finished. If we added to the list, issue a RESUME to get DMA 932 * going again if suspended. 933 */ 934 if (txp != NULL) { 935 fxp_scb_wait(sc); 936 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); 937 } 938} 939 940/* 941 * Process interface interrupts. 942 */ 943static FXP_INTR_TYPE 944fxp_intr(arg) 945 void *arg; 946{ 947 struct fxp_softc *sc = arg; 948 struct ifnet *ifp = &sc->sc_if; 949 u_int8_t statack; 950#if defined(__NetBSD__) 951 int claimed = 0; 952#endif 953 954 while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { 955#if defined(__NetBSD__) 956 claimed = 1; 957#endif 958 /* 959 * First ACK all the interrupts in this pass. 960 */ 961 CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack); 962 963 /* 964 * Free any finished transmit mbuf chains. 965 */ 966 if (statack & FXP_SCB_STATACK_CXTNO) { 967 struct fxp_cb_tx *txp; 968 969 for (txp = sc->cbl_first; sc->tx_queued && 970 (txp->cb_status & FXP_CB_STATUS_C) != 0; 971 txp = txp->next) { 972 if (txp->mb_head != NULL) { 973 m_freem(txp->mb_head); 974 txp->mb_head = NULL; 975 } 976 sc->tx_queued--; 977 } 978 sc->cbl_first = txp; 979 ifp->if_timer = 0; 980 if (sc->tx_queued == 0) { 981 if (sc->need_mcsetup) 982 fxp_mc_setup(sc); 983 } 984 /* 985 * Try to start more packets transmitting. 986 */ 987 if (ifp->if_snd.ifq_head != NULL) 988 fxp_start(ifp); 989 } 990 /* 991 * Process receiver interrupts. If a no-resource (RNR) 992 * condition exists, get whatever packets we can and 993 * re-start the receiver. 994 */ 995 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) { 996 struct mbuf *m; 997 struct fxp_rfa *rfa; 998rcvloop: 999 m = sc->rfa_headm; 1000 rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + 1001 RFA_ALIGNMENT_FUDGE); 1002 1003 if (rfa->rfa_status & FXP_RFA_STATUS_C) { 1004 /* 1005 * Remove first packet from the chain. 1006 */ 1007 sc->rfa_headm = m->m_next; 1008 m->m_next = NULL; 1009 1010 /* 1011 * Add a new buffer to the receive chain. 1012 * If this fails, the old buffer is recycled 1013 * instead. 1014 */ 1015 if (fxp_add_rfabuf(sc, m) == 0) { 1016 struct ether_header *eh; 1017 u_int16_t total_len; 1018 1019 total_len = rfa->actual_size & 1020 (MCLBYTES - 1); 1021 if (total_len < 1022 sizeof(struct ether_header)) { 1023 m_freem(m); 1024 goto rcvloop; 1025 } 1026 m->m_pkthdr.rcvif = ifp; 1027 m->m_pkthdr.len = m->m_len = 1028 total_len ; 1029 eh = mtod(m, struct ether_header *); 1030#if NBPFILTER > 0 1031 if (ifp->if_bpf) 1032 bpf_tap(FXP_BPFTAP_ARG(ifp), 1033 mtod(m, caddr_t), 1034 total_len); 1035#endif /* NBPFILTER > 0 */ 1036#ifdef BRIDGE 1037 if (do_bridge) { 1038 struct ifnet *bdg_ifp ; 1039 bdg_ifp = bridge_in(m); 1040 if (bdg_ifp == BDG_DROP) 1041 goto dropit ; 1042 if (bdg_ifp != BDG_LOCAL) 1043 bdg_forward(&m, bdg_ifp); 1044 if (bdg_ifp != BDG_LOCAL && 1045 bdg_ifp != BDG_BCAST && 1046 bdg_ifp != BDG_MCAST) 1047 goto dropit ; 1048 goto getit ; 1049 } 1050#endif 1051 /* 1052 * Only pass this packet up 1053 * if it is for us. 1054 */ 1055 if ((ifp->if_flags & 1056 IFF_PROMISC) && 1057 (rfa->rfa_status & 1058 FXP_RFA_STATUS_IAMATCH) && 1059 (eh->ether_dhost[0] & 1) 1060 == 0) { 1061dropit: 1062 if (m) 1063 m_freem(m); 1064 goto rcvloop; 1065 } 1066getit: 1067 m->m_data += 1068 sizeof(struct ether_header); 1069 m->m_len -= 1070 sizeof(struct ether_header); 1071 m->m_pkthdr.len = m->m_len ; 1072 ether_input(ifp, eh, m); 1073 } 1074 goto rcvloop; 1075 } 1076 if (statack & FXP_SCB_STATACK_RNR) { 1077 fxp_scb_wait(sc); 1078 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1079 vtophys(sc->rfa_headm->m_ext.ext_buf) + 1080 RFA_ALIGNMENT_FUDGE); 1081 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1082 FXP_SCB_COMMAND_RU_START); 1083 } 1084 } 1085 } 1086#if defined(__NetBSD__) 1087 return (claimed); 1088#endif 1089} 1090 1091/* 1092 * Update packet in/out/collision statistics. The i82557 doesn't 1093 * allow you to access these counters without doing a fairly 1094 * expensive DMA to get _all_ of the statistics it maintains, so 1095 * we do this operation here only once per second. The statistics 1096 * counters in the kernel are updated from the previous dump-stats 1097 * DMA and then a new dump-stats DMA is started. The on-chip 1098 * counters are zeroed when the DMA completes. If we can't start 1099 * the DMA immediately, we don't wait - we just prepare to read 1100 * them again next time. 1101 */ 1102static void 1103fxp_stats_update(arg) 1104 void *arg; 1105{ 1106 struct fxp_softc *sc = arg; 1107 struct ifnet *ifp = &sc->sc_if; 1108 struct fxp_stats *sp = sc->fxp_stats; 1109 struct fxp_cb_tx *txp; 1110 int s; 1111 1112 ifp->if_opackets += sp->tx_good; 1113 ifp->if_collisions += sp->tx_total_collisions; 1114 if (sp->rx_good) { 1115 ifp->if_ipackets += sp->rx_good; 1116 sc->rx_idle_secs = 0; 1117 } else { 1118 /* 1119 * Receiver's been idle for another second. 1120 */ 1121 sc->rx_idle_secs++; 1122 } 1123 ifp->if_ierrors += 1124 sp->rx_crc_errors + 1125 sp->rx_alignment_errors + 1126 sp->rx_rnr_errors + 1127 sp->rx_overrun_errors; 1128 /* 1129 * If any transmit underruns occured, bump up the transmit 1130 * threshold by another 512 bytes (64 * 8). 1131 */ 1132 if (sp->tx_underruns) { 1133 ifp->if_oerrors += sp->tx_underruns; 1134 if (tx_threshold < 192) 1135 tx_threshold += 64; 1136 } 1137 s = splimp(); 1138 /* 1139 * Release any xmit buffers that have completed DMA. This isn't 1140 * strictly necessary to do here, but it's advantagous for mbufs 1141 * with external storage to be released in a timely manner rather 1142 * than being defered for a potentially long time. This limits 1143 * the delay to a maximum of one second. 1144 */ 1145 for (txp = sc->cbl_first; sc->tx_queued && 1146 (txp->cb_status & FXP_CB_STATUS_C) != 0; 1147 txp = txp->next) { 1148 if (txp->mb_head != NULL) { 1149 m_freem(txp->mb_head); 1150 txp->mb_head = NULL; 1151 } 1152 sc->tx_queued--; 1153 } 1154 sc->cbl_first = txp; 1155 /* 1156 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1157 * then assume the receiver has locked up and attempt to clear 1158 * the condition by reprogramming the multicast filter. This is 1159 * a work-around for a bug in the 82557 where the receiver locks 1160 * up if it gets certain types of garbage in the syncronization 1161 * bits prior to the packet header. This bug is supposed to only 1162 * occur in 10Mbps mode, but has been seen to occur in 100Mbps 1163 * mode as well (perhaps due to a 10/100 speed transition). 1164 */ 1165 if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { 1166 sc->rx_idle_secs = 0; 1167 fxp_mc_setup(sc); 1168 } 1169 /* 1170 * If there is no pending command, start another stats 1171 * dump. Otherwise punt for now. 1172 */ 1173 if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { 1174 /* 1175 * Start another stats dump. 1176 */ 1177 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1178 FXP_SCB_COMMAND_CU_DUMPRESET); 1179 } else { 1180 /* 1181 * A previous command is still waiting to be accepted. 1182 * Just zero our copy of the stats and wait for the 1183 * next timer event to update them. 1184 */ 1185 sp->tx_good = 0; 1186 sp->tx_underruns = 0; 1187 sp->tx_total_collisions = 0; 1188 1189 sp->rx_good = 0; 1190 sp->rx_crc_errors = 0; 1191 sp->rx_alignment_errors = 0; 1192 sp->rx_rnr_errors = 0; 1193 sp->rx_overrun_errors = 0; 1194 } 1195 splx(s); 1196 /* 1197 * Schedule another timeout one second from now. 1198 */ 1199 sc->stat_ch = timeout(fxp_stats_update, sc, hz); 1200} 1201 1202/* 1203 * Stop the interface. Cancels the statistics updater and resets 1204 * the interface. 1205 */ 1206static void 1207fxp_stop(sc) 1208 struct fxp_softc *sc; 1209{ 1210 struct ifnet *ifp = &sc->sc_if; 1211 struct fxp_cb_tx *txp; 1212 int i; 1213 1214 /* 1215 * Cancel stats updater. 1216 */ 1217 untimeout(fxp_stats_update, sc, sc->stat_ch); 1218 1219 /* 1220 * Issue software reset 1221 */ 1222 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 1223 DELAY(10); 1224 1225 /* 1226 * Release any xmit buffers. 1227 */ 1228 txp = sc->cbl_base; 1229 if (txp != NULL) { 1230 for (i = 0; i < FXP_NTXCB; i++) { 1231 if (txp[i].mb_head != NULL) { 1232 m_freem(txp[i].mb_head); 1233 txp[i].mb_head = NULL; 1234 } 1235 } 1236 } 1237 sc->tx_queued = 0; 1238 1239 /* 1240 * Free all the receive buffers then reallocate/reinitialize 1241 */ 1242 if (sc->rfa_headm != NULL) 1243 m_freem(sc->rfa_headm); 1244 sc->rfa_headm = NULL; 1245 sc->rfa_tailm = NULL; 1246 for (i = 0; i < FXP_NRFABUFS; i++) { 1247 if (fxp_add_rfabuf(sc, NULL) != 0) { 1248 /* 1249 * This "can't happen" - we're at splimp() 1250 * and we just freed all the buffers we need 1251 * above. 1252 */ 1253 panic("fxp_stop: no buffers!"); 1254 } 1255 } 1256 1257 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1258 ifp->if_timer = 0; 1259} 1260 1261/* 1262 * Watchdog/transmission transmit timeout handler. Called when a 1263 * transmission is started on the interface, but no interrupt is 1264 * received before the timeout. This usually indicates that the 1265 * card has wedged for some reason. 1266 */ 1267static void 1268fxp_watchdog(ifp) 1269 struct ifnet *ifp; 1270{ 1271 struct fxp_softc *sc = ifp->if_softc; 1272 1273 printf(FXP_FORMAT ": device timeout\n", FXP_ARGS(sc)); 1274 ifp->if_oerrors++; 1275 1276 fxp_init(sc); 1277} 1278 1279static void 1280fxp_init(xsc) 1281 void *xsc; 1282{ 1283 struct fxp_softc *sc = xsc; 1284 struct ifnet *ifp = &sc->sc_if; 1285 struct fxp_cb_config *cbp; 1286 struct fxp_cb_ias *cb_ias; 1287 struct fxp_cb_tx *txp; 1288 int i, s, prm; 1289 1290 s = splimp(); 1291 /* 1292 * Cancel any pending I/O 1293 */ 1294 fxp_stop(sc); 1295 1296 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 1297 1298 /* 1299 * Initialize base of CBL and RFA memory. Loading with zero 1300 * sets it up for regular linear addressing. 1301 */ 1302 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); 1303 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE); 1304 1305 fxp_scb_wait(sc); 1306 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE); 1307 1308 /* 1309 * Initialize base of dump-stats buffer. 1310 */ 1311 fxp_scb_wait(sc); 1312 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats)); 1313 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR); 1314 1315 /* 1316 * We temporarily use memory that contains the TxCB list to 1317 * construct the config CB. The TxCB list memory is rebuilt 1318 * later. 1319 */ 1320 cbp = (struct fxp_cb_config *) sc->cbl_base; 1321 1322 /* 1323 * This bcopy is kind of disgusting, but there are a bunch of must be 1324 * zero and must be one bits in this structure and this is the easiest 1325 * way to initialize them all to proper values. 1326 */ 1327 bcopy(fxp_cb_config_template, (volatile void *)&cbp->cb_status, 1328 sizeof(fxp_cb_config_template)); 1329 1330 cbp->cb_status = 0; 1331 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 1332 cbp->link_addr = -1; /* (no) next command */ 1333 cbp->byte_count = 22; /* (22) bytes to config */ 1334 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 1335 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 1336 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 1337 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 1338 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 1339 cbp->dma_bce = 0; /* (disable) dma max counters */ 1340 cbp->late_scb = 0; /* (don't) defer SCB update */ 1341 cbp->tno_int = 0; /* (disable) tx not okay interrupt */ 1342 cbp->ci_int = 1; /* interrupt on CU idle */ 1343 cbp->save_bf = prm; /* save bad frames */ 1344 cbp->disc_short_rx = !prm; /* discard short packets */ 1345 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */ 1346 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */ 1347 cbp->nsai = 1; /* (don't) disable source addr insert */ 1348 cbp->preamble_length = 2; /* (7 byte) preamble */ 1349 cbp->loopback = 0; /* (don't) loopback */ 1350 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 1351 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 1352 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 1353 cbp->promiscuous = prm; /* promiscuous mode */ 1354 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 1355 cbp->crscdt = 0; /* (CRS only) */ 1356 cbp->stripping = !prm; /* truncate rx packet to byte count */ 1357 cbp->padding = 1; /* (do) pad short tx packets */ 1358 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 1359 cbp->force_fdx = 0; /* (don't) force full duplex */ 1360 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 1361 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 1362 cbp->mc_all = sc->all_mcasts;/* accept all multicasts */ 1363 1364 /* 1365 * Start the config command/DMA. 1366 */ 1367 fxp_scb_wait(sc); 1368 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status)); 1369 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1370 /* ...and wait for it to complete. */ 1371 while (!(cbp->cb_status & FXP_CB_STATUS_C)); 1372 1373 /* 1374 * Now initialize the station address. Temporarily use the TxCB 1375 * memory area like we did above for the config CB. 1376 */ 1377 cb_ias = (struct fxp_cb_ias *) sc->cbl_base; 1378 cb_ias->cb_status = 0; 1379 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 1380 cb_ias->link_addr = -1; 1381#if defined(__NetBSD__) 1382 bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6); 1383#else 1384 bcopy(sc->arpcom.ac_enaddr, (volatile void *)cb_ias->macaddr, 1385 sizeof(sc->arpcom.ac_enaddr)); 1386#endif /* __NetBSD__ */ 1387 1388 /* 1389 * Start the IAS (Individual Address Setup) command/DMA. 1390 */ 1391 fxp_scb_wait(sc); 1392 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1393 /* ...and wait for it to complete. */ 1394 while (!(cb_ias->cb_status & FXP_CB_STATUS_C)); 1395 1396 /* 1397 * Initialize transmit control block (TxCB) list. 1398 */ 1399 1400 txp = sc->cbl_base; 1401 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 1402 for (i = 0; i < FXP_NTXCB; i++) { 1403 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; 1404 txp[i].cb_command = FXP_CB_COMMAND_NOP; 1405 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status); 1406 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]); 1407 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK]; 1408 } 1409 /* 1410 * Set the suspend flag on the first TxCB and start the control 1411 * unit. It will execute the NOP and then suspend. 1412 */ 1413 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; 1414 sc->cbl_first = sc->cbl_last = txp; 1415 sc->tx_queued = 1; 1416 1417 fxp_scb_wait(sc); 1418 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1419 1420 /* 1421 * Initialize receiver buffer area - RFA. 1422 */ 1423 fxp_scb_wait(sc); 1424 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1425 vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE); 1426 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START); 1427 1428 /* 1429 * Set current media. 1430 */ 1431 fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media); 1432 1433 ifp->if_flags |= IFF_RUNNING; 1434 ifp->if_flags &= ~IFF_OACTIVE; 1435 splx(s); 1436 1437 /* 1438 * Start stats updater. 1439 */ 1440 sc->stat_ch = timeout(fxp_stats_update, sc, hz); 1441} 1442 1443static void 1444fxp_set_media(sc, media) 1445 struct fxp_softc *sc; 1446 int media; 1447{ 1448 1449 switch (sc->phy_primary_device) { 1450 case FXP_PHY_DP83840: 1451 case FXP_PHY_DP83840A: 1452 fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR, 1453 fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) | 1454 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */ 1455 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */ 1456 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */ 1457 /* fall through */ 1458 case FXP_PHY_82553A: 1459 case FXP_PHY_82553C: /* untested */ 1460 case FXP_PHY_82555: 1461 case FXP_PHY_82555B: 1462 if (IFM_SUBTYPE(media) != IFM_AUTO) { 1463 int flags; 1464 1465 flags = (IFM_SUBTYPE(media) == IFM_100_TX) ? 1466 FXP_PHY_BMCR_SPEED_100M : 0; 1467 flags |= (media & IFM_FDX) ? 1468 FXP_PHY_BMCR_FULLDUPLEX : 0; 1469 fxp_mdi_write(sc, sc->phy_primary_addr, 1470 FXP_PHY_BMCR, 1471 (fxp_mdi_read(sc, sc->phy_primary_addr, 1472 FXP_PHY_BMCR) & 1473 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M | 1474 FXP_PHY_BMCR_FULLDUPLEX)) | flags); 1475 } else { 1476 fxp_mdi_write(sc, sc->phy_primary_addr, 1477 FXP_PHY_BMCR, 1478 (fxp_mdi_read(sc, sc->phy_primary_addr, 1479 FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN)); 1480 } 1481 break; 1482 /* 1483 * The Seeq 80c24 doesn't have a PHY programming interface, so do 1484 * nothing. 1485 */ 1486 case FXP_PHY_80C24: 1487 break; 1488 default: 1489 printf(FXP_FORMAT 1490 ": warning: unsupported PHY, type = %d, addr = %d\n", 1491 FXP_ARGS(sc), sc->phy_primary_device, 1492 sc->phy_primary_addr); 1493 } 1494} 1495 1496/* 1497 * Change media according to request. 1498 */ 1499int 1500fxp_mediachange(ifp) 1501 struct ifnet *ifp; 1502{ 1503 struct fxp_softc *sc = ifp->if_softc; 1504 struct ifmedia *ifm = &sc->sc_media; 1505 1506 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1507 return (EINVAL); 1508 1509 fxp_set_media(sc, ifm->ifm_media); 1510 return (0); 1511} 1512 1513/* 1514 * Notify the world which media we're using. 1515 */ 1516void 1517fxp_mediastatus(ifp, ifmr) 1518 struct ifnet *ifp; 1519 struct ifmediareq *ifmr; 1520{ 1521 struct fxp_softc *sc = ifp->if_softc; 1522 int flags, stsflags; 1523 1524 switch (sc->phy_primary_device) { 1525 case FXP_PHY_82555: 1526 case FXP_PHY_82555B: 1527 case FXP_PHY_DP83840: 1528 case FXP_PHY_DP83840A: 1529 ifmr->ifm_status = IFM_AVALID; /* IFM_ACTIVE will be valid */ 1530 ifmr->ifm_active = IFM_ETHER; 1531 /* 1532 * the following is not an error. 1533 * You need to read this register twice to get current 1534 * status. This is correct documented behaviour, the 1535 * first read gets latched values. 1536 */ 1537 stsflags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_STS); 1538 stsflags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_STS); 1539 if (stsflags & FXP_PHY_STS_LINK_STS) 1540 ifmr->ifm_status |= IFM_ACTIVE; 1541 1542 /* 1543 * If we are in auto mode, then try report the result. 1544 */ 1545 flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR); 1546 if (flags & FXP_PHY_BMCR_AUTOEN) { 1547 ifmr->ifm_active |= IFM_AUTO; /* XXX presently 0 */ 1548 if (stsflags & FXP_PHY_STS_AUTO_DONE) { 1549 /* 1550 * Intel and National parts report 1551 * differently on what they found. 1552 */ 1553 if ((sc->phy_primary_device == FXP_PHY_82555) 1554 || (sc->phy_primary_device == FXP_PHY_82555B)) { 1555 flags = fxp_mdi_read(sc, 1556 sc->phy_primary_addr, 1557 FXP_PHY_USC); 1558 1559 if (flags & FXP_PHY_USC_SPEED) 1560 ifmr->ifm_active |= IFM_100_TX; 1561 else 1562 ifmr->ifm_active |= IFM_10_T; 1563 1564 if (flags & FXP_PHY_USC_DUPLEX) 1565 ifmr->ifm_active |= IFM_FDX; 1566 } else { /* it's National. only know speed */ 1567 flags = fxp_mdi_read(sc, 1568 sc->phy_primary_addr, 1569 FXP_DP83840_PAR); 1570 1571 if (flags & FXP_DP83840_PAR_SPEED_10) 1572 ifmr->ifm_active |= IFM_10_T; 1573 else 1574 ifmr->ifm_active |= IFM_100_TX; 1575 } 1576 } 1577 } else { /* in manual mode.. just report what we were set to */ 1578 if (flags & FXP_PHY_BMCR_SPEED_100M) 1579 ifmr->ifm_active |= IFM_100_TX; 1580 else 1581 ifmr->ifm_active |= IFM_10_T; 1582 1583 if (flags & FXP_PHY_BMCR_FULLDUPLEX) 1584 ifmr->ifm_active |= IFM_FDX; 1585 } 1586 break; 1587 1588 case FXP_PHY_80C24: 1589 default: 1590 ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */ 1591 } 1592} 1593 1594/* 1595 * Add a buffer to the end of the RFA buffer list. 1596 * Return 0 if successful, 1 for failure. A failure results in 1597 * adding the 'oldm' (if non-NULL) on to the end of the list - 1598 * tossing out its old contents and recycling it. 1599 * The RFA struct is stuck at the beginning of mbuf cluster and the 1600 * data pointer is fixed up to point just past it. 1601 */ 1602static int 1603fxp_add_rfabuf(sc, oldm) 1604 struct fxp_softc *sc; 1605 struct mbuf *oldm; 1606{ 1607 u_int32_t v; 1608 struct mbuf *m; 1609 struct fxp_rfa *rfa, *p_rfa; 1610 1611 MGETHDR(m, M_DONTWAIT, MT_DATA); 1612 if (m != NULL) { 1613 MCLGET(m, M_DONTWAIT); 1614 if ((m->m_flags & M_EXT) == 0) { 1615 m_freem(m); 1616 if (oldm == NULL) 1617 return 1; 1618 m = oldm; 1619 m->m_data = m->m_ext.ext_buf; 1620 } 1621 } else { 1622 if (oldm == NULL) 1623 return 1; 1624 m = oldm; 1625 m->m_data = m->m_ext.ext_buf; 1626 } 1627 1628 /* 1629 * Move the data pointer up so that the incoming data packet 1630 * will be 32-bit aligned. 1631 */ 1632 m->m_data += RFA_ALIGNMENT_FUDGE; 1633 1634 /* 1635 * Get a pointer to the base of the mbuf cluster and move 1636 * data start past it. 1637 */ 1638 rfa = mtod(m, struct fxp_rfa *); 1639 m->m_data += sizeof(struct fxp_rfa); 1640 rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE; 1641 1642 /* 1643 * Initialize the rest of the RFA. Note that since the RFA 1644 * is misaligned, we cannot store values directly. Instead, 1645 * we use an optimized, inline copy. 1646 */ 1647 rfa->rfa_status = 0; 1648 rfa->rfa_control = FXP_RFA_CONTROL_EL; 1649 rfa->actual_size = 0; 1650 1651 v = -1; 1652 fxp_lwcopy(&v, &rfa->link_addr); 1653 fxp_lwcopy(&v, &rfa->rbd_addr); 1654 1655 /* 1656 * If there are other buffers already on the list, attach this 1657 * one to the end by fixing up the tail to point to this one. 1658 */ 1659 if (sc->rfa_headm != NULL) { 1660 p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf + 1661 RFA_ALIGNMENT_FUDGE); 1662 sc->rfa_tailm->m_next = m; 1663 v = vtophys(rfa); 1664 fxp_lwcopy(&v, &p_rfa->link_addr); 1665 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL; 1666 } else { 1667 sc->rfa_headm = m; 1668 } 1669 sc->rfa_tailm = m; 1670 1671 return (m == oldm); 1672} 1673 1674static volatile int 1675fxp_mdi_read(sc, phy, reg) 1676 struct fxp_softc *sc; 1677 int phy; 1678 int reg; 1679{ 1680 int count = 10000; 1681 int value; 1682 1683 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1684 (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21)); 1685 1686 while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 1687 && count--) 1688 DELAY(10); 1689 1690 if (count <= 0) 1691 printf(FXP_FORMAT ": fxp_mdi_read: timed out\n", 1692 FXP_ARGS(sc)); 1693 1694 return (value & 0xffff); 1695} 1696 1697static void 1698fxp_mdi_write(sc, phy, reg, value) 1699 struct fxp_softc *sc; 1700 int phy; 1701 int reg; 1702 int value; 1703{ 1704 int count = 10000; 1705 1706 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1707 (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | 1708 (value & 0xffff)); 1709 1710 while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && 1711 count--) 1712 DELAY(10); 1713 1714 if (count <= 0) 1715 printf(FXP_FORMAT ": fxp_mdi_write: timed out\n", 1716 FXP_ARGS(sc)); 1717} 1718 1719static int 1720fxp_ioctl(ifp, command, data) 1721 struct ifnet *ifp; 1722 FXP_IOCTLCMD_TYPE command; 1723 caddr_t data; 1724{ 1725 struct fxp_softc *sc = ifp->if_softc; 1726 struct ifreq *ifr = (struct ifreq *)data; 1727 int s, error = 0; 1728 1729 s = splimp(); 1730 1731 switch (command) { 1732 1733 case SIOCSIFADDR: 1734#if !defined(__NetBSD__) 1735 case SIOCGIFADDR: 1736 case SIOCSIFMTU: 1737#endif 1738 error = ether_ioctl(ifp, command, data); 1739 break; 1740 1741 case SIOCSIFFLAGS: 1742 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1743 1744 /* 1745 * If interface is marked up and not running, then start it. 1746 * If it is marked down and running, stop it. 1747 * XXX If it's up then re-initialize it. This is so flags 1748 * such as IFF_PROMISC are handled. 1749 */ 1750 if (ifp->if_flags & IFF_UP) { 1751 fxp_init(sc); 1752 } else { 1753 if (ifp->if_flags & IFF_RUNNING) 1754 fxp_stop(sc); 1755 } 1756 break; 1757 1758 case SIOCADDMULTI: 1759 case SIOCDELMULTI: 1760 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1761#if defined(__NetBSD__) 1762 error = (command == SIOCADDMULTI) ? 1763 ether_addmulti(ifr, &sc->sc_ethercom) : 1764 ether_delmulti(ifr, &sc->sc_ethercom); 1765 1766 if (error == ENETRESET) { 1767 /* 1768 * Multicast list has changed; set the hardware 1769 * filter accordingly. 1770 */ 1771 if (!sc->all_mcasts) 1772 fxp_mc_setup(sc); 1773 /* 1774 * fxp_mc_setup() can turn on all_mcasts if we run 1775 * out of space, so check it again rather than else {}. 1776 */ 1777 if (sc->all_mcasts) 1778 fxp_init(sc); 1779 error = 0; 1780 } 1781#else /* __FreeBSD__ */ 1782 /* 1783 * Multicast list has changed; set the hardware filter 1784 * accordingly. 1785 */ 1786 if (!sc->all_mcasts) 1787 fxp_mc_setup(sc); 1788 /* 1789 * fxp_mc_setup() can turn on sc->all_mcasts, so check it 1790 * again rather than else {}. 1791 */ 1792 if (sc->all_mcasts) 1793 fxp_init(sc); 1794 error = 0; 1795#endif /* __NetBSD__ */ 1796 break; 1797 1798 case SIOCSIFMEDIA: 1799 case SIOCGIFMEDIA: 1800 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); 1801 break; 1802 1803 default: 1804 error = EINVAL; 1805 } 1806 (void) splx(s); 1807 return (error); 1808} 1809 1810/* 1811 * Program the multicast filter. 1812 * 1813 * We have an artificial restriction that the multicast setup command 1814 * must be the first command in the chain, so we take steps to ensure 1815 * this. By requiring this, it allows us to keep up the performance of 1816 * the pre-initialized command ring (esp. link pointers) by not actually 1817 * inserting the mcsetup command in the ring - i.e. its link pointer 1818 * points to the TxCB ring, but the mcsetup descriptor itself is not part 1819 * of it. We then can do 'CU_START' on the mcsetup descriptor and have it 1820 * lead into the regular TxCB ring when it completes. 1821 * 1822 * This function must be called at splimp. 1823 */ 1824static void 1825fxp_mc_setup(sc) 1826 struct fxp_softc *sc; 1827{ 1828 struct fxp_cb_mcs *mcsp = sc->mcsp; 1829 struct ifnet *ifp = &sc->sc_if; 1830 struct ifmultiaddr *ifma; 1831 int nmcasts; 1832 1833 /* 1834 * If there are queued commands, we must wait until they are all 1835 * completed. If we are already waiting, then add a NOP command 1836 * with interrupt option so that we're notified when all commands 1837 * have been completed - fxp_start() ensures that no additional 1838 * TX commands will be added when need_mcsetup is true. 1839 */ 1840 if (sc->tx_queued) { 1841 struct fxp_cb_tx *txp; 1842 1843 /* 1844 * need_mcsetup will be true if we are already waiting for the 1845 * NOP command to be completed (see below). In this case, bail. 1846 */ 1847 if (sc->need_mcsetup) 1848 return; 1849 sc->need_mcsetup = 1; 1850 1851 /* 1852 * Add a NOP command with interrupt so that we are notified when all 1853 * TX commands have been processed. 1854 */ 1855 txp = sc->cbl_last->next; 1856 txp->mb_head = NULL; 1857 txp->cb_status = 0; 1858 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 1859 /* 1860 * Advance the end of list forward. 1861 */ 1862 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 1863 sc->cbl_last = txp; 1864 sc->tx_queued++; 1865 /* 1866 * Issue a resume in case the CU has just suspended. 1867 */ 1868 fxp_scb_wait(sc); 1869 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); 1870 /* 1871 * Set a 5 second timer just in case we don't hear from the 1872 * card again. 1873 */ 1874 ifp->if_timer = 5; 1875 1876 return; 1877 } 1878 sc->need_mcsetup = 0; 1879 1880 /* 1881 * Initialize multicast setup descriptor. 1882 */ 1883 mcsp->next = sc->cbl_base; 1884 mcsp->mb_head = NULL; 1885 mcsp->cb_status = 0; 1886 mcsp->cb_command = FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 1887 mcsp->link_addr = vtophys(&sc->cbl_base->cb_status); 1888 1889 nmcasts = 0; 1890 if (!sc->all_mcasts) { 1891 for (ifma = ifp->if_multiaddrs.lh_first; ifma != NULL; 1892 ifma = ifma->ifma_link.le_next) { 1893 if (ifma->ifma_addr->sa_family != AF_LINK) 1894 continue; 1895 if (nmcasts >= MAXMCADDR) { 1896 sc->all_mcasts = 1; 1897 nmcasts = 0; 1898 break; 1899 } 1900 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1901 (volatile void *) &sc->mcsp->mc_addr[nmcasts][0], 6); 1902 nmcasts++; 1903 } 1904 } 1905 mcsp->mc_cnt = nmcasts * 6; 1906 sc->cbl_first = sc->cbl_last = (struct fxp_cb_tx *) mcsp; 1907 sc->tx_queued = 1; 1908 1909 /* 1910 * Wait until command unit is not active. This should never 1911 * be the case when nothing is queued, but make sure anyway. 1912 */ 1913 while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) == 1914 FXP_SCB_CUS_ACTIVE) ; 1915 1916 /* 1917 * Start the multicast setup command. 1918 */ 1919 fxp_scb_wait(sc); 1920 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&mcsp->cb_status)); 1921 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1922 1923 ifp->if_timer = 2; 1924 return; 1925} 1926