if_fxp.c revision 33181
1/* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Modifications to support NetBSD and media selection: 6 * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $Id: if_fxp.c,v 1.47 1998/01/08 23:42:29 eivind Exp $ 31 */ 32 33/* 34 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 35 */ 36 37#include "bpfilter.h" 38#include "opt_inet.h" 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/mbuf.h> 43#include <sys/malloc.h> 44#include <sys/kernel.h> 45#include <sys/socket.h> 46 47#include <net/if.h> 48#include <net/if_dl.h> 49#include <net/if_media.h> 50 51#ifdef INET 52#include <netinet/in.h> 53#include <netinet/if_ether.h> 54#endif 55 56#ifdef NS 57#include <netns/ns.h> 58#include <netns/ns_if.h> 59#endif 60 61#if NBPFILTER > 0 62#include <net/bpf.h> 63#endif 64 65#if defined(__NetBSD__) 66 67#include <sys/ioctl.h> 68#include <sys/errno.h> 69#include <sys/device.h> 70 71#include <net/if_dl.h> 72#include <net/if_ether.h> 73 74#include <netinet/if_inarp.h> 75 76#include <vm/vm.h> 77 78#include <machine/cpu.h> 79#include <machine/bus.h> 80#include <machine/intr.h> 81 82#include <dev/pci/if_fxpreg.h> 83#include <dev/pci/if_fxpvar.h> 84 85#include <dev/pci/pcivar.h> 86#include <dev/pci/pcireg.h> 87#include <dev/pci/pcidevs.h> 88 89#ifdef __alpha__ /* XXX */ 90/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */ 91#undef vtophys 92#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 93#endif /* __alpha__ */ 94 95#else /* __FreeBSD__ */ 96 97#include <sys/sockio.h> 98 99#include <net/ethernet.h> 100#include <net/if_arp.h> 101 102#include <vm/vm.h> /* for vtophys */ 103#include <vm/pmap.h> /* for vtophys */ 104#include <machine/clock.h> /* for DELAY */ 105 106#include <pci/pcivar.h> 107#include <pci/if_fxpreg.h> 108#include <pci/if_fxpvar.h> 109 110#endif /* __NetBSD__ */ 111 112/* 113 * NOTE! On the Alpha, we have an alignment constraint. The 114 * card DMAs the packet immediately following the RFA. However, 115 * the first thing in the packet is a 14-byte Ethernet header. 116 * This means that the packet is misaligned. To compensate, 117 * we actually offset the RFA 2 bytes into the cluster. This 118 * alignes the packet after the Ethernet header at a 32-bit 119 * boundary. HOWEVER! This means that the RFA is misaligned! 120 */ 121#define RFA_ALIGNMENT_FUDGE 2 122 123/* 124 * Inline function to copy a 16-bit aligned 32-bit quantity. 125 */ 126static __inline void fxp_lwcopy __P((volatile u_int32_t *, 127 volatile u_int32_t *)); 128static __inline void 129fxp_lwcopy(src, dst) 130 volatile u_int32_t *src, *dst; 131{ 132 volatile u_int16_t *a = (u_int16_t *)src; 133 volatile u_int16_t *b = (u_int16_t *)dst; 134 135 b[0] = a[0]; 136 b[1] = a[1]; 137} 138 139/* 140 * Template for default configuration parameters. 141 * See struct fxp_cb_config for the bit definitions. 142 */ 143static u_char fxp_cb_config_template[] = { 144 0x0, 0x0, /* cb_status */ 145 0x80, 0x2, /* cb_command */ 146 0xff, 0xff, 0xff, 0xff, /* link_addr */ 147 0x16, /* 0 */ 148 0x8, /* 1 */ 149 0x0, /* 2 */ 150 0x0, /* 3 */ 151 0x0, /* 4 */ 152 0x80, /* 5 */ 153 0xb2, /* 6 */ 154 0x3, /* 7 */ 155 0x1, /* 8 */ 156 0x0, /* 9 */ 157 0x26, /* 10 */ 158 0x0, /* 11 */ 159 0x60, /* 12 */ 160 0x0, /* 13 */ 161 0xf2, /* 14 */ 162 0x48, /* 15 */ 163 0x0, /* 16 */ 164 0x40, /* 17 */ 165 0xf3, /* 18 */ 166 0x0, /* 19 */ 167 0x3f, /* 20 */ 168 0x5 /* 21 */ 169}; 170 171/* Supported media types. */ 172struct fxp_supported_media { 173 const int fsm_phy; /* PHY type */ 174 const int *fsm_media; /* the media array */ 175 const int fsm_nmedia; /* the number of supported media */ 176 const int fsm_defmedia; /* default media for this PHY */ 177}; 178 179static const int fxp_media_standard[] = { 180 IFM_ETHER|IFM_10_T, 181 IFM_ETHER|IFM_10_T|IFM_FDX, 182 IFM_ETHER|IFM_100_TX, 183 IFM_ETHER|IFM_100_TX|IFM_FDX, 184 IFM_ETHER|IFM_AUTO, 185}; 186#define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO) 187 188static const int fxp_media_default[] = { 189 IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */ 190}; 191#define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL) 192 193static const struct fxp_supported_media fxp_media[] = { 194 { FXP_PHY_DP83840, fxp_media_standard, 195 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 196 FXP_MEDIA_STANDARD_DEFMEDIA }, 197 { FXP_PHY_DP83840A, fxp_media_standard, 198 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 199 FXP_MEDIA_STANDARD_DEFMEDIA }, 200 { FXP_PHY_82555, fxp_media_standard, 201 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 202 FXP_MEDIA_STANDARD_DEFMEDIA }, 203 { FXP_PHY_80C24, fxp_media_default, 204 sizeof(fxp_media_default) / sizeof(fxp_media_default[0]), 205 FXP_MEDIA_DEFAULT_DEFMEDIA }, 206}; 207#define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0])) 208 209static int fxp_mediachange __P((struct ifnet *)); 210static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *)); 211static void fxp_set_media __P((struct fxp_softc *, int)); 212static inline void fxp_scb_wait __P((struct fxp_softc *)); 213static FXP_INTR_TYPE fxp_intr __P((void *)); 214static void fxp_start __P((struct ifnet *)); 215static int fxp_ioctl __P((struct ifnet *, 216 FXP_IOCTLCMD_TYPE, caddr_t)); 217static void fxp_init __P((void *)); 218static void fxp_stop __P((struct fxp_softc *)); 219static void fxp_watchdog __P((struct ifnet *)); 220static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *)); 221static int fxp_mdi_read __P((struct fxp_softc *, int, int)); 222static void fxp_mdi_write __P((struct fxp_softc *, int, int, int)); 223static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *, 224 int, int)); 225static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *)); 226static void fxp_stats_update __P((void *)); 227static void fxp_mc_setup __P((struct fxp_softc *)); 228 229/* 230 * Set initial transmit threshold at 64 (512 bytes). This is 231 * increased by 64 (512 bytes) at a time, to maximum of 192 232 * (1536 bytes), if an underrun occurs. 233 */ 234static int tx_threshold = 64; 235 236/* 237 * Number of transmit control blocks. This determines the number 238 * of transmit buffers that can be chained in the CB list. 239 * This must be a power of two. 240 */ 241#define FXP_NTXCB 128 242 243/* 244 * TxCB list index mask. This is used to do list wrap-around. 245 */ 246#define FXP_TXCB_MASK (FXP_NTXCB - 1) 247 248/* 249 * Number of receive frame area buffers. These are large so chose 250 * wisely. 251 */ 252#define FXP_NRFABUFS 64 253 254/* 255 * Maximum number of seconds that the receiver can be idle before we 256 * assume it's dead and attempt to reset it by reprogramming the 257 * multicast filter. This is part of a work-around for a bug in the 258 * NIC. See fxp_stats_update(). 259 */ 260#define FXP_MAX_RX_IDLE 15 261 262/* 263 * Wait for the previous command to be accepted (but not necessarily 264 * completed). 265 */ 266static inline void 267fxp_scb_wait(sc) 268 struct fxp_softc *sc; 269{ 270 int i = 10000; 271 272 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i); 273} 274 275/************************************************************* 276 * Operating system-specific autoconfiguration glue 277 *************************************************************/ 278 279#if defined(__NetBSD__) 280 281#ifdef __BROKEN_INDIRECT_CONFIG 282static int fxp_match __P((struct device *, void *, void *)); 283#else 284static int fxp_match __P((struct device *, struct cfdata *, void *)); 285#endif 286static void fxp_attach __P((struct device *, struct device *, void *)); 287 288static void fxp_shutdown __P((void *)); 289 290/* Compensate for lack of a generic ether_ioctl() */ 291static int fxp_ether_ioctl __P((struct ifnet *, 292 FXP_IOCTLCMD_TYPE, caddr_t)); 293#define ether_ioctl fxp_ether_ioctl 294 295struct cfattach fxp_ca = { 296 sizeof(struct fxp_softc), fxp_match, fxp_attach 297}; 298 299struct cfdriver fxp_cd = { 300 NULL, "fxp", DV_IFNET 301}; 302 303/* 304 * Check if a device is an 82557. 305 */ 306static int 307fxp_match(parent, match, aux) 308 struct device *parent; 309#ifdef __BROKEN_INDIRECT_CONFIG 310 void *match; 311#else 312 struct cfdata *match; 313#endif 314 void *aux; 315{ 316 struct pci_attach_args *pa = aux; 317 318 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 319 return (0); 320 321 switch (PCI_PRODUCT(pa->pa_id)) { 322 case PCI_PRODUCT_INTEL_82557: 323 return (1); 324 } 325 326 return (0); 327} 328 329static void 330fxp_attach(parent, self, aux) 331 struct device *parent, *self; 332 void *aux; 333{ 334 struct fxp_softc *sc = (struct fxp_softc *)self; 335 struct pci_attach_args *pa = aux; 336 pci_chipset_tag_t pc = pa->pa_pc; 337 pci_intr_handle_t ih; 338 const char *intrstr = NULL; 339 u_int8_t enaddr[6]; 340 struct ifnet *ifp; 341 342 /* 343 * Map control/status registers. 344 */ 345 if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0, 346 &sc->sc_st, &sc->sc_sh, NULL, NULL)) { 347 printf(": can't map registers\n"); 348 return; 349 } 350 printf(": Intel EtherExpress Pro 10/100B Ethernet\n"); 351 352 /* 353 * Allocate our interrupt. 354 */ 355 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 356 pa->pa_intrline, &ih)) { 357 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 358 return; 359 } 360 intrstr = pci_intr_string(pc, ih); 361 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 362 if (sc->sc_ih == NULL) { 363 printf("%s: couldn't establish interrupt", 364 sc->sc_dev.dv_xname); 365 if (intrstr != NULL) 366 printf(" at %s", intrstr); 367 printf("\n"); 368 return; 369 } 370 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 371 372 /* Do generic parts of attach. */ 373 if (fxp_attach_common(sc, enaddr)) { 374 /* Failed! */ 375 return; 376 } 377 378 printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname, 379 ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : ""); 380 381 ifp = &sc->sc_ethercom.ec_if; 382 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 383 ifp->if_softc = sc; 384 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 385 ifp->if_ioctl = fxp_ioctl; 386 ifp->if_start = fxp_start; 387 ifp->if_watchdog = fxp_watchdog; 388 389 /* 390 * Attach the interface. 391 */ 392 if_attach(ifp); 393 /* 394 * Let the system queue as many packets as we have TX descriptors. 395 */ 396 ifp->if_snd.ifq_maxlen = FXP_NTXCB; 397 ether_ifattach(ifp, enaddr); 398#if NBPFILTER > 0 399 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 400 sizeof(struct ether_header)); 401#endif 402 403 /* 404 * Add shutdown hook so that DMA is disabled prior to reboot. Not 405 * doing do could allow DMA to corrupt kernel memory during the 406 * reboot before the driver initializes. 407 */ 408 shutdownhook_establish(fxp_shutdown, sc); 409} 410 411/* 412 * Device shutdown routine. Called at system shutdown after sync. The 413 * main purpose of this routine is to shut off receiver DMA so that 414 * kernel memory doesn't get clobbered during warmboot. 415 */ 416static void 417fxp_shutdown(sc) 418 void *sc; 419{ 420 fxp_stop((struct fxp_softc *) sc); 421} 422 423static int 424fxp_ether_ioctl(ifp, cmd, data) 425 struct ifnet *ifp; 426 FXP_IOCTLCMD_TYPE cmd; 427 caddr_t data; 428{ 429 struct ifaddr *ifa = (struct ifaddr *) data; 430 struct fxp_softc *sc = ifp->if_softc; 431 432 switch (cmd) { 433 case SIOCSIFADDR: 434 ifp->if_flags |= IFF_UP; 435 436 switch (ifa->ifa_addr->sa_family) { 437#ifdef INET 438 case AF_INET: 439 fxp_init(sc); 440 arp_ifinit(ifp, ifa); 441 break; 442#endif 443#ifdef NS 444 case AF_NS: 445 { 446 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 447 448 if (ns_nullhost(*ina)) 449 ina->x_host = *(union ns_host *) 450 LLADDR(ifp->if_sadl); 451 else 452 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 453 ifp->if_addrlen); 454 /* Set new address. */ 455 fxp_init(sc); 456 break; 457 } 458#endif 459 default: 460 fxp_init(sc); 461 break; 462 } 463 break; 464 465 default: 466 return (EINVAL); 467 } 468 469 return (0); 470} 471 472#else /* __FreeBSD__ */ 473 474static u_long fxp_count; 475static char *fxp_probe __P((pcici_t, pcidi_t)); 476static void fxp_attach __P((pcici_t, int)); 477 478static void fxp_shutdown __P((int, void *)); 479 480static struct pci_device fxp_device = { 481 "fxp", 482 fxp_probe, 483 fxp_attach, 484 &fxp_count, 485 NULL 486}; 487DATA_SET(pcidevice_set, fxp_device); 488 489/* 490 * Return identification string if this is device is ours. 491 */ 492static char * 493fxp_probe(config_id, device_id) 494 pcici_t config_id; 495 pcidi_t device_id; 496{ 497 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) && 498 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557) 499 return ("Intel EtherExpress Pro 10/100B Ethernet"); 500 501 return NULL; 502} 503 504static void 505fxp_attach(config_id, unit) 506 pcici_t config_id; 507 int unit; 508{ 509 struct fxp_softc *sc; 510 vm_offset_t pbase; 511 struct ifnet *ifp; 512 int s; 513 514 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT); 515 if (sc == NULL) 516 return; 517 bzero(sc, sizeof(struct fxp_softc)); 518 callout_handle_init(&sc->stat_ch); 519 520 s = splimp(); 521 522 /* 523 * Map control/status registers. 524 */ 525 if (!pci_map_mem(config_id, FXP_PCI_MMBA, 526 (vm_offset_t *)&sc->csr, &pbase)) { 527 printf("fxp%d: couldn't map memory\n", unit); 528 goto fail; 529 } 530 531 /* 532 * Allocate our interrupt. 533 */ 534 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) { 535 printf("fxp%d: couldn't map interrupt\n", unit); 536 goto fail; 537 } 538 539 /* Do generic parts of attach. */ 540 if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) { 541 /* Failed! */ 542 (void) pci_unmap_int(config_id); 543 goto fail; 544 } 545 546 printf("fxp%d: Ethernet address %6D%s\n", unit, 547 sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : ""); 548 549 ifp = &sc->arpcom.ac_if; 550 ifp->if_unit = unit; 551 ifp->if_name = "fxp"; 552 ifp->if_output = ether_output; 553 ifp->if_baudrate = 100000000; 554 ifp->if_init = fxp_init; 555 ifp->if_softc = sc; 556 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 557 ifp->if_ioctl = fxp_ioctl; 558 ifp->if_start = fxp_start; 559 ifp->if_watchdog = fxp_watchdog; 560 561 /* 562 * Attach the interface. 563 */ 564 if_attach(ifp); 565 /* 566 * Let the system queue as many packets as we have TX descriptors. 567 */ 568 ifp->if_snd.ifq_maxlen = FXP_NTXCB; 569 ether_ifattach(ifp); 570#if NBPFILTER > 0 571 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 572#endif 573 574 /* 575 * Add shutdown hook so that DMA is disabled prior to reboot. Not 576 * doing do could allow DMA to corrupt kernel memory during the 577 * reboot before the driver initializes. 578 */ 579 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC); 580 581 splx(s); 582 return; 583 584 fail: 585 free(sc, M_DEVBUF); 586 splx(s); 587} 588 589/* 590 * Device shutdown routine. Called at system shutdown after sync. The 591 * main purpose of this routine is to shut off receiver DMA so that 592 * kernel memory doesn't get clobbered during warmboot. 593 */ 594static void 595fxp_shutdown(howto, sc) 596 int howto; 597 void *sc; 598{ 599 fxp_stop((struct fxp_softc *) sc); 600} 601 602#endif /* __NetBSD__ */ 603 604/************************************************************* 605 * End of operating system-specific autoconfiguration glue 606 *************************************************************/ 607 608/* 609 * Do generic parts of attach. 610 */ 611static int 612fxp_attach_common(sc, enaddr) 613 struct fxp_softc *sc; 614 u_int8_t *enaddr; 615{ 616 u_int16_t data; 617 int i, nmedia, defmedia; 618 const int *media; 619 620 /* 621 * Reset to a stable state. 622 */ 623 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 624 DELAY(10); 625 626 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB, 627 M_DEVBUF, M_NOWAIT); 628 if (sc->cbl_base == NULL) 629 goto fail; 630 631 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT); 632 if (sc->fxp_stats == NULL) 633 goto fail; 634 bzero(sc->fxp_stats, sizeof(struct fxp_stats)); 635 636 sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT); 637 if (sc->mcsp == NULL) 638 goto fail; 639 640 /* 641 * Pre-allocate our receive buffers. 642 */ 643 for (i = 0; i < FXP_NRFABUFS; i++) { 644 if (fxp_add_rfabuf(sc, NULL) != 0) { 645 goto fail; 646 } 647 } 648 649 /* 650 * Get info about the primary PHY 651 */ 652 fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1); 653 sc->phy_primary_addr = data & 0xff; 654 sc->phy_primary_device = (data >> 8) & 0x3f; 655 sc->phy_10Mbps_only = data >> 15; 656 657 /* 658 * Read MAC address. 659 */ 660 fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3); 661 662 /* 663 * Initialize the media structures. 664 */ 665 666 media = fxp_media_default; 667 nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]); 668 defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA; 669 670 for (i = 0; i < NFXPMEDIA; i++) { 671 if (sc->phy_primary_device == fxp_media[i].fsm_phy) { 672 media = fxp_media[i].fsm_media; 673 nmedia = fxp_media[i].fsm_nmedia; 674 defmedia = fxp_media[i].fsm_defmedia; 675 } 676 } 677 678 ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus); 679 for (i = 0; i < nmedia; i++) { 680 if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only) 681 continue; 682 ifmedia_add(&sc->sc_media, media[i], 0, NULL); 683 } 684 ifmedia_set(&sc->sc_media, defmedia); 685 686 return (0); 687 688 fail: 689 printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc)); 690 if (sc->cbl_base) 691 free(sc->cbl_base, M_DEVBUF); 692 if (sc->fxp_stats) 693 free(sc->fxp_stats, M_DEVBUF); 694 if (sc->mcsp) 695 free(sc->mcsp, M_DEVBUF); 696 /* frees entire chain */ 697 if (sc->rfa_headm) 698 m_freem(sc->rfa_headm); 699 700 return (ENOMEM); 701} 702 703/* 704 * Read from the serial EEPROM. Basically, you manually shift in 705 * the read opcode (one bit at a time) and then shift in the address, 706 * and then you shift out the data (all of this one bit at a time). 707 * The word size is 16 bits, so you have to provide the address for 708 * every 16 bits of data. 709 */ 710static void 711fxp_read_eeprom(sc, data, offset, words) 712 struct fxp_softc *sc; 713 u_short *data; 714 int offset; 715 int words; 716{ 717 u_int16_t reg; 718 int i, x; 719 720 for (i = 0; i < words; i++) { 721 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 722 /* 723 * Shift in read opcode. 724 */ 725 for (x = 3; x > 0; x--) { 726 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { 727 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 728 } else { 729 reg = FXP_EEPROM_EECS; 730 } 731 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 732 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 733 reg | FXP_EEPROM_EESK); 734 DELAY(1); 735 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 736 DELAY(1); 737 } 738 /* 739 * Shift in address. 740 */ 741 for (x = 6; x > 0; x--) { 742 if ((i + offset) & (1 << (x - 1))) { 743 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 744 } else { 745 reg = FXP_EEPROM_EECS; 746 } 747 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 748 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 749 reg | FXP_EEPROM_EESK); 750 DELAY(1); 751 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 752 DELAY(1); 753 } 754 reg = FXP_EEPROM_EECS; 755 data[i] = 0; 756 /* 757 * Shift out data. 758 */ 759 for (x = 16; x > 0; x--) { 760 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 761 reg | FXP_EEPROM_EESK); 762 DELAY(1); 763 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & 764 FXP_EEPROM_EEDO) 765 data[i] |= (1 << (x - 1)); 766 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 767 DELAY(1); 768 } 769 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 770 DELAY(1); 771 } 772} 773 774/* 775 * Start packet transmission on the interface. 776 */ 777static void 778fxp_start(ifp) 779 struct ifnet *ifp; 780{ 781 struct fxp_softc *sc = ifp->if_softc; 782 struct fxp_cb_tx *txp; 783 784 /* 785 * See if we need to suspend xmit until the multicast filter 786 * has been reprogrammed (which can only be done at the head 787 * of the command chain). 788 */ 789 if (sc->need_mcsetup) 790 return; 791 792 txp = NULL; 793 794 /* 795 * We're finished if there is nothing more to add to the list or if 796 * we're all filled up with buffers to transmit. 797 */ 798 while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB) { 799 struct mbuf *m, *mb_head; 800 int segment; 801 802 /* 803 * Grab a packet to transmit. 804 */ 805 IF_DEQUEUE(&ifp->if_snd, mb_head); 806 807 /* 808 * Get pointer to next available tx desc. 809 */ 810 txp = sc->cbl_last->next; 811 812 /* 813 * Go through each of the mbufs in the chain and initialize 814 * the transmit buffer descriptors with the physical address 815 * and size of the mbuf. 816 */ 817tbdinit: 818 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 819 if (m->m_len != 0) { 820 if (segment == FXP_NTXSEG) 821 break; 822 txp->tbd[segment].tb_addr = 823 vtophys(mtod(m, vm_offset_t)); 824 txp->tbd[segment].tb_size = m->m_len; 825 segment++; 826 } 827 } 828 if (m != NULL) { 829 struct mbuf *mn; 830 831 /* 832 * We ran out of segments. We have to recopy this mbuf 833 * chain first. Bail out if we can't get the new buffers. 834 */ 835 MGETHDR(mn, M_DONTWAIT, MT_DATA); 836 if (mn == NULL) { 837 m_freem(mb_head); 838 break; 839 } 840 if (mb_head->m_pkthdr.len > MHLEN) { 841 MCLGET(mn, M_DONTWAIT); 842 if ((mn->m_flags & M_EXT) == 0) { 843 m_freem(mn); 844 m_freem(mb_head); 845 break; 846 } 847 } 848 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 849 mtod(mn, caddr_t)); 850 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 851 m_freem(mb_head); 852 mb_head = mn; 853 goto tbdinit; 854 } 855 856 txp->tbd_number = segment; 857 txp->mb_head = mb_head; 858 txp->cb_status = 0; 859 txp->cb_command = 860 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S; 861 txp->tx_threshold = tx_threshold; 862 863 /* 864 * Advance the end of list forward. 865 */ 866 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 867 sc->cbl_last = txp; 868 869 /* 870 * Advance the beginning of the list forward if there are 871 * no other packets queued (when nothing is queued, cbl_first 872 * sits on the last TxCB that was sent out). 873 */ 874 if (sc->tx_queued == 0) 875 sc->cbl_first = txp; 876 877 sc->tx_queued++; 878 879#if NBPFILTER > 0 880 /* 881 * Pass packet to bpf if there is a listener. 882 */ 883 if (ifp->if_bpf) 884 bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head); 885#endif 886 } 887 888 /* 889 * We're finished. If we added to the list, issue a RESUME to get DMA 890 * going again if suspended. 891 */ 892 if (txp != NULL) { 893 fxp_scb_wait(sc); 894 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); 895 896 /* 897 * Set a 5 second timer just in case we don't hear from the 898 * card again. 899 */ 900 ifp->if_timer = 5; 901 } 902} 903 904/* 905 * Process interface interrupts. 906 */ 907static FXP_INTR_TYPE 908fxp_intr(arg) 909 void *arg; 910{ 911 struct fxp_softc *sc = arg; 912 struct ifnet *ifp = &sc->sc_if; 913 u_int8_t statack; 914#if defined(__NetBSD__) 915 int claimed = 0; 916#endif 917 918 while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { 919#if defined(__NetBSD__) 920 claimed = 1; 921#endif 922 /* 923 * First ACK all the interrupts in this pass. 924 */ 925 CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack); 926 927 /* 928 * Process receiver interrupts. If a no-resource (RNR) 929 * condition exists, get whatever packets we can and 930 * re-start the receiver. 931 */ 932 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) { 933 struct mbuf *m; 934 struct fxp_rfa *rfa; 935rcvloop: 936 m = sc->rfa_headm; 937 rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + 938 RFA_ALIGNMENT_FUDGE); 939 940 if (rfa->rfa_status & FXP_RFA_STATUS_C) { 941 /* 942 * Remove first packet from the chain. 943 */ 944 sc->rfa_headm = m->m_next; 945 m->m_next = NULL; 946 947 /* 948 * Add a new buffer to the receive chain. 949 * If this fails, the old buffer is recycled 950 * instead. 951 */ 952 if (fxp_add_rfabuf(sc, m) == 0) { 953 struct ether_header *eh; 954 u_int16_t total_len; 955 956 total_len = rfa->actual_size & 957 (MCLBYTES - 1); 958 if (total_len < 959 sizeof(struct ether_header)) { 960 m_freem(m); 961 goto rcvloop; 962 } 963 m->m_pkthdr.rcvif = ifp; 964 m->m_pkthdr.len = m->m_len = 965 total_len - 966 sizeof(struct ether_header); 967 eh = mtod(m, struct ether_header *); 968#if NBPFILTER > 0 969 if (ifp->if_bpf) { 970 bpf_tap(FXP_BPFTAP_ARG(ifp), 971 mtod(m, caddr_t), 972 total_len); 973 /* 974 * Only pass this packet up 975 * if it is for us. 976 */ 977 if ((ifp->if_flags & 978 IFF_PROMISC) && 979 (rfa->rfa_status & 980 FXP_RFA_STATUS_IAMATCH) && 981 (eh->ether_dhost[0] & 1) 982 == 0) { 983 m_freem(m); 984 goto rcvloop; 985 } 986 } 987#endif /* NBPFILTER > 0 */ 988 m->m_data += 989 sizeof(struct ether_header); 990 ether_input(ifp, eh, m); 991 } 992 goto rcvloop; 993 } 994 if (statack & FXP_SCB_STATACK_RNR) { 995 fxp_scb_wait(sc); 996 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 997 vtophys(sc->rfa_headm->m_ext.ext_buf) + 998 RFA_ALIGNMENT_FUDGE); 999 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1000 FXP_SCB_COMMAND_RU_START); 1001 } 1002 } 1003 /* 1004 * Free any finished transmit mbuf chains. 1005 */ 1006 if (statack & FXP_SCB_STATACK_CNA) { 1007 struct fxp_cb_tx *txp; 1008 1009 for (txp = sc->cbl_first; sc->tx_queued && 1010 (txp->cb_status & FXP_CB_STATUS_C) != 0; 1011 txp = txp->next) { 1012 if (txp->mb_head != NULL) { 1013 m_freem(txp->mb_head); 1014 txp->mb_head = NULL; 1015 } 1016 sc->tx_queued--; 1017 } 1018 sc->cbl_first = txp; 1019 if (sc->tx_queued == 0) { 1020 ifp->if_timer = 0; 1021 if (sc->need_mcsetup) 1022 fxp_mc_setup(sc); 1023 } 1024 /* 1025 * Try to start more packets transmitting. 1026 */ 1027 if (ifp->if_snd.ifq_head != NULL) 1028 fxp_start(ifp); 1029 } 1030 } 1031#if defined(__NetBSD__) 1032 return (claimed); 1033#endif 1034} 1035 1036/* 1037 * Update packet in/out/collision statistics. The i82557 doesn't 1038 * allow you to access these counters without doing a fairly 1039 * expensive DMA to get _all_ of the statistics it maintains, so 1040 * we do this operation here only once per second. The statistics 1041 * counters in the kernel are updated from the previous dump-stats 1042 * DMA and then a new dump-stats DMA is started. The on-chip 1043 * counters are zeroed when the DMA completes. If we can't start 1044 * the DMA immediately, we don't wait - we just prepare to read 1045 * them again next time. 1046 */ 1047static void 1048fxp_stats_update(arg) 1049 void *arg; 1050{ 1051 struct fxp_softc *sc = arg; 1052 struct ifnet *ifp = &sc->sc_if; 1053 struct fxp_stats *sp = sc->fxp_stats; 1054 int s; 1055 1056 ifp->if_opackets += sp->tx_good; 1057 ifp->if_collisions += sp->tx_total_collisions; 1058 if (sp->rx_good) { 1059 ifp->if_ipackets += sp->rx_good; 1060 sc->rx_idle_secs = 0; 1061 } else { 1062 sc->rx_idle_secs++; 1063 } 1064 ifp->if_ierrors += 1065 sp->rx_crc_errors + 1066 sp->rx_alignment_errors + 1067 sp->rx_rnr_errors + 1068 sp->rx_overrun_errors; 1069 /* 1070 * If any transmit underruns occured, bump up the transmit 1071 * threshold by another 512 bytes (64 * 8). 1072 */ 1073 if (sp->tx_underruns) { 1074 ifp->if_oerrors += sp->tx_underruns; 1075 if (tx_threshold < 192) 1076 tx_threshold += 64; 1077 } 1078 s = splimp(); 1079 /* 1080 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1081 * then assume the receiver has locked up and attempt to clear 1082 * the condition by reprogramming the multicast filter. This is 1083 * a work-around for a bug in the 82557 where the receiver locks 1084 * up if it gets certain types of garbage in the syncronization 1085 * bits prior to the packet header. This bug is supposed to only 1086 * occur in 10Mbps mode, but has been seen to occur in 100Mbps 1087 * mode as well (perhaps due to a 10/100 speed transition). 1088 */ 1089 if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { 1090 sc->rx_idle_secs = 0; 1091 fxp_mc_setup(sc); 1092 } 1093 /* 1094 * If there is no pending command, start another stats 1095 * dump. Otherwise punt for now. 1096 */ 1097 if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { 1098 /* 1099 * Start another stats dump. 1100 */ 1101 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1102 FXP_SCB_COMMAND_CU_DUMPRESET); 1103 } else { 1104 /* 1105 * A previous command is still waiting to be accepted. 1106 * Just zero our copy of the stats and wait for the 1107 * next timer event to update them. 1108 */ 1109 sp->tx_good = 0; 1110 sp->tx_underruns = 0; 1111 sp->tx_total_collisions = 0; 1112 1113 sp->rx_good = 0; 1114 sp->rx_crc_errors = 0; 1115 sp->rx_alignment_errors = 0; 1116 sp->rx_rnr_errors = 0; 1117 sp->rx_overrun_errors = 0; 1118 } 1119 splx(s); 1120 /* 1121 * Schedule another timeout one second from now. 1122 */ 1123 sc->stat_ch = timeout(fxp_stats_update, sc, hz); 1124} 1125 1126/* 1127 * Stop the interface. Cancels the statistics updater and resets 1128 * the interface. 1129 */ 1130static void 1131fxp_stop(sc) 1132 struct fxp_softc *sc; 1133{ 1134 struct ifnet *ifp = &sc->sc_if; 1135 struct fxp_cb_tx *txp; 1136 int i; 1137 1138 /* 1139 * Cancel stats updater. 1140 */ 1141 untimeout(fxp_stats_update, sc, sc->stat_ch); 1142 1143 /* 1144 * Issue software reset 1145 */ 1146 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 1147 DELAY(10); 1148 1149 /* 1150 * Release any xmit buffers. 1151 */ 1152 for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL; 1153 txp = txp->next) { 1154 m_freem(txp->mb_head); 1155 txp->mb_head = NULL; 1156 } 1157 sc->tx_queued = 0; 1158 1159 /* 1160 * Free all the receive buffers then reallocate/reinitialize 1161 */ 1162 if (sc->rfa_headm != NULL) 1163 m_freem(sc->rfa_headm); 1164 sc->rfa_headm = NULL; 1165 sc->rfa_tailm = NULL; 1166 for (i = 0; i < FXP_NRFABUFS; i++) { 1167 if (fxp_add_rfabuf(sc, NULL) != 0) { 1168 /* 1169 * This "can't happen" - we're at splimp() 1170 * and we just freed all the buffers we need 1171 * above. 1172 */ 1173 panic("fxp_stop: no buffers!"); 1174 } 1175 } 1176 1177 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1178 ifp->if_timer = 0; 1179} 1180 1181/* 1182 * Watchdog/transmission transmit timeout handler. Called when a 1183 * transmission is started on the interface, but no interrupt is 1184 * received before the timeout. This usually indicates that the 1185 * card has wedged for some reason. 1186 */ 1187static void 1188fxp_watchdog(ifp) 1189 struct ifnet *ifp; 1190{ 1191 struct fxp_softc *sc = ifp->if_softc; 1192 1193 printf(FXP_FORMAT ": device timeout\n", FXP_ARGS(sc)); 1194 ifp->if_oerrors++; 1195 1196 fxp_init(sc); 1197} 1198 1199static void 1200fxp_init(xsc) 1201 void *xsc; 1202{ 1203 struct fxp_softc *sc = xsc; 1204 struct ifnet *ifp = &sc->sc_if; 1205 struct fxp_cb_config *cbp; 1206 struct fxp_cb_ias *cb_ias; 1207 struct fxp_cb_tx *txp; 1208 int i, s, prm; 1209 1210 s = splimp(); 1211 /* 1212 * Cancel any pending I/O 1213 */ 1214 fxp_stop(sc); 1215 1216 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 1217 sc->promisc_mode = prm; 1218 1219 /* 1220 * Initialize base of CBL and RFA memory. Loading with zero 1221 * sets it up for regular linear addressing. 1222 */ 1223 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); 1224 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE); 1225 1226 fxp_scb_wait(sc); 1227 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE); 1228 1229 /* 1230 * Initialize base of dump-stats buffer. 1231 */ 1232 fxp_scb_wait(sc); 1233 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats)); 1234 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR); 1235 1236 /* 1237 * We temporarily use memory that contains the TxCB list to 1238 * construct the config CB. The TxCB list memory is rebuilt 1239 * later. 1240 */ 1241 cbp = (struct fxp_cb_config *) sc->cbl_base; 1242 1243 /* 1244 * This bcopy is kind of disgusting, but there are a bunch of must be 1245 * zero and must be one bits in this structure and this is the easiest 1246 * way to initialize them all to proper values. 1247 */ 1248 bcopy(fxp_cb_config_template, (void *)&cbp->cb_status, 1249 sizeof(fxp_cb_config_template)); 1250 1251 cbp->cb_status = 0; 1252 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 1253 cbp->link_addr = -1; /* (no) next command */ 1254 cbp->byte_count = 22; /* (22) bytes to config */ 1255 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 1256 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 1257 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 1258 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 1259 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 1260 cbp->dma_bce = 0; /* (disable) dma max counters */ 1261 cbp->late_scb = 0; /* (don't) defer SCB update */ 1262 cbp->tno_int = 0; /* (disable) tx not okay interrupt */ 1263 cbp->ci_int = 0; /* interrupt on CU not active */ 1264 cbp->save_bf = prm; /* save bad frames */ 1265 cbp->disc_short_rx = !prm; /* discard short packets */ 1266 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */ 1267 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */ 1268 cbp->nsai = 1; /* (don't) disable source addr insert */ 1269 cbp->preamble_length = 2; /* (7 byte) preamble */ 1270 cbp->loopback = 0; /* (don't) loopback */ 1271 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 1272 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 1273 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 1274 cbp->promiscuous = prm; /* promiscuous mode */ 1275 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 1276 cbp->crscdt = 0; /* (CRS only) */ 1277 cbp->stripping = !prm; /* truncate rx packet to byte count */ 1278 cbp->padding = 1; /* (do) pad short tx packets */ 1279 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 1280 cbp->force_fdx = 0; /* (don't) force full duplex */ 1281 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 1282 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 1283 cbp->mc_all = sc->all_mcasts;/* accept all multicasts */ 1284 1285 /* 1286 * Start the config command/DMA. 1287 */ 1288 fxp_scb_wait(sc); 1289 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status)); 1290 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1291 /* ...and wait for it to complete. */ 1292 while (!(cbp->cb_status & FXP_CB_STATUS_C)); 1293 1294 /* 1295 * Now initialize the station address. Temporarily use the TxCB 1296 * memory area like we did above for the config CB. 1297 */ 1298 cb_ias = (struct fxp_cb_ias *) sc->cbl_base; 1299 cb_ias->cb_status = 0; 1300 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 1301 cb_ias->link_addr = -1; 1302#if defined(__NetBSD__) 1303 bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6); 1304#else 1305 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr, 1306 sizeof(sc->arpcom.ac_enaddr)); 1307#endif /* __NetBSD__ */ 1308 1309 /* 1310 * Start the IAS (Individual Address Setup) command/DMA. 1311 */ 1312 fxp_scb_wait(sc); 1313 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1314 /* ...and wait for it to complete. */ 1315 while (!(cb_ias->cb_status & FXP_CB_STATUS_C)); 1316 1317 /* 1318 * Initialize transmit control block (TxCB) list. 1319 */ 1320 1321 txp = sc->cbl_base; 1322 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 1323 for (i = 0; i < FXP_NTXCB; i++) { 1324 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; 1325 txp[i].cb_command = FXP_CB_COMMAND_NOP; 1326 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status); 1327 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]); 1328 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK]; 1329 } 1330 /* 1331 * Set the suspend flag on the first TxCB and start the control 1332 * unit. It will execute the NOP and then suspend. 1333 */ 1334 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; 1335 sc->cbl_first = sc->cbl_last = txp; 1336 sc->tx_queued = 1; 1337 1338 fxp_scb_wait(sc); 1339 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1340 1341 /* 1342 * Initialize receiver buffer area - RFA. 1343 */ 1344 fxp_scb_wait(sc); 1345 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1346 vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE); 1347 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START); 1348 1349 /* 1350 * Set current media. 1351 */ 1352 fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media); 1353 1354 ifp->if_flags |= IFF_RUNNING; 1355 ifp->if_flags &= ~IFF_OACTIVE; 1356 splx(s); 1357 1358 /* 1359 * Start stats updater. 1360 */ 1361 sc->stat_ch = timeout(fxp_stats_update, sc, hz); 1362} 1363 1364static void 1365fxp_set_media(sc, media) 1366 struct fxp_softc *sc; 1367 int media; 1368{ 1369 1370 switch (sc->phy_primary_device) { 1371 case FXP_PHY_DP83840: 1372 case FXP_PHY_DP83840A: 1373 fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR, 1374 fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) | 1375 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */ 1376 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */ 1377 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */ 1378 /* fall through */ 1379 case FXP_PHY_82555: 1380 if (IFM_SUBTYPE(media) != IFM_AUTO) { 1381 int flags; 1382 1383 flags = (IFM_SUBTYPE(media) == IFM_100_TX) ? 1384 FXP_PHY_BMCR_SPEED_100M : 0; 1385 flags |= (media & IFM_FDX) ? 1386 FXP_PHY_BMCR_FULLDUPLEX : 0; 1387 fxp_mdi_write(sc, sc->phy_primary_addr, 1388 FXP_PHY_BMCR, 1389 (fxp_mdi_read(sc, sc->phy_primary_addr, 1390 FXP_PHY_BMCR) & 1391 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M | 1392 FXP_PHY_BMCR_FULLDUPLEX)) | flags); 1393 } else { 1394 fxp_mdi_write(sc, sc->phy_primary_addr, 1395 FXP_PHY_BMCR, 1396 (fxp_mdi_read(sc, sc->phy_primary_addr, 1397 FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN)); 1398 } 1399 break; 1400 /* 1401 * The Seeq 80c24 doesn't have a PHY programming interface, so do 1402 * nothing. 1403 */ 1404 case FXP_PHY_80C24: 1405 break; 1406 default: 1407 printf(FXP_FORMAT 1408 ": warning: unsupported PHY, type = %d, addr = %d\n", 1409 FXP_ARGS(sc), sc->phy_primary_device, 1410 sc->phy_primary_addr); 1411 } 1412} 1413 1414/* 1415 * Change media according to request. 1416 */ 1417int 1418fxp_mediachange(ifp) 1419 struct ifnet *ifp; 1420{ 1421 struct fxp_softc *sc = ifp->if_softc; 1422 struct ifmedia *ifm = &sc->sc_media; 1423 1424 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1425 return (EINVAL); 1426 1427 fxp_set_media(sc, ifm->ifm_media); 1428 return (0); 1429} 1430 1431/* 1432 * Notify the world which media we're using. 1433 */ 1434void 1435fxp_mediastatus(ifp, ifmr) 1436 struct ifnet *ifp; 1437 struct ifmediareq *ifmr; 1438{ 1439 struct fxp_softc *sc = ifp->if_softc; 1440 int flags; 1441 1442 switch (sc->phy_primary_device) { 1443 case FXP_PHY_DP83840: 1444 case FXP_PHY_DP83840A: 1445 case FXP_PHY_82555: 1446 flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR); 1447 ifmr->ifm_active = IFM_ETHER; 1448 if (flags & FXP_PHY_BMCR_AUTOEN) 1449 ifmr->ifm_active |= IFM_AUTO; 1450 else { 1451 if (flags & FXP_PHY_BMCR_SPEED_100M) 1452 ifmr->ifm_active |= IFM_100_TX; 1453 else 1454 ifmr->ifm_active |= IFM_10_T; 1455 1456 if (flags & FXP_PHY_BMCR_FULLDUPLEX) 1457 ifmr->ifm_active |= IFM_FDX; 1458 } 1459 break; 1460 1461 case FXP_PHY_80C24: 1462 default: 1463 ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */ 1464 } 1465} 1466 1467/* 1468 * Add a buffer to the end of the RFA buffer list. 1469 * Return 0 if successful, 1 for failure. A failure results in 1470 * adding the 'oldm' (if non-NULL) on to the end of the list - 1471 * tossing out it's old contents and recycling it. 1472 * The RFA struct is stuck at the beginning of mbuf cluster and the 1473 * data pointer is fixed up to point just past it. 1474 */ 1475static int 1476fxp_add_rfabuf(sc, oldm) 1477 struct fxp_softc *sc; 1478 struct mbuf *oldm; 1479{ 1480 u_int32_t v; 1481 struct mbuf *m; 1482 struct fxp_rfa *rfa, *p_rfa; 1483 1484 MGETHDR(m, M_DONTWAIT, MT_DATA); 1485 if (m != NULL) { 1486 MCLGET(m, M_DONTWAIT); 1487 if ((m->m_flags & M_EXT) == 0) { 1488 m_freem(m); 1489 if (oldm == NULL) 1490 return 1; 1491 m = oldm; 1492 m->m_data = m->m_ext.ext_buf; 1493 } 1494 } else { 1495 if (oldm == NULL) 1496 return 1; 1497 m = oldm; 1498 m->m_data = m->m_ext.ext_buf; 1499 } 1500 1501 /* 1502 * Move the data pointer up so that the incoming data packet 1503 * will be 32-bit aligned. 1504 */ 1505 m->m_data += RFA_ALIGNMENT_FUDGE; 1506 1507 /* 1508 * Get a pointer to the base of the mbuf cluster and move 1509 * data start past it. 1510 */ 1511 rfa = mtod(m, struct fxp_rfa *); 1512 m->m_data += sizeof(struct fxp_rfa); 1513 rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE; 1514 1515 /* 1516 * Initialize the rest of the RFA. Note that since the RFA 1517 * is misaligned, we cannot store values directly. Instead, 1518 * we use an optimized, inline copy. 1519 */ 1520 rfa->rfa_status = 0; 1521 rfa->rfa_control = FXP_RFA_CONTROL_EL; 1522 rfa->actual_size = 0; 1523 1524 v = -1; 1525 fxp_lwcopy(&v, &rfa->link_addr); 1526 fxp_lwcopy(&v, &rfa->rbd_addr); 1527 1528 /* 1529 * If there are other buffers already on the list, attach this 1530 * one to the end by fixing up the tail to point to this one. 1531 */ 1532 if (sc->rfa_headm != NULL) { 1533 p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf + 1534 RFA_ALIGNMENT_FUDGE); 1535 sc->rfa_tailm->m_next = m; 1536 v = vtophys(rfa); 1537 fxp_lwcopy(&v, &p_rfa->link_addr); 1538 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL; 1539 } else { 1540 sc->rfa_headm = m; 1541 } 1542 sc->rfa_tailm = m; 1543 1544 return (m == oldm); 1545} 1546 1547static volatile int 1548fxp_mdi_read(sc, phy, reg) 1549 struct fxp_softc *sc; 1550 int phy; 1551 int reg; 1552{ 1553 int count = 10000; 1554 int value; 1555 1556 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1557 (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21)); 1558 1559 while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 1560 && count--) 1561 DELAY(10); 1562 1563 if (count <= 0) 1564 printf(FXP_FORMAT ": fxp_mdi_read: timed out\n", 1565 FXP_ARGS(sc)); 1566 1567 return (value & 0xffff); 1568} 1569 1570static void 1571fxp_mdi_write(sc, phy, reg, value) 1572 struct fxp_softc *sc; 1573 int phy; 1574 int reg; 1575 int value; 1576{ 1577 int count = 10000; 1578 1579 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1580 (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | 1581 (value & 0xffff)); 1582 1583 while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && 1584 count--) 1585 DELAY(10); 1586 1587 if (count <= 0) 1588 printf(FXP_FORMAT ": fxp_mdi_write: timed out\n", 1589 FXP_ARGS(sc)); 1590} 1591 1592static int 1593fxp_ioctl(ifp, command, data) 1594 struct ifnet *ifp; 1595 FXP_IOCTLCMD_TYPE command; 1596 caddr_t data; 1597{ 1598 struct fxp_softc *sc = ifp->if_softc; 1599 struct ifreq *ifr = (struct ifreq *)data; 1600 int s, error = 0; 1601 1602 s = splimp(); 1603 1604 switch (command) { 1605 1606 case SIOCSIFADDR: 1607#if !defined(__NetBSD__) 1608 case SIOCGIFADDR: 1609 case SIOCSIFMTU: 1610#endif 1611 error = ether_ioctl(ifp, command, data); 1612 break; 1613 1614 case SIOCSIFFLAGS: 1615 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1616 1617 /* 1618 * If interface is marked up and not running, then start it. 1619 * If it is marked down and running, stop it. 1620 * XXX If it's up then re-initialize it. This is so flags 1621 * such as IFF_PROMISC are handled. 1622 */ 1623 if (ifp->if_flags & IFF_UP) { 1624 fxp_init(sc); 1625 } else { 1626 if (ifp->if_flags & IFF_RUNNING) 1627 fxp_stop(sc); 1628 } 1629 break; 1630 1631 case SIOCADDMULTI: 1632 case SIOCDELMULTI: 1633 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1634#if defined(__NetBSD__) 1635 error = (command == SIOCADDMULTI) ? 1636 ether_addmulti(ifr, &sc->sc_ethercom) : 1637 ether_delmulti(ifr, &sc->sc_ethercom); 1638 1639 if (error == ENETRESET) { 1640 /* 1641 * Multicast list has changed; set the hardware 1642 * filter accordingly. 1643 */ 1644 if (!sc->all_mcasts) 1645 fxp_mc_setup(sc); 1646 /* 1647 * fxp_mc_setup() can turn on all_mcasts if we run 1648 * out of space, so check it again rather than else {}. 1649 */ 1650 if (sc->all_mcasts) 1651 fxp_init(sc); 1652 error = 0; 1653 } 1654#else /* __FreeBSD__ */ 1655 /* 1656 * Multicast list has changed; set the hardware filter 1657 * accordingly. 1658 */ 1659 if (!sc->all_mcasts) 1660 fxp_mc_setup(sc); 1661 /* 1662 * fxp_mc_setup() can turn on sc->all_mcasts, so check it 1663 * again rather than else {}. 1664 */ 1665 if (sc->all_mcasts) 1666 fxp_init(sc); 1667 error = 0; 1668#endif /* __NetBSD__ */ 1669 break; 1670 1671 case SIOCSIFMEDIA: 1672 case SIOCGIFMEDIA: 1673 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); 1674 break; 1675 1676 default: 1677 error = EINVAL; 1678 } 1679 (void) splx(s); 1680 return (error); 1681} 1682 1683/* 1684 * Program the multicast filter. 1685 * 1686 * We have an artificial restriction that the multicast setup command 1687 * must be the first command in the chain, so we take steps to ensure 1688 * that. By requiring this, it allows us to keep the performance of 1689 * the pre-initialized command ring (esp. link pointers) by not actually 1690 * inserting the mcsetup command in the ring - i.e. it's link pointer 1691 * points to the TxCB ring, but the mcsetup descriptor itself is not part 1692 * of it. We then can do 'CU_START' on the mcsetup descriptor and have it 1693 * lead into the regular TxCB ring when it completes. 1694 * 1695 * This function must be called at splimp. 1696 */ 1697static void 1698fxp_mc_setup(sc) 1699 struct fxp_softc *sc; 1700{ 1701 struct fxp_cb_mcs *mcsp = sc->mcsp; 1702 struct ifnet *ifp = &sc->sc_if; 1703 struct ifmultiaddr *ifma; 1704 int nmcasts; 1705 1706 if (sc->tx_queued) { 1707 sc->need_mcsetup = 1; 1708 return; 1709 } 1710 sc->need_mcsetup = 0; 1711 1712 /* 1713 * Initialize multicast setup descriptor. 1714 */ 1715 mcsp->next = sc->cbl_base; 1716 mcsp->mb_head = NULL; 1717 mcsp->cb_status = 0; 1718 mcsp->cb_command = FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_S; 1719 mcsp->link_addr = vtophys(&sc->cbl_base->cb_status); 1720 1721 nmcasts = 0; 1722 if (!sc->all_mcasts) { 1723 for (ifma = ifp->if_multiaddrs.lh_first; ifma != NULL; 1724 ifma = ifma->ifma_link.le_next) { 1725 if (ifma->ifma_addr->sa_family != AF_LINK) 1726 continue; 1727 if (nmcasts >= MAXMCADDR) { 1728 sc->all_mcasts = 1; 1729 nmcasts = 0; 1730 break; 1731 } 1732 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1733 (void *) &sc->mcsp->mc_addr[nmcasts][0], 6); 1734 nmcasts++; 1735 } 1736 } 1737 mcsp->mc_cnt = nmcasts * 6; 1738 sc->cbl_first = sc->cbl_last = (struct fxp_cb_tx *) mcsp; 1739 sc->tx_queued = 1; 1740 1741 /* 1742 * Wait until command unit is not active. This should never 1743 * be the case when nothing is queued, but make sure anyway. 1744 */ 1745 while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) == 1746 FXP_SCB_CUS_ACTIVE) ; 1747 1748 /* 1749 * Start the multicast setup command. 1750 */ 1751 fxp_scb_wait(sc); 1752 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&mcsp->cb_status)); 1753 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1754 1755 ifp->if_timer = 5; 1756 return; 1757} 1758