if_fxp.c revision 30655
133965Sjdp/*
278828Sobrien * Copyright (c) 1995, David Greenman
3218822Sdim * All rights reserved.
4218822Sdim *
5218822Sdim * Modifications to support NetBSD and media selection:
678828Sobrien * Copyright (c) 1997 Jason R. Thorpe.  All rights reserved.
778828Sobrien *
878828Sobrien * Redistribution and use in source and binary forms, with or without
978828Sobrien * modification, are permitted provided that the following conditions
1078828Sobrien * are met:
1178828Sobrien * 1. Redistributions of source code must retain the above copyright
1278828Sobrien *    notice unmodified, this list of conditions, and the following
1378828Sobrien *    disclaimer.
1478828Sobrien * 2. Redistributions in binary form must reproduce the above copyright
1578828Sobrien *    notice, this list of conditions and the following disclaimer in the
1678828Sobrien *    documentation and/or other materials provided with the distribution.
1778828Sobrien *
18218822Sdim * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19218822Sdim * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20218822Sdim * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2133965Sjdp * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
2233965Sjdp * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2333965Sjdp * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2433965Sjdp * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2533965Sjdp * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2633965Sjdp * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2733965Sjdp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2833965Sjdp * SUCH DAMAGE.
2933965Sjdp *
3033965Sjdp *	$Id: if_fxp.c,v 1.44 1997/10/17 06:27:44 davidg Exp $
3160484Sobrien */
3260484Sobrien
3360484Sobrien/*
3460484Sobrien * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
3533965Sjdp */
3633965Sjdp
3733965Sjdp#include "bpfilter.h"
38218822Sdim
3933965Sjdp#include <sys/param.h>
40218822Sdim#include <sys/systm.h>
41218822Sdim#include <sys/mbuf.h>
4233965Sjdp#include <sys/malloc.h>
4333965Sjdp#include <sys/kernel.h>
4433965Sjdp#include <sys/socket.h>
4533965Sjdp#include <sys/syslog.h>
4633965Sjdp
4733965Sjdp#include <net/if.h>
4833965Sjdp#include <net/if_dl.h>
4933965Sjdp#include <net/if_media.h>
5033965Sjdp
5133965Sjdp#ifdef INET
52218822Sdim#include <netinet/in.h>
5333965Sjdp#endif
5433965Sjdp
5533965Sjdp#ifdef NS
5633965Sjdp#include <netns/ns.h>
5733965Sjdp#include <netns/ns_if.h>
5833965Sjdp#endif
5933965Sjdp
6033965Sjdp#if NBPFILTER > 0
6133965Sjdp#include <net/bpf.h>
62218822Sdim#endif
63218822Sdim
6433965Sjdp#if defined(__NetBSD__)
65130561Sobrien
66130561Sobrien#include <sys/ioctl.h>
6733965Sjdp#include <sys/errno.h>
6833965Sjdp#include <sys/device.h>
6933965Sjdp
7033965Sjdp#include <net/if_dl.h>
7133965Sjdp#include <net/if_ether.h>
7233965Sjdp
7333965Sjdp#include <netinet/if_inarp.h>
7433965Sjdp
7533965Sjdp#include <vm/vm.h>
7633965Sjdp
7733965Sjdp#include <machine/cpu.h>
7833965Sjdp#include <machine/bus.h>
7991041Sobrien#include <machine/intr.h>
8091041Sobrien
8191041Sobrien#include <dev/pci/if_fxpreg.h>
8291041Sobrien#include <dev/pci/if_fxpvar.h>
83218822Sdim
8433965Sjdp#include <dev/pci/pcivar.h>
8577298Sobrien#include <dev/pci/pcireg.h>
8677298Sobrien#include <dev/pci/pcidevs.h>
8777298Sobrien
8877298Sobrien#ifdef __alpha__		/* XXX */
8977298Sobrien/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
9038889Sjdp#undef vtophys
9138889Sjdp#define	vtophys(va)	alpha_XXX_dmamap((vm_offset_t)(va))
9238889Sjdp#endif /* __alpha__ */
9338889Sjdp
9438889Sjdp#else /* __FreeBSD__ */
9538889Sjdp
9638889Sjdp#include <sys/sockio.h>
9738889Sjdp
9838889Sjdp#include <netinet/if_ether.h>
99218822Sdim
100218822Sdim#include <vm/vm.h>		/* for vtophys */
101218822Sdim#include <vm/pmap.h>		/* for vtophys */
102218822Sdim#include <machine/clock.h>	/* for DELAY */
103218822Sdim
104218822Sdim#include <pci/pcivar.h>
10533965Sjdp#include <pci/if_fxpreg.h>
10633965Sjdp#include <pci/if_fxpvar.h>
10733965Sjdp
10833965Sjdp#endif /* __NetBSD__ */
10938889Sjdp
110130561Sobrien/*
11133965Sjdp * NOTE!  On the Alpha, we have an alignment constraint.  The
11233965Sjdp * card DMAs the packet immediately following the RFA.  However,
11333965Sjdp * the first thing in the packet is a 14-byte Ethernet header.
11433965Sjdp * This means that the packet is misaligned.  To compensate,
11533965Sjdp * we actually offset the RFA 2 bytes into the cluster.  This
11633965Sjdp * alignes the packet after the Ethernet header at a 32-bit
11733965Sjdp * boundary.  HOWEVER!  This means that the RFA is misaligned!
118130561Sobrien */
119130561Sobrien#define	RFA_ALIGNMENT_FUDGE	2
12033965Sjdp
12133965Sjdp/*
12233965Sjdp * Inline function to copy a 16-bit aligned 32-bit quantity.
12333965Sjdp */
12433965Sjdpstatic __inline void fxp_lwcopy __P((volatile u_int32_t *,
12533965Sjdp	volatile u_int32_t *));
126130561Sobrienstatic __inline void
12733965Sjdpfxp_lwcopy(src, dst)
12833965Sjdp	volatile u_int32_t *src, *dst;
12933965Sjdp{
130130561Sobrien	volatile u_int16_t *a = (u_int16_t *)src;
13133965Sjdp	volatile u_int16_t *b = (u_int16_t *)dst;
13238889Sjdp
13338889Sjdp	b[0] = a[0];
13438889Sjdp	b[1] = a[1];
13538889Sjdp}
13638889Sjdp
13738889Sjdp/*
13838889Sjdp * Template for default configuration parameters.
13938889Sjdp * See struct fxp_cb_config for the bit definitions.
140130561Sobrien */
14138889Sjdpstatic u_char fxp_cb_config_template[] = {
142130561Sobrien	0x0, 0x0,		/* cb_status */
143130561Sobrien	0x80, 0x2,		/* cb_command */
144130561Sobrien	0xff, 0xff, 0xff, 0xff,	/* link_addr */
145130561Sobrien	0x16,	/*  0 */
146130561Sobrien	0x8,	/*  1 */
147218822Sdim	0x0,	/*  2 */
14833965Sjdp	0x0,	/*  3 */
14933965Sjdp	0x0,	/*  4 */
15033965Sjdp	0x80,	/*  5 */
15160484Sobrien	0xb2,	/*  6 */
15233965Sjdp	0x3,	/*  7 */
15333965Sjdp	0x1,	/*  8 */
15433965Sjdp	0x0,	/*  9 */
15533965Sjdp	0x26,	/* 10 */
15633965Sjdp	0x0,	/* 11 */
15733965Sjdp	0x60,	/* 12 */
15833965Sjdp	0x0,	/* 13 */
159130561Sobrien	0xf2,	/* 14 */
16033965Sjdp	0x48,	/* 15 */
16133965Sjdp	0x0,	/* 16 */
16233965Sjdp	0x40,	/* 17 */
16333965Sjdp	0xf3,	/* 18 */
16433965Sjdp	0x0,	/* 19 */
16533965Sjdp	0x3f,	/* 20 */
16633965Sjdp	0x5	/* 21 */
167218822Sdim};
16889857Sobrien
16960484Sobrien/* Supported media types. */
17060484Sobrienstruct fxp_supported_media {
171218822Sdim	const int	fsm_phy;	/* PHY type */
172218822Sdim	const int	*fsm_media;	/* the media array */
173218822Sdim	const int	fsm_nmedia;	/* the number of supported media */
174218822Sdim	const int	fsm_defmedia;	/* default media for this PHY */
175218822Sdim};
176218822Sdim
177218822Sdimconst int fxp_media_standard[] = {
178218822Sdim	IFM_ETHER|IFM_10_T,
179218822Sdim	IFM_ETHER|IFM_10_T|IFM_FDX,
180218822Sdim	IFM_ETHER|IFM_100_TX,
181218822Sdim	IFM_ETHER|IFM_100_TX|IFM_FDX,
182218822Sdim	IFM_ETHER|IFM_AUTO,
183218822Sdim};
184218822Sdim#define	FXP_MEDIA_STANDARD_DEFMEDIA	(IFM_ETHER|IFM_AUTO)
185218822Sdim
18633965Sjdpconst int fxp_media_default[] = {
18733965Sjdp	IFM_ETHER|IFM_MANUAL,		/* XXX IFM_AUTO ? */
18833965Sjdp};
18933965Sjdp#define	FXP_MEDIA_DEFAULT_DEFMEDIA	(IFM_ETHER|IFM_MANUAL)
19033965Sjdp
19133965Sjdpconst struct fxp_supported_media fxp_media[] = {
19233965Sjdp	{ FXP_PHY_DP83840, fxp_media_standard,
19333965Sjdp	  sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
19433965Sjdp	  FXP_MEDIA_STANDARD_DEFMEDIA },
19533965Sjdp	{ FXP_PHY_DP83840A, fxp_media_standard,
19633965Sjdp	  sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
19733965Sjdp	  FXP_MEDIA_STANDARD_DEFMEDIA },
19833965Sjdp	{ FXP_PHY_82555, fxp_media_standard,
19933965Sjdp	  sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
20033965Sjdp	  FXP_MEDIA_STANDARD_DEFMEDIA },
20133965Sjdp	{ FXP_PHY_80C24, fxp_media_default,
20260484Sobrien	  sizeof(fxp_media_default) / sizeof(fxp_media_default[0]),
20360484Sobrien	  FXP_MEDIA_DEFAULT_DEFMEDIA },
20460484Sobrien};
20533965Sjdp#define	NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0]))
20633965Sjdp
20733965Sjdpstatic int fxp_mediachange	__P((struct ifnet *));
20833965Sjdpstatic void fxp_mediastatus	__P((struct ifnet *, struct ifmediareq *));
20989857Sobrienvoid fxp_set_media		__P((struct fxp_softc *, int));
210130561Sobrienstatic inline void fxp_scb_wait	__P((struct fxp_softc *));
21133965Sjdpstatic FXP_INTR_TYPE fxp_intr	__P((void *));
212130561Sobrienstatic void fxp_start		__P((struct ifnet *));
213218822Sdimstatic int fxp_ioctl		__P((struct ifnet *,
214218822Sdim				    FXP_IOCTLCMD_TYPE, caddr_t));
215130561Sobrienstatic void fxp_init		__P((void *));
216218822Sdimstatic void fxp_stop		__P((struct fxp_softc *));
217218822Sdimstatic void fxp_watchdog	__P((struct ifnet *));
218218822Sdimstatic int fxp_add_rfabuf	__P((struct fxp_softc *, struct mbuf *));
219218822Sdimstatic int fxp_mdi_read		__P((struct fxp_softc *, int, int));
220218822Sdimstatic void fxp_mdi_write	__P((struct fxp_softc *, int, int, int));
221218822Sdimstatic void fxp_read_eeprom	__P((struct fxp_softc *, u_int16_t *,
222130561Sobrien				    int, int));
223130561Sobrienstatic int fxp_attach_common	__P((struct fxp_softc *, u_int8_t *));
224130561Sobrienvoid fxp_stats_update		__P((void *));
225130561Sobrienstatic void fxp_mc_setup	__P((struct fxp_softc *));
226218822Sdim
227218822Sdim/*
228218822Sdim * Set initial transmit threshold at 64 (512 bytes). This is
229218822Sdim * increased by 64 (512 bytes) at a time, to maximum of 192
230218822Sdim * (1536 bytes), if an underrun occurs.
231130561Sobrien */
232218822Sdimstatic int tx_threshold = 64;
233218822Sdim
234218822Sdim/*
235218822Sdim * Number of transmit control blocks. This determines the number
236130561Sobrien * of transmit buffers that can be chained in the CB list.
237130561Sobrien * This must be a power of two.
238218822Sdim */
239130561Sobrien#define FXP_NTXCB	128
240218822Sdim
241218822Sdim/*
242218822Sdim * TxCB list index mask. This is used to do list wrap-around.
243218822Sdim */
244218822Sdim#define FXP_TXCB_MASK	(FXP_NTXCB - 1)
245218822Sdim
246218822Sdim/*
247130561Sobrien * Number of receive frame area buffers. These are large so chose
248218822Sdim * wisely.
249218822Sdim */
250218822Sdim#define FXP_NRFABUFS	64
251130561Sobrien
252218822Sdim/*
253218822Sdim * Maximum number of seconds that the receiver can be idle before we
254130561Sobrien * assume it's dead and attempt to reset it by reprogramming the
255218822Sdim * multicast filter. This is part of a work-around for a bug in the
256130561Sobrien * NIC. See fxp_stats_update().
257130561Sobrien */
258130561Sobrien#define FXP_MAX_RX_IDLE	15
259130561Sobrien
260218822Sdim/*
261130561Sobrien * Wait for the previous command to be accepted (but not necessarily
262130561Sobrien * completed).
263130561Sobrien */
264130561Sobrienstatic inline void
265130561Sobrienfxp_scb_wait(sc)
266218822Sdim	struct fxp_softc *sc;
267130561Sobrien{
268218822Sdim	int i = 10000;
269218822Sdim
270218822Sdim	while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i);
271218822Sdim}
272130561Sobrien
273130561Sobrien/*************************************************************
274130561Sobrien * Operating system-specific autoconfiguration glue
275130561Sobrien *************************************************************/
276130561Sobrien
277130561Sobrien#if defined(__NetBSD__)
278130561Sobrien
279218822Sdim#ifdef __BROKEN_INDIRECT_CONFIG
280130561Sobrienstatic int fxp_match __P((struct device *, void *, void *));
281130561Sobrien#else
282218822Sdimstatic int fxp_match __P((struct device *, struct cfdata *, void *));
283218822Sdim#endif
284218822Sdimstatic void fxp_attach __P((struct device *, struct device *, void *));
28533965Sjdp
286130561Sobrienstatic void	fxp_shutdown __P((void *));
287130561Sobrien
28889857Sobrien/* Compensate for lack of a generic ether_ioctl() */
289218822Sdimstatic int	fxp_ether_ioctl __P((struct ifnet *,
290130561Sobrien				    FXP_IOCTLCMD_TYPE, caddr_t));
291130561Sobrien#define	ether_ioctl	fxp_ether_ioctl
292130561Sobrien
293130561Sobrienstruct cfattach fxp_ca = {
294218822Sdim	sizeof(struct fxp_softc), fxp_match, fxp_attach
295218822Sdim};
296218822Sdim
297130561Sobrienstruct cfdriver fxp_cd = {
29860484Sobrien	NULL, "fxp", DV_IFNET
29933965Sjdp};
300130561Sobrien
30133965Sjdp/*
302130561Sobrien * Check if a device is an 82557.
303130561Sobrien */
304130561Sobrienstatic int
305130561Sobrienfxp_match(parent, match, aux)
30660484Sobrien	struct device *parent;
307130561Sobrien#ifdef __BROKEN_INDIRECT_CONFIG
30860484Sobrien	void *match;
30933965Sjdp#else
31033965Sjdp	struct cfdata *match;
31133965Sjdp#endif
31233965Sjdp	void *aux;
31333965Sjdp{
31433965Sjdp	struct pci_attach_args *pa = aux;
31533965Sjdp
316130561Sobrien	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
31733965Sjdp		return (0);
31833965Sjdp
31933965Sjdp	switch (PCI_PRODUCT(pa->pa_id)) {
320130561Sobrien	case PCI_PRODUCT_INTEL_82557:
32133965Sjdp		return (1);
32233965Sjdp	}
32333965Sjdp
32433965Sjdp	return (0);
32533965Sjdp}
32633965Sjdp
327130561Sobrienstatic void
32833965Sjdpfxp_attach(parent, self, aux)
32938889Sjdp	struct device *parent, *self;
33038889Sjdp	void *aux;
331130561Sobrien{
33238889Sjdp	struct fxp_softc *sc = (struct fxp_softc *)self;
333218822Sdim	struct pci_attach_args *pa = aux;
334130561Sobrien	pci_chipset_tag_t pc = pa->pa_pc;
335130561Sobrien	pci_intr_handle_t ih;
336218822Sdim	const char *intrstr = NULL;
337130561Sobrien	u_int8_t enaddr[6];
338130561Sobrien	struct ifnet *ifp;
339130561Sobrien
340130561Sobrien	/*
341130561Sobrien	 * Map control/status registers.
342130561Sobrien	 */
34333965Sjdp	if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0,
344130561Sobrien	    &sc->sc_st, &sc->sc_sh, NULL, NULL)) {
345130561Sobrien		printf(": can't map registers\n");
346130561Sobrien		return;
34733965Sjdp	}
34833965Sjdp	printf(": Intel EtherExpress Pro 10/100B Ethernet\n");
34960484Sobrien
350104834Sobrien	/*
35160484Sobrien	 * Allocate our interrupt.
35260484Sobrien	 */
35333965Sjdp	if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
354	    pa->pa_intrline, &ih)) {
355		printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
356		return;
357	}
358	intrstr = pci_intr_string(pc, ih);
359	sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc);
360	if (sc->sc_ih == NULL) {
361		printf("%s: couldn't establish interrupt",
362		    sc->sc_dev.dv_xname);
363		if (intrstr != NULL)
364			printf(" at %s", intrstr);
365		printf("\n");
366		return;
367	}
368	printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
369
370	/* Do generic parts of attach. */
371	if (fxp_attach_common(sc, enaddr)) {
372		/* Failed! */
373		return;
374	}
375
376	printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname,
377	    ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : "");
378
379	ifp = &sc->sc_ethercom.ec_if;
380	bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
381	ifp->if_softc = sc;
382	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
383	ifp->if_ioctl = fxp_ioctl;
384	ifp->if_start = fxp_start;
385	ifp->if_watchdog = fxp_watchdog;
386
387	/*
388	 * Attach the interface.
389	 */
390	if_attach(ifp);
391	/*
392	 * Let the system queue as many packets as we have TX descriptors.
393	 */
394	ifp->if_snd.ifq_maxlen = FXP_NTXCB;
395	ether_ifattach(ifp, enaddr);
396#if NBPFILTER > 0
397	bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
398	    sizeof(struct ether_header));
399#endif
400
401	/*
402	 * Add shutdown hook so that DMA is disabled prior to reboot. Not
403	 * doing do could allow DMA to corrupt kernel memory during the
404	 * reboot before the driver initializes.
405	 */
406	shutdownhook_establish(fxp_shutdown, sc);
407}
408
409/*
410 * Device shutdown routine. Called at system shutdown after sync. The
411 * main purpose of this routine is to shut off receiver DMA so that
412 * kernel memory doesn't get clobbered during warmboot.
413 */
414static void
415fxp_shutdown(sc)
416	void *sc;
417{
418	fxp_stop((struct fxp_softc *) sc);
419}
420
421static int
422fxp_ether_ioctl(ifp, cmd, data)
423	struct ifnet *ifp;
424	FXP_IOCTLCMD_TYPE cmd;
425	caddr_t data;
426{
427	struct ifaddr *ifa = (struct ifaddr *) data;
428	struct fxp_softc *sc = ifp->if_softc;
429
430	switch (cmd) {
431	case SIOCSIFADDR:
432		ifp->if_flags |= IFF_UP;
433
434		switch (ifa->ifa_addr->sa_family) {
435#ifdef INET
436		case AF_INET:
437			fxp_init(sc);
438			arp_ifinit(ifp, ifa);
439			break;
440#endif
441#ifdef NS
442		case AF_NS:
443		    {
444			 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
445
446			 if (ns_nullhost(*ina))
447				ina->x_host = *(union ns_host *)
448				    LLADDR(ifp->if_sadl);
449			 else
450				bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
451				    ifp->if_addrlen);
452			 /* Set new address. */
453			 fxp_init(sc);
454			 break;
455		    }
456#endif
457		default:
458			fxp_init(sc);
459			break;
460		}
461		break;
462
463	default:
464		return (EINVAL);
465	}
466
467	return (0);
468}
469
470#else /* __FreeBSD__ */
471
472static u_long fxp_count;
473static char *fxp_probe		__P((pcici_t, pcidi_t));
474static void fxp_attach		__P((pcici_t, int));
475
476static void fxp_shutdown	__P((int, void *));
477
478static struct pci_device fxp_device = {
479	"fxp",
480	fxp_probe,
481	fxp_attach,
482	&fxp_count,
483	NULL
484};
485DATA_SET(pcidevice_set, fxp_device);
486
487/*
488 * Return identification string if this is device is ours.
489 */
490static char *
491fxp_probe(config_id, device_id)
492	pcici_t config_id;
493	pcidi_t device_id;
494{
495	if (((device_id & 0xffff) == FXP_VENDORID_INTEL) &&
496	    ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557)
497		return ("Intel EtherExpress Pro 10/100B Ethernet");
498
499	return NULL;
500}
501
502static void
503fxp_attach(config_id, unit)
504	pcici_t config_id;
505	int unit;
506{
507	struct fxp_softc *sc;
508	vm_offset_t pbase;
509	struct ifnet *ifp;
510	int s;
511
512	sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT);
513	if (sc == NULL)
514		return;
515	bzero(sc, sizeof(struct fxp_softc));
516	callout_handle_init(&sc->stat_ch);
517
518	s = splimp();
519
520	/*
521	 * Map control/status registers.
522	 */
523	if (!pci_map_mem(config_id, FXP_PCI_MMBA,
524	    (vm_offset_t *)&sc->csr, &pbase)) {
525		printf("fxp%d: couldn't map memory\n", unit);
526		goto fail;
527	}
528
529	/*
530	 * Allocate our interrupt.
531	 */
532	if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) {
533		printf("fxp%d: couldn't map interrupt\n", unit);
534		goto fail;
535	}
536
537	/* Do generic parts of attach. */
538	if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) {
539		/* Failed! */
540		(void) pci_unmap_int(config_id);
541		goto fail;
542	}
543
544	printf("fxp%d: Ethernet address %6D%s\n", unit,
545	    sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : "");
546
547	ifp = &sc->arpcom.ac_if;
548	ifp->if_unit = unit;
549	ifp->if_name = "fxp";
550	ifp->if_output = ether_output;
551	ifp->if_baudrate = 100000000;
552	ifp->if_init = fxp_init;
553	ifp->if_softc = sc;
554	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
555	ifp->if_ioctl = fxp_ioctl;
556	ifp->if_start = fxp_start;
557	ifp->if_watchdog = fxp_watchdog;
558
559	/*
560	 * Attach the interface.
561	 */
562	if_attach(ifp);
563	/*
564	 * Let the system queue as many packets as we have TX descriptors.
565	 */
566	ifp->if_snd.ifq_maxlen = FXP_NTXCB;
567	ether_ifattach(ifp);
568#if NBPFILTER > 0
569	bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
570#endif
571
572	/*
573	 * Add shutdown hook so that DMA is disabled prior to reboot. Not
574	 * doing do could allow DMA to corrupt kernel memory during the
575	 * reboot before the driver initializes.
576	 */
577	at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC);
578
579	splx(s);
580	return;
581
582 fail:
583	free(sc, M_DEVBUF);
584	splx(s);
585}
586
587/*
588 * Device shutdown routine. Called at system shutdown after sync. The
589 * main purpose of this routine is to shut off receiver DMA so that
590 * kernel memory doesn't get clobbered during warmboot.
591 */
592static void
593fxp_shutdown(howto, sc)
594	int howto;
595	void *sc;
596{
597	fxp_stop((struct fxp_softc *) sc);
598}
599
600#endif /* __NetBSD__ */
601
602/*************************************************************
603 * End of operating system-specific autoconfiguration glue
604 *************************************************************/
605
606/*
607 * Do generic parts of attach.
608 */
609static int
610fxp_attach_common(sc, enaddr)
611	struct fxp_softc *sc;
612	u_int8_t *enaddr;
613{
614	u_int16_t data;
615	int i, nmedia, defmedia;
616	const int *media;
617
618	/*
619	 * Reset to a stable state.
620	 */
621	CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
622	DELAY(10);
623
624	sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB,
625	    M_DEVBUF, M_NOWAIT);
626	if (sc->cbl_base == NULL)
627		goto fail;
628
629	sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT);
630	if (sc->fxp_stats == NULL)
631		goto fail;
632	bzero(sc->fxp_stats, sizeof(struct fxp_stats));
633
634	sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT);
635	if (sc->mcsp == NULL)
636		goto fail;
637
638	/*
639	 * Pre-allocate our receive buffers.
640	 */
641	for (i = 0; i < FXP_NRFABUFS; i++) {
642		if (fxp_add_rfabuf(sc, NULL) != 0) {
643			goto fail;
644		}
645	}
646
647	/*
648	 * Get info about the primary PHY
649	 */
650	fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1);
651	sc->phy_primary_addr = data & 0xff;
652	sc->phy_primary_device = (data >> 8) & 0x3f;
653	sc->phy_10Mbps_only = data >> 15;
654
655	/*
656	 * Read MAC address.
657	 */
658	fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3);
659
660	/*
661	 * Initialize the media structures.
662	 */
663
664	media = fxp_media_default;
665	nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]);
666	defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA;
667
668	for (i = 0; i < NFXPMEDIA; i++) {
669		if (sc->phy_primary_device == fxp_media[i].fsm_phy) {
670			media = fxp_media[i].fsm_media;
671			nmedia = fxp_media[i].fsm_nmedia;
672			defmedia = fxp_media[i].fsm_defmedia;
673		}
674	}
675
676	ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus);
677	for (i = 0; i < nmedia; i++) {
678		if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only)
679			continue;
680		ifmedia_add(&sc->sc_media, media[i], 0, NULL);
681	}
682	ifmedia_set(&sc->sc_media, defmedia);
683
684	return (0);
685
686 fail:
687	printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc));
688	if (sc->cbl_base)
689		free(sc->cbl_base, M_DEVBUF);
690	if (sc->fxp_stats)
691		free(sc->fxp_stats, M_DEVBUF);
692	if (sc->mcsp)
693		free(sc->mcsp, M_DEVBUF);
694	/* frees entire chain */
695	if (sc->rfa_headm)
696		m_freem(sc->rfa_headm);
697
698	return (ENOMEM);
699}
700
701/*
702 * Read from the serial EEPROM. Basically, you manually shift in
703 * the read opcode (one bit at a time) and then shift in the address,
704 * and then you shift out the data (all of this one bit at a time).
705 * The word size is 16 bits, so you have to provide the address for
706 * every 16 bits of data.
707 */
708static void
709fxp_read_eeprom(sc, data, offset, words)
710	struct fxp_softc *sc;
711	u_short *data;
712	int offset;
713	int words;
714{
715	u_int16_t reg;
716	int i, x;
717
718	for (i = 0; i < words; i++) {
719		CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
720		/*
721		 * Shift in read opcode.
722		 */
723		for (x = 3; x > 0; x--) {
724			if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) {
725				reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
726			} else {
727				reg = FXP_EEPROM_EECS;
728			}
729			CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
730			CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
731			    reg | FXP_EEPROM_EESK);
732			DELAY(1);
733			CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
734			DELAY(1);
735		}
736		/*
737		 * Shift in address.
738		 */
739		for (x = 6; x > 0; x--) {
740			if ((i + offset) & (1 << (x - 1))) {
741				reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
742			} else {
743				reg = FXP_EEPROM_EECS;
744			}
745			CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
746			CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
747			    reg | FXP_EEPROM_EESK);
748			DELAY(1);
749			CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
750			DELAY(1);
751		}
752		reg = FXP_EEPROM_EECS;
753		data[i] = 0;
754		/*
755		 * Shift out data.
756		 */
757		for (x = 16; x > 0; x--) {
758			CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
759			    reg | FXP_EEPROM_EESK);
760			DELAY(1);
761			if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) &
762			    FXP_EEPROM_EEDO)
763				data[i] |= (1 << (x - 1));
764			CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
765			DELAY(1);
766		}
767		CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
768		DELAY(1);
769	}
770}
771
772/*
773 * Start packet transmission on the interface.
774 */
775static void
776fxp_start(ifp)
777	struct ifnet *ifp;
778{
779	struct fxp_softc *sc = ifp->if_softc;
780	struct fxp_cb_tx *txp;
781
782	/*
783	 * See if we need to suspend xmit until the multicast filter
784	 * has been reprogrammed (which can only be done at the head
785	 * of the command chain).
786	 */
787	if (sc->need_mcsetup)
788		return;
789
790	txp = NULL;
791
792	/*
793	 * We're finished if there is nothing more to add to the list or if
794	 * we're all filled up with buffers to transmit.
795	 */
796	while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB) {
797		struct mbuf *m, *mb_head;
798		int segment;
799
800		/*
801		 * Grab a packet to transmit.
802		 */
803		IF_DEQUEUE(&ifp->if_snd, mb_head);
804
805		/*
806		 * Get pointer to next available tx desc.
807		 */
808		txp = sc->cbl_last->next;
809
810		/*
811		 * Go through each of the mbufs in the chain and initialize
812		 * the transmit buffer descriptors with the physical address
813		 * and size of the mbuf.
814		 */
815tbdinit:
816		for (m = mb_head, segment = 0; m != NULL; m = m->m_next) {
817			if (m->m_len != 0) {
818				if (segment == FXP_NTXSEG)
819					break;
820				txp->tbd[segment].tb_addr =
821				    vtophys(mtod(m, vm_offset_t));
822				txp->tbd[segment].tb_size = m->m_len;
823				segment++;
824			}
825		}
826		if (m != NULL) {
827			struct mbuf *mn;
828
829			/*
830			 * We ran out of segments. We have to recopy this mbuf
831			 * chain first. Bail out if we can't get the new buffers.
832			 */
833			MGETHDR(mn, M_DONTWAIT, MT_DATA);
834			if (mn == NULL) {
835				m_freem(mb_head);
836				break;
837			}
838			if (mb_head->m_pkthdr.len > MHLEN) {
839				MCLGET(mn, M_DONTWAIT);
840				if ((mn->m_flags & M_EXT) == 0) {
841					m_freem(mn);
842					m_freem(mb_head);
843					break;
844				}
845			}
846			m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
847			    mtod(mn, caddr_t));
848			mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
849			m_freem(mb_head);
850			mb_head = mn;
851			goto tbdinit;
852		}
853
854		txp->tbd_number = segment;
855		txp->mb_head = mb_head;
856		txp->cb_status = 0;
857		txp->cb_command =
858		    FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S;
859		txp->tx_threshold = tx_threshold;
860
861		/*
862		 * Advance the end of list forward.
863		 */
864		sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
865		sc->cbl_last = txp;
866
867		/*
868		 * Advance the beginning of the list forward if there are
869		 * no other packets queued (when nothing is queued, cbl_first
870		 * sits on the last TxCB that was sent out).
871		 */
872		if (sc->tx_queued == 0)
873			sc->cbl_first = txp;
874
875		sc->tx_queued++;
876
877#if NBPFILTER > 0
878		/*
879		 * Pass packet to bpf if there is a listener.
880		 */
881		if (ifp->if_bpf)
882			bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head);
883#endif
884	}
885
886	/*
887	 * We're finished. If we added to the list, issue a RESUME to get DMA
888	 * going again if suspended.
889	 */
890	if (txp != NULL) {
891		fxp_scb_wait(sc);
892		CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME);
893
894		/*
895		 * Set a 5 second timer just in case we don't hear from the
896		 * card again.
897		 */
898		ifp->if_timer = 5;
899	}
900}
901
902/*
903 * Process interface interrupts.
904 */
905static FXP_INTR_TYPE
906fxp_intr(arg)
907	void *arg;
908{
909	struct fxp_softc *sc = arg;
910	struct ifnet *ifp = &sc->sc_if;
911	u_int8_t statack;
912#if defined(__NetBSD__)
913	int claimed = 0;
914#endif
915
916	while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) {
917#if defined(__NetBSD__)
918		claimed = 1;
919#endif
920		/*
921		 * First ACK all the interrupts in this pass.
922		 */
923		CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
924
925		/*
926		 * Process receiver interrupts. If a no-resource (RNR)
927		 * condition exists, get whatever packets we can and
928		 * re-start the receiver.
929		 */
930		if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) {
931			struct mbuf *m;
932			struct fxp_rfa *rfa;
933rcvloop:
934			m = sc->rfa_headm;
935			rfa = (struct fxp_rfa *)(m->m_ext.ext_buf +
936			    RFA_ALIGNMENT_FUDGE);
937
938			if (rfa->rfa_status & FXP_RFA_STATUS_C) {
939				/*
940				 * Remove first packet from the chain.
941				 */
942				sc->rfa_headm = m->m_next;
943				m->m_next = NULL;
944
945				/*
946				 * Add a new buffer to the receive chain.
947				 * If this fails, the old buffer is recycled
948				 * instead.
949				 */
950				if (fxp_add_rfabuf(sc, m) == 0) {
951					struct ether_header *eh;
952					u_int16_t total_len;
953
954					total_len = rfa->actual_size &
955					    (MCLBYTES - 1);
956					if (total_len <
957					    sizeof(struct ether_header)) {
958						m_freem(m);
959						goto rcvloop;
960					}
961					m->m_pkthdr.rcvif = ifp;
962					m->m_pkthdr.len = m->m_len =
963					    total_len -
964					    sizeof(struct ether_header);
965					eh = mtod(m, struct ether_header *);
966#if NBPFILTER > 0
967					if (ifp->if_bpf) {
968						bpf_tap(FXP_BPFTAP_ARG(ifp),
969						    mtod(m, caddr_t),
970						    total_len);
971						/*
972						 * Only pass this packet up
973						 * if it is for us.
974						 */
975						if ((ifp->if_flags &
976						    IFF_PROMISC) &&
977						    (rfa->rfa_status &
978						    FXP_RFA_STATUS_IAMATCH) &&
979						    (eh->ether_dhost[0] & 1)
980						    == 0) {
981							m_freem(m);
982							goto rcvloop;
983						}
984					}
985#endif /* NBPFILTER > 0 */
986					m->m_data +=
987					    sizeof(struct ether_header);
988					ether_input(ifp, eh, m);
989				}
990				goto rcvloop;
991			}
992			if (statack & FXP_SCB_STATACK_RNR) {
993				fxp_scb_wait(sc);
994				CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
995				    vtophys(sc->rfa_headm->m_ext.ext_buf) +
996					RFA_ALIGNMENT_FUDGE);
997				CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND,
998				    FXP_SCB_COMMAND_RU_START);
999			}
1000		}
1001		/*
1002		 * Free any finished transmit mbuf chains.
1003		 */
1004		if (statack & FXP_SCB_STATACK_CNA) {
1005			struct fxp_cb_tx *txp;
1006
1007			for (txp = sc->cbl_first; sc->tx_queued &&
1008			    (txp->cb_status & FXP_CB_STATUS_C) != 0;
1009			    txp = txp->next) {
1010				if (txp->mb_head != NULL) {
1011					m_freem(txp->mb_head);
1012					txp->mb_head = NULL;
1013				}
1014				sc->tx_queued--;
1015			}
1016			sc->cbl_first = txp;
1017			if (sc->tx_queued == 0) {
1018				ifp->if_timer = 0;
1019				if (sc->need_mcsetup)
1020					fxp_mc_setup(sc);
1021			}
1022			/*
1023			 * Try to start more packets transmitting.
1024			 */
1025			if (ifp->if_snd.ifq_head != NULL)
1026				fxp_start(ifp);
1027		}
1028	}
1029#if defined(__NetBSD__)
1030	return (claimed);
1031#endif
1032}
1033
1034/*
1035 * Update packet in/out/collision statistics. The i82557 doesn't
1036 * allow you to access these counters without doing a fairly
1037 * expensive DMA to get _all_ of the statistics it maintains, so
1038 * we do this operation here only once per second. The statistics
1039 * counters in the kernel are updated from the previous dump-stats
1040 * DMA and then a new dump-stats DMA is started. The on-chip
1041 * counters are zeroed when the DMA completes. If we can't start
1042 * the DMA immediately, we don't wait - we just prepare to read
1043 * them again next time.
1044 */
1045void
1046fxp_stats_update(arg)
1047	void *arg;
1048{
1049	struct fxp_softc *sc = arg;
1050	struct ifnet *ifp = &sc->sc_if;
1051	struct fxp_stats *sp = sc->fxp_stats;
1052	int s;
1053
1054	ifp->if_opackets += sp->tx_good;
1055	ifp->if_collisions += sp->tx_total_collisions;
1056	if (sp->rx_good) {
1057		ifp->if_ipackets += sp->rx_good;
1058		sc->rx_idle_secs = 0;
1059	} else {
1060		sc->rx_idle_secs++;
1061	}
1062	ifp->if_ierrors +=
1063	    sp->rx_crc_errors +
1064	    sp->rx_alignment_errors +
1065	    sp->rx_rnr_errors +
1066	    sp->rx_overrun_errors;
1067	/*
1068	 * If any transmit underruns occured, bump up the transmit
1069	 * threshold by another 512 bytes (64 * 8).
1070	 */
1071	if (sp->tx_underruns) {
1072		ifp->if_oerrors += sp->tx_underruns;
1073		if (tx_threshold < 192)
1074			tx_threshold += 64;
1075	}
1076	s = splimp();
1077	/*
1078	 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds,
1079	 * then assume the receiver has locked up and attempt to clear
1080	 * the condition by reprogramming the multicast filter. This is
1081	 * a work-around for a bug in the 82557 where the receiver locks
1082	 * up if it gets certain types of garbage in the syncronization
1083	 * bits prior to the packet header. This bug is supposed to only
1084	 * occur in 10Mbps mode, but has been seen to occur in 100Mbps
1085	 * mode as well (perhaps due to a 10/100 speed transition).
1086	 */
1087	if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) {
1088		sc->rx_idle_secs = 0;
1089		fxp_mc_setup(sc);
1090	}
1091	/*
1092	 * If there is no pending command, start another stats
1093	 * dump. Otherwise punt for now.
1094	 */
1095	if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) {
1096		/*
1097		 * Start another stats dump.
1098		 */
1099		CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND,
1100		    FXP_SCB_COMMAND_CU_DUMPRESET);
1101	} else {
1102		/*
1103		 * A previous command is still waiting to be accepted.
1104		 * Just zero our copy of the stats and wait for the
1105		 * next timer event to update them.
1106		 */
1107		sp->tx_good = 0;
1108		sp->tx_underruns = 0;
1109		sp->tx_total_collisions = 0;
1110
1111		sp->rx_good = 0;
1112		sp->rx_crc_errors = 0;
1113		sp->rx_alignment_errors = 0;
1114		sp->rx_rnr_errors = 0;
1115		sp->rx_overrun_errors = 0;
1116	}
1117	splx(s);
1118	/*
1119	 * Schedule another timeout one second from now.
1120	 */
1121	sc->stat_ch = timeout(fxp_stats_update, sc, hz);
1122}
1123
1124/*
1125 * Stop the interface. Cancels the statistics updater and resets
1126 * the interface.
1127 */
1128static void
1129fxp_stop(sc)
1130	struct fxp_softc *sc;
1131{
1132	struct ifnet *ifp = &sc->sc_if;
1133	struct fxp_cb_tx *txp;
1134	int i;
1135
1136	/*
1137	 * Cancel stats updater.
1138	 */
1139	untimeout(fxp_stats_update, sc, sc->stat_ch);
1140
1141	/*
1142	 * Issue software reset
1143	 */
1144	CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
1145	DELAY(10);
1146
1147	/*
1148	 * Release any xmit buffers.
1149	 */
1150	for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL;
1151	    txp = txp->next) {
1152		m_freem(txp->mb_head);
1153		txp->mb_head = NULL;
1154	}
1155	sc->tx_queued = 0;
1156
1157	/*
1158	 * Free all the receive buffers then reallocate/reinitialize
1159	 */
1160	if (sc->rfa_headm != NULL)
1161		m_freem(sc->rfa_headm);
1162	sc->rfa_headm = NULL;
1163	sc->rfa_tailm = NULL;
1164	for (i = 0; i < FXP_NRFABUFS; i++) {
1165		if (fxp_add_rfabuf(sc, NULL) != 0) {
1166			/*
1167			 * This "can't happen" - we're at splimp()
1168			 * and we just freed all the buffers we need
1169			 * above.
1170			 */
1171			panic("fxp_stop: no buffers!");
1172		}
1173	}
1174
1175	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1176	ifp->if_timer = 0;
1177}
1178
1179/*
1180 * Watchdog/transmission transmit timeout handler. Called when a
1181 * transmission is started on the interface, but no interrupt is
1182 * received before the timeout. This usually indicates that the
1183 * card has wedged for some reason.
1184 */
1185static void
1186fxp_watchdog(ifp)
1187	struct ifnet *ifp;
1188{
1189	struct fxp_softc *sc = ifp->if_softc;
1190
1191	printf(FXP_FORMAT ": device timeout\n", FXP_ARGS(sc));
1192	ifp->if_oerrors++;
1193
1194	fxp_init(sc);
1195}
1196
1197static void
1198fxp_init(xsc)
1199	void *xsc;
1200{
1201	struct fxp_softc *sc = xsc;
1202	struct ifnet *ifp = &sc->sc_if;
1203	struct fxp_cb_config *cbp;
1204	struct fxp_cb_ias *cb_ias;
1205	struct fxp_cb_tx *txp;
1206	int i, s, prm;
1207
1208	s = splimp();
1209	/*
1210	 * Cancel any pending I/O
1211	 */
1212	fxp_stop(sc);
1213
1214	prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0;
1215	sc->promisc_mode = prm;
1216
1217	/*
1218	 * Initialize base of CBL and RFA memory. Loading with zero
1219	 * sets it up for regular linear addressing.
1220	 */
1221	CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
1222	CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE);
1223
1224	fxp_scb_wait(sc);
1225	CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE);
1226
1227	/*
1228	 * Initialize base of dump-stats buffer.
1229	 */
1230	fxp_scb_wait(sc);
1231	CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats));
1232	CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR);
1233
1234	/*
1235	 * We temporarily use memory that contains the TxCB list to
1236	 * construct the config CB. The TxCB list memory is rebuilt
1237	 * later.
1238	 */
1239	cbp = (struct fxp_cb_config *) sc->cbl_base;
1240
1241	/*
1242	 * This bcopy is kind of disgusting, but there are a bunch of must be
1243	 * zero and must be one bits in this structure and this is the easiest
1244	 * way to initialize them all to proper values.
1245	 */
1246	bcopy(fxp_cb_config_template, (void *)&cbp->cb_status,
1247		sizeof(fxp_cb_config_template));
1248
1249	cbp->cb_status =	0;
1250	cbp->cb_command =	FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL;
1251	cbp->link_addr =	-1;	/* (no) next command */
1252	cbp->byte_count =	22;	/* (22) bytes to config */
1253	cbp->rx_fifo_limit =	8;	/* rx fifo threshold (32 bytes) */
1254	cbp->tx_fifo_limit =	0;	/* tx fifo threshold (0 bytes) */
1255	cbp->adaptive_ifs =	0;	/* (no) adaptive interframe spacing */
1256	cbp->rx_dma_bytecount =	0;	/* (no) rx DMA max */
1257	cbp->tx_dma_bytecount =	0;	/* (no) tx DMA max */
1258	cbp->dma_bce =		0;	/* (disable) dma max counters */
1259	cbp->late_scb =		0;	/* (don't) defer SCB update */
1260	cbp->tno_int =		0;	/* (disable) tx not okay interrupt */
1261	cbp->ci_int =		0;	/* interrupt on CU not active */
1262	cbp->save_bf =		prm;	/* save bad frames */
1263	cbp->disc_short_rx =	!prm;	/* discard short packets */
1264	cbp->underrun_retry =	1;	/* retry mode (1) on DMA underrun */
1265	cbp->mediatype =	!sc->phy_10Mbps_only; /* interface mode */
1266	cbp->nsai =		1;	/* (don't) disable source addr insert */
1267	cbp->preamble_length =	2;	/* (7 byte) preamble */
1268	cbp->loopback =		0;	/* (don't) loopback */
1269	cbp->linear_priority =	0;	/* (normal CSMA/CD operation) */
1270	cbp->linear_pri_mode =	0;	/* (wait after xmit only) */
1271	cbp->interfrm_spacing =	6;	/* (96 bits of) interframe spacing */
1272	cbp->promiscuous =	prm;	/* promiscuous mode */
1273	cbp->bcast_disable =	0;	/* (don't) disable broadcasts */
1274	cbp->crscdt =		0;	/* (CRS only) */
1275	cbp->stripping =	!prm;	/* truncate rx packet to byte count */
1276	cbp->padding =		1;	/* (do) pad short tx packets */
1277	cbp->rcv_crc_xfer =	0;	/* (don't) xfer CRC to host */
1278	cbp->force_fdx =	0;	/* (don't) force full duplex */
1279	cbp->fdx_pin_en =	1;	/* (enable) FDX# pin */
1280	cbp->multi_ia =		0;	/* (don't) accept multiple IAs */
1281	cbp->mc_all =		sc->all_mcasts;/* accept all multicasts */
1282
1283	/*
1284	 * Start the config command/DMA.
1285	 */
1286	fxp_scb_wait(sc);
1287	CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status));
1288	CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1289	/* ...and wait for it to complete. */
1290	while (!(cbp->cb_status & FXP_CB_STATUS_C));
1291
1292	/*
1293	 * Now initialize the station address. Temporarily use the TxCB
1294	 * memory area like we did above for the config CB.
1295	 */
1296	cb_ias = (struct fxp_cb_ias *) sc->cbl_base;
1297	cb_ias->cb_status = 0;
1298	cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL;
1299	cb_ias->link_addr = -1;
1300#if defined(__NetBSD__)
1301	bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6);
1302#else
1303	bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr,
1304	    sizeof(sc->arpcom.ac_enaddr));
1305#endif /* __NetBSD__ */
1306
1307	/*
1308	 * Start the IAS (Individual Address Setup) command/DMA.
1309	 */
1310	fxp_scb_wait(sc);
1311	CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1312	/* ...and wait for it to complete. */
1313	while (!(cb_ias->cb_status & FXP_CB_STATUS_C));
1314
1315	/*
1316	 * Initialize transmit control block (TxCB) list.
1317	 */
1318
1319	txp = sc->cbl_base;
1320	bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
1321	for (i = 0; i < FXP_NTXCB; i++) {
1322		txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
1323		txp[i].cb_command = FXP_CB_COMMAND_NOP;
1324		txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status);
1325		txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
1326		txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
1327	}
1328	/*
1329	 * Set the suspend flag on the first TxCB and start the control
1330	 * unit. It will execute the NOP and then suspend.
1331	 */
1332	txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
1333	sc->cbl_first = sc->cbl_last = txp;
1334	sc->tx_queued = 1;
1335
1336	fxp_scb_wait(sc);
1337	CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1338
1339	/*
1340	 * Initialize receiver buffer area - RFA.
1341	 */
1342	fxp_scb_wait(sc);
1343	CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
1344	    vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE);
1345	CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START);
1346
1347	/*
1348	 * Set current media.
1349	 */
1350	fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media);
1351
1352	ifp->if_flags |= IFF_RUNNING;
1353	ifp->if_flags &= ~IFF_OACTIVE;
1354	splx(s);
1355
1356	/*
1357	 * Start stats updater.
1358	 */
1359	sc->stat_ch = timeout(fxp_stats_update, sc, hz);
1360}
1361
1362void
1363fxp_set_media(sc, media)
1364	struct fxp_softc *sc;
1365	int media;
1366{
1367
1368	switch (sc->phy_primary_device) {
1369	case FXP_PHY_DP83840:
1370	case FXP_PHY_DP83840A:
1371		fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR,
1372		    fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) |
1373		    FXP_DP83840_PCR_LED4_MODE |	/* LED4 always indicates duplex */
1374		    FXP_DP83840_PCR_F_CONNECT |	/* force link disconnect bypass */
1375		    FXP_DP83840_PCR_BIT10);	/* XXX I have no idea */
1376		/* fall through */
1377	case FXP_PHY_82555:
1378		if (IFM_SUBTYPE(media) != IFM_AUTO) {
1379			int flags;
1380
1381			flags = (IFM_SUBTYPE(media) == IFM_100_TX) ?
1382			    FXP_PHY_BMCR_SPEED_100M : 0;
1383			flags |= (media & IFM_FDX) ?
1384			    FXP_PHY_BMCR_FULLDUPLEX : 0;
1385			fxp_mdi_write(sc, sc->phy_primary_addr,
1386			    FXP_PHY_BMCR,
1387			    (fxp_mdi_read(sc, sc->phy_primary_addr,
1388			    FXP_PHY_BMCR) &
1389			    ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M |
1390			     FXP_PHY_BMCR_FULLDUPLEX)) | flags);
1391		} else {
1392			fxp_mdi_write(sc, sc->phy_primary_addr,
1393			    FXP_PHY_BMCR,
1394			    (fxp_mdi_read(sc, sc->phy_primary_addr,
1395			    FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN));
1396		}
1397		break;
1398	/*
1399	 * The Seeq 80c24 doesn't have a PHY programming interface, so do
1400	 * nothing.
1401	 */
1402	case FXP_PHY_80C24:
1403		break;
1404	default:
1405		printf(FXP_FORMAT
1406		    ": warning: unsupported PHY, type = %d, addr = %d\n",
1407		     FXP_ARGS(sc), sc->phy_primary_device,
1408		     sc->phy_primary_addr);
1409	}
1410}
1411
1412/*
1413 * Change media according to request.
1414 */
1415int
1416fxp_mediachange(ifp)
1417	struct ifnet *ifp;
1418{
1419	struct fxp_softc *sc = ifp->if_softc;
1420	struct ifmedia *ifm = &sc->sc_media;
1421
1422	if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1423		return (EINVAL);
1424
1425	fxp_set_media(sc, ifm->ifm_media);
1426	return (0);
1427}
1428
1429/*
1430 * Notify the world which media we're using.
1431 */
1432void
1433fxp_mediastatus(ifp, ifmr)
1434	struct ifnet *ifp;
1435	struct ifmediareq *ifmr;
1436{
1437	struct fxp_softc *sc = ifp->if_softc;
1438	int flags;
1439
1440	switch (sc->phy_primary_device) {
1441	case FXP_PHY_DP83840:
1442	case FXP_PHY_DP83840A:
1443	case FXP_PHY_82555:
1444		flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR);
1445		ifmr->ifm_active = IFM_ETHER;
1446		if (flags & FXP_PHY_BMCR_AUTOEN)
1447			ifmr->ifm_active |= IFM_AUTO;
1448		else {
1449			if (flags & FXP_PHY_BMCR_SPEED_100M)
1450				ifmr->ifm_active |= IFM_100_TX;
1451			else
1452				ifmr->ifm_active |= IFM_10_T;
1453
1454			if (flags & FXP_PHY_BMCR_FULLDUPLEX)
1455				ifmr->ifm_active |= IFM_FDX;
1456		}
1457		break;
1458
1459	case FXP_PHY_80C24:
1460	default:
1461		ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */
1462	}
1463}
1464
1465/*
1466 * Add a buffer to the end of the RFA buffer list.
1467 * Return 0 if successful, 1 for failure. A failure results in
1468 * adding the 'oldm' (if non-NULL) on to the end of the list -
1469 * tossing out it's old contents and recycling it.
1470 * The RFA struct is stuck at the beginning of mbuf cluster and the
1471 * data pointer is fixed up to point just past it.
1472 */
1473static int
1474fxp_add_rfabuf(sc, oldm)
1475	struct fxp_softc *sc;
1476	struct mbuf *oldm;
1477{
1478	u_int32_t v;
1479	struct mbuf *m;
1480	struct fxp_rfa *rfa, *p_rfa;
1481
1482	MGETHDR(m, M_DONTWAIT, MT_DATA);
1483	if (m != NULL) {
1484		MCLGET(m, M_DONTWAIT);
1485		if ((m->m_flags & M_EXT) == 0) {
1486			m_freem(m);
1487			if (oldm == NULL)
1488				return 1;
1489			m = oldm;
1490			m->m_data = m->m_ext.ext_buf;
1491		}
1492	} else {
1493		if (oldm == NULL)
1494			return 1;
1495		m = oldm;
1496		m->m_data = m->m_ext.ext_buf;
1497	}
1498
1499	/*
1500	 * Move the data pointer up so that the incoming data packet
1501	 * will be 32-bit aligned.
1502	 */
1503	m->m_data += RFA_ALIGNMENT_FUDGE;
1504
1505	/*
1506	 * Get a pointer to the base of the mbuf cluster and move
1507	 * data start past it.
1508	 */
1509	rfa = mtod(m, struct fxp_rfa *);
1510	m->m_data += sizeof(struct fxp_rfa);
1511	rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE;
1512
1513	/*
1514	 * Initialize the rest of the RFA.  Note that since the RFA
1515	 * is misaligned, we cannot store values directly.  Instead,
1516	 * we use an optimized, inline copy.
1517	 */
1518	rfa->rfa_status = 0;
1519	rfa->rfa_control = FXP_RFA_CONTROL_EL;
1520	rfa->actual_size = 0;
1521
1522	v = -1;
1523	fxp_lwcopy(&v, &rfa->link_addr);
1524	fxp_lwcopy(&v, &rfa->rbd_addr);
1525
1526	/*
1527	 * If there are other buffers already on the list, attach this
1528	 * one to the end by fixing up the tail to point to this one.
1529	 */
1530	if (sc->rfa_headm != NULL) {
1531		p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf +
1532		    RFA_ALIGNMENT_FUDGE);
1533		sc->rfa_tailm->m_next = m;
1534		v = vtophys(rfa);
1535		fxp_lwcopy(&v, &p_rfa->link_addr);
1536		p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL;
1537	} else {
1538		sc->rfa_headm = m;
1539	}
1540	sc->rfa_tailm = m;
1541
1542	return (m == oldm);
1543}
1544
1545static volatile int
1546fxp_mdi_read(sc, phy, reg)
1547	struct fxp_softc *sc;
1548	int phy;
1549	int reg;
1550{
1551	int count = 10000;
1552	int value;
1553
1554	CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
1555	    (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21));
1556
1557	while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0
1558	    && count--)
1559		DELAY(10);
1560
1561	if (count <= 0)
1562		printf(FXP_FORMAT ": fxp_mdi_read: timed out\n",
1563		    FXP_ARGS(sc));
1564
1565	return (value & 0xffff);
1566}
1567
1568static void
1569fxp_mdi_write(sc, phy, reg, value)
1570	struct fxp_softc *sc;
1571	int phy;
1572	int reg;
1573	int value;
1574{
1575	int count = 10000;
1576
1577	CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
1578	    (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) |
1579	    (value & 0xffff));
1580
1581	while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 &&
1582	    count--)
1583		DELAY(10);
1584
1585	if (count <= 0)
1586		printf(FXP_FORMAT ": fxp_mdi_write: timed out\n",
1587		    FXP_ARGS(sc));
1588}
1589
1590static int
1591fxp_ioctl(ifp, command, data)
1592	struct ifnet *ifp;
1593	FXP_IOCTLCMD_TYPE command;
1594	caddr_t data;
1595{
1596	struct fxp_softc *sc = ifp->if_softc;
1597	struct ifreq *ifr = (struct ifreq *)data;
1598	int s, error = 0;
1599
1600	s = splimp();
1601
1602	switch (command) {
1603
1604	case SIOCSIFADDR:
1605#if !defined(__NetBSD__)
1606	case SIOCGIFADDR:
1607	case SIOCSIFMTU:
1608#endif
1609		error = ether_ioctl(ifp, command, data);
1610		break;
1611
1612	case SIOCSIFFLAGS:
1613		sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0;
1614
1615		/*
1616		 * If interface is marked up and not running, then start it.
1617		 * If it is marked down and running, stop it.
1618		 * XXX If it's up then re-initialize it. This is so flags
1619		 * such as IFF_PROMISC are handled.
1620		 */
1621		if (ifp->if_flags & IFF_UP) {
1622			fxp_init(sc);
1623		} else {
1624			if (ifp->if_flags & IFF_RUNNING)
1625				fxp_stop(sc);
1626		}
1627		break;
1628
1629	case SIOCADDMULTI:
1630	case SIOCDELMULTI:
1631		sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0;
1632#if defined(__NetBSD__)
1633		error = (command == SIOCADDMULTI) ?
1634		    ether_addmulti(ifr, &sc->sc_ethercom) :
1635		    ether_delmulti(ifr, &sc->sc_ethercom);
1636
1637		if (error == ENETRESET) {
1638			/*
1639			 * Multicast list has changed; set the hardware
1640			 * filter accordingly.
1641			 */
1642			if (!sc->all_mcasts)
1643				fxp_mc_setup(sc);
1644			/*
1645			 * fxp_mc_setup() can turn on all_mcasts if we run
1646			 * out of space, so check it again rather than else {}.
1647			 */
1648			if (sc->all_mcasts)
1649				fxp_init(sc);
1650			error = 0;
1651		}
1652#else /* __FreeBSD__ */
1653		/*
1654		 * Multicast list has changed; set the hardware filter
1655		 * accordingly.
1656		 */
1657		if (!sc->all_mcasts)
1658			fxp_mc_setup(sc);
1659		/*
1660		 * fxp_mc_setup() can turn on sc->all_mcasts, so check it
1661		 * again rather than else {}.
1662		 */
1663		if (sc->all_mcasts)
1664			fxp_init(sc);
1665		error = 0;
1666#endif /* __NetBSD__ */
1667		break;
1668
1669	case SIOCSIFMEDIA:
1670	case SIOCGIFMEDIA:
1671		error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command);
1672		break;
1673
1674	default:
1675		error = EINVAL;
1676	}
1677	(void) splx(s);
1678	return (error);
1679}
1680
1681/*
1682 * Program the multicast filter.
1683 *
1684 * We have an artificial restriction that the multicast setup command
1685 * must be the first command in the chain, so we take steps to ensure
1686 * that. By requiring this, it allows us to keep the performance of
1687 * the pre-initialized command ring (esp. link pointers) by not actually
1688 * inserting the mcsetup command in the ring - i.e. it's link pointer
1689 * points to the TxCB ring, but the mcsetup descriptor itself is not part
1690 * of it. We then can do 'CU_START' on the mcsetup descriptor and have it
1691 * lead into the regular TxCB ring when it completes.
1692 *
1693 * This function must be called at splimp.
1694 */
1695static void
1696fxp_mc_setup(sc)
1697	struct fxp_softc *sc;
1698{
1699	struct fxp_cb_mcs *mcsp = sc->mcsp;
1700	struct ifnet *ifp = &sc->sc_if;
1701	struct ifmultiaddr *ifma;
1702	int nmcasts;
1703
1704	if (sc->tx_queued) {
1705		sc->need_mcsetup = 1;
1706		return;
1707	}
1708	sc->need_mcsetup = 0;
1709
1710	/*
1711	 * Initialize multicast setup descriptor.
1712	 */
1713	mcsp->next = sc->cbl_base;
1714	mcsp->mb_head = NULL;
1715	mcsp->cb_status = 0;
1716	mcsp->cb_command = FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_S;
1717	mcsp->link_addr = vtophys(&sc->cbl_base->cb_status);
1718
1719	nmcasts = 0;
1720	if (!sc->all_mcasts) {
1721		for (ifma = ifp->if_multiaddrs.lh_first; ifma != NULL;
1722		    ifma = ifma->ifma_link.le_next) {
1723			if (ifma->ifma_addr->sa_family != AF_LINK)
1724				continue;
1725			if (nmcasts >= MAXMCADDR) {
1726				sc->all_mcasts = 1;
1727				nmcasts = 0;
1728				break;
1729			}
1730			bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1731			    (void *) &sc->mcsp->mc_addr[nmcasts][0], 6);
1732			nmcasts++;
1733		}
1734	}
1735	mcsp->mc_cnt = nmcasts * 6;
1736	sc->cbl_first = sc->cbl_last = (struct fxp_cb_tx *) mcsp;
1737	sc->tx_queued = 1;
1738
1739	/*
1740	 * Wait until command unit is not active. This should never
1741	 * be the case when nothing is queued, but make sure anyway.
1742	 */
1743	while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) ==
1744	    FXP_SCB_CUS_ACTIVE) ;
1745
1746	/*
1747	 * Start the multicast setup command.
1748	 */
1749	fxp_scb_wait(sc);
1750	CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&mcsp->cb_status));
1751	CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1752
1753	ifp->if_timer = 5;
1754	return;
1755}
1756