if_fxp.c revision 26672
1/* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $Id: if_fxp.c,v 1.35 1997/06/13 22:34:52 davidg Exp $ 28 */ 29 30/* 31 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 32 */ 33 34#include "bpfilter.h" 35 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/sockio.h> 39#include <sys/mbuf.h> 40#include <sys/malloc.h> 41#include <sys/kernel.h> 42#include <sys/socket.h> 43#include <sys/syslog.h> 44 45#include <net/if.h> 46#include <net/if_dl.h> 47#include <net/if_types.h> 48 49#ifdef INET 50#include <netinet/in.h> 51#include <netinet/in_systm.h> 52#include <netinet/in_var.h> 53#include <netinet/ip.h> 54#include <netinet/if_ether.h> 55#endif 56 57#ifdef IPX 58#include <netipx/ipx.h> 59#include <netipx/ipx_if.h> 60#endif 61 62#ifdef NS 63#include <netns/ns.h> 64#include <netns/ns_if.h> 65#endif 66 67#if NBPFILTER > 0 68#include <net/bpf.h> 69#include <net/bpfdesc.h> 70#endif 71 72#include <vm/vm.h> /* for vtophys */ 73#include <vm/vm_param.h> /* for vtophys */ 74#include <vm/pmap.h> /* for vtophys */ 75#include <machine/clock.h> /* for DELAY */ 76 77#include <pci/pcivar.h> 78#include <pci/if_fxpreg.h> 79 80struct fxp_softc { 81 struct arpcom arpcom; /* per-interface network data */ 82 struct fxp_csr *csr; /* control/status registers */ 83 struct fxp_cb_tx *cbl_base; /* base of TxCB list */ 84 struct fxp_cb_tx *cbl_first; /* first active TxCB in list */ 85 struct fxp_cb_tx *cbl_last; /* last active TxCB in list */ 86 struct mbuf *rfa_headm; /* first mbuf in receive frame area */ 87 struct mbuf *rfa_tailm; /* last mbuf in receive frame area */ 88 struct fxp_stats *fxp_stats; /* Pointer to interface stats */ 89 int tx_queued; /* # of active TxCB's */ 90 int promisc_mode; /* promiscuous mode enabled */ 91 int phy_primary_addr; /* address of primary PHY */ 92 int phy_primary_device; /* device type of primary PHY */ 93 int phy_10Mbps_only; /* PHY is 10Mbps-only device */ 94}; 95 96static u_long fxp_count; 97 98/* 99 * Template for default configuration parameters. 100 * See struct fxp_cb_config for the bit definitions. 101 */ 102static u_char fxp_cb_config_template[] = { 103 0x0, 0x0, /* cb_status */ 104 0x80, 0x2, /* cb_command */ 105 0xff, 0xff, 0xff, 0xff, /* link_addr */ 106 0x16, /* 0 */ 107 0x8, /* 1 */ 108 0x0, /* 2 */ 109 0x0, /* 3 */ 110 0x0, /* 4 */ 111 0x80, /* 5 */ 112 0xb2, /* 6 */ 113 0x3, /* 7 */ 114 0x1, /* 8 */ 115 0x0, /* 9 */ 116 0x26, /* 10 */ 117 0x0, /* 11 */ 118 0x60, /* 12 */ 119 0x0, /* 13 */ 120 0xf2, /* 14 */ 121 0x48, /* 15 */ 122 0x0, /* 16 */ 123 0x40, /* 17 */ 124 0xf3, /* 18 */ 125 0x0, /* 19 */ 126 0x3f, /* 20 */ 127 0x5, /* 21 */ 128 0x0, 0x0 129}; 130 131static inline void fxp_scb_wait __P((struct fxp_csr *)); 132static char *fxp_probe __P((pcici_t, pcidi_t)); 133static void fxp_attach __P((pcici_t, int)); 134static void fxp_intr __P((void *)); 135static void fxp_start __P((struct ifnet *)); 136static int fxp_ioctl __P((struct ifnet *, int, caddr_t)); 137static void fxp_init __P((void *)); 138static void fxp_stop __P((struct fxp_softc *)); 139static void fxp_watchdog __P((struct ifnet *)); 140static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *)); 141static void fxp_shutdown __P((int, void *)); 142static int fxp_mdi_read __P((struct fxp_csr *, int, int)); 143static void fxp_mdi_write __P((struct fxp_csr *, int, int, int)); 144static void fxp_read_eeprom __P((struct fxp_csr *, u_short *, int, int)); 145 146 147timeout_t fxp_stats_update; 148 149static struct pci_device fxp_device = { 150 "fxp", 151 fxp_probe, 152 fxp_attach, 153 &fxp_count, 154 NULL 155}; 156DATA_SET(pcidevice_set, fxp_device); 157 158/* 159 * Set initial transmit threshold at 64 (512 bytes). This is 160 * increased by 64 (512 bytes) at a time, to maximum of 192 161 * (1536 bytes), if an underrun occurs. 162 */ 163static int tx_threshold = 64; 164 165/* 166 * Number of transmit control blocks. This determines the number 167 * of transmit buffers that can be chained in the CB list. 168 * This must be a power of two. 169 */ 170#define FXP_NTXCB 128 171 172/* 173 * TxCB list index mask. This is used to do list wrap-around. 174 */ 175#define FXP_TXCB_MASK (FXP_NTXCB - 1) 176 177/* 178 * Number of DMA segments in a TxCB. Note that this is carefully 179 * chosen to make the total struct size an even power of two. It's 180 * critical that no TxCB be split across a page boundry since 181 * no attempt is made to allocate physically contiguous memory. 182 * 183 * XXX - don't forget to change the hard-coded constant in the 184 * fxp_cb_tx struct (defined in if_fxpreg.h), too! 185 */ 186#define FXP_NTXSEG 29 187 188/* 189 * Number of receive frame area buffers. These are large so chose 190 * wisely. 191 */ 192#define FXP_NRFABUFS 32 193 194/* 195 * Wait for the previous command to be accepted (but not necessarily 196 * completed). 197 */ 198static inline void 199fxp_scb_wait(csr) 200 struct fxp_csr *csr; 201{ 202 int i = 10000; 203 204 while ((csr->scb_command & FXP_SCB_COMMAND_MASK) && --i); 205} 206 207/* 208 * Return identification string if this is device is ours. 209 */ 210static char * 211fxp_probe(config_id, device_id) 212 pcici_t config_id; 213 pcidi_t device_id; 214{ 215 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) && 216 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557) 217 return ("Intel EtherExpress Pro 10/100B Ethernet"); 218 219 return NULL; 220} 221 222/* 223 * Allocate data structures and attach the device. 224 */ 225static void 226fxp_attach(config_id, unit) 227 pcici_t config_id; 228 int unit; 229{ 230 struct fxp_softc *sc; 231 struct ifnet *ifp; 232 vm_offset_t pbase; 233 int s, i; 234 u_short data; 235 236 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT); 237 if (sc == NULL) 238 return; 239 bzero(sc, sizeof(struct fxp_softc)); 240 241 s = splimp(); 242 243 /* 244 * Map control/status registers. 245 */ 246 if (!pci_map_mem(config_id, FXP_PCI_MMBA, 247 (vm_offset_t *)&sc->csr, &pbase)) { 248 printf("fxp%d: couldn't map memory\n", unit); 249 goto fail; 250 } 251 252 /* 253 * Reset to a stable state. 254 */ 255 sc->csr->port = FXP_PORT_SELECTIVE_RESET; 256 DELAY(10); 257 258 /* 259 * Allocate our interrupt. 260 */ 261 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) { 262 printf("fxp%d: couldn't map interrupt\n", unit); 263 goto fail; 264 } 265 266 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB, 267 M_DEVBUF, M_NOWAIT); 268 if (sc->cbl_base == NULL) 269 goto malloc_fail; 270 271 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT); 272 if (sc->fxp_stats == NULL) 273 goto malloc_fail; 274 bzero(sc->fxp_stats, sizeof(struct fxp_stats)); 275 276 /* 277 * Pre-allocate our receive buffers. 278 */ 279 for (i = 0; i < FXP_NRFABUFS; i++) { 280 if (fxp_add_rfabuf(sc, NULL) != 0) { 281 goto malloc_fail; 282 } 283 } 284 285 /* 286 * Get info about the primary PHY 287 */ 288 fxp_read_eeprom(sc->csr, (u_short *)&data, 6, 1); 289 sc->phy_primary_addr = data & 0xff; 290 sc->phy_primary_device = (data >> 8) & 0x3f; 291 sc->phy_10Mbps_only = data >> 15; 292 293 ifp = &sc->arpcom.ac_if; 294 ifp->if_softc = sc; 295 ifp->if_unit = unit; 296 ifp->if_name = "fxp"; 297 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 298 ifp->if_ioctl = fxp_ioctl; 299 ifp->if_output = ether_output; 300 ifp->if_start = fxp_start; 301 ifp->if_watchdog = fxp_watchdog; 302 ifp->if_baudrate = 100000000; 303 ifp->if_init = fxp_init; 304 305 /* 306 * Read MAC address 307 */ 308 fxp_read_eeprom(sc->csr, (u_short *)sc->arpcom.ac_enaddr, 0, 3); 309 printf("fxp%d: Ethernet address %6D", unit, sc->arpcom.ac_enaddr, ":"); 310 if (sc->phy_10Mbps_only) 311 printf(", 10Mbps"); 312 printf("\n"); 313 314 /* 315 * Attach the interface. 316 */ 317 if_attach(ifp); 318 ether_ifattach(ifp); 319 320#if NBPFILTER > 0 321 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 322#endif 323 324 /* 325 * Add shutdown hook so that DMA is disabled prior to reboot. Not 326 * doing do could allow DMA to corrupt kernel memory during the 327 * reboot before the driver initializes. 328 */ 329 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC); 330 331 splx(s); 332 return; 333 334malloc_fail: 335 printf("fxp%d: Failed to malloc memory\n", unit); 336 (void) pci_unmap_int(config_id); 337 if (sc && sc->cbl_base) 338 free(sc->cbl_base, M_DEVBUF); 339 if (sc && sc->fxp_stats) 340 free(sc->fxp_stats, M_DEVBUF); 341 /* frees entire chain */ 342 if (sc && sc->rfa_headm) 343 m_freem(sc->rfa_headm); 344fail: 345 if (sc) 346 free(sc, M_DEVBUF); 347 splx(s); 348} 349 350/* 351 * Read from the serial EEPROM. Basically, you manually shift in 352 * the read opcode (one bit at a time) and then shift in the address, 353 * and then you shift out the data (all of this one bit at a time). 354 * The word size is 16 bits, so you have to provide the address for 355 * every 16 bits of data. 356 */ 357static void 358fxp_read_eeprom(csr, data, offset, words) 359 struct fxp_csr *csr; 360 u_short *data; 361 int offset; 362 int words; 363{ 364 u_short reg; 365 int i, x; 366 367 for (i = 0; i < words; i++) { 368 csr->eeprom_control = FXP_EEPROM_EECS; 369 /* 370 * Shift in read opcode. 371 */ 372 for (x = 3; x > 0; x--) { 373 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { 374 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 375 } else { 376 reg = FXP_EEPROM_EECS; 377 } 378 csr->eeprom_control = reg; 379 csr->eeprom_control = reg | FXP_EEPROM_EESK; 380 DELAY(1); 381 csr->eeprom_control = reg; 382 DELAY(1); 383 } 384 /* 385 * Shift in address. 386 */ 387 for (x = 6; x > 0; x--) { 388 if ((i + offset) & (1 << (x - 1))) { 389 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 390 } else { 391 reg = FXP_EEPROM_EECS; 392 } 393 csr->eeprom_control = reg; 394 csr->eeprom_control = reg | FXP_EEPROM_EESK; 395 DELAY(1); 396 csr->eeprom_control = reg; 397 DELAY(1); 398 } 399 reg = FXP_EEPROM_EECS; 400 data[i] = 0; 401 /* 402 * Shift out data. 403 */ 404 for (x = 16; x > 0; x--) { 405 csr->eeprom_control = reg | FXP_EEPROM_EESK; 406 DELAY(1); 407 if (csr->eeprom_control & FXP_EEPROM_EEDO) 408 data[i] |= (1 << (x - 1)); 409 csr->eeprom_control = reg; 410 DELAY(1); 411 } 412 csr->eeprom_control = 0; 413 DELAY(1); 414 } 415} 416 417/* 418 * Device shutdown routine. Called at system shutdown after sync. The 419 * main purpose of this routine is to shut off receiver DMA so that 420 * kernel memory doesn't get clobbered during warmboot. 421 */ 422static void 423fxp_shutdown(howto, sc) 424 int howto; 425 void *sc; 426{ 427 fxp_stop((struct fxp_softc *) sc); 428} 429 430/* 431 * Start packet transmission on the interface. 432 */ 433static void 434fxp_start(ifp) 435 struct ifnet *ifp; 436{ 437 struct fxp_softc *sc = ifp->if_softc; 438 struct fxp_csr *csr = sc->csr; 439 struct fxp_cb_tx *txp; 440 struct mbuf *m, *mb_head; 441 int segment, first = 1; 442 443txloop: 444 /* 445 * See if we're all filled up with buffers to transmit. 446 */ 447 if (sc->tx_queued >= FXP_NTXCB) 448 return; 449 450 /* 451 * Grab a packet to transmit. 452 */ 453 IF_DEQUEUE(&ifp->if_snd, mb_head); 454 if (mb_head == NULL) { 455 /* 456 * No more packets to send. 457 */ 458 return; 459 } 460 461 /* 462 * Get pointer to next available (unused) descriptor. 463 */ 464 txp = sc->cbl_last->next; 465 466 /* 467 * Go through each of the mbufs in the chain and initialize 468 * the transmit buffers descriptors with the physical address 469 * and size of the mbuf. 470 */ 471tbdinit: 472 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 473 if (m->m_len != 0) { 474 if (segment == FXP_NTXSEG) 475 break; 476 txp->tbd[segment].tb_addr = 477 vtophys(mtod(m, vm_offset_t)); 478 txp->tbd[segment].tb_size = m->m_len; 479 segment++; 480 } 481 } 482 if (m != NULL) { 483 struct mbuf *mn; 484 485 /* 486 * We ran out of segments. We have to recopy this mbuf 487 * chain first. 488 */ 489 MGETHDR(mn, M_DONTWAIT, MT_DATA); 490 if (mn == NULL) { 491 m_freem(mb_head); 492 return; 493 } 494 if (mb_head->m_pkthdr.len > MHLEN) { 495 MCLGET(mn, M_DONTWAIT); 496 if ((mn->m_flags & M_EXT) == 0) { 497 m_freem(mn); 498 m_freem(mb_head); 499 return; 500 } 501 } 502 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, mtod(mn, caddr_t)); 503 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 504 m_freem(mb_head); 505 mb_head = mn; 506 goto tbdinit; 507 } 508 509 txp->tbd_number = segment; 510 txp->mb_head = mb_head; 511 512 /* 513 * Finish the initialization of this TxCB. 514 */ 515 txp->cb_status = 0; 516 txp->cb_command = 517 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S; 518 txp->tx_threshold = tx_threshold; 519 520 /* 521 * Advance the end-of-list forward. 522 */ 523 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 524 sc->cbl_last = txp; 525 526 /* 527 * Advance the beginning of the list forward if there are 528 * no other packets queued (when nothing is queued, cbl_first 529 * sits on the last TxCB that was sent out).. 530 */ 531 if (sc->tx_queued == 0) 532 sc->cbl_first = txp; 533 534 sc->tx_queued++; 535 536 /* 537 * Only need to wait prior to the first resume command. 538 */ 539 if (first) { 540 first--; 541 fxp_scb_wait(csr); 542 } 543 544 /* 545 * Resume transmission if suspended. 546 */ 547 csr->scb_command = FXP_SCB_COMMAND_CU_RESUME; 548 549#if NBPFILTER > 0 550 /* 551 * Pass packet to bpf if there is a listener. 552 */ 553 if (ifp->if_bpf) 554 bpf_mtap(ifp, mb_head); 555#endif 556 /* 557 * Set a 5 second timer just in case we don't hear from the 558 * card again. 559 */ 560 ifp->if_timer = 5; 561 562 goto txloop; 563} 564 565/* 566 * Process interface interrupts. 567 */ 568static void 569fxp_intr(arg) 570 void *arg; 571{ 572 struct fxp_softc *sc = arg; 573 struct fxp_csr *csr = sc->csr; 574 struct ifnet *ifp = &sc->arpcom.ac_if; 575 u_int8_t statack; 576 577 while ((statack = csr->scb_statack) != 0) { 578 /* 579 * First ACK all the interrupts in this pass. 580 */ 581 csr->scb_statack = statack; 582 583 /* 584 * Free any finished transmit mbuf chains. 585 */ 586 if (statack & FXP_SCB_STATACK_CNA) { 587 struct fxp_cb_tx *txp; 588 589 for (txp = sc->cbl_first; 590 (txp->cb_status & FXP_CB_STATUS_C) != 0; 591 txp = txp->next) { 592 if (txp->mb_head != NULL) { 593 m_freem(txp->mb_head); 594 txp->mb_head = NULL; 595 sc->tx_queued--; 596 } 597 if (txp == sc->cbl_last) 598 break; 599 } 600 sc->cbl_first = txp; 601 ifp->if_timer = 0; 602 /* 603 * Try to start more packets transmitting. 604 */ 605 if (ifp->if_snd.ifq_head != NULL) 606 fxp_start(ifp); 607 } 608 /* 609 * Process receiver interrupts. If a no-resource (RNR) 610 * condition exists, get whatever packets we can and 611 * re-start the receiver. 612 */ 613 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) { 614 struct mbuf *m; 615 struct fxp_rfa *rfa; 616rcvloop: 617 m = sc->rfa_headm; 618 rfa = (struct fxp_rfa *)m->m_ext.ext_buf; 619 620 if (rfa->rfa_status & FXP_RFA_STATUS_C) { 621 /* 622 * Remove first packet from the chain. 623 */ 624 sc->rfa_headm = m->m_next; 625 m->m_next = NULL; 626 627 /* 628 * Add a new buffer to the receive chain. If this 629 * fails, the old buffer is recycled instead. 630 */ 631 if (fxp_add_rfabuf(sc, m) == 0) { 632 struct ether_header *eh; 633 u_short total_len; 634 635 total_len = rfa->actual_size & (MCLBYTES - 1); 636 if (total_len < sizeof(struct ether_header)) { 637 m_freem(m); 638 goto rcvloop; 639 } 640 m->m_pkthdr.rcvif = ifp; 641 m->m_pkthdr.len = m->m_len = total_len - 642 sizeof(struct ether_header); 643 eh = mtod(m, struct ether_header *); 644#if NBPFILTER > 0 645 if (ifp->if_bpf) { 646 bpf_tap(ifp, mtod(m, caddr_t), total_len); 647 /* 648 * Only pass this packet up if it is for us. 649 */ 650 if ((ifp->if_flags & IFF_PROMISC) && 651 (rfa->rfa_status & FXP_RFA_STATUS_IAMATCH) && 652 (eh->ether_dhost[0] & 1) == 0) { 653 m_freem(m); 654 goto rcvloop; 655 } 656 } 657#endif 658 m->m_data += sizeof(struct ether_header); 659 ether_input(ifp, eh, m); 660 } 661 goto rcvloop; 662 } 663 if (statack & FXP_SCB_STATACK_RNR) { 664 fxp_scb_wait(csr); 665 csr->scb_general = vtophys(sc->rfa_headm->m_ext.ext_buf); 666 csr->scb_command = FXP_SCB_COMMAND_RU_START; 667 } 668 } 669 } 670} 671 672/* 673 * Update packet in/out/collision statistics. The i82557 doesn't 674 * allow you to access these counters without doing a fairly 675 * expensive DMA to get _all_ of the statistics it maintains, so 676 * we do this operation here only once per second. The statistics 677 * counters in the kernel are updated from the previous dump-stats 678 * DMA and then a new dump-stats DMA is started. The on-chip 679 * counters are zeroed when the DMA completes. If we can't start 680 * the DMA immediately, we don't wait - we just prepare to read 681 * them again next time. 682 */ 683void 684fxp_stats_update(arg) 685 void *arg; 686{ 687 struct fxp_softc *sc = arg; 688 struct ifnet *ifp = &sc->arpcom.ac_if; 689 struct fxp_stats *sp = sc->fxp_stats; 690 691 ifp->if_opackets += sp->tx_good; 692 ifp->if_collisions += sp->tx_total_collisions; 693 ifp->if_ipackets += sp->rx_good; 694 ifp->if_ierrors += 695 sp->rx_crc_errors + 696 sp->rx_alignment_errors + 697 sp->rx_rnr_errors + 698 sp->rx_overrun_errors; 699 /* 700 * If any transmit underruns occured, bump up the transmit 701 * threshold by another 512 bytes (64 * 8). 702 */ 703 if (sp->tx_underruns) { 704 ifp->if_oerrors += sp->tx_underruns; 705 if (tx_threshold < 192) 706 tx_threshold += 64; 707 } 708 /* 709 * If there is no pending command, start another stats 710 * dump. Otherwise punt for now. 711 */ 712 if ((sc->csr->scb_command & FXP_SCB_COMMAND_MASK) == 0) { 713 /* 714 * Start another stats dump. By waiting for it to be 715 * accepted, we avoid having to do splhigh locking when 716 * writing scb_command in other parts of the driver. 717 */ 718 sc->csr->scb_command = FXP_SCB_COMMAND_CU_DUMPRESET; 719 fxp_scb_wait(sc->csr); 720 } else { 721 /* 722 * A previous command is still waiting to be accepted. 723 * Just zero our copy of the stats and wait for the 724 * next timer event to update them. 725 */ 726 sp->tx_good = 0; 727 sp->tx_underruns = 0; 728 sp->tx_total_collisions = 0; 729 730 sp->rx_good = 0; 731 sp->rx_crc_errors = 0; 732 sp->rx_alignment_errors = 0; 733 sp->rx_rnr_errors = 0; 734 sp->rx_overrun_errors = 0; 735 } 736 /* 737 * Schedule another timeout one second from now. 738 */ 739 timeout(fxp_stats_update, sc, hz); 740} 741 742/* 743 * Stop the interface. Cancels the statistics updater and resets 744 * the interface. 745 */ 746static void 747fxp_stop(sc) 748 struct fxp_softc *sc; 749{ 750 struct ifnet *ifp = &sc->arpcom.ac_if; 751 struct fxp_cb_tx *txp; 752 int i; 753 754 /* 755 * Cancel stats updater. 756 */ 757 untimeout(fxp_stats_update, sc); 758 759 /* 760 * Issue software reset 761 */ 762 sc->csr->port = FXP_PORT_SELECTIVE_RESET; 763 DELAY(10); 764 765 /* 766 * Release any xmit buffers. 767 */ 768 for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL; 769 txp = txp->next) { 770 m_freem(txp->mb_head); 771 txp->mb_head = NULL; 772 } 773 sc->tx_queued = 0; 774 775 /* 776 * Free all the receive buffers then reallocate/reinitialize 777 */ 778 if (sc->rfa_headm != NULL) 779 m_freem(sc->rfa_headm); 780 sc->rfa_headm = NULL; 781 sc->rfa_tailm = NULL; 782 for (i = 0; i < FXP_NRFABUFS; i++) { 783 if (fxp_add_rfabuf(sc, NULL) != 0) { 784 /* 785 * This "can't happen" - we're at splimp() 786 * and we just freed all the buffers we need 787 * above. 788 */ 789 panic("fxp_stop: no buffers!"); 790 } 791 } 792 793 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 794 ifp->if_timer = 0; 795} 796 797/* 798 * Watchdog/transmission transmit timeout handler. Called when a 799 * transmission is started on the interface, but no interrupt is 800 * received before the timeout. This usually indicates that the 801 * card has wedged for some reason. 802 */ 803static void 804fxp_watchdog(ifp) 805 struct ifnet *ifp; 806{ 807 log(LOG_ERR, "fxp%d: device timeout\n", ifp->if_unit); 808 ifp->if_oerrors++; 809 810 fxp_init(ifp->if_softc); 811} 812 813static void 814fxp_init(xsc) 815 void *xsc; 816{ 817 struct fxp_softc *sc = xsc; 818 struct ifnet *ifp = &sc->arpcom.ac_if; 819 struct fxp_cb_config *cbp; 820 struct fxp_cb_ias *cb_ias; 821 struct fxp_cb_tx *txp; 822 struct fxp_csr *csr = sc->csr; 823 int i, s, mcast, prm; 824 825 s = splimp(); 826 /* 827 * Cancel any pending I/O 828 */ 829 fxp_stop(sc); 830 831 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 832 sc->promisc_mode = prm; 833 /* 834 * Sleeze out here and enable reception of all multicasts if 835 * multicasts are enabled. Ideally, we'd program the multicast 836 * address filter to only accept specific multicasts. 837 */ 838 mcast = (ifp->if_flags & (IFF_MULTICAST|IFF_ALLMULTI)) ? 1 : 0; 839 840 /* 841 * Initialize base of CBL and RFA memory. Loading with zero 842 * sets it up for regular linear addressing. 843 */ 844 csr->scb_general = 0; 845 csr->scb_command = FXP_SCB_COMMAND_CU_BASE; 846 847 fxp_scb_wait(csr); 848 csr->scb_command = FXP_SCB_COMMAND_RU_BASE; 849 850 /* 851 * Initialize base of dump-stats buffer. 852 */ 853 fxp_scb_wait(csr); 854 csr->scb_general = vtophys(sc->fxp_stats); 855 csr->scb_command = FXP_SCB_COMMAND_CU_DUMP_ADR; 856 857 /* 858 * We temporarily use memory that contains the TxCB list to 859 * construct the config CB. The TxCB list memory is rebuilt 860 * later. 861 */ 862 cbp = (struct fxp_cb_config *) sc->cbl_base; 863 864 /* 865 * This bcopy is kind of disgusting, but there are a bunch of must be 866 * zero and must be one bits in this structure and this is the easiest 867 * way to initialize them all to proper values. 868 */ 869 bcopy(fxp_cb_config_template, cbp, sizeof(struct fxp_cb_config)); 870 871 cbp->cb_status = 0; 872 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 873 cbp->link_addr = -1; /* (no) next command */ 874 cbp->byte_count = 22; /* (22) bytes to config */ 875 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 876 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 877 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 878 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 879 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 880 cbp->dma_bce = 0; /* (disable) dma max counters */ 881 cbp->late_scb = 0; /* (don't) defer SCB update */ 882 cbp->tno_int = 0; /* (disable) tx not okay interrupt */ 883 cbp->ci_int = 0; /* interrupt on CU not active */ 884 cbp->save_bf = prm; /* save bad frames */ 885 cbp->disc_short_rx = !prm; /* discard short packets */ 886 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */ 887 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */ 888 cbp->nsai = 1; /* (don't) disable source addr insert */ 889 cbp->preamble_length = 2; /* (7 byte) preamble */ 890 cbp->loopback = 0; /* (don't) loopback */ 891 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 892 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 893 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 894 cbp->promiscuous = prm; /* promiscuous mode */ 895 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 896 cbp->crscdt = 0; /* (CRS only) */ 897 cbp->stripping = !prm; /* truncate rx packet to byte count */ 898 cbp->padding = 1; /* (do) pad short tx packets */ 899 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 900 cbp->force_fdx = 0; /* (don't) force full duplex */ 901 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 902 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 903 cbp->mc_all = mcast; /* accept all multicasts */ 904 905 /* 906 * Start the config command/DMA. 907 */ 908 fxp_scb_wait(csr); 909 csr->scb_general = vtophys(cbp); 910 csr->scb_command = FXP_SCB_COMMAND_CU_START; 911 /* ...and wait for it to complete. */ 912 while (!(cbp->cb_status & FXP_CB_STATUS_C)); 913 914 /* 915 * Now initialize the station address. Temporarily use the TxCB 916 * memory area like we did above for the config CB. 917 */ 918 cb_ias = (struct fxp_cb_ias *) sc->cbl_base; 919 cb_ias->cb_status = 0; 920 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 921 cb_ias->link_addr = -1; 922 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr, 923 sizeof(sc->arpcom.ac_enaddr)); 924 925 /* 926 * Start the IAS (Individual Address Setup) command/DMA. 927 */ 928 fxp_scb_wait(csr); 929 csr->scb_command = FXP_SCB_COMMAND_CU_START; 930 /* ...and wait for it to complete. */ 931 while (!(cb_ias->cb_status & FXP_CB_STATUS_C)); 932 933 /* 934 * Initialize transmit control block (TxCB) list. 935 */ 936 937 txp = sc->cbl_base; 938 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 939 for (i = 0; i < FXP_NTXCB; i++) { 940 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; 941 txp[i].cb_command = FXP_CB_COMMAND_NOP; 942 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK]); 943 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]); 944 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK]; 945 } 946 /* 947 * Set the stop flag on the first TxCB and start the control 948 * unit. It will execute the NOP and then suspend. 949 */ 950 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; 951 sc->cbl_first = sc->cbl_last = txp; 952 sc->tx_queued = 0; 953 954 fxp_scb_wait(csr); 955 csr->scb_command = FXP_SCB_COMMAND_CU_START; 956 957 /* 958 * Initialize receiver buffer area - RFA. 959 */ 960 fxp_scb_wait(csr); 961 csr->scb_general = vtophys(sc->rfa_headm->m_ext.ext_buf); 962 csr->scb_command = FXP_SCB_COMMAND_RU_START; 963 964 /* 965 * Toggle a few bits in the PHY. 966 */ 967 switch (sc->phy_primary_device) { 968 case FXP_PHY_DP83840: 969 case FXP_PHY_DP83840A: 970 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_DP83840_PCR, 971 fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_DP83840_PCR) | 972 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */ 973 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */ 974 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */ 975 /* fall through */ 976 case FXP_PHY_82555: 977 /* 978 * If link0 is set, disable auto-negotiation and then: 979 * If link1 is unset = 10Mbps 980 * If link1 is set = 100Mbps 981 * If link2 is unset = half duplex 982 * If link2 is set = full duplex 983 */ 984 if (ifp->if_flags & IFF_LINK0) { 985 int flags; 986 987 flags = (ifp->if_flags & IFF_LINK1) ? 988 FXP_PHY_BMCR_SPEED_100M : 0; 989 flags |= (ifp->if_flags & IFF_LINK2) ? 990 FXP_PHY_BMCR_FULLDUPLEX : 0; 991 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR, 992 (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR) & 993 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M | 994 FXP_PHY_BMCR_FULLDUPLEX)) | flags); 995 } else { 996 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR, 997 (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR) | 998 FXP_PHY_BMCR_AUTOEN)); 999 } 1000 break; 1001 default: 1002 printf("fxp%d: warning: unsupported PHY, type = %d, addr = %d\n", 1003 ifp->if_unit, sc->phy_primary_device, sc->phy_primary_addr); 1004 } 1005 1006 ifp->if_flags |= IFF_RUNNING; 1007 ifp->if_flags &= ~IFF_OACTIVE; 1008 splx(s); 1009 1010 /* 1011 * Start stats updater. 1012 */ 1013 timeout(fxp_stats_update, sc, hz); 1014} 1015 1016/* 1017 * Add a buffer to the end of the RFA buffer list. 1018 * Return 0 if successful, 1 for failure. A failure results in 1019 * adding the 'oldm' (if non-NULL) on to the end of the list - 1020 * tossing out it's old contents and recycling it. 1021 * The RFA struct is stuck at the beginning of mbuf cluster and the 1022 * data pointer is fixed up to point just past it. 1023 */ 1024static int 1025fxp_add_rfabuf(sc, oldm) 1026 struct fxp_softc *sc; 1027 struct mbuf *oldm; 1028{ 1029 struct mbuf *m; 1030 struct fxp_rfa *rfa, *p_rfa; 1031 1032 MGETHDR(m, M_DONTWAIT, MT_DATA); 1033 if (m != NULL) { 1034 MCLGET(m, M_DONTWAIT); 1035 if ((m->m_flags & M_EXT) == 0) { 1036 m_freem(m); 1037 if (oldm == NULL) 1038 return 1; 1039 m = oldm; 1040 m->m_data = m->m_ext.ext_buf; 1041 } 1042 } else { 1043 if (oldm == NULL) 1044 return 1; 1045 m = oldm; 1046 m->m_data = m->m_ext.ext_buf; 1047 } 1048 /* 1049 * Get a pointer to the base of the mbuf cluster and move 1050 * data start past it. 1051 */ 1052 rfa = mtod(m, struct fxp_rfa *); 1053 m->m_data += sizeof(struct fxp_rfa); 1054 rfa->size = MCLBYTES - sizeof(struct fxp_rfa); 1055 1056 rfa->rfa_status = 0; 1057 rfa->rfa_control = FXP_RFA_CONTROL_EL; 1058 rfa->link_addr = -1; 1059 rfa->rbd_addr = -1; 1060 rfa->actual_size = 0; 1061 /* 1062 * If there are other buffers already on the list, attach this 1063 * one to the end by fixing up the tail to point to this one. 1064 */ 1065 if (sc->rfa_headm != NULL) { 1066 p_rfa = (struct fxp_rfa *) sc->rfa_tailm->m_ext.ext_buf; 1067 sc->rfa_tailm->m_next = m; 1068 p_rfa->link_addr = vtophys(rfa); 1069 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL; 1070 } else { 1071 sc->rfa_headm = m; 1072 } 1073 sc->rfa_tailm = m; 1074 1075 return (m == oldm); 1076} 1077 1078static volatile int 1079fxp_mdi_read(csr, phy, reg) 1080 struct fxp_csr *csr; 1081 int phy; 1082 int reg; 1083{ 1084 int count = 10000; 1085 int value; 1086 1087 csr->mdi_control = (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21); 1088 1089 while (((value = csr->mdi_control) & 0x10000000) == 0 && count--) 1090 DELAY(10); 1091 1092 if (count <= 0) 1093 printf("fxp_mdi_read: timed out\n"); 1094 1095 return (value & 0xffff); 1096} 1097 1098static void 1099fxp_mdi_write(csr, phy, reg, value) 1100 struct fxp_csr *csr; 1101 int phy; 1102 int reg; 1103 int value; 1104{ 1105 int count = 10000; 1106 1107 csr->mdi_control = (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) 1108 | (value & 0xffff); 1109 1110 while ((csr->mdi_control & 0x10000000) == 0 && count--) 1111 DELAY(10); 1112 1113 if (count <= 0) 1114 printf("fxp_mdi_write: timed out\n"); 1115} 1116 1117static int 1118fxp_ioctl(ifp, command, data) 1119 struct ifnet *ifp; 1120 int command; 1121 caddr_t data; 1122{ 1123 struct ifaddr *ifa = (struct ifaddr *) data; 1124 struct fxp_softc *sc = ifp->if_softc; 1125 struct ifreq *ifr = (struct ifreq *) data; 1126 int s, error = 0; 1127 1128 s = splimp(); 1129 1130 switch (command) { 1131 1132 case SIOCSIFADDR: 1133 case SIOCGIFADDR: 1134 case SIOCSIFMTU: 1135 error = ether_ioctl(ifp, command, data); 1136 break; 1137 1138 case SIOCSIFFLAGS: 1139 1140 /* 1141 * If interface is marked up and not running, then start it. 1142 * If it is marked down and running, stop it. 1143 * XXX If it's up then re-initialize it. This is so flags 1144 * such as IFF_PROMISC are handled. 1145 */ 1146 if (ifp->if_flags & IFF_UP) { 1147 fxp_init(sc); 1148 } else { 1149 if (ifp->if_flags & IFF_RUNNING) 1150 fxp_stop(sc); 1151 } 1152 break; 1153 1154 case SIOCADDMULTI: 1155 case SIOCDELMULTI: 1156 /* 1157 * Multicast list has changed; set the hardware filter 1158 * accordingly. 1159 */ 1160 fxp_init(sc); 1161 error = 0; 1162 break; 1163 1164 default: 1165 error = EINVAL; 1166 } 1167 (void) splx(s); 1168 return (error); 1169} 1170