1/*- 2 * Copyright 2016 Michal Meloun <mmel@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: stable/11/sys/dev/extres/clk/clk_fixed.c 308324 2016-11-05 04:17:32Z mmel $"); 29 30#include <sys/param.h> 31#include <sys/conf.h> 32#include <sys/bus.h> 33#include <sys/kernel.h> 34#include <sys/kobj.h> 35#include <sys/malloc.h> 36#include <sys/mutex.h> 37#include <sys/module.h> 38#include <sys/rman.h> 39#include <sys/systm.h> 40 41#include <machine/bus.h> 42 43#include <dev/ofw/ofw_bus.h> 44#include <dev/ofw/ofw_bus_subr.h> 45#include <dev/extres/clk/clk_fixed.h> 46 47#define CLK_TYPE_FIXED 1 48#define CLK_TYPE_FIXED_FACTOR 2 49 50static int clknode_fixed_init(struct clknode *clk, device_t dev); 51static int clknode_fixed_recalc(struct clknode *clk, uint64_t *freq); 52static int clknode_fixed_set_freq(struct clknode *clk, uint64_t fin, 53 uint64_t *fout, int flags, int *stop); 54 55struct clknode_fixed_sc { 56 int fixed_flags; 57 uint64_t freq; 58 uint32_t mult; 59 uint32_t div; 60}; 61 62static clknode_method_t clknode_fixed_methods[] = { 63 /* Device interface */ 64 CLKNODEMETHOD(clknode_init, clknode_fixed_init), 65 CLKNODEMETHOD(clknode_recalc_freq, clknode_fixed_recalc), 66 CLKNODEMETHOD(clknode_set_freq, clknode_fixed_set_freq), 67 CLKNODEMETHOD_END 68}; 69DEFINE_CLASS_1(clknode_fixed, clknode_fixed_class, clknode_fixed_methods, 70 sizeof(struct clknode_fixed_sc), clknode_class); 71 72static int 73clknode_fixed_init(struct clknode *clk, device_t dev) 74{ 75 struct clknode_fixed_sc *sc; 76 77 sc = clknode_get_softc(clk); 78 if (sc->freq == 0) 79 clknode_init_parent_idx(clk, 0); 80 return(0); 81} 82 83static int 84clknode_fixed_recalc(struct clknode *clk, uint64_t *freq) 85{ 86 struct clknode_fixed_sc *sc; 87 88 sc = clknode_get_softc(clk); 89 90 if ((sc->mult != 0) && (sc->div != 0)) 91 *freq = (*freq / sc->div) * sc->mult; 92 else 93 *freq = sc->freq; 94 return (0); 95} 96 97static int 98clknode_fixed_set_freq(struct clknode *clk, uint64_t fin, uint64_t *fout, 99 int flags, int *stop) 100{ 101 struct clknode_fixed_sc *sc; 102 103 sc = clknode_get_softc(clk); 104 if (sc->mult == 0 || sc->div == 0) { 105 /* Fixed frequency clock. */ 106 *stop = 1; 107 if (*fout != sc->freq) 108 return (ERANGE); 109 return (0); 110 } 111 /* Fixed factor clock. */ 112 *stop = 0; 113 *fout = (*fout / sc->mult) * sc->div; 114 return (0); 115} 116 117int 118clknode_fixed_register(struct clkdom *clkdom, struct clk_fixed_def *clkdef) 119{ 120 struct clknode *clk; 121 struct clknode_fixed_sc *sc; 122 123 clk = clknode_create(clkdom, &clknode_fixed_class, &clkdef->clkdef); 124 if (clk == NULL) 125 return (1); 126 127 sc = clknode_get_softc(clk); 128 sc->fixed_flags = clkdef->fixed_flags; 129 sc->freq = clkdef->freq; 130 sc->mult = clkdef->mult; 131 sc->div = clkdef->div; 132 133 clknode_register(clkdom, clk); 134 return (0); 135} 136 137#ifdef FDT 138 139static struct ofw_compat_data compat_data[] = { 140 {"fixed-clock", CLK_TYPE_FIXED}, 141 {"fixed-factor-clock", CLK_TYPE_FIXED_FACTOR}, 142 {NULL, 0}, 143}; 144 145struct clk_fixed_softc { 146 device_t dev; 147 struct clkdom *clkdom; 148}; 149 150static int 151clk_fixed_probe(device_t dev) 152{ 153 intptr_t clk_type; 154 155 clk_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 156 switch (clk_type) { 157 case CLK_TYPE_FIXED: 158 device_set_desc(dev, "Fixed clock"); 159 return (BUS_PROBE_DEFAULT); 160 case CLK_TYPE_FIXED_FACTOR: 161 device_set_desc(dev, "Fixed factor clock"); 162 return (BUS_PROBE_DEFAULT); 163 default: 164 return (ENXIO); 165 } 166} 167 168static int 169clk_fixed_init_fixed(struct clk_fixed_softc *sc, phandle_t node, 170 struct clk_fixed_def *def) 171{ 172 uint32_t freq; 173 int rv; 174 175 def->clkdef.id = 1; 176 rv = OF_getencprop(node, "clock-frequency", &freq, sizeof(freq)); 177 if (rv <= 0) 178 return (ENXIO); 179 def->freq = freq; 180 return (0); 181} 182 183static int 184clk_fixed_init_fixed_factor(struct clk_fixed_softc *sc, phandle_t node, 185 struct clk_fixed_def *def) 186{ 187 int rv; 188 clk_t parent; 189 190 def->clkdef.id = 1; 191 rv = OF_getencprop(node, "clock-mult", &def->mult, sizeof(def->mult)); 192 if (rv <= 0) 193 return (ENXIO); 194 rv = OF_getencprop(node, "clock-div", &def->div, sizeof(def->div)); 195 if (rv <= 0) 196 return (ENXIO); 197 /* Get name of parent clock */ 198 rv = clk_get_by_ofw_index(sc->dev, 0, 0, &parent); 199 if (rv != 0) 200 return (ENXIO); 201 def->clkdef.parent_names = malloc(sizeof(char *), M_OFWPROP, M_WAITOK); 202 def->clkdef.parent_names[0] = clk_get_name(parent); 203 def->clkdef.parent_cnt = 1; 204 clk_release(parent); 205 return (0); 206} 207 208static int 209clk_fixed_attach(device_t dev) 210{ 211 struct clk_fixed_softc *sc; 212 intptr_t clk_type; 213 phandle_t node; 214 struct clk_fixed_def def; 215 int rv; 216 217 sc = device_get_softc(dev); 218 sc->dev = dev; 219 node = ofw_bus_get_node(dev); 220 clk_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 221 222 bzero(&def, sizeof(def)); 223 if (clk_type == CLK_TYPE_FIXED) 224 rv = clk_fixed_init_fixed(sc, node, &def); 225 else if (clk_type == CLK_TYPE_FIXED_FACTOR) 226 rv = clk_fixed_init_fixed_factor(sc, node, &def); 227 else 228 rv = ENXIO; 229 if (rv != 0) { 230 device_printf(sc->dev, "Cannot FDT parameters.\n"); 231 goto fail; 232 } 233 rv = clk_parse_ofw_clk_name(dev, node, &def.clkdef.name); 234 if (rv != 0) { 235 device_printf(sc->dev, "Cannot parse clock name.\n"); 236 goto fail; 237 } 238 sc->clkdom = clkdom_create(dev); 239 KASSERT(sc->clkdom != NULL, ("Clock domain is NULL")); 240 241 rv = clknode_fixed_register(sc->clkdom, &def); 242 if (rv != 0) { 243 device_printf(sc->dev, "Cannot register fixed clock.\n"); 244 rv = ENXIO; 245 goto fail; 246 } 247 248 rv = clkdom_finit(sc->clkdom); 249 if (rv != 0) { 250 device_printf(sc->dev, "Clk domain finit fails.\n"); 251 rv = ENXIO; 252 goto fail; 253 } 254#ifdef CLK_DEBUG 255 clkdom_dump(sc->clkdom); 256#endif 257 OF_prop_free(__DECONST(char *, def.clkdef.name)); 258 OF_prop_free(def.clkdef.parent_names); 259 return (bus_generic_attach(dev)); 260 261fail: 262 OF_prop_free(__DECONST(char *, def.clkdef.name)); 263 OF_prop_free(def.clkdef.parent_names); 264 return (rv); 265} 266 267static device_method_t clk_fixed_methods[] = { 268 /* Device interface */ 269 DEVMETHOD(device_probe, clk_fixed_probe), 270 DEVMETHOD(device_attach, clk_fixed_attach), 271 272 DEVMETHOD_END 273}; 274 275DEFINE_CLASS_0(clk_fixed, clk_fixed_driver, clk_fixed_methods, 276 sizeof(struct clk_fixed_softc)); 277static devclass_t clk_fixed_devclass; 278EARLY_DRIVER_MODULE(clk_fixed, simplebus, clk_fixed_driver, 279 clk_fixed_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 280MODULE_VERSION(clk_fixed, 1); 281 282#endif 283