1/*-
2 * Copyright (c) 2011-2012 Stefan Bethke.
3 * Copyright (c) 2012 Adrian Chadd.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: stable/11/sys/dev/etherswitch/arswitch/arswitch_8316.c 330456 2018-03-05 08:14:11Z eadler $
28 */
29
30#include <sys/param.h>
31#include <sys/bus.h>
32#include <sys/errno.h>
33#include <sys/kernel.h>
34#include <sys/module.h>
35#include <sys/socket.h>
36#include <sys/sockio.h>
37#include <sys/sysctl.h>
38#include <sys/systm.h>
39
40#include <net/if.h>
41#include <net/if_arp.h>
42#include <net/ethernet.h>
43#include <net/if_dl.h>
44#include <net/if_media.h>
45#include <net/if_types.h>
46
47#include <machine/bus.h>
48#include <dev/iicbus/iic.h>
49#include <dev/iicbus/iiconf.h>
50#include <dev/iicbus/iicbus.h>
51#include <dev/mii/mii.h>
52#include <dev/mii/miivar.h>
53#include <dev/mdio/mdio.h>
54
55#include <dev/etherswitch/etherswitch.h>
56
57#include <dev/etherswitch/arswitch/arswitchreg.h>
58#include <dev/etherswitch/arswitch/arswitchvar.h>
59#include <dev/etherswitch/arswitch/arswitch_reg.h>
60#include <dev/etherswitch/arswitch/arswitch_8316.h>
61
62#include "mdio_if.h"
63#include "miibus_if.h"
64#include "etherswitch_if.h"
65
66/*
67 * AR8316 specific functions
68 */
69static int
70ar8316_hw_setup(struct arswitch_softc *sc)
71{
72
73	/*
74	 * Configure the switch mode based on whether:
75	 *
76	 * + The switch port is GMII/RGMII;
77	 * + Port 4 is either connected to the CPU or to the internal switch.
78	 */
79	if (sc->is_rgmii && sc->phy4cpu) {
80		arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
81		    AR8X16_MODE_RGMII_PORT4_ISO);
82		device_printf(sc->sc_dev,
83		    "%s: MAC port == RGMII, port 4 = dedicated PHY\n",
84		    __func__);
85	} else if (sc->is_rgmii) {
86		arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
87		    AR8X16_MODE_RGMII_PORT4_SWITCH);
88		device_printf(sc->sc_dev,
89		    "%s: MAC port == RGMII, port 4 = switch port\n",
90		    __func__);
91	} else if (sc->is_gmii) {
92		arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
93		    AR8X16_MODE_GMII);
94		device_printf(sc->sc_dev, "%s: MAC port == GMII\n", __func__);
95	} else {
96		device_printf(sc->sc_dev, "%s: unknown switch PHY config\n",
97		    __func__);
98		return (ENXIO);
99	}
100
101	DELAY(1000);	/* 1ms wait for things to settle */
102
103	/*
104	 * If port 4 is RGMII, force workaround
105	 */
106	if (sc->is_rgmii && sc->phy4cpu) {
107		device_printf(sc->sc_dev,
108		    "%s: port 4 RGMII workaround\n",
109		    __func__);
110
111		/* work around for phy4 rgmii mode */
112		arswitch_writedbg(sc->sc_dev, 4, 0x12, 0x480c);
113		/* rx delay */
114		arswitch_writedbg(sc->sc_dev, 4, 0x0, 0x824e);
115		/* tx delay */
116		arswitch_writedbg(sc->sc_dev, 4, 0x5, 0x3d47);
117		DELAY(1000);	/* 1ms, again to let things settle */
118	}
119
120	return (0);
121}
122
123/*
124 * Initialise other global values, for the AR8316.
125 */
126static int
127ar8316_hw_global_setup(struct arswitch_softc *sc)
128{
129
130	arswitch_writereg(sc->sc_dev, 0x38, AR8X16_MAGIC);
131
132	/* Enable CPU port and disable mirror port. */
133	arswitch_writereg(sc->sc_dev, AR8X16_REG_CPU_PORT,
134	    AR8X16_CPU_PORT_EN | AR8X16_CPU_MIRROR_DIS);
135
136	/* Setup TAG priority mapping. */
137	arswitch_writereg(sc->sc_dev, AR8X16_REG_TAG_PRIO, 0xfa50);
138
139	/* Enable ARP frame acknowledge. */
140	/* XXX TODO: aging? */
141	arswitch_modifyreg(sc->sc_dev, AR8X16_REG_AT_CTRL, 0,
142	    AR8X16_AT_CTRL_ARP_EN);
143
144	/*
145	 * Flood address table misses to all ports, and enable forwarding of
146	 * broadcasts to the cpu port.
147	 */
148	arswitch_writereg(sc->sc_dev, AR8X16_REG_FLOOD_MASK,
149	    AR8X16_FLOOD_MASK_BCAST_TO_CPU | 0x003f003f);
150
151	/* Enable jumbo frames. */
152	arswitch_modifyreg(sc->sc_dev, AR8X16_REG_GLOBAL_CTRL,
153	    AR8316_GLOBAL_CTRL_MTU_MASK, 9018 + 8 + 2);
154
155	/* Setup service TAG. */
156	arswitch_modifyreg(sc->sc_dev, AR8X16_REG_SERVICE_TAG,
157	    AR8X16_SERVICE_TAG_MASK, 0);
158
159	return (0);
160}
161
162void
163ar8316_attach(struct arswitch_softc *sc)
164{
165
166	sc->hal.arswitch_hw_setup = ar8316_hw_setup;
167	sc->hal.arswitch_hw_global_setup = ar8316_hw_global_setup;
168
169	/* Set the switch vlan capabilities. */
170	sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q |
171	    ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOUBLE_TAG;
172	sc->info.es_nvlangroups = AR8X16_MAX_VLANS;
173}
174