1/*- 2 * Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Herb Peyerl. 16 * 4. The name of Herb Peyerl may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: stable/11/sys/dev/ep/if_ep.c 347962 2019-05-18 20:43:13Z brooks $"); 33 34/* 35 * Modified from the FreeBSD 1.1.5.1 version by: 36 * Andres Vega Garcia 37 * INRIA - Sophia Antipolis, France 38 * avega@sophia.inria.fr 39 */ 40 41/* 42 * Promiscuous mode added and interrupt logic slightly changed 43 * to reduce the number of adapter failures. Transceiver select 44 * logic changed to use value from EEPROM. Autoconfiguration 45 * features added. 46 * Done by: 47 * Serge Babkin 48 * Chelindbank (Chelyabinsk, Russia) 49 * babkin@hq.icb.chel.su 50 */ 51 52/* 53 * Pccard support for 3C589 by: 54 * HAMADA Naoki 55 * nao@tom-yam.or.jp 56 */ 57 58/* 59 * MAINTAINER: Matthew N. Dodd <winter@jurai.net> 60 * <mdodd@FreeBSD.org> 61 */ 62 63#include <sys/param.h> 64#include <sys/systm.h> 65#include <sys/kernel.h> 66#include <sys/malloc.h> 67#include <sys/mbuf.h> 68#include <sys/socket.h> 69#include <sys/sockio.h> 70#include <sys/bus.h> 71 72#include <machine/bus.h> 73#include <machine/resource.h> 74#include <sys/rman.h> 75 76#include <net/if.h> 77#include <net/if_var.h> 78#include <net/if_dl.h> 79#include <net/if_media.h> 80#include <net/if_types.h> 81#include <net/ethernet.h> 82#include <net/bpf.h> 83 84#include <dev/ep/if_epreg.h> 85#include <dev/ep/if_epvar.h> 86 87/* Exported variables */ 88devclass_t ep_devclass; 89 90static int ep_media2if_media[] = 91{IFM_10_T, IFM_10_5, IFM_NONE, IFM_10_2, IFM_NONE}; 92 93/* if functions */ 94static void epinit(void *); 95static int epioctl(struct ifnet *, u_long, caddr_t); 96static void epstart(struct ifnet *); 97 98static void ep_intr_locked(struct ep_softc *); 99static void epstart_locked(struct ifnet *); 100static void epinit_locked(struct ep_softc *); 101static void eptick(void *); 102static void epwatchdog(struct ep_softc *); 103 104/* if_media functions */ 105static int ep_ifmedia_upd(struct ifnet *); 106static void ep_ifmedia_sts(struct ifnet *, struct ifmediareq *); 107 108static void epstop(struct ep_softc *); 109static void epread(struct ep_softc *); 110static int eeprom_rdy(struct ep_softc *); 111 112#define EP_FTST(sc, f) (sc->stat & (f)) 113#define EP_FSET(sc, f) (sc->stat |= (f)) 114#define EP_FRST(sc, f) (sc->stat &= ~(f)) 115 116static int 117eeprom_rdy(struct ep_softc *sc) 118{ 119 int i; 120 121 for (i = 0; is_eeprom_busy(sc) && i < MAX_EEPROMBUSY; i++) 122 DELAY(100); 123 124 if (i >= MAX_EEPROMBUSY) { 125 device_printf(sc->dev, "eeprom failed to come ready.\n"); 126 return (ENXIO); 127 } 128 129 return (0); 130} 131 132/* 133 * get_e: gets a 16 bits word from the EEPROM. we must have set the window 134 * before 135 */ 136int 137ep_get_e(struct ep_softc *sc, uint16_t offset, uint16_t *result) 138{ 139 140 if (eeprom_rdy(sc)) 141 return (ENXIO); 142 143 CSR_WRITE_2(sc, EP_W0_EEPROM_COMMAND, 144 (EEPROM_CMD_RD << sc->epb.cmd_off) | offset); 145 146 if (eeprom_rdy(sc)) 147 return (ENXIO); 148 149 (*result) = CSR_READ_2(sc, EP_W0_EEPROM_DATA); 150 151 return (0); 152} 153 154static int 155ep_get_macaddr(struct ep_softc *sc, u_char *addr) 156{ 157 int i; 158 uint16_t result; 159 int error; 160 uint16_t *macaddr; 161 162 macaddr = (uint16_t *) addr; 163 164 GO_WINDOW(sc, 0); 165 for (i = EEPROM_NODE_ADDR_0; i <= EEPROM_NODE_ADDR_2; i++) { 166 error = ep_get_e(sc, i, &result); 167 if (error) 168 return (error); 169 macaddr[i] = htons(result); 170 } 171 return (0); 172} 173 174int 175ep_alloc(device_t dev) 176{ 177 struct ep_softc *sc = device_get_softc(dev); 178 int rid; 179 int error = 0; 180 uint16_t result; 181 182 rid = 0; 183 sc->iobase = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, 184 RF_ACTIVE); 185 if (!sc->iobase) { 186 device_printf(dev, "No I/O space?!\n"); 187 error = ENXIO; 188 goto bad; 189 } 190 rid = 0; 191 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); 192 if (!sc->irq) { 193 device_printf(dev, "No irq?!\n"); 194 error = ENXIO; 195 goto bad; 196 } 197 sc->dev = dev; 198 sc->stat = 0; /* 16 bit access */ 199 200 sc->bst = rman_get_bustag(sc->iobase); 201 sc->bsh = rman_get_bushandle(sc->iobase); 202 203 sc->ep_connectors = 0; 204 sc->ep_connector = 0; 205 206 GO_WINDOW(sc, 0); 207 208 error = ep_get_e(sc, EEPROM_PROD_ID, &result); 209 if (error) 210 goto bad; 211 sc->epb.prod_id = result; 212 213 error = ep_get_e(sc, EEPROM_RESOURCE_CFG, &result); 214 if (error) 215 goto bad; 216 sc->epb.res_cfg = result; 217 218bad: 219 if (error != 0) 220 ep_free(dev); 221 return (error); 222} 223 224void 225ep_get_media(struct ep_softc *sc) 226{ 227 uint16_t config; 228 229 GO_WINDOW(sc, 0); 230 config = CSR_READ_2(sc, EP_W0_CONFIG_CTRL); 231 if (config & IS_AUI) 232 sc->ep_connectors |= AUI; 233 if (config & IS_BNC) 234 sc->ep_connectors |= BNC; 235 if (config & IS_UTP) 236 sc->ep_connectors |= UTP; 237 238 if (!(sc->ep_connectors & 7)) 239 if (bootverbose) 240 device_printf(sc->dev, "no connectors!\n"); 241 242 /* 243 * This works for most of the cards so we'll do it here. 244 * The cards that require something different can override 245 * this later on. 246 */ 247 sc->ep_connector = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) >> ACF_CONNECTOR_BITS; 248} 249 250void 251ep_free(device_t dev) 252{ 253 struct ep_softc *sc = device_get_softc(dev); 254 255 if (sc->ep_intrhand) 256 bus_teardown_intr(dev, sc->irq, sc->ep_intrhand); 257 if (sc->iobase) 258 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->iobase); 259 if (sc->irq) 260 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 261 sc->ep_intrhand = 0; 262 sc->iobase = 0; 263 sc->irq = 0; 264} 265 266static void 267ep_setup_station(struct ep_softc *sc, u_char *enaddr) 268{ 269 int i; 270 271 /* 272 * Setup the station address 273 */ 274 GO_WINDOW(sc, 2); 275 for (i = 0; i < ETHER_ADDR_LEN; i++) 276 CSR_WRITE_1(sc, EP_W2_ADDR_0 + i, enaddr[i]); 277} 278 279int 280ep_attach(struct ep_softc *sc) 281{ 282 struct ifnet *ifp = NULL; 283 struct ifmedia *ifm = NULL; 284 int error; 285 286 sc->gone = 0; 287 EP_LOCK_INIT(sc); 288 if (! (sc->stat & F_ENADDR_SKIP)) { 289 error = ep_get_macaddr(sc, sc->eaddr); 290 if (error) { 291 device_printf(sc->dev, "Unable to get MAC address!\n"); 292 EP_LOCK_DESTROY(sc); 293 return (ENXIO); 294 } 295 } 296 ep_setup_station(sc, sc->eaddr); 297 ifp = sc->ifp = if_alloc(IFT_ETHER); 298 if (ifp == NULL) { 299 device_printf(sc->dev, "if_alloc() failed\n"); 300 EP_LOCK_DESTROY(sc); 301 return (ENOSPC); 302 } 303 304 ifp->if_softc = sc; 305 if_initname(ifp, device_get_name(sc->dev), device_get_unit(sc->dev)); 306 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 307 ifp->if_start = epstart; 308 ifp->if_ioctl = epioctl; 309 ifp->if_init = epinit; 310 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 311 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 312 IFQ_SET_READY(&ifp->if_snd); 313 314 callout_init_mtx(&sc->watchdog_timer, &sc->sc_mtx, 0); 315 if (!sc->epb.mii_trans) { 316 ifmedia_init(&sc->ifmedia, 0, ep_ifmedia_upd, ep_ifmedia_sts); 317 318 if (sc->ep_connectors & AUI) 319 ifmedia_add(&sc->ifmedia, 320 IFM_ETHER | IFM_10_5, 0, NULL); 321 if (sc->ep_connectors & UTP) 322 ifmedia_add(&sc->ifmedia, 323 IFM_ETHER | IFM_10_T, 0, NULL); 324 if (sc->ep_connectors & BNC) 325 ifmedia_add(&sc->ifmedia, 326 IFM_ETHER | IFM_10_2, 0, NULL); 327 if (!sc->ep_connectors) 328 ifmedia_add(&sc->ifmedia, 329 IFM_ETHER | IFM_NONE, 0, NULL); 330 331 ifmedia_set(&sc->ifmedia, 332 IFM_ETHER | ep_media2if_media[sc->ep_connector]); 333 334 ifm = &sc->ifmedia; 335 ifm->ifm_media = ifm->ifm_cur->ifm_media; 336 ep_ifmedia_upd(ifp); 337 } 338 ether_ifattach(ifp, sc->eaddr); 339 340#ifdef EP_LOCAL_STATS 341 sc->rx_no_first = sc->rx_no_mbuf = sc->rx_bpf_disc = 342 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0; 343#endif 344 EP_FSET(sc, F_RX_FIRST); 345 sc->top = sc->mcur = 0; 346 347 EP_LOCK(sc); 348 epstop(sc); 349 EP_UNLOCK(sc); 350 351 gone_by_fcp101_dev(sc->dev); 352 353 return (0); 354} 355 356int 357ep_detach(device_t dev) 358{ 359 struct ep_softc *sc; 360 struct ifnet *ifp; 361 362 sc = device_get_softc(dev); 363 ifp = sc->ifp; 364 EP_ASSERT_UNLOCKED(sc); 365 EP_LOCK(sc); 366 if (bus_child_present(dev)) 367 epstop(sc); 368 sc->gone = 1; 369 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 370 EP_UNLOCK(sc); 371 ether_ifdetach(ifp); 372 callout_drain(&sc->watchdog_timer); 373 ep_free(dev); 374 375 if_free(ifp); 376 EP_LOCK_DESTROY(sc); 377 378 return (0); 379} 380 381static void 382epinit(void *xsc) 383{ 384 struct ep_softc *sc = xsc; 385 EP_LOCK(sc); 386 epinit_locked(sc); 387 EP_UNLOCK(sc); 388} 389 390/* 391 * The order in here seems important. Otherwise we may not receive 392 * interrupts. ?! 393 */ 394static void 395epinit_locked(struct ep_softc *sc) 396{ 397 struct ifnet *ifp = sc->ifp; 398 int i; 399 400 if (sc->gone) 401 return; 402 403 EP_ASSERT_LOCKED(sc); 404 EP_BUSY_WAIT(sc); 405 406 GO_WINDOW(sc, 0); 407 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER); 408 GO_WINDOW(sc, 4); 409 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP); 410 GO_WINDOW(sc, 0); 411 412 /* Disable the card */ 413 CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, 0); 414 415 /* Enable the card */ 416 CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ); 417 418 GO_WINDOW(sc, 2); 419 /* Reload the ether_addr. */ 420 ep_setup_station(sc, IF_LLADDR(sc->ifp)); 421 422 CSR_WRITE_2(sc, EP_COMMAND, RX_RESET); 423 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET); 424 EP_BUSY_WAIT(sc); 425 426 /* Window 1 is operating window */ 427 GO_WINDOW(sc, 1); 428 for (i = 0; i < 31; i++) 429 CSR_READ_1(sc, EP_W1_TX_STATUS); 430 431 /* get rid of stray intr's */ 432 CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | 0xff); 433 434 CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK | S_5_INTS); 435 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS); 436 437 if (ifp->if_flags & IFF_PROMISC) 438 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL | 439 FIL_MULTICAST | FIL_BRDCST | FIL_PROMISC); 440 else 441 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL | 442 FIL_MULTICAST | FIL_BRDCST); 443 444 if (!sc->epb.mii_trans) 445 ep_ifmedia_upd(ifp); 446 447 if (sc->stat & F_HAS_TX_PLL) 448 CSR_WRITE_2(sc, EP_COMMAND, TX_PLL_ENABLE); 449 CSR_WRITE_2(sc, EP_COMMAND, RX_ENABLE); 450 CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE); 451 452 ifp->if_drv_flags |= IFF_DRV_RUNNING; 453 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; /* just in case */ 454 455#ifdef EP_LOCAL_STATS 456 sc->rx_no_first = sc->rx_no_mbuf = 457 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0; 458#endif 459 EP_FSET(sc, F_RX_FIRST); 460 if (sc->top) { 461 m_freem(sc->top); 462 sc->top = sc->mcur = 0; 463 } 464 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH); 465 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_START_THRESH | 16); 466 467 GO_WINDOW(sc, 1); 468 epstart_locked(ifp); 469 callout_reset(&sc->watchdog_timer, hz, eptick, sc); 470} 471 472static void 473epstart(struct ifnet *ifp) 474{ 475 struct ep_softc *sc; 476 sc = ifp->if_softc; 477 EP_LOCK(sc); 478 epstart_locked(ifp); 479 EP_UNLOCK(sc); 480} 481 482static void 483epstart_locked(struct ifnet *ifp) 484{ 485 struct ep_softc *sc; 486 u_int len; 487 struct mbuf *m, *m0; 488 int pad, started; 489 490 sc = ifp->if_softc; 491 if (sc->gone) 492 return; 493 EP_ASSERT_LOCKED(sc); 494 EP_BUSY_WAIT(sc); 495 if (ifp->if_drv_flags & IFF_DRV_OACTIVE) 496 return; 497 started = 0; 498startagain: 499 /* Sneak a peek at the next packet */ 500 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0); 501 if (m0 == NULL) 502 return; 503 if (!started && (sc->stat & F_HAS_TX_PLL)) 504 CSR_WRITE_2(sc, EP_COMMAND, TX_PLL_ENABLE); 505 started++; 506 for (len = 0, m = m0; m != NULL; m = m->m_next) 507 len += m->m_len; 508 509 pad = (4 - len) & 3; 510 511 /* 512 * The 3c509 automatically pads short packets to minimum 513 * ethernet length, but we drop packets that are too large. 514 * Perhaps we should truncate them instead? 515 */ 516 if (len + pad > ETHER_MAX_LEN) { 517 /* packet is obviously too large: toss it */ 518 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 519 m_freem(m0); 520 goto readcheck; 521 } 522 if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) { 523 /* no room in FIFO */ 524 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4)); 525 /* make sure */ 526 if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) { 527 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 528 IFQ_DRV_PREPEND(&ifp->if_snd, m0); 529 goto done; 530 } 531 } else 532 CSR_WRITE_2(sc, EP_COMMAND, 533 SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE); 534 535 /* XXX 4.x and earlier would splhigh here */ 536 537 CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, len); 538 /* Second dword meaningless */ 539 CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, 0x0); 540 541 if (EP_FTST(sc, F_ACCESS_32_BITS)) { 542 for (m = m0; m != NULL; m = m->m_next) { 543 if (m->m_len > 3) 544 CSR_WRITE_MULTI_4(sc, EP_W1_TX_PIO_WR_1, 545 mtod(m, uint32_t *), m->m_len / 4); 546 if (m->m_len & 3) 547 CSR_WRITE_MULTI_1(sc, EP_W1_TX_PIO_WR_1, 548 mtod(m, uint8_t *)+(m->m_len & (~3)), 549 m->m_len & 3); 550 } 551 } else { 552 for (m = m0; m != NULL; m = m->m_next) { 553 if (m->m_len > 1) 554 CSR_WRITE_MULTI_2(sc, EP_W1_TX_PIO_WR_1, 555 mtod(m, uint16_t *), m->m_len / 2); 556 if (m->m_len & 1) 557 CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 558 *(mtod(m, uint8_t *)+m->m_len - 1)); 559 } 560 } 561 562 while (pad--) 563 CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 0); /* Padding */ 564 565 /* XXX and drop splhigh here */ 566 567 BPF_MTAP(ifp, m0); 568 569 sc->tx_timer = 2; 570 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 571 m_freem(m0); 572 573 /* 574 * Is another packet coming in? We don't want to overflow 575 * the tiny RX fifo. 576 */ 577readcheck: 578 if (CSR_READ_2(sc, EP_W1_RX_STATUS) & RX_BYTES_MASK) { 579 /* 580 * we check if we have packets left, in that case 581 * we prepare to come back later 582 */ 583 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 584 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | 8); 585 goto done; 586 } 587 goto startagain; 588done:; 589 return; 590} 591 592void 593ep_intr(void *arg) 594{ 595 struct ep_softc *sc; 596 597 sc = (struct ep_softc *) arg; 598 EP_LOCK(sc); 599 ep_intr_locked(sc); 600 EP_UNLOCK(sc); 601} 602 603static void 604ep_intr_locked(struct ep_softc *sc) 605{ 606 int status; 607 struct ifnet *ifp; 608 609 /* XXX 4.x splbio'd here to reduce interruptability */ 610 611 /* 612 * quick fix: Try to detect an interrupt when the card goes away. 613 */ 614 if (sc->gone || CSR_READ_2(sc, EP_STATUS) == 0xffff) 615 return; 616 ifp = sc->ifp; 617 618 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK); /* disable all Ints */ 619 620rescan: 621 622 while ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS) { 623 624 /* first acknowledge all interrupt sources */ 625 CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | (status & S_MASK)); 626 627 if (status & (S_RX_COMPLETE | S_RX_EARLY)) 628 epread(sc); 629 if (status & S_TX_AVAIL) { 630 /* we need ACK */ 631 sc->tx_timer = 0; 632 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 633 GO_WINDOW(sc, 1); 634 CSR_READ_2(sc, EP_W1_FREE_TX); 635 epstart_locked(ifp); 636 } 637 if (status & S_CARD_FAILURE) { 638 sc->tx_timer = 0; 639#ifdef EP_LOCAL_STATS 640 device_printf(sc->dev, "\n\tStatus: %x\n", status); 641 GO_WINDOW(sc, 4); 642 printf("\tFIFO Diagnostic: %x\n", 643 CSR_READ_2(sc, EP_W4_FIFO_DIAG)); 644 printf("\tStat: %x\n", sc->stat); 645 printf("\tIpackets=%d, Opackets=%d\n", 646 ifp->if_get_counter(ifp, IFCOUNTER_IPACKETS), 647 ifp->if_get_counter(ifp, IFCOUNTER_OPACKETS)); 648 printf("\tNOF=%d, NOMB=%d, RXOF=%d, RXOL=%d, TXU=%d\n", 649 sc->rx_no_first, sc->rx_no_mbuf, sc->rx_overrunf, 650 sc->rx_overrunl, sc->tx_underrun); 651#else 652 653#ifdef DIAGNOSTIC 654 device_printf(sc->dev, 655 "Status: %x (input buffer overflow)\n", status); 656#else 657 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 658#endif 659 660#endif 661 epinit_locked(sc); 662 return; 663 } 664 if (status & S_TX_COMPLETE) { 665 sc->tx_timer = 0; 666 /* 667 * We need ACK. We do it at the end. 668 * 669 * We need to read TX_STATUS until we get a 670 * 0 status in order to turn off the interrupt flag. 671 */ 672 while ((status = CSR_READ_1(sc, EP_W1_TX_STATUS)) & 673 TXS_COMPLETE) { 674 if (status & TXS_SUCCES_INTR_REQ) 675 ; /* nothing */ 676 else if (status & 677 (TXS_UNDERRUN | TXS_JABBER | 678 TXS_MAX_COLLISION)) { 679 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET); 680 if (status & TXS_UNDERRUN) { 681#ifdef EP_LOCAL_STATS 682 sc->tx_underrun++; 683#endif 684 } 685 if (status & TXS_MAX_COLLISION) { 686 /* 687 * TXS_MAX_COLLISION we 688 * shouldn't get here 689 */ 690 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1); 691 } 692 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 693 CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE); 694 /* 695 * To have a tx_avail_int but giving 696 * the chance to the Reception 697 */ 698 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 699 CSR_WRITE_2(sc, EP_COMMAND, 700 SET_TX_AVAIL_THRESH | 8); 701 } 702 /* pops up the next status */ 703 CSR_WRITE_1(sc, EP_W1_TX_STATUS, 0x0); 704 } /* while */ 705 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 706 GO_WINDOW(sc, 1); 707 CSR_READ_2(sc, EP_W1_FREE_TX); 708 epstart_locked(ifp); 709 } /* end TX_COMPLETE */ 710 } 711 712 CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH); /* ACK int Latch */ 713 714 if ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS) 715 goto rescan; 716 717 /* re-enable Ints */ 718 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS); 719} 720 721static void 722epread(struct ep_softc *sc) 723{ 724 struct mbuf *top, *mcur, *m; 725 struct ifnet *ifp; 726 int lenthisone; 727 short rx_fifo2, status; 728 short rx_fifo; 729 730/* XXX Must be called with sc locked */ 731 732 ifp = sc->ifp; 733 status = CSR_READ_2(sc, EP_W1_RX_STATUS); 734 735read_again: 736 737 if (status & ERR_RX) { 738 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 739 if (status & ERR_RX_OVERRUN) { 740 /* 741 * We can think the rx latency is actually 742 * greather than we expect 743 */ 744#ifdef EP_LOCAL_STATS 745 if (EP_FTST(sc, F_RX_FIRST)) 746 sc->rx_overrunf++; 747 else 748 sc->rx_overrunl++; 749#endif 750 } 751 goto out; 752 } 753 rx_fifo = rx_fifo2 = status & RX_BYTES_MASK; 754 755 if (EP_FTST(sc, F_RX_FIRST)) { 756 MGETHDR(m, M_NOWAIT, MT_DATA); 757 if (!m) 758 goto out; 759 if (rx_fifo >= MINCLSIZE) 760 MCLGET(m, M_NOWAIT); 761 sc->top = sc->mcur = top = m; 762#define EROUND ((sizeof(struct ether_header) + 3) & ~3) 763#define EOFF (EROUND - sizeof(struct ether_header)) 764 top->m_data += EOFF; 765 766 /* Read what should be the header. */ 767 CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1, 768 mtod(top, uint16_t *), sizeof(struct ether_header) / 2); 769 top->m_len = sizeof(struct ether_header); 770 rx_fifo -= sizeof(struct ether_header); 771 sc->cur_len = rx_fifo2; 772 } else { 773 /* come here if we didn't have a complete packet last time */ 774 top = sc->top; 775 m = sc->mcur; 776 sc->cur_len += rx_fifo2; 777 } 778 779 /* Reads what is left in the RX FIFO */ 780 while (rx_fifo > 0) { 781 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m)); 782 if (lenthisone == 0) { /* no room in this one */ 783 mcur = m; 784 MGET(m, M_NOWAIT, MT_DATA); 785 if (!m) 786 goto out; 787 if (rx_fifo >= MINCLSIZE) 788 MCLGET(m, M_NOWAIT); 789 m->m_len = 0; 790 mcur->m_next = m; 791 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m)); 792 } 793 if (EP_FTST(sc, F_ACCESS_32_BITS)) { 794 /* default for EISA configured cards */ 795 CSR_READ_MULTI_4(sc, EP_W1_RX_PIO_RD_1, 796 (uint32_t *)(mtod(m, caddr_t)+m->m_len), 797 lenthisone / 4); 798 m->m_len += (lenthisone & ~3); 799 if (lenthisone & 3) 800 CSR_READ_MULTI_1(sc, EP_W1_RX_PIO_RD_1, 801 mtod(m, caddr_t)+m->m_len, lenthisone & 3); 802 m->m_len += (lenthisone & 3); 803 } else { 804 CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1, 805 (uint16_t *)(mtod(m, caddr_t)+m->m_len), 806 lenthisone / 2); 807 m->m_len += lenthisone; 808 if (lenthisone & 1) 809 *(mtod(m, caddr_t)+m->m_len - 1) = 810 CSR_READ_1(sc, EP_W1_RX_PIO_RD_1); 811 } 812 rx_fifo -= lenthisone; 813 } 814 815 if (status & ERR_RX_INCOMPLETE) { 816 /* we haven't received the complete packet */ 817 sc->mcur = m; 818#ifdef EP_LOCAL_STATS 819 /* to know how often we come here */ 820 sc->rx_no_first++; 821#endif 822 EP_FRST(sc, F_RX_FIRST); 823 status = CSR_READ_2(sc, EP_W1_RX_STATUS); 824 if (!(status & ERR_RX_INCOMPLETE)) { 825 /* 826 * We see if by now, the packet has completly 827 * arrived 828 */ 829 goto read_again; 830 } 831 CSR_WRITE_2(sc, EP_COMMAND, 832 SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH); 833 return; 834 } 835 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK); 836 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); 837 EP_FSET(sc, F_RX_FIRST); 838 top->m_pkthdr.rcvif = sc->ifp; 839 top->m_pkthdr.len = sc->cur_len; 840 841 /* 842 * Drop locks before calling if_input() since it may re-enter 843 * ep_start() in the netisr case. This would result in a 844 * lock reversal. Better performance might be obtained by 845 * chaining all packets received, dropping the lock, and then 846 * calling if_input() on each one. 847 */ 848 EP_UNLOCK(sc); 849 (*ifp->if_input) (ifp, top); 850 EP_LOCK(sc); 851 sc->top = 0; 852 EP_BUSY_WAIT(sc); 853 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH); 854 return; 855 856out: 857 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK); 858 if (sc->top) { 859 m_freem(sc->top); 860 sc->top = 0; 861#ifdef EP_LOCAL_STATS 862 sc->rx_no_mbuf++; 863#endif 864 } 865 EP_FSET(sc, F_RX_FIRST); 866 EP_BUSY_WAIT(sc); 867 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH); 868} 869 870static int 871ep_ifmedia_upd(struct ifnet *ifp) 872{ 873 struct ep_softc *sc = ifp->if_softc; 874 int i = 0, j; 875 876 GO_WINDOW(sc, 0); 877 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER); 878 GO_WINDOW(sc, 4); 879 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP); 880 GO_WINDOW(sc, 0); 881 882 switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) { 883 case IFM_10_T: 884 if (sc->ep_connectors & UTP) { 885 i = ACF_CONNECTOR_UTP; 886 GO_WINDOW(sc, 4); 887 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, ENABLE_UTP); 888 } 889 break; 890 case IFM_10_2: 891 if (sc->ep_connectors & BNC) { 892 i = ACF_CONNECTOR_BNC; 893 CSR_WRITE_2(sc, EP_COMMAND, START_TRANSCEIVER); 894 DELAY(DELAY_MULTIPLE * 1000); 895 } 896 break; 897 case IFM_10_5: 898 if (sc->ep_connectors & AUI) 899 i = ACF_CONNECTOR_AUI; 900 break; 901 default: 902 i = sc->ep_connector; 903 device_printf(sc->dev, 904 "strange connector type in EEPROM: assuming AUI\n"); 905 } 906 907 GO_WINDOW(sc, 0); 908 j = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) & 0x3fff; 909 CSR_WRITE_2(sc, EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS)); 910 911 return (0); 912} 913 914static void 915ep_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 916{ 917 struct ep_softc *sc = ifp->if_softc; 918 uint16_t ms; 919 920 switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) { 921 case IFM_10_T: 922 GO_WINDOW(sc, 4); 923 ms = CSR_READ_2(sc, EP_W4_MEDIA_TYPE); 924 GO_WINDOW(sc, 0); 925 ifmr->ifm_status = IFM_AVALID; 926 if (ms & MT_LB) { 927 ifmr->ifm_status |= IFM_ACTIVE; 928 ifmr->ifm_active = IFM_ETHER | IFM_10_T; 929 } else { 930 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 931 } 932 break; 933 default: 934 ifmr->ifm_active = sc->ifmedia.ifm_media; 935 break; 936 } 937} 938 939static int 940epioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 941{ 942 struct ep_softc *sc = ifp->if_softc; 943 struct ifreq *ifr = (struct ifreq *) data; 944 int error = 0; 945 946 switch (cmd) { 947 case SIOCSIFFLAGS: 948 EP_LOCK(sc); 949 if (((ifp->if_flags & IFF_UP) == 0) && 950 (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 951 epstop(sc); 952 } else 953 /* reinitialize card on any parameter change */ 954 epinit_locked(sc); 955 EP_UNLOCK(sc); 956 break; 957 case SIOCADDMULTI: 958 case SIOCDELMULTI: 959 /* 960 * The Etherlink III has no programmable multicast 961 * filter. We always initialize the card to be 962 * promiscuous to multicast, since we're always a 963 * member of the ALL-SYSTEMS group, so there's no 964 * need to process SIOC*MULTI requests. 965 */ 966 error = 0; 967 break; 968 case SIOCSIFMEDIA: 969 case SIOCGIFMEDIA: 970 if (!sc->epb.mii_trans) 971 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd); 972 else 973 error = EINVAL; 974 break; 975 default: 976 error = ether_ioctl(ifp, cmd, data); 977 break; 978 } 979 return (error); 980} 981 982static void 983eptick(void *arg) 984{ 985 struct ep_softc *sc; 986 987 sc = arg; 988 if (sc->tx_timer != 0 && --sc->tx_timer == 0) 989 epwatchdog(sc); 990 callout_reset(&sc->watchdog_timer, hz, eptick, sc); 991} 992 993static void 994epwatchdog(struct ep_softc *sc) 995{ 996 struct ifnet *ifp; 997 998 ifp = sc->ifp; 999 if (sc->gone) 1000 return; 1001 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1002 epstart_locked(ifp); 1003 ep_intr_locked(sc); 1004} 1005 1006static void 1007epstop(struct ep_softc *sc) 1008{ 1009 1010 EP_ASSERT_LOCKED(sc); 1011 1012 CSR_WRITE_2(sc, EP_COMMAND, RX_DISABLE); 1013 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK); 1014 EP_BUSY_WAIT(sc); 1015 1016 CSR_WRITE_2(sc, EP_COMMAND, TX_DISABLE); 1017 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER); 1018 DELAY(800); 1019 1020 CSR_WRITE_2(sc, EP_COMMAND, RX_RESET); 1021 EP_BUSY_WAIT(sc); 1022 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET); 1023 EP_BUSY_WAIT(sc); 1024 1025 CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH); 1026 CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK); 1027 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK); 1028 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER); 1029 1030 sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1031 callout_stop(&sc->watchdog_timer); 1032} 1033