1/* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD$"); 30 31#include <dev/drm2/drmP.h> 32#include <dev/drm2/drm_crtc.h> 33#include <dev/drm2/drm_edid.h> 34#include <dev/drm2/i915/intel_drv.h> 35#include <dev/drm2/i915/i915_drm.h> 36#include <dev/drm2/i915/i915_drv.h> 37#include <dev/drm2/i915/intel_sdvo_regs.h> 38#include <dev/iicbus/iic.h> 39#include <dev/iicbus/iiconf.h> 40#include "iicbus_if.h" 41 42#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 43#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 44#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 45#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) 46 47#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 48 SDVO_TV_MASK) 49 50#define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 51#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 52#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 53#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 54#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) 55 56 57static const char *tv_format_names[] = { 58 "NTSC_M" , "NTSC_J" , "NTSC_443", 59 "PAL_B" , "PAL_D" , "PAL_G" , 60 "PAL_H" , "PAL_I" , "PAL_M" , 61 "PAL_N" , "PAL_NC" , "PAL_60" , 62 "SECAM_B" , "SECAM_D" , "SECAM_G" , 63 "SECAM_K" , "SECAM_K1", "SECAM_L" , 64 "SECAM_60" 65}; 66 67#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) 68 69struct intel_sdvo { 70 struct intel_encoder base; 71 72 device_t i2c; 73 u8 slave_addr; 74 75 device_t ddc_iic_bus, ddc; 76 77 /* Register for the SDVO device: SDVOB or SDVOC */ 78 uint32_t sdvo_reg; 79 80 /* Active outputs controlled by this SDVO output */ 81 uint16_t controlled_output; 82 83 /* 84 * Capabilities of the SDVO device returned by 85 * i830_sdvo_get_capabilities() 86 */ 87 struct intel_sdvo_caps caps; 88 89 /* Pixel clock limitations reported by the SDVO device, in kHz */ 90 int pixel_clock_min, pixel_clock_max; 91 92 /* 93 * For multiple function SDVO device, 94 * this is for current attached outputs. 95 */ 96 uint16_t attached_output; 97 98 /* 99 * Hotplug activation bits for this device 100 */ 101 uint16_t hotplug_active; 102 103 /** 104 * This is used to select the color range of RBG outputs in HDMI mode. 105 * It is only valid when using TMDS encoding and 8 bit per color mode. 106 */ 107 uint32_t color_range; 108 109 /** 110 * This is set if we're going to treat the device as TV-out. 111 * 112 * While we have these nice friendly flags for output types that ought 113 * to decide this for us, the S-Video output on our HDMI+S-Video card 114 * shows up as RGB1 (VGA). 115 */ 116 bool is_tv; 117 118 /* On different gens SDVOB is at different places. */ 119 bool is_sdvob; 120 121 /* This is for current tv format name */ 122 int tv_format_index; 123 124 /** 125 * This is set if we treat the device as HDMI, instead of DVI. 126 */ 127 bool is_hdmi; 128 bool has_hdmi_monitor; 129 bool has_hdmi_audio; 130 131 /** 132 * This is set if we detect output of sdvo device as LVDS and 133 * have a valid fixed mode to use with the panel. 134 */ 135 bool is_lvds; 136 137 /** 138 * This is sdvo fixed pannel mode pointer 139 */ 140 struct drm_display_mode *sdvo_lvds_fixed_mode; 141 142 /* DDC bus used by this SDVO encoder */ 143 uint8_t ddc_bus; 144 145 /* 146 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd 147 */ 148 uint8_t dtd_sdvo_flags; 149}; 150 151struct intel_sdvo_connector { 152 struct intel_connector base; 153 154 /* Mark the type of connector */ 155 uint16_t output_flag; 156 157 enum hdmi_force_audio force_audio; 158 159 /* This contains all current supported TV format */ 160 u8 tv_format_supported[TV_FORMAT_NUM]; 161 int format_supported_num; 162 struct drm_property *tv_format; 163 164 /* add the property for the SDVO-TV */ 165 struct drm_property *left; 166 struct drm_property *right; 167 struct drm_property *top; 168 struct drm_property *bottom; 169 struct drm_property *hpos; 170 struct drm_property *vpos; 171 struct drm_property *contrast; 172 struct drm_property *saturation; 173 struct drm_property *hue; 174 struct drm_property *sharpness; 175 struct drm_property *flicker_filter; 176 struct drm_property *flicker_filter_adaptive; 177 struct drm_property *flicker_filter_2d; 178 struct drm_property *tv_chroma_filter; 179 struct drm_property *tv_luma_filter; 180 struct drm_property *dot_crawl; 181 182 /* add the property for the SDVO-TV/LVDS */ 183 struct drm_property *brightness; 184 185 /* Add variable to record current setting for the above property */ 186 u32 left_margin, right_margin, top_margin, bottom_margin; 187 188 /* this is to get the range of margin.*/ 189 u32 max_hscan, max_vscan; 190 u32 max_hpos, cur_hpos; 191 u32 max_vpos, cur_vpos; 192 u32 cur_brightness, max_brightness; 193 u32 cur_contrast, max_contrast; 194 u32 cur_saturation, max_saturation; 195 u32 cur_hue, max_hue; 196 u32 cur_sharpness, max_sharpness; 197 u32 cur_flicker_filter, max_flicker_filter; 198 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; 199 u32 cur_flicker_filter_2d, max_flicker_filter_2d; 200 u32 cur_tv_chroma_filter, max_tv_chroma_filter; 201 u32 cur_tv_luma_filter, max_tv_luma_filter; 202 u32 cur_dot_crawl, max_dot_crawl; 203}; 204 205static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder) 206{ 207 return container_of(encoder, struct intel_sdvo, base.base); 208} 209 210static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 211{ 212 return container_of(intel_attached_encoder(connector), 213 struct intel_sdvo, base); 214} 215 216static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) 217{ 218 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); 219} 220 221static bool 222intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); 223static bool 224intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 225 struct intel_sdvo_connector *intel_sdvo_connector, 226 int type); 227static bool 228intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 229 struct intel_sdvo_connector *intel_sdvo_connector); 230 231/** 232 * Writes the SDVOB or SDVOC with the given value, but always writes both 233 * SDVOB and SDVOC to work around apparent hardware issues (according to 234 * comments in the BIOS). 235 */ 236static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 237{ 238 struct drm_device *dev = intel_sdvo->base.base.dev; 239 struct drm_i915_private *dev_priv = dev->dev_private; 240 u32 bval = val, cval = val; 241 int i; 242 243 if (intel_sdvo->sdvo_reg == PCH_SDVOB) { 244 I915_WRITE(intel_sdvo->sdvo_reg, val); 245 I915_READ(intel_sdvo->sdvo_reg); 246 return; 247 } 248 249 if (intel_sdvo->sdvo_reg == SDVOB) { 250 cval = I915_READ(SDVOC); 251 } else { 252 bval = I915_READ(SDVOB); 253 } 254 /* 255 * Write the registers twice for luck. Sometimes, 256 * writing them only once doesn't appear to 'stick'. 257 * The BIOS does this too. Yay, magic 258 */ 259 for (i = 0; i < 2; i++) 260 { 261 I915_WRITE(SDVOB, bval); 262 I915_READ(SDVOB); 263 I915_WRITE(SDVOC, cval); 264 I915_READ(SDVOC); 265 } 266} 267 268static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) 269{ 270 struct iic_msg msgs[] = { 271 { 272 .slave = intel_sdvo->slave_addr << 1, 273 .flags = 0, 274 .len = 1, 275 .buf = &addr, 276 }, 277 { 278 .slave = intel_sdvo->slave_addr << 1, 279 .flags = I2C_M_RD, 280 .len = 1, 281 .buf = ch, 282 } 283 }; 284 int ret; 285 286 if ((ret = -iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0) 287 return true; 288 289 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 290 return false; 291} 292 293#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 294/** Mapping of command numbers to names, for debug output */ 295static const struct _sdvo_cmd_name { 296 u8 cmd; 297 const char *name; 298} sdvo_cmd_names[] = { 299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 342 343 /* Add the op code for SDVO enhancements */ 344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 388 389 /* HDMI op code */ 390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 409 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 410}; 411 412#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC") 413 414static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, 415 const void *args, int args_len) 416{ 417 int i; 418 419 DRM_DEBUG_KMS("%s: W: %02X ", 420 SDVO_NAME(intel_sdvo), cmd); 421 for (i = 0; i < args_len; i++) 422 DRM_LOG_KMS("%02X ", ((const u8 *)args)[i]); 423 for (; i < 8; i++) 424 DRM_LOG_KMS(" "); 425 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 426 if (cmd == sdvo_cmd_names[i].cmd) { 427 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); 428 break; 429 } 430 } 431 if (i == ARRAY_SIZE(sdvo_cmd_names)) 432 DRM_LOG_KMS("(%02X)", cmd); 433 DRM_LOG_KMS("\n"); 434} 435 436static const char *cmd_status_names[] = { 437 "Power on", 438 "Success", 439 "Not supported", 440 "Invalid arg", 441 "Pending", 442 "Target not specified", 443 "Scaling not supported" 444}; 445 446static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 447 const void *args, int args_len) 448{ 449 u8 *buf, status; 450 struct iic_msg *msgs; 451 int i, ret = true; 452 453 /* Would be simpler to allocate both in one go ? */ 454 buf = (u8 *)malloc(args_len * 2 + 2, DRM_MEM_KMS, M_NOWAIT | M_ZERO); 455 if (!buf) 456 return false; 457 458 msgs = malloc(args_len + 3 * sizeof(*msgs), DRM_MEM_KMS, M_NOWAIT | M_ZERO); 459 if (!msgs) { 460 free(buf, DRM_MEM_KMS); 461 return false; 462 } 463 464 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); 465 466 for (i = 0; i < args_len; i++) { 467 msgs[i].slave = intel_sdvo->slave_addr << 1; 468 msgs[i].flags = 0; 469 msgs[i].len = 2; 470 msgs[i].buf = buf + 2 *i; 471 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 472 buf[2*i + 1] = ((const u8*)args)[i]; 473 } 474 msgs[i].slave = intel_sdvo->slave_addr << 1; 475 msgs[i].flags = 0; 476 msgs[i].len = 2; 477 msgs[i].buf = buf + 2*i; 478 buf[2*i + 0] = SDVO_I2C_OPCODE; 479 buf[2*i + 1] = cmd; 480 481 /* the following two are to read the response */ 482 status = SDVO_I2C_CMD_STATUS; 483 msgs[i+1].slave = intel_sdvo->slave_addr << 1; 484 msgs[i+1].flags = 0; 485 msgs[i+1].len = 1; 486 msgs[i+1].buf = &status; 487 488 msgs[i+2].slave = intel_sdvo->slave_addr << 1; 489 msgs[i+2].flags = I2C_M_RD; 490 msgs[i+2].len = 1; 491 msgs[i+2].buf = &status; 492 493 ret = -iicbus_transfer(intel_sdvo->i2c, msgs, i+3); 494 if (ret < 0) { 495 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 496 ret = false; 497 goto out; 498 } 499 500out: 501 free(msgs, DRM_MEM_KMS); 502 free(buf, DRM_MEM_KMS); 503 return ret; 504} 505 506static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, 507 void *response, int response_len) 508{ 509 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ 510 u8 status; 511 int i; 512 513 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); 514 515 /* 516 * The documentation states that all commands will be 517 * processed within 15µs, and that we need only poll 518 * the status byte a maximum of 3 times in order for the 519 * command to be complete. 520 * 521 * Check 5 times in case the hardware failed to read the docs. 522 * 523 * Also beware that the first response by many devices is to 524 * reply PENDING and stall for time. TVs are notorious for 525 * requiring longer than specified to complete their replies. 526 * Originally (in the DDX long ago), the delay was only ever 15ms 527 * with an additional delay of 30ms applied for TVs added later after 528 * many experiments. To accommodate both sets of delays, we do a 529 * sequence of slow checks if the device is falling behind and fails 530 * to reply within 5*15µs. 531 */ 532 if (!intel_sdvo_read_byte(intel_sdvo, 533 SDVO_I2C_CMD_STATUS, 534 &status)) 535 goto log_fail; 536 537 while (status == SDVO_CMD_STATUS_PENDING && --retry) { 538 if (retry < 10) 539 DRM_MSLEEP(15); 540 else 541 udelay(15); 542 543 if (!intel_sdvo_read_byte(intel_sdvo, 544 SDVO_I2C_CMD_STATUS, 545 &status)) 546 goto log_fail; 547 } 548 549 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 550 DRM_LOG_KMS("(%s)", cmd_status_names[status]); 551 else 552 DRM_LOG_KMS("(??? %d)", status); 553 554 if (status != SDVO_CMD_STATUS_SUCCESS) 555 goto log_fail; 556 557 /* Read the command response */ 558 for (i = 0; i < response_len; i++) { 559 if (!intel_sdvo_read_byte(intel_sdvo, 560 SDVO_I2C_RETURN_0 + i, 561 &((u8 *)response)[i])) 562 goto log_fail; 563 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]); 564 } 565 DRM_LOG_KMS("\n"); 566 return true; 567 568log_fail: 569 DRM_LOG_KMS("... failed\n"); 570 return false; 571} 572 573static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) 574{ 575 if (mode->clock >= 100000) 576 return 1; 577 else if (mode->clock >= 50000) 578 return 2; 579 else 580 return 4; 581} 582 583static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, 584 u8 ddc_bus) 585{ 586 /* This must be the immediately preceding write before the i2c xfer */ 587 return intel_sdvo_write_cmd(intel_sdvo, 588 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 589 &ddc_bus, 1); 590} 591 592static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) 593{ 594 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) 595 return false; 596 597 return intel_sdvo_read_response(intel_sdvo, NULL, 0); 598} 599 600static bool 601intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) 602{ 603 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) 604 return false; 605 606 return intel_sdvo_read_response(intel_sdvo, value, len); 607} 608 609static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) 610{ 611 struct intel_sdvo_set_target_input_args targets = {0}; 612 return intel_sdvo_set_value(intel_sdvo, 613 SDVO_CMD_SET_TARGET_INPUT, 614 &targets, sizeof(targets)); 615} 616 617/** 618 * Return whether each input is trained. 619 * 620 * This function is making an assumption about the layout of the response, 621 * which should be checked against the docs. 622 */ 623static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) 624{ 625 struct intel_sdvo_get_trained_inputs_response response; 626 627 BUILD_BUG_ON(sizeof(response) != 1); 628 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 629 &response, sizeof(response))) 630 return false; 631 632 *input_1 = response.input0_trained; 633 *input_2 = response.input1_trained; 634 return true; 635} 636 637static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, 638 u16 outputs) 639{ 640 return intel_sdvo_set_value(intel_sdvo, 641 SDVO_CMD_SET_ACTIVE_OUTPUTS, 642 &outputs, sizeof(outputs)); 643} 644 645static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, 646 u16 *outputs) 647{ 648 return intel_sdvo_get_value(intel_sdvo, 649 SDVO_CMD_GET_ACTIVE_OUTPUTS, 650 outputs, sizeof(*outputs)); 651} 652 653static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, 654 int mode) 655{ 656 u8 state = SDVO_ENCODER_STATE_ON; 657 658 switch (mode) { 659 case DRM_MODE_DPMS_ON: 660 state = SDVO_ENCODER_STATE_ON; 661 break; 662 case DRM_MODE_DPMS_STANDBY: 663 state = SDVO_ENCODER_STATE_STANDBY; 664 break; 665 case DRM_MODE_DPMS_SUSPEND: 666 state = SDVO_ENCODER_STATE_SUSPEND; 667 break; 668 case DRM_MODE_DPMS_OFF: 669 state = SDVO_ENCODER_STATE_OFF; 670 break; 671 } 672 673 return intel_sdvo_set_value(intel_sdvo, 674 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 675} 676 677static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, 678 int *clock_min, 679 int *clock_max) 680{ 681 struct intel_sdvo_pixel_clock_range clocks; 682 683 BUILD_BUG_ON(sizeof(clocks) != 4); 684 if (!intel_sdvo_get_value(intel_sdvo, 685 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 686 &clocks, sizeof(clocks))) 687 return false; 688 689 /* Convert the values from units of 10 kHz to kHz. */ 690 *clock_min = clocks.min * 10; 691 *clock_max = clocks.max * 10; 692 return true; 693} 694 695static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, 696 u16 outputs) 697{ 698 return intel_sdvo_set_value(intel_sdvo, 699 SDVO_CMD_SET_TARGET_OUTPUT, 700 &outputs, sizeof(outputs)); 701} 702 703static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 704 struct intel_sdvo_dtd *dtd) 705{ 706 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 707 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 708} 709 710static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, 711 struct intel_sdvo_dtd *dtd) 712{ 713 return intel_sdvo_set_timing(intel_sdvo, 714 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 715} 716 717static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, 718 struct intel_sdvo_dtd *dtd) 719{ 720 return intel_sdvo_set_timing(intel_sdvo, 721 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 722} 723 724static bool 725intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, 726 uint16_t clock, 727 uint16_t width, 728 uint16_t height) 729{ 730 struct intel_sdvo_preferred_input_timing_args args; 731 732 memset(&args, 0, sizeof(args)); 733 args.clock = clock; 734 args.width = width; 735 args.height = height; 736 args.interlace = 0; 737 738 if (intel_sdvo->is_lvds && 739 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 740 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 741 args.scaled = 1; 742 743 return intel_sdvo_set_value(intel_sdvo, 744 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 745 &args, sizeof(args)); 746} 747 748static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, 749 struct intel_sdvo_dtd *dtd) 750{ 751 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 752 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 753 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 754 &dtd->part1, sizeof(dtd->part1)) && 755 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 756 &dtd->part2, sizeof(dtd->part2)); 757} 758 759static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) 760{ 761 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 762} 763 764static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, 765 const struct drm_display_mode *mode) 766{ 767 uint16_t width, height; 768 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 769 uint16_t h_sync_offset, v_sync_offset; 770 int mode_clock; 771 772 width = mode->hdisplay; 773 height = mode->vdisplay; 774 775 /* do some mode translations */ 776 h_blank_len = mode->htotal - mode->hdisplay; 777 h_sync_len = mode->hsync_end - mode->hsync_start; 778 779 v_blank_len = mode->vtotal - mode->vdisplay; 780 v_sync_len = mode->vsync_end - mode->vsync_start; 781 782 h_sync_offset = mode->hsync_start - mode->hdisplay; 783 v_sync_offset = mode->vsync_start - mode->vdisplay; 784 785 mode_clock = mode->clock; 786 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1; 787 mode_clock /= 10; 788 dtd->part1.clock = mode_clock; 789 790 dtd->part1.h_active = width & 0xff; 791 dtd->part1.h_blank = h_blank_len & 0xff; 792 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 793 ((h_blank_len >> 8) & 0xf); 794 dtd->part1.v_active = height & 0xff; 795 dtd->part1.v_blank = v_blank_len & 0xff; 796 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 797 ((v_blank_len >> 8) & 0xf); 798 799 dtd->part2.h_sync_off = h_sync_offset & 0xff; 800 dtd->part2.h_sync_width = h_sync_len & 0xff; 801 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 802 (v_sync_len & 0xf); 803 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 804 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 805 ((v_sync_len & 0x30) >> 4); 806 807 dtd->part2.dtd_flags = 0x18; 808 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 809 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; 810 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 811 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; 812 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 813 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; 814 815 dtd->part2.sdvo_flags = 0; 816 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 817 dtd->part2.reserved = 0; 818} 819 820static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, 821 const struct intel_sdvo_dtd *dtd) 822{ 823 mode->hdisplay = dtd->part1.h_active; 824 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 825 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; 826 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 827 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; 828 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 829 mode->htotal = mode->hdisplay + dtd->part1.h_blank; 830 mode->htotal += (dtd->part1.h_high & 0xf) << 8; 831 832 mode->vdisplay = dtd->part1.v_active; 833 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 834 mode->vsync_start = mode->vdisplay; 835 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 836 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 837 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; 838 mode->vsync_end = mode->vsync_start + 839 (dtd->part2.v_sync_off_width & 0xf); 840 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 841 mode->vtotal = mode->vdisplay + dtd->part1.v_blank; 842 mode->vtotal += (dtd->part1.v_high & 0xf) << 8; 843 844 mode->clock = dtd->part1.clock * 10; 845 846 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 847 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) 848 mode->flags |= DRM_MODE_FLAG_INTERLACE; 849 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 850 mode->flags |= DRM_MODE_FLAG_PHSYNC; 851 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 852 mode->flags |= DRM_MODE_FLAG_PVSYNC; 853} 854 855static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) 856{ 857 struct intel_sdvo_encode encode; 858 859 BUILD_BUG_ON(sizeof(encode) != 2); 860 return intel_sdvo_get_value(intel_sdvo, 861 SDVO_CMD_GET_SUPP_ENCODE, 862 &encode, sizeof(encode)); 863} 864 865static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, 866 uint8_t mode) 867{ 868 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 869} 870 871static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, 872 uint8_t mode) 873{ 874 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 875} 876 877#if 0 878static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) 879{ 880 int i, j; 881 uint8_t set_buf_index[2]; 882 uint8_t av_split; 883 uint8_t buf_size; 884 uint8_t buf[48]; 885 uint8_t *pos; 886 887 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 888 889 for (i = 0; i <= av_split; i++) { 890 set_buf_index[0] = i; set_buf_index[1] = 0; 891 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 892 set_buf_index, 2); 893 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 894 intel_sdvo_read_response(encoder, &buf_size, 1); 895 896 pos = buf; 897 for (j = 0; j <= buf_size; j += 8) { 898 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 899 NULL, 0); 900 intel_sdvo_read_response(encoder, pos, 8); 901 pos += 8; 902 } 903 } 904} 905#endif 906 907static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, 908 unsigned if_index, uint8_t tx_rate, 909 uint8_t *data, unsigned length) 910{ 911 uint8_t set_buf_index[2] = { if_index, 0 }; 912 uint8_t hbuf_size, tmp[8]; 913 int i; 914 915 if (!intel_sdvo_set_value(intel_sdvo, 916 SDVO_CMD_SET_HBUF_INDEX, 917 set_buf_index, 2)) 918 return false; 919 920 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, 921 &hbuf_size, 1)) 922 return false; 923 924 /* Buffer size is 0 based, hooray! */ 925 hbuf_size++; 926 927 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", 928 if_index, length, hbuf_size); 929 930 for (i = 0; i < hbuf_size; i += 8) { 931 memset(tmp, 0, 8); 932 if (i < length) 933 memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); 934 935 if (!intel_sdvo_set_value(intel_sdvo, 936 SDVO_CMD_SET_HBUF_DATA, 937 tmp, 8)) 938 return false; 939 } 940 941 return intel_sdvo_set_value(intel_sdvo, 942 SDVO_CMD_SET_HBUF_TXRATE, 943 &tx_rate, 1); 944} 945 946static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) 947{ 948 struct dip_infoframe avi_if = { 949 .type = DIP_TYPE_AVI, 950 .ver = DIP_VERSION_AVI, 951 .len = DIP_LEN_AVI, 952 }; 953 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; 954 955 intel_dip_infoframe_csum(&avi_if); 956 957 /* sdvo spec says that the ecc is handled by the hw, and it looks like 958 * we must not send the ecc field, either. */ 959 memcpy(sdvo_data, &avi_if, 3); 960 sdvo_data[3] = avi_if.checksum; 961 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); 962 963 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, 964 SDVO_HBUF_TX_VSYNC, 965 sdvo_data, sizeof(sdvo_data)); 966} 967 968static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) 969{ 970 struct intel_sdvo_tv_format format; 971 uint32_t format_map; 972 973 format_map = 1 << intel_sdvo->tv_format_index; 974 memset(&format, 0, sizeof(format)); 975 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 976 977 BUILD_BUG_ON(sizeof(format) != 6); 978 return intel_sdvo_set_value(intel_sdvo, 979 SDVO_CMD_SET_TV_FORMAT, 980 &format, sizeof(format)); 981} 982 983static bool 984intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, 985 const struct drm_display_mode *mode) 986{ 987 struct intel_sdvo_dtd output_dtd; 988 989 if (!intel_sdvo_set_target_output(intel_sdvo, 990 intel_sdvo->attached_output)) 991 return false; 992 993 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 994 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 995 return false; 996 997 return true; 998} 999 1000/* Asks the sdvo controller for the preferred input mode given the output mode. 1001 * Unfortunately we have to set up the full output mode to do that. */ 1002static bool 1003intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, 1004 const struct drm_display_mode *mode, 1005 struct drm_display_mode *adjusted_mode) 1006{ 1007 struct intel_sdvo_dtd input_dtd; 1008 1009 /* Reset the input timing to the screen. Assume always input 0. */ 1010 if (!intel_sdvo_set_target_input(intel_sdvo)) 1011 return false; 1012 1013 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, 1014 mode->clock / 10, 1015 mode->hdisplay, 1016 mode->vdisplay)) 1017 return false; 1018 1019 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, 1020 &input_dtd)) 1021 return false; 1022 1023 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1024 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; 1025 1026 return true; 1027} 1028 1029static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, 1030 const struct drm_display_mode *mode, 1031 struct drm_display_mode *adjusted_mode) 1032{ 1033 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1034 int multiplier; 1035 1036 /* We need to construct preferred input timings based on our 1037 * output timings. To do that, we have to set the output 1038 * timings, even though this isn't really the right place in 1039 * the sequence to do it. Oh well. 1040 */ 1041 if (intel_sdvo->is_tv) { 1042 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) 1043 return false; 1044 1045 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1046 mode, 1047 adjusted_mode); 1048 } else if (intel_sdvo->is_lvds) { 1049 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, 1050 intel_sdvo->sdvo_lvds_fixed_mode)) 1051 return false; 1052 1053 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1054 mode, 1055 adjusted_mode); 1056 } 1057 1058 /* Make the CRTC code factor in the SDVO pixel multiplier. The 1059 * SDVO device will factor out the multiplier during mode_set. 1060 */ 1061 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode); 1062 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); 1063 1064 return true; 1065} 1066 1067static void intel_sdvo_mode_set(struct drm_encoder *encoder, 1068 struct drm_display_mode *mode, 1069 struct drm_display_mode *adjusted_mode) 1070{ 1071 struct drm_device *dev = encoder->dev; 1072 struct drm_i915_private *dev_priv = dev->dev_private; 1073 struct drm_crtc *crtc = encoder->crtc; 1074 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1075 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1076 u32 sdvox; 1077 struct intel_sdvo_in_out_map in_out; 1078 struct intel_sdvo_dtd input_dtd, output_dtd; 1079 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode); 1080 int rate; 1081 1082 if (!mode) 1083 return; 1084 1085 /* First, set the input mapping for the first input to our controlled 1086 * output. This is only correct if we're a single-input device, in 1087 * which case the first input is the output from the appropriate SDVO 1088 * channel on the motherboard. In a two-input device, the first input 1089 * will be SDVOB and the second SDVOC. 1090 */ 1091 in_out.in0 = intel_sdvo->attached_output; 1092 in_out.in1 = 0; 1093 1094 intel_sdvo_set_value(intel_sdvo, 1095 SDVO_CMD_SET_IN_OUT_MAP, 1096 &in_out, sizeof(in_out)); 1097 1098 /* Set the output timings to the screen */ 1099 if (!intel_sdvo_set_target_output(intel_sdvo, 1100 intel_sdvo->attached_output)) 1101 return; 1102 1103 /* lvds has a special fixed output timing. */ 1104 if (intel_sdvo->is_lvds) 1105 intel_sdvo_get_dtd_from_mode(&output_dtd, 1106 intel_sdvo->sdvo_lvds_fixed_mode); 1107 else 1108 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1109 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1110 DRM_INFO("Setting output timings on %s failed\n", 1111 SDVO_NAME(intel_sdvo)); 1112 1113 /* Set the input timing to the screen. Assume always input 0. */ 1114 if (!intel_sdvo_set_target_input(intel_sdvo)) 1115 return; 1116 1117 if (intel_sdvo->has_hdmi_monitor) { 1118 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1119 intel_sdvo_set_colorimetry(intel_sdvo, 1120 SDVO_COLORIMETRY_RGB256); 1121 intel_sdvo_set_avi_infoframe(intel_sdvo); 1122 } else 1123 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); 1124 1125 if (intel_sdvo->is_tv && 1126 !intel_sdvo_set_tv_format(intel_sdvo)) 1127 return; 1128 1129 /* We have tried to get input timing in mode_fixup, and filled into 1130 * adjusted_mode. 1131 */ 1132 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1133 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) 1134 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; 1135 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) 1136 DRM_INFO("Setting input timings on %s failed\n", 1137 SDVO_NAME(intel_sdvo)); 1138 1139 switch (pixel_multiplier) { 1140 default: 1141 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1142 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1143 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1144 } 1145 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) 1146 return; 1147 1148 /* Set the SDVO control regs. */ 1149 if (INTEL_INFO(dev)->gen >= 4) { 1150 /* The real mode polarity is set by the SDVO commands, using 1151 * struct intel_sdvo_dtd. */ 1152 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1153 if (intel_sdvo->is_hdmi) 1154 sdvox |= intel_sdvo->color_range; 1155 if (INTEL_INFO(dev)->gen < 5) 1156 sdvox |= SDVO_BORDER_ENABLE; 1157 } else { 1158 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1159 switch (intel_sdvo->sdvo_reg) { 1160 case SDVOB: 1161 sdvox &= SDVOB_PRESERVE_MASK; 1162 break; 1163 case SDVOC: 1164 sdvox &= SDVOC_PRESERVE_MASK; 1165 break; 1166 } 1167 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1168 } 1169 1170 if (INTEL_PCH_TYPE(dev) >= PCH_CPT) 1171 sdvox |= TRANSCODER_CPT(intel_crtc->pipe); 1172 else 1173 sdvox |= TRANSCODER(intel_crtc->pipe); 1174 1175 if (intel_sdvo->has_hdmi_audio) 1176 sdvox |= SDVO_AUDIO_ENABLE; 1177 1178 if (INTEL_INFO(dev)->gen >= 4) { 1179 /* done in crtc_mode_set as the dpll_md reg must be written early */ 1180 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { 1181 /* done in crtc_mode_set as it lives inside the dpll register */ 1182 } else { 1183 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; 1184 } 1185 1186 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && 1187 INTEL_INFO(dev)->gen < 5) 1188 sdvox |= SDVO_STALL_SELECT; 1189 intel_sdvo_write_sdvox(intel_sdvo, sdvox); 1190} 1191 1192static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) 1193{ 1194 struct intel_sdvo_connector *intel_sdvo_connector = 1195 to_intel_sdvo_connector(&connector->base); 1196 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); 1197 u16 active_outputs; 1198 1199 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1200 1201 if (active_outputs & intel_sdvo_connector->output_flag) 1202 return true; 1203 else 1204 return false; 1205} 1206 1207static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, 1208 enum pipe *pipe) 1209{ 1210 struct drm_device *dev = encoder->base.dev; 1211 struct drm_i915_private *dev_priv = dev->dev_private; 1212 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1213 u16 active_outputs; 1214 u32 tmp; 1215 1216 tmp = I915_READ(intel_sdvo->sdvo_reg); 1217 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1218 1219 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0)) 1220 return false; 1221 1222 if (HAS_PCH_CPT(dev)) 1223 *pipe = PORT_TO_PIPE_CPT(tmp); 1224 else 1225 *pipe = PORT_TO_PIPE(tmp); 1226 1227 return true; 1228} 1229 1230static void intel_disable_sdvo(struct intel_encoder *encoder) 1231{ 1232 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 1233 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1234 u32 temp; 1235 1236 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1237 if (0) 1238 intel_sdvo_set_encoder_power_state(intel_sdvo, 1239 DRM_MODE_DPMS_OFF); 1240 1241 temp = I915_READ(intel_sdvo->sdvo_reg); 1242 if ((temp & SDVO_ENABLE) != 0) { 1243 /* HW workaround for IBX, we need to move the port to 1244 * transcoder A before disabling it. */ 1245 if (HAS_PCH_IBX(encoder->base.dev)) { 1246 struct drm_crtc *crtc = encoder->base.crtc; 1247 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; 1248 1249 if (temp & SDVO_PIPE_B_SELECT) { 1250 temp &= ~SDVO_PIPE_B_SELECT; 1251 I915_WRITE(intel_sdvo->sdvo_reg, temp); 1252 POSTING_READ(intel_sdvo->sdvo_reg); 1253 1254 /* Again we need to write this twice. */ 1255 I915_WRITE(intel_sdvo->sdvo_reg, temp); 1256 POSTING_READ(intel_sdvo->sdvo_reg); 1257 1258 /* Transcoder selection bits only update 1259 * effectively on vblank. */ 1260 if (crtc) 1261 intel_wait_for_vblank(encoder->base.dev, pipe); 1262 else 1263 DRM_MSLEEP(50); 1264 } 1265 } 1266 1267 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); 1268 } 1269} 1270 1271static void intel_enable_sdvo(struct intel_encoder *encoder) 1272{ 1273 struct drm_device *dev = encoder->base.dev; 1274 struct drm_i915_private *dev_priv = dev->dev_private; 1275 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1276 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); 1277 u32 temp; 1278 bool input1, input2; 1279 int i; 1280 u8 status; 1281 1282 temp = I915_READ(intel_sdvo->sdvo_reg); 1283 if ((temp & SDVO_ENABLE) == 0) { 1284 /* HW workaround for IBX, we need to move the port 1285 * to transcoder A before disabling it. */ 1286 if (HAS_PCH_IBX(dev)) { 1287 struct drm_crtc *crtc = encoder->base.crtc; 1288 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; 1289 1290 /* Restore the transcoder select bit. */ 1291 if (pipe == PIPE_B) 1292 temp |= SDVO_PIPE_B_SELECT; 1293 } 1294 1295 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); 1296 } 1297 for (i = 0; i < 2; i++) 1298 intel_wait_for_vblank(dev, intel_crtc->pipe); 1299 1300 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); 1301 /* Warn if the device reported failure to sync. 1302 * A lot of SDVO devices fail to notify of sync, but it's 1303 * a given it the status is a success, we succeeded. 1304 */ 1305 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1306 DRM_DEBUG_KMS("First %s output reported failure to " 1307 "sync\n", SDVO_NAME(intel_sdvo)); 1308 } 1309 1310 if (0) 1311 intel_sdvo_set_encoder_power_state(intel_sdvo, 1312 DRM_MODE_DPMS_ON); 1313 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1314} 1315 1316static void intel_sdvo_dpms(struct drm_connector *connector, int mode) 1317{ 1318 struct drm_crtc *crtc; 1319 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1320 1321 /* dvo supports only 2 dpms states. */ 1322 if (mode != DRM_MODE_DPMS_ON) 1323 mode = DRM_MODE_DPMS_OFF; 1324 1325 if (mode == connector->dpms) 1326 return; 1327 1328 connector->dpms = mode; 1329 1330 /* Only need to change hw state when actually enabled */ 1331 crtc = intel_sdvo->base.base.crtc; 1332 if (!crtc) { 1333 intel_sdvo->base.connectors_active = false; 1334 return; 1335 } 1336 1337 if (mode != DRM_MODE_DPMS_ON) { 1338 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1339 if (0) 1340 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1341 1342 intel_sdvo->base.connectors_active = false; 1343 1344 intel_crtc_update_dpms(crtc); 1345 } else { 1346 intel_sdvo->base.connectors_active = true; 1347 1348 intel_crtc_update_dpms(crtc); 1349 1350 if (0) 1351 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1352 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1353 } 1354 1355 intel_modeset_check_state(connector->dev); 1356} 1357 1358static int intel_sdvo_mode_valid(struct drm_connector *connector, 1359 struct drm_display_mode *mode) 1360{ 1361 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1362 1363 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1364 return MODE_NO_DBLESCAN; 1365 1366 if (intel_sdvo->pixel_clock_min > mode->clock) 1367 return MODE_CLOCK_LOW; 1368 1369 if (intel_sdvo->pixel_clock_max < mode->clock) 1370 return MODE_CLOCK_HIGH; 1371 1372 if (intel_sdvo->is_lvds) { 1373 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1374 return MODE_PANEL; 1375 1376 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1377 return MODE_PANEL; 1378 } 1379 1380 return MODE_OK; 1381} 1382 1383static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) 1384{ 1385 BUILD_BUG_ON(sizeof(*caps) != 8); 1386 if (!intel_sdvo_get_value(intel_sdvo, 1387 SDVO_CMD_GET_DEVICE_CAPS, 1388 caps, sizeof(*caps))) 1389 return false; 1390 1391 DRM_DEBUG_KMS("SDVO capabilities:\n" 1392 " vendor_id: %d\n" 1393 " device_id: %d\n" 1394 " device_rev_id: %d\n" 1395 " sdvo_version_major: %d\n" 1396 " sdvo_version_minor: %d\n" 1397 " sdvo_inputs_mask: %d\n" 1398 " smooth_scaling: %d\n" 1399 " sharp_scaling: %d\n" 1400 " up_scaling: %d\n" 1401 " down_scaling: %d\n" 1402 " stall_support: %d\n" 1403 " output_flags: %d\n", 1404 caps->vendor_id, 1405 caps->device_id, 1406 caps->device_rev_id, 1407 caps->sdvo_version_major, 1408 caps->sdvo_version_minor, 1409 caps->sdvo_inputs_mask, 1410 caps->smooth_scaling, 1411 caps->sharp_scaling, 1412 caps->up_scaling, 1413 caps->down_scaling, 1414 caps->stall_support, 1415 caps->output_flags); 1416 1417 return true; 1418} 1419 1420static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) 1421{ 1422 struct drm_device *dev = intel_sdvo->base.base.dev; 1423 uint16_t hotplug; 1424 1425 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1426 * on the line. */ 1427 if (IS_I945G(dev) || IS_I945GM(dev)) 1428 return 0; 1429 1430 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1431 &hotplug, sizeof(hotplug))) 1432 return 0; 1433 1434 return hotplug; 1435} 1436 1437static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) 1438{ 1439 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1440 1441 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, 1442 &intel_sdvo->hotplug_active, 2); 1443} 1444 1445static bool 1446intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) 1447{ 1448 /* Is there more than one type of output? */ 1449 return bitcount16(intel_sdvo->caps.output_flags) > 1; 1450} 1451 1452static struct edid * 1453intel_sdvo_get_edid(struct drm_connector *connector) 1454{ 1455 struct intel_sdvo *sdvo = intel_attached_sdvo(connector); 1456 return drm_get_edid(connector, sdvo->ddc); 1457} 1458 1459/* Mac mini hack -- use the same DDC as the analog connector */ 1460static struct edid * 1461intel_sdvo_get_analog_edid(struct drm_connector *connector) 1462{ 1463 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1464 1465 return drm_get_edid(connector, 1466 intel_gmbus_get_adapter(dev_priv, 1467 dev_priv->crt_ddc_pin)); 1468} 1469 1470static enum drm_connector_status 1471intel_sdvo_tmds_sink_detect(struct drm_connector *connector) 1472{ 1473 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1474 enum drm_connector_status status; 1475 struct edid *edid; 1476 1477 edid = intel_sdvo_get_edid(connector); 1478 1479 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1480 u8 ddc, saved_ddc = intel_sdvo->ddc_bus; 1481 1482 /* 1483 * Don't use the 1 as the argument of DDC bus switch to get 1484 * the EDID. It is used for SDVO SPD ROM. 1485 */ 1486 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1487 intel_sdvo->ddc_bus = ddc; 1488 edid = intel_sdvo_get_edid(connector); 1489 if (edid) 1490 break; 1491 } 1492 /* 1493 * If we found the EDID on the other bus, 1494 * assume that is the correct DDC bus. 1495 */ 1496 if (edid == NULL) 1497 intel_sdvo->ddc_bus = saved_ddc; 1498 } 1499 1500 /* 1501 * When there is no edid and no monitor is connected with VGA 1502 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1503 */ 1504 if (edid == NULL) 1505 edid = intel_sdvo_get_analog_edid(connector); 1506 1507 status = connector_status_unknown; 1508 if (edid != NULL) { 1509 /* DDC bus is shared, match EDID to connector type */ 1510 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1511 status = connector_status_connected; 1512 if (intel_sdvo->is_hdmi) { 1513 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1514 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1515 } 1516 } else 1517 status = connector_status_disconnected; 1518 free(edid, DRM_MEM_KMS); 1519 } 1520 1521 if (status == connector_status_connected) { 1522 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1523 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) 1524 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); 1525 } 1526 1527 return status; 1528} 1529 1530static bool 1531intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, 1532 struct edid *edid) 1533{ 1534 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1535 bool connector_is_digital = !!IS_DIGITAL(sdvo); 1536 1537 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", 1538 connector_is_digital, monitor_is_digital); 1539 return connector_is_digital == monitor_is_digital; 1540} 1541 1542static enum drm_connector_status 1543intel_sdvo_detect(struct drm_connector *connector, bool force) 1544{ 1545 uint16_t response; 1546 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1547 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1548 enum drm_connector_status ret; 1549 1550 if (!intel_sdvo_get_value(intel_sdvo, 1551 SDVO_CMD_GET_ATTACHED_DISPLAYS, 1552 &response, 2)) 1553 return connector_status_unknown; 1554 1555 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1556 response & 0xff, response >> 8, 1557 intel_sdvo_connector->output_flag); 1558 1559 if (response == 0) 1560 return connector_status_disconnected; 1561 1562 intel_sdvo->attached_output = response; 1563 1564 intel_sdvo->has_hdmi_monitor = false; 1565 intel_sdvo->has_hdmi_audio = false; 1566 1567 if ((intel_sdvo_connector->output_flag & response) == 0) 1568 ret = connector_status_disconnected; 1569 else if (IS_TMDS(intel_sdvo_connector)) 1570 ret = intel_sdvo_tmds_sink_detect(connector); 1571 else { 1572 struct edid *edid; 1573 1574 /* if we have an edid check it matches the connection */ 1575 edid = intel_sdvo_get_edid(connector); 1576 if (edid == NULL) 1577 edid = intel_sdvo_get_analog_edid(connector); 1578 if (edid != NULL) { 1579 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, 1580 edid)) 1581 ret = connector_status_connected; 1582 else 1583 ret = connector_status_disconnected; 1584 1585 free(edid, DRM_MEM_KMS); 1586 } else 1587 ret = connector_status_connected; 1588 } 1589 1590 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1591 if (ret == connector_status_connected) { 1592 intel_sdvo->is_tv = false; 1593 intel_sdvo->is_lvds = false; 1594 intel_sdvo->base.needs_tv_clock = false; 1595 1596 if (response & SDVO_TV_MASK) { 1597 intel_sdvo->is_tv = true; 1598 intel_sdvo->base.needs_tv_clock = true; 1599 } 1600 if (response & SDVO_LVDS_MASK) 1601 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1602 } 1603 1604 return ret; 1605} 1606 1607static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1608{ 1609 struct edid *edid; 1610 1611 /* set the bus switch and get the modes */ 1612 edid = intel_sdvo_get_edid(connector); 1613 1614 /* 1615 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1616 * link between analog and digital outputs. So, if the regular SDVO 1617 * DDC fails, check to see if the analog output is disconnected, in 1618 * which case we'll look there for the digital DDC data. 1619 */ 1620 if (edid == NULL) 1621 edid = intel_sdvo_get_analog_edid(connector); 1622 1623 if (edid != NULL) { 1624 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), 1625 edid)) { 1626 drm_mode_connector_update_edid_property(connector, edid); 1627 drm_add_edid_modes(connector, edid); 1628 } 1629 1630 free(edid, DRM_MEM_KMS); 1631 } 1632} 1633 1634/* 1635 * Set of SDVO TV modes. 1636 * Note! This is in reply order (see loop in get_tv_modes). 1637 * XXX: all 60Hz refresh? 1638 */ 1639static const struct drm_display_mode sdvo_tv_modes[] = { 1640 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1641 416, 0, 200, 201, 232, 233, 0, 1642 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1643 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1644 416, 0, 240, 241, 272, 273, 0, 1645 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1646 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1647 496, 0, 300, 301, 332, 333, 0, 1648 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1649 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1650 736, 0, 350, 351, 382, 383, 0, 1651 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1652 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1653 736, 0, 400, 401, 432, 433, 0, 1654 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1655 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1656 736, 0, 480, 481, 512, 513, 0, 1657 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1658 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1659 800, 0, 480, 481, 512, 513, 0, 1660 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1661 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1662 800, 0, 576, 577, 608, 609, 0, 1663 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1664 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1665 816, 0, 350, 351, 382, 383, 0, 1666 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1667 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1668 816, 0, 400, 401, 432, 433, 0, 1669 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1670 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1671 816, 0, 480, 481, 512, 513, 0, 1672 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1673 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1674 816, 0, 540, 541, 572, 573, 0, 1675 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1676 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1677 816, 0, 576, 577, 608, 609, 0, 1678 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1679 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1680 864, 0, 576, 577, 608, 609, 0, 1681 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1682 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1683 896, 0, 600, 601, 632, 633, 0, 1684 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1685 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1686 928, 0, 624, 625, 656, 657, 0, 1687 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1688 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1689 1016, 0, 766, 767, 798, 799, 0, 1690 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1691 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1692 1120, 0, 768, 769, 800, 801, 0, 1693 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1694 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1695 1376, 0, 1024, 1025, 1056, 1057, 0, 1696 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1697}; 1698 1699static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 1700{ 1701 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1702 struct intel_sdvo_sdtv_resolution_request tv_res; 1703 uint32_t reply = 0, format_map = 0; 1704 int i; 1705 1706 /* Read the list of supported input resolutions for the selected TV 1707 * format. 1708 */ 1709 format_map = 1 << intel_sdvo->tv_format_index; 1710 memcpy(&tv_res, &format_map, 1711 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); 1712 1713 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) 1714 return; 1715 1716 BUILD_BUG_ON(sizeof(tv_res) != 3); 1717 if (!intel_sdvo_write_cmd(intel_sdvo, 1718 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1719 &tv_res, sizeof(tv_res))) 1720 return; 1721 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) 1722 return; 1723 1724 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 1725 if (reply & (1 << i)) { 1726 struct drm_display_mode *nmode; 1727 nmode = drm_mode_duplicate(connector->dev, 1728 &sdvo_tv_modes[i]); 1729 if (nmode) 1730 drm_mode_probed_add(connector, nmode); 1731 } 1732} 1733 1734static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1735{ 1736 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1737 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1738 struct drm_display_mode *newmode; 1739 1740 /* 1741 * Attempt to get the mode list from DDC. 1742 * Assume that the preferred modes are 1743 * arranged in priority order. 1744 */ 1745 intel_ddc_get_modes(connector, intel_sdvo->i2c); 1746 if (list_empty(&connector->probed_modes) == false) 1747 goto end; 1748 1749 /* Fetch modes from VBT */ 1750 if (dev_priv->sdvo_lvds_vbt_mode != NULL) { 1751 newmode = drm_mode_duplicate(connector->dev, 1752 dev_priv->sdvo_lvds_vbt_mode); 1753 if (newmode != NULL) { 1754 /* Guarantee the mode is preferred */ 1755 newmode->type = (DRM_MODE_TYPE_PREFERRED | 1756 DRM_MODE_TYPE_DRIVER); 1757 drm_mode_probed_add(connector, newmode); 1758 } 1759 } 1760 1761end: 1762 list_for_each_entry(newmode, &connector->probed_modes, head) { 1763 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1764 intel_sdvo->sdvo_lvds_fixed_mode = 1765 drm_mode_duplicate(connector->dev, newmode); 1766 1767 intel_sdvo->is_lvds = true; 1768 break; 1769 } 1770 } 1771 1772} 1773 1774static int intel_sdvo_get_modes(struct drm_connector *connector) 1775{ 1776 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1777 1778 if (IS_TV(intel_sdvo_connector)) 1779 intel_sdvo_get_tv_modes(connector); 1780 else if (IS_LVDS(intel_sdvo_connector)) 1781 intel_sdvo_get_lvds_modes(connector); 1782 else 1783 intel_sdvo_get_ddc_modes(connector); 1784 1785 return !list_empty(&connector->probed_modes); 1786} 1787 1788static void 1789intel_sdvo_destroy_enhance_property(struct drm_connector *connector) 1790{ 1791 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1792 struct drm_device *dev = connector->dev; 1793 1794 if (intel_sdvo_connector->left) 1795 drm_property_destroy(dev, intel_sdvo_connector->left); 1796 if (intel_sdvo_connector->right) 1797 drm_property_destroy(dev, intel_sdvo_connector->right); 1798 if (intel_sdvo_connector->top) 1799 drm_property_destroy(dev, intel_sdvo_connector->top); 1800 if (intel_sdvo_connector->bottom) 1801 drm_property_destroy(dev, intel_sdvo_connector->bottom); 1802 if (intel_sdvo_connector->hpos) 1803 drm_property_destroy(dev, intel_sdvo_connector->hpos); 1804 if (intel_sdvo_connector->vpos) 1805 drm_property_destroy(dev, intel_sdvo_connector->vpos); 1806 if (intel_sdvo_connector->saturation) 1807 drm_property_destroy(dev, intel_sdvo_connector->saturation); 1808 if (intel_sdvo_connector->contrast) 1809 drm_property_destroy(dev, intel_sdvo_connector->contrast); 1810 if (intel_sdvo_connector->hue) 1811 drm_property_destroy(dev, intel_sdvo_connector->hue); 1812 if (intel_sdvo_connector->sharpness) 1813 drm_property_destroy(dev, intel_sdvo_connector->sharpness); 1814 if (intel_sdvo_connector->flicker_filter) 1815 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter); 1816 if (intel_sdvo_connector->flicker_filter_2d) 1817 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d); 1818 if (intel_sdvo_connector->flicker_filter_adaptive) 1819 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive); 1820 if (intel_sdvo_connector->tv_luma_filter) 1821 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter); 1822 if (intel_sdvo_connector->tv_chroma_filter) 1823 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter); 1824 if (intel_sdvo_connector->dot_crawl) 1825 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl); 1826 if (intel_sdvo_connector->brightness) 1827 drm_property_destroy(dev, intel_sdvo_connector->brightness); 1828} 1829 1830static void intel_sdvo_destroy(struct drm_connector *connector) 1831{ 1832 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1833 1834 if (intel_sdvo_connector->tv_format) 1835 drm_property_destroy(connector->dev, 1836 intel_sdvo_connector->tv_format); 1837 1838 intel_sdvo_destroy_enhance_property(connector); 1839 drm_connector_cleanup(connector); 1840 free(intel_sdvo_connector, DRM_MEM_KMS); 1841} 1842 1843static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) 1844{ 1845 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1846 struct edid *edid; 1847 bool has_audio = false; 1848 1849 if (!intel_sdvo->is_hdmi) 1850 return false; 1851 1852 edid = intel_sdvo_get_edid(connector); 1853 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) 1854 has_audio = drm_detect_monitor_audio(edid); 1855 free(edid, DRM_MEM_KMS); 1856 1857 return has_audio; 1858} 1859 1860static int 1861intel_sdvo_set_property(struct drm_connector *connector, 1862 struct drm_property *property, 1863 uint64_t val) 1864{ 1865 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1866 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1867 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1868 uint16_t temp_value; 1869 uint8_t cmd; 1870 int ret; 1871 1872 ret = drm_object_property_set_value(&connector->base, property, val); 1873 if (ret) 1874 return ret; 1875 1876 if (property == dev_priv->force_audio_property) { 1877 int i = val; 1878 bool has_audio; 1879 1880 if (i == intel_sdvo_connector->force_audio) 1881 return 0; 1882 1883 intel_sdvo_connector->force_audio = i; 1884 1885 if (i == HDMI_AUDIO_AUTO) 1886 has_audio = intel_sdvo_detect_hdmi_audio(connector); 1887 else 1888 has_audio = (i == HDMI_AUDIO_ON); 1889 1890 if (has_audio == intel_sdvo->has_hdmi_audio) 1891 return 0; 1892 1893 intel_sdvo->has_hdmi_audio = has_audio; 1894 goto done; 1895 } 1896 1897 if (property == dev_priv->broadcast_rgb_property) { 1898 if (val == !!intel_sdvo->color_range) 1899 return 0; 1900 1901 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; 1902 goto done; 1903 } 1904 1905#define CHECK_PROPERTY(name, NAME) \ 1906 if (intel_sdvo_connector->name == property) { \ 1907 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ 1908 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ 1909 cmd = SDVO_CMD_SET_##NAME; \ 1910 intel_sdvo_connector->cur_##name = temp_value; \ 1911 goto set_value; \ 1912 } 1913 1914 if (property == intel_sdvo_connector->tv_format) { 1915 if (val >= TV_FORMAT_NUM) 1916 return -EINVAL; 1917 1918 if (intel_sdvo->tv_format_index == 1919 intel_sdvo_connector->tv_format_supported[val]) 1920 return 0; 1921 1922 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; 1923 goto done; 1924 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { 1925 temp_value = val; 1926 if (intel_sdvo_connector->left == property) { 1927 drm_object_property_set_value(&connector->base, 1928 intel_sdvo_connector->right, val); 1929 if (intel_sdvo_connector->left_margin == temp_value) 1930 return 0; 1931 1932 intel_sdvo_connector->left_margin = temp_value; 1933 intel_sdvo_connector->right_margin = temp_value; 1934 temp_value = intel_sdvo_connector->max_hscan - 1935 intel_sdvo_connector->left_margin; 1936 cmd = SDVO_CMD_SET_OVERSCAN_H; 1937 goto set_value; 1938 } else if (intel_sdvo_connector->right == property) { 1939 drm_object_property_set_value(&connector->base, 1940 intel_sdvo_connector->left, val); 1941 if (intel_sdvo_connector->right_margin == temp_value) 1942 return 0; 1943 1944 intel_sdvo_connector->left_margin = temp_value; 1945 intel_sdvo_connector->right_margin = temp_value; 1946 temp_value = intel_sdvo_connector->max_hscan - 1947 intel_sdvo_connector->left_margin; 1948 cmd = SDVO_CMD_SET_OVERSCAN_H; 1949 goto set_value; 1950 } else if (intel_sdvo_connector->top == property) { 1951 drm_object_property_set_value(&connector->base, 1952 intel_sdvo_connector->bottom, val); 1953 if (intel_sdvo_connector->top_margin == temp_value) 1954 return 0; 1955 1956 intel_sdvo_connector->top_margin = temp_value; 1957 intel_sdvo_connector->bottom_margin = temp_value; 1958 temp_value = intel_sdvo_connector->max_vscan - 1959 intel_sdvo_connector->top_margin; 1960 cmd = SDVO_CMD_SET_OVERSCAN_V; 1961 goto set_value; 1962 } else if (intel_sdvo_connector->bottom == property) { 1963 drm_object_property_set_value(&connector->base, 1964 intel_sdvo_connector->top, val); 1965 if (intel_sdvo_connector->bottom_margin == temp_value) 1966 return 0; 1967 1968 intel_sdvo_connector->top_margin = temp_value; 1969 intel_sdvo_connector->bottom_margin = temp_value; 1970 temp_value = intel_sdvo_connector->max_vscan - 1971 intel_sdvo_connector->top_margin; 1972 cmd = SDVO_CMD_SET_OVERSCAN_V; 1973 goto set_value; 1974 } 1975 CHECK_PROPERTY(hpos, HPOS) 1976 CHECK_PROPERTY(vpos, VPOS) 1977 CHECK_PROPERTY(saturation, SATURATION) 1978 CHECK_PROPERTY(contrast, CONTRAST) 1979 CHECK_PROPERTY(hue, HUE) 1980 CHECK_PROPERTY(brightness, BRIGHTNESS) 1981 CHECK_PROPERTY(sharpness, SHARPNESS) 1982 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) 1983 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) 1984 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) 1985 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) 1986 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) 1987 CHECK_PROPERTY(dot_crawl, DOT_CRAWL) 1988 } 1989 1990 return -EINVAL; /* unknown property */ 1991 1992set_value: 1993 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) 1994 return -EIO; 1995 1996 1997done: 1998 if (intel_sdvo->base.base.crtc) { 1999 struct drm_crtc *crtc = intel_sdvo->base.base.crtc; 2000 intel_set_mode(crtc, &crtc->mode, 2001 crtc->x, crtc->y, crtc->fb); 2002 } 2003 2004 return 0; 2005#undef CHECK_PROPERTY 2006} 2007 2008static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = { 2009 .mode_fixup = intel_sdvo_mode_fixup, 2010 .mode_set = intel_sdvo_mode_set, 2011 .disable = intel_encoder_noop, 2012}; 2013 2014static const struct drm_connector_funcs intel_sdvo_connector_funcs = { 2015 .dpms = intel_sdvo_dpms, 2016 .detect = intel_sdvo_detect, 2017 .fill_modes = drm_helper_probe_single_connector_modes, 2018 .set_property = intel_sdvo_set_property, 2019 .destroy = intel_sdvo_destroy, 2020}; 2021 2022static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { 2023 .get_modes = intel_sdvo_get_modes, 2024 .mode_valid = intel_sdvo_mode_valid, 2025 .best_encoder = intel_best_encoder, 2026}; 2027 2028static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 2029{ 2030 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 2031 2032 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) 2033 drm_mode_destroy(encoder->dev, 2034 intel_sdvo->sdvo_lvds_fixed_mode); 2035 2036 device_delete_child(intel_sdvo->base.base.dev->dev, 2037 intel_sdvo->ddc_iic_bus); 2038 intel_encoder_destroy(encoder); 2039} 2040 2041static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 2042 .destroy = intel_sdvo_enc_destroy, 2043}; 2044 2045static void 2046intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) 2047{ 2048 uint16_t mask = 0; 2049 unsigned int num_bits; 2050 2051 /* Make a mask of outputs less than or equal to our own priority in the 2052 * list. 2053 */ 2054 switch (sdvo->controlled_output) { 2055 case SDVO_OUTPUT_LVDS1: 2056 mask |= SDVO_OUTPUT_LVDS1; 2057 case SDVO_OUTPUT_LVDS0: 2058 mask |= SDVO_OUTPUT_LVDS0; 2059 case SDVO_OUTPUT_TMDS1: 2060 mask |= SDVO_OUTPUT_TMDS1; 2061 case SDVO_OUTPUT_TMDS0: 2062 mask |= SDVO_OUTPUT_TMDS0; 2063 case SDVO_OUTPUT_RGB1: 2064 mask |= SDVO_OUTPUT_RGB1; 2065 case SDVO_OUTPUT_RGB0: 2066 mask |= SDVO_OUTPUT_RGB0; 2067 break; 2068 } 2069 2070 /* Count bits to find what number we are in the priority list. */ 2071 mask &= sdvo->caps.output_flags; 2072 num_bits = bitcount16(mask); 2073 /* If more than 3 outputs, default to DDC bus 3 for now. */ 2074 if (num_bits > 3) 2075 num_bits = 3; 2076 2077 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 2078 sdvo->ddc_bus = 1 << num_bits; 2079} 2080 2081/** 2082 * Choose the appropriate DDC bus for control bus switch command for this 2083 * SDVO output based on the controlled output. 2084 * 2085 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 2086 * outputs, then LVDS outputs. 2087 */ 2088static void 2089intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 2090 struct intel_sdvo *sdvo, u32 reg) 2091{ 2092 struct sdvo_device_mapping *mapping; 2093 2094 if (sdvo->is_sdvob) 2095 mapping = &(dev_priv->sdvo_mappings[0]); 2096 else 2097 mapping = &(dev_priv->sdvo_mappings[1]); 2098 2099 if (mapping->initialized) 2100 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 2101 else 2102 intel_sdvo_guess_ddc_bus(sdvo); 2103} 2104 2105static void 2106intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, 2107 struct intel_sdvo *sdvo, u32 reg) 2108{ 2109 struct sdvo_device_mapping *mapping; 2110 u8 pin; 2111 2112 if (sdvo->is_sdvob) 2113 mapping = &dev_priv->sdvo_mappings[0]; 2114 else 2115 mapping = &dev_priv->sdvo_mappings[1]; 2116 2117 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin)) 2118 pin = mapping->i2c_pin; 2119 else 2120 pin = GMBUS_PORT_DPB; 2121 2122 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); 2123 2124 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow 2125 * our code totally fails once we start using gmbus. Hence fall back to 2126 * bit banging for now. */ 2127 intel_gmbus_force_bit(sdvo->i2c, true); 2128} 2129 2130/* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ 2131static void 2132intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) 2133{ 2134 intel_gmbus_force_bit(sdvo->i2c, false); 2135} 2136 2137static bool 2138intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) 2139{ 2140 return intel_sdvo_check_supp_encode(intel_sdvo); 2141} 2142 2143static u8 2144intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo) 2145{ 2146 struct drm_i915_private *dev_priv = dev->dev_private; 2147 struct sdvo_device_mapping *my_mapping, *other_mapping; 2148 2149 if (sdvo->is_sdvob) { 2150 my_mapping = &dev_priv->sdvo_mappings[0]; 2151 other_mapping = &dev_priv->sdvo_mappings[1]; 2152 } else { 2153 my_mapping = &dev_priv->sdvo_mappings[1]; 2154 other_mapping = &dev_priv->sdvo_mappings[0]; 2155 } 2156 2157 /* If the BIOS described our SDVO device, take advantage of it. */ 2158 if (my_mapping->slave_addr) 2159 return my_mapping->slave_addr; 2160 2161 /* If the BIOS only described a different SDVO device, use the 2162 * address that it isn't using. 2163 */ 2164 if (other_mapping->slave_addr) { 2165 if (other_mapping->slave_addr == 0x70) 2166 return 0x72; 2167 else 2168 return 0x70; 2169 } 2170 2171 /* No SDVO device info is found for another DVO port, 2172 * so use mapping assumption we had before BIOS parsing. 2173 */ 2174 if (sdvo->is_sdvob) 2175 return 0x70; 2176 else 2177 return 0x72; 2178} 2179 2180static void 2181intel_sdvo_connector_init(struct intel_sdvo_connector *connector, 2182 struct intel_sdvo *encoder) 2183{ 2184 drm_connector_init(encoder->base.base.dev, 2185 &connector->base.base, 2186 &intel_sdvo_connector_funcs, 2187 connector->base.base.connector_type); 2188 2189 drm_connector_helper_add(&connector->base.base, 2190 &intel_sdvo_connector_helper_funcs); 2191 2192 connector->base.base.interlace_allowed = 1; 2193 connector->base.base.doublescan_allowed = 0; 2194 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2195 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; 2196 2197 intel_connector_attach_encoder(&connector->base, &encoder->base); 2198} 2199 2200static void 2201intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector) 2202{ 2203 struct drm_device *dev = connector->base.base.dev; 2204 2205 intel_attach_force_audio_property(&connector->base.base); 2206 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) 2207 intel_attach_broadcast_rgb_property(&connector->base.base); 2208} 2209 2210static bool 2211intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) 2212{ 2213 struct drm_encoder *encoder = &intel_sdvo->base.base; 2214 struct drm_connector *connector; 2215 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2216 struct intel_connector *intel_connector; 2217 struct intel_sdvo_connector *intel_sdvo_connector; 2218 2219 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector), DRM_MEM_KMS, M_WAITOK | M_ZERO); 2220 if (!intel_sdvo_connector) 2221 return false; 2222 2223 if (device == 0) { 2224 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2225 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2226 } else if (device == 1) { 2227 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2228 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2229 } 2230 2231 intel_connector = &intel_sdvo_connector->base; 2232 connector = &intel_connector->base; 2233 if (intel_sdvo_get_hotplug_support(intel_sdvo) & 2234 intel_sdvo_connector->output_flag) { 2235 connector->polled = DRM_CONNECTOR_POLL_HPD; 2236 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; 2237 /* Some SDVO devices have one-shot hotplug interrupts. 2238 * Ensure that they get re-enabled when an interrupt happens. 2239 */ 2240 intel_encoder->hot_plug = intel_sdvo_enable_hotplug; 2241 intel_sdvo_enable_hotplug(intel_encoder); 2242 } else { 2243 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2244 } 2245 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2246 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2247 2248 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { 2249 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2250 intel_sdvo->is_hdmi = true; 2251 } 2252 2253 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2254 if (intel_sdvo->is_hdmi) 2255 intel_sdvo_add_hdmi_properties(intel_sdvo_connector); 2256 2257 return true; 2258} 2259 2260static bool 2261intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) 2262{ 2263 struct drm_encoder *encoder = &intel_sdvo->base.base; 2264 struct drm_connector *connector; 2265 struct intel_connector *intel_connector; 2266 struct intel_sdvo_connector *intel_sdvo_connector; 2267 2268 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector), DRM_MEM_KMS, M_WAITOK | M_ZERO); 2269 if (!intel_sdvo_connector) 2270 return false; 2271 2272 intel_connector = &intel_sdvo_connector->base; 2273 connector = &intel_connector->base; 2274 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2275 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2276 2277 intel_sdvo->controlled_output |= type; 2278 intel_sdvo_connector->output_flag = type; 2279 2280 intel_sdvo->is_tv = true; 2281 intel_sdvo->base.needs_tv_clock = true; 2282 2283 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2284 2285 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) 2286 goto err; 2287 2288 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2289 goto err; 2290 2291 return true; 2292 2293err: 2294 intel_sdvo_destroy(connector); 2295 return false; 2296} 2297 2298static bool 2299intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) 2300{ 2301 struct drm_encoder *encoder = &intel_sdvo->base.base; 2302 struct drm_connector *connector; 2303 struct intel_connector *intel_connector; 2304 struct intel_sdvo_connector *intel_sdvo_connector; 2305 2306 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector), DRM_MEM_KMS, M_WAITOK | M_ZERO); 2307 if (!intel_sdvo_connector) 2308 return false; 2309 2310 intel_connector = &intel_sdvo_connector->base; 2311 connector = &intel_connector->base; 2312 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2313 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2314 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2315 2316 if (device == 0) { 2317 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2318 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2319 } else if (device == 1) { 2320 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2321 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2322 } 2323 2324 intel_sdvo_connector_init(intel_sdvo_connector, 2325 intel_sdvo); 2326 return true; 2327} 2328 2329static bool 2330intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) 2331{ 2332 struct drm_encoder *encoder = &intel_sdvo->base.base; 2333 struct drm_connector *connector; 2334 struct intel_connector *intel_connector; 2335 struct intel_sdvo_connector *intel_sdvo_connector; 2336 2337 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector), DRM_MEM_KMS, M_WAITOK | M_ZERO); 2338 if (!intel_sdvo_connector) 2339 return false; 2340 2341 intel_connector = &intel_sdvo_connector->base; 2342 connector = &intel_connector->base; 2343 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2344 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2345 2346 if (device == 0) { 2347 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2348 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2349 } else if (device == 1) { 2350 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2351 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2352 } 2353 2354 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2355 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2356 goto err; 2357 2358 return true; 2359 2360err: 2361 intel_sdvo_destroy(connector); 2362 return false; 2363} 2364 2365static bool 2366intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) 2367{ 2368 intel_sdvo->is_tv = false; 2369 intel_sdvo->base.needs_tv_clock = false; 2370 intel_sdvo->is_lvds = false; 2371 2372 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2373 2374 if (flags & SDVO_OUTPUT_TMDS0) 2375 if (!intel_sdvo_dvi_init(intel_sdvo, 0)) 2376 return false; 2377 2378 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2379 if (!intel_sdvo_dvi_init(intel_sdvo, 1)) 2380 return false; 2381 2382 /* TV has no XXX1 function block */ 2383 if (flags & SDVO_OUTPUT_SVID0) 2384 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) 2385 return false; 2386 2387 if (flags & SDVO_OUTPUT_CVBS0) 2388 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) 2389 return false; 2390 2391 if (flags & SDVO_OUTPUT_YPRPB0) 2392 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) 2393 return false; 2394 2395 if (flags & SDVO_OUTPUT_RGB0) 2396 if (!intel_sdvo_analog_init(intel_sdvo, 0)) 2397 return false; 2398 2399 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2400 if (!intel_sdvo_analog_init(intel_sdvo, 1)) 2401 return false; 2402 2403 if (flags & SDVO_OUTPUT_LVDS0) 2404 if (!intel_sdvo_lvds_init(intel_sdvo, 0)) 2405 return false; 2406 2407 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2408 if (!intel_sdvo_lvds_init(intel_sdvo, 1)) 2409 return false; 2410 2411 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2412 unsigned char bytes[2]; 2413 2414 intel_sdvo->controlled_output = 0; 2415 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); 2416 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2417 SDVO_NAME(intel_sdvo), 2418 bytes[0], bytes[1]); 2419 return false; 2420 } 2421 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 2422 2423 return true; 2424} 2425 2426static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) 2427{ 2428 struct drm_device *dev = intel_sdvo->base.base.dev; 2429 struct drm_connector *connector, *tmp; 2430 2431 list_for_each_entry_safe(connector, tmp, 2432 &dev->mode_config.connector_list, head) { 2433 if (intel_attached_encoder(connector) == &intel_sdvo->base) 2434 intel_sdvo_destroy(connector); 2435 } 2436} 2437 2438static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 2439 struct intel_sdvo_connector *intel_sdvo_connector, 2440 int type) 2441{ 2442 struct drm_device *dev = intel_sdvo->base.base.dev; 2443 struct intel_sdvo_tv_format format; 2444 uint32_t format_map, i; 2445 2446 if (!intel_sdvo_set_target_output(intel_sdvo, type)) 2447 return false; 2448 2449 BUILD_BUG_ON(sizeof(format) != 6); 2450 if (!intel_sdvo_get_value(intel_sdvo, 2451 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2452 &format, sizeof(format))) 2453 return false; 2454 2455 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2456 2457 if (format_map == 0) 2458 return false; 2459 2460 intel_sdvo_connector->format_supported_num = 0; 2461 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2462 if (format_map & (1 << i)) 2463 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; 2464 2465 2466 intel_sdvo_connector->tv_format = 2467 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2468 "mode", intel_sdvo_connector->format_supported_num); 2469 if (!intel_sdvo_connector->tv_format) 2470 return false; 2471 2472 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2473 drm_property_add_enum( 2474 intel_sdvo_connector->tv_format, i, 2475 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); 2476 2477 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; 2478 drm_object_attach_property(&intel_sdvo_connector->base.base.base, 2479 intel_sdvo_connector->tv_format, 0); 2480 return true; 2481 2482} 2483 2484#define ENHANCEMENT(name, NAME) do { \ 2485 if (enhancements.name) { \ 2486 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2487 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2488 return false; \ 2489 intel_sdvo_connector->max_##name = data_value[0]; \ 2490 intel_sdvo_connector->cur_##name = response; \ 2491 intel_sdvo_connector->name = \ 2492 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2493 if (!intel_sdvo_connector->name) return false; \ 2494 drm_object_attach_property(&connector->base, \ 2495 intel_sdvo_connector->name, \ 2496 intel_sdvo_connector->cur_##name); \ 2497 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2498 data_value[0], data_value[1], response); \ 2499 } \ 2500} while (0) 2501 2502static bool 2503intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, 2504 struct intel_sdvo_connector *intel_sdvo_connector, 2505 struct intel_sdvo_enhancements_reply enhancements) 2506{ 2507 struct drm_device *dev = intel_sdvo->base.base.dev; 2508 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2509 uint16_t response, data_value[2]; 2510 2511 /* when horizontal overscan is supported, Add the left/right property */ 2512 if (enhancements.overscan_h) { 2513 if (!intel_sdvo_get_value(intel_sdvo, 2514 SDVO_CMD_GET_MAX_OVERSCAN_H, 2515 &data_value, 4)) 2516 return false; 2517 2518 if (!intel_sdvo_get_value(intel_sdvo, 2519 SDVO_CMD_GET_OVERSCAN_H, 2520 &response, 2)) 2521 return false; 2522 2523 intel_sdvo_connector->max_hscan = data_value[0]; 2524 intel_sdvo_connector->left_margin = data_value[0] - response; 2525 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; 2526 intel_sdvo_connector->left = 2527 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2528 if (!intel_sdvo_connector->left) 2529 return false; 2530 2531 drm_object_attach_property(&connector->base, 2532 intel_sdvo_connector->left, 2533 intel_sdvo_connector->left_margin); 2534 2535 intel_sdvo_connector->right = 2536 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2537 if (!intel_sdvo_connector->right) 2538 return false; 2539 2540 drm_object_attach_property(&connector->base, 2541 intel_sdvo_connector->right, 2542 intel_sdvo_connector->right_margin); 2543 DRM_DEBUG_KMS("h_overscan: max %d, " 2544 "default %d, current %d\n", 2545 data_value[0], data_value[1], response); 2546 } 2547 2548 if (enhancements.overscan_v) { 2549 if (!intel_sdvo_get_value(intel_sdvo, 2550 SDVO_CMD_GET_MAX_OVERSCAN_V, 2551 &data_value, 4)) 2552 return false; 2553 2554 if (!intel_sdvo_get_value(intel_sdvo, 2555 SDVO_CMD_GET_OVERSCAN_V, 2556 &response, 2)) 2557 return false; 2558 2559 intel_sdvo_connector->max_vscan = data_value[0]; 2560 intel_sdvo_connector->top_margin = data_value[0] - response; 2561 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; 2562 intel_sdvo_connector->top = 2563 drm_property_create_range(dev, 0, 2564 "top_margin", 0, data_value[0]); 2565 if (!intel_sdvo_connector->top) 2566 return false; 2567 2568 drm_object_attach_property(&connector->base, 2569 intel_sdvo_connector->top, 2570 intel_sdvo_connector->top_margin); 2571 2572 intel_sdvo_connector->bottom = 2573 drm_property_create_range(dev, 0, 2574 "bottom_margin", 0, data_value[0]); 2575 if (!intel_sdvo_connector->bottom) 2576 return false; 2577 2578 drm_object_attach_property(&connector->base, 2579 intel_sdvo_connector->bottom, 2580 intel_sdvo_connector->bottom_margin); 2581 DRM_DEBUG_KMS("v_overscan: max %d, " 2582 "default %d, current %d\n", 2583 data_value[0], data_value[1], response); 2584 } 2585 2586 ENHANCEMENT(hpos, HPOS); 2587 ENHANCEMENT(vpos, VPOS); 2588 ENHANCEMENT(saturation, SATURATION); 2589 ENHANCEMENT(contrast, CONTRAST); 2590 ENHANCEMENT(hue, HUE); 2591 ENHANCEMENT(sharpness, SHARPNESS); 2592 ENHANCEMENT(brightness, BRIGHTNESS); 2593 ENHANCEMENT(flicker_filter, FLICKER_FILTER); 2594 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2595 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); 2596 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); 2597 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); 2598 2599 if (enhancements.dot_crawl) { 2600 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2601 return false; 2602 2603 intel_sdvo_connector->max_dot_crawl = 1; 2604 intel_sdvo_connector->cur_dot_crawl = response & 0x1; 2605 intel_sdvo_connector->dot_crawl = 2606 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2607 if (!intel_sdvo_connector->dot_crawl) 2608 return false; 2609 2610 drm_object_attach_property(&connector->base, 2611 intel_sdvo_connector->dot_crawl, 2612 intel_sdvo_connector->cur_dot_crawl); 2613 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2614 } 2615 2616 return true; 2617} 2618 2619static bool 2620intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, 2621 struct intel_sdvo_connector *intel_sdvo_connector, 2622 struct intel_sdvo_enhancements_reply enhancements) 2623{ 2624 struct drm_device *dev = intel_sdvo->base.base.dev; 2625 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2626 uint16_t response, data_value[2]; 2627 2628 ENHANCEMENT(brightness, BRIGHTNESS); 2629 2630 return true; 2631} 2632#undef ENHANCEMENT 2633 2634static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 2635 struct intel_sdvo_connector *intel_sdvo_connector) 2636{ 2637 union { 2638 struct intel_sdvo_enhancements_reply reply; 2639 uint16_t response; 2640 } enhancements; 2641 2642 BUILD_BUG_ON(sizeof(enhancements) != 2); 2643 2644 enhancements.response = 0; 2645 intel_sdvo_get_value(intel_sdvo, 2646 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2647 &enhancements, sizeof(enhancements)); 2648 if (enhancements.response == 0) { 2649 DRM_DEBUG_KMS("No enhancement is supported\n"); 2650 return true; 2651 } 2652 2653 if (IS_TV(intel_sdvo_connector)) 2654 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2655 else if (IS_LVDS(intel_sdvo_connector)) 2656 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2657 else 2658 return true; 2659} 2660 2661struct intel_sdvo_ddc_proxy_sc { 2662 struct intel_sdvo *intel_sdvo; 2663 device_t port; 2664}; 2665 2666static int 2667intel_sdvo_ddc_proxy_probe(device_t idev) 2668{ 2669 2670 return (BUS_PROBE_DEFAULT); 2671} 2672 2673static int 2674intel_sdvo_ddc_proxy_attach(device_t idev) 2675{ 2676 struct intel_sdvo_ddc_proxy_sc *sc; 2677 2678 sc = device_get_softc(idev); 2679 sc->port = device_add_child(idev, "iicbus", -1); 2680 if (sc->port == NULL) 2681 return (ENXIO); 2682 device_quiet(sc->port); 2683 bus_generic_attach(idev); 2684 return (0); 2685} 2686 2687static int 2688intel_sdvo_ddc_proxy_detach(device_t idev) 2689{ 2690 2691 bus_generic_detach(idev); 2692 device_delete_children(idev); 2693 2694 return (0); 2695} 2696 2697static int 2698intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr, 2699 u_char *oldaddr) 2700{ 2701 struct intel_sdvo_ddc_proxy_sc *sc; 2702 struct intel_sdvo *sdvo; 2703 2704 sc = device_get_softc(idev); 2705 sdvo = sc->intel_sdvo; 2706 2707 return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr, 2708 oldaddr)); 2709} 2710 2711static int intel_sdvo_ddc_proxy_xfer(device_t adapter, 2712 struct iic_msg *msgs, 2713 uint32_t num) 2714{ 2715 struct intel_sdvo_ddc_proxy_sc *sc; 2716 struct intel_sdvo *sdvo; 2717 2718 sc = device_get_softc(adapter); 2719 sdvo = sc->intel_sdvo; 2720 2721 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2722 return EIO; 2723 2724 return (iicbus_transfer(sdvo->i2c, msgs, num)); 2725} 2726 2727static device_method_t intel_sdvo_ddc_proxy_methods[] = { 2728 DEVMETHOD(device_probe, intel_sdvo_ddc_proxy_probe), 2729 DEVMETHOD(device_attach, intel_sdvo_ddc_proxy_attach), 2730 DEVMETHOD(device_detach, intel_sdvo_ddc_proxy_detach), 2731 DEVMETHOD(iicbus_reset, intel_sdvo_ddc_proxy_reset), 2732 DEVMETHOD(iicbus_transfer, intel_sdvo_ddc_proxy_xfer), 2733 DEVMETHOD_END 2734}; 2735static driver_t intel_sdvo_ddc_proxy_driver = { 2736 "intel_sdvo_ddc_proxy", 2737 intel_sdvo_ddc_proxy_methods, 2738 sizeof(struct intel_sdvo_ddc_proxy_sc) 2739}; 2740static devclass_t intel_sdvo_devclass; 2741DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drmn, intel_sdvo_ddc_proxy_driver, 2742 intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST); 2743 2744static bool 2745intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, 2746 struct drm_device *dev) 2747{ 2748 struct intel_sdvo_ddc_proxy_sc *sc; 2749 int ret; 2750 2751 sdvo->ddc_iic_bus = device_add_child(dev->dev, 2752 "intel_sdvo_ddc_proxy", sdvo->sdvo_reg); 2753 if (sdvo->ddc_iic_bus == NULL) { 2754 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo->sdvo_reg); 2755 return (false); 2756 } 2757 device_quiet(sdvo->ddc_iic_bus); 2758 ret = device_probe_and_attach(sdvo->ddc_iic_bus); 2759 if (ret != 0) { 2760 DRM_ERROR("cannot attach proxy bus %d error %d\n", 2761 sdvo->sdvo_reg, ret); 2762 device_delete_child(dev->dev, sdvo->ddc_iic_bus); 2763 return (false); 2764 } 2765 sc = device_get_softc(sdvo->ddc_iic_bus); 2766 sc->intel_sdvo = sdvo; 2767 2768 sdvo->ddc = sc->port; 2769 2770 return true; 2771} 2772 2773bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) 2774{ 2775 struct drm_i915_private *dev_priv = dev->dev_private; 2776 struct intel_encoder *intel_encoder; 2777 struct intel_sdvo *intel_sdvo; 2778 u32 hotplug_mask; 2779 int i; 2780 intel_sdvo = malloc(sizeof(struct intel_sdvo), DRM_MEM_KMS, M_WAITOK | M_ZERO); 2781 if (!intel_sdvo) 2782 return false; 2783 2784 intel_sdvo->sdvo_reg = sdvo_reg; 2785 intel_sdvo->is_sdvob = is_sdvob; 2786 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; 2787 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); 2788 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) 2789 goto err_i2c_bus; 2790 2791 /* encoder type will be decided later */ 2792 intel_encoder = &intel_sdvo->base; 2793 intel_encoder->type = INTEL_OUTPUT_SDVO; 2794 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); 2795 2796 /* Read the regs to test if we can talk to the device */ 2797 for (i = 0; i < 0x40; i++) { 2798 u8 byte; 2799 2800 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { 2801 DRM_DEBUG_KMS("No SDVO device found on %s\n", 2802 SDVO_NAME(intel_sdvo)); 2803 goto err; 2804 } 2805 } 2806 2807 hotplug_mask = 0; 2808 if (IS_G4X(dev)) { 2809 hotplug_mask = intel_sdvo->is_sdvob ? 2810 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X; 2811 } else if (IS_GEN4(dev)) { 2812 hotplug_mask = intel_sdvo->is_sdvob ? 2813 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965; 2814 } else { 2815 hotplug_mask = intel_sdvo->is_sdvob ? 2816 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915; 2817 } 2818 2819 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); 2820 2821 intel_encoder->disable = intel_disable_sdvo; 2822 intel_encoder->enable = intel_enable_sdvo; 2823 intel_encoder->get_hw_state = intel_sdvo_get_hw_state; 2824 2825 /* In default case sdvo lvds is false */ 2826 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 2827 goto err; 2828 2829 if (intel_sdvo_output_setup(intel_sdvo, 2830 intel_sdvo->caps.output_flags) != true) { 2831 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", 2832 SDVO_NAME(intel_sdvo)); 2833 /* Output_setup can leave behind connectors! */ 2834 goto err_output; 2835 } 2836 2837 /* 2838 * Cloning SDVO with anything is often impossible, since the SDVO 2839 * encoder can request a special input timing mode. And even if that's 2840 * not the case we have evidence that cloning a plain unscaled mode with 2841 * VGA doesn't really work. Furthermore the cloning flags are way too 2842 * simplistic anyway to express such constraints, so just give up on 2843 * cloning for SDVO encoders. 2844 */ 2845 intel_sdvo->base.cloneable = false; 2846 2847 /* Only enable the hotplug irq if we need it, to work around noisy 2848 * hotplug lines. 2849 */ 2850 if (intel_sdvo->hotplug_active) 2851 dev_priv->hotplug_supported_mask |= hotplug_mask; 2852 2853 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); 2854 2855 /* Set the input timing to the screen. Assume always input 0. */ 2856 if (!intel_sdvo_set_target_input(intel_sdvo)) 2857 goto err_output; 2858 2859 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 2860 &intel_sdvo->pixel_clock_min, 2861 &intel_sdvo->pixel_clock_max)) 2862 goto err_output; 2863 2864 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2865 "clock range %dMHz - %dMHz, " 2866 "input 1: %c, input 2: %c, " 2867 "output 1: %c, output 2: %c\n", 2868 SDVO_NAME(intel_sdvo), 2869 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, 2870 intel_sdvo->caps.device_rev_id, 2871 intel_sdvo->pixel_clock_min / 1000, 2872 intel_sdvo->pixel_clock_max / 1000, 2873 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 2874 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 2875 /* check currently supported outputs */ 2876 intel_sdvo->caps.output_flags & 2877 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 2878 intel_sdvo->caps.output_flags & 2879 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2880 return true; 2881 2882err_output: 2883 intel_sdvo_output_cleanup(intel_sdvo); 2884 2885err: 2886 drm_encoder_cleanup(&intel_encoder->base); 2887 device_delete_child(dev->dev, intel_sdvo->ddc_iic_bus); 2888err_i2c_bus: 2889 intel_sdvo_unselect_i2c_bus(intel_sdvo); 2890 free(intel_sdvo, DRM_MEM_KMS); 2891 2892 return false; 2893} 2894