1145132Sanholt/* savage_bci.c -- BCI support for Savage 2145132Sanholt * 3145132Sanholt * Copyright 2004 Felix Kuehling 4145132Sanholt * All Rights Reserved. 5145132Sanholt * 6145132Sanholt * Permission is hereby granted, free of charge, to any person obtaining a 7145132Sanholt * copy of this software and associated documentation files (the "Software"), 8145132Sanholt * to deal in the Software without restriction, including without limitation 9145132Sanholt * the rights to use, copy, modify, merge, publish, distribute, sub license, 10145132Sanholt * and/or sell copies of the Software, and to permit persons to whom the 11145132Sanholt * Software is furnished to do so, subject to the following conditions: 12145132Sanholt * 13145132Sanholt * The above copyright notice and this permission notice (including the 14145132Sanholt * next paragraph) shall be included in all copies or substantial portions 15145132Sanholt * of the Software. 16145132Sanholt * 17145132Sanholt * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18145132Sanholt * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19145132Sanholt * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 20145132Sanholt * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR 21145132Sanholt * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF 22145132Sanholt * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23145132Sanholt * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24145132Sanholt */ 25145132Sanholt 26152909Sanholt#include <sys/cdefs.h> 27152909Sanholt__FBSDID("$FreeBSD$"); 28152909Sanholt#include "dev/drm/drmP.h" 29152909Sanholt#include "dev/drm/savage_drm.h" 30152909Sanholt#include "dev/drm/savage_drv.h" 31145132Sanholt 32145132Sanholt/* Need a long timeout for shadow status updates can take a while 33145132Sanholt * and so can waiting for events when the queue is full. */ 34145132Sanholt#define SAVAGE_DEFAULT_USEC_TIMEOUT 1000000 /* 1s */ 35145132Sanholt#define SAVAGE_EVENT_USEC_TIMEOUT 5000000 /* 5s */ 36145132Sanholt#define SAVAGE_FREELIST_DEBUG 0 37145132Sanholt 38182080Srnolandstatic int savage_do_cleanup_bci(struct drm_device *dev); 39182080Srnoland 40145132Sanholtstatic int 41145132Sanholtsavage_bci_wait_fifo_shadow(drm_savage_private_t *dev_priv, unsigned int n) 42145132Sanholt{ 43145132Sanholt uint32_t mask = dev_priv->status_used_mask; 44145132Sanholt uint32_t threshold = dev_priv->bci_threshold_hi; 45145132Sanholt uint32_t status; 46145132Sanholt int i; 47145132Sanholt 48145132Sanholt#if SAVAGE_BCI_DEBUG 49145132Sanholt if (n > dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - threshold) 50145132Sanholt DRM_ERROR("Trying to emit %d words " 51145132Sanholt "(more than guaranteed space in COB)\n", n); 52145132Sanholt#endif 53145132Sanholt 54145132Sanholt for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) { 55145132Sanholt DRM_MEMORYBARRIER(); 56145132Sanholt status = dev_priv->status_ptr[0]; 57145132Sanholt if ((status & mask) < threshold) 58145132Sanholt return 0; 59145132Sanholt DRM_UDELAY(1); 60145132Sanholt } 61145132Sanholt 62145132Sanholt#if SAVAGE_BCI_DEBUG 63145132Sanholt DRM_ERROR("failed!\n"); 64145132Sanholt DRM_INFO(" status=0x%08x, threshold=0x%08x\n", status, threshold); 65145132Sanholt#endif 66182080Srnoland return -EBUSY; 67145132Sanholt} 68145132Sanholt 69145132Sanholtstatic int 70145132Sanholtsavage_bci_wait_fifo_s3d(drm_savage_private_t *dev_priv, unsigned int n) 71145132Sanholt{ 72145132Sanholt uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n; 73145132Sanholt uint32_t status; 74145132Sanholt int i; 75145132Sanholt 76145132Sanholt for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) { 77145132Sanholt status = SAVAGE_READ(SAVAGE_STATUS_WORD0); 78145132Sanholt if ((status & SAVAGE_FIFO_USED_MASK_S3D) <= maxUsed) 79145132Sanholt return 0; 80145132Sanholt DRM_UDELAY(1); 81145132Sanholt } 82145132Sanholt 83145132Sanholt#if SAVAGE_BCI_DEBUG 84145132Sanholt DRM_ERROR("failed!\n"); 85145132Sanholt DRM_INFO(" status=0x%08x\n", status); 86145132Sanholt#endif 87182080Srnoland return -EBUSY; 88145132Sanholt} 89145132Sanholt 90145132Sanholtstatic int 91145132Sanholtsavage_bci_wait_fifo_s4(drm_savage_private_t *dev_priv, unsigned int n) 92145132Sanholt{ 93145132Sanholt uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n; 94145132Sanholt uint32_t status; 95145132Sanholt int i; 96145132Sanholt 97145132Sanholt for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) { 98145132Sanholt status = SAVAGE_READ(SAVAGE_ALT_STATUS_WORD0); 99145132Sanholt if ((status & SAVAGE_FIFO_USED_MASK_S4) <= maxUsed) 100145132Sanholt return 0; 101145132Sanholt DRM_UDELAY(1); 102145132Sanholt } 103145132Sanholt 104145132Sanholt#if SAVAGE_BCI_DEBUG 105145132Sanholt DRM_ERROR("failed!\n"); 106145132Sanholt DRM_INFO(" status=0x%08x\n", status); 107145132Sanholt#endif 108182080Srnoland return -EBUSY; 109145132Sanholt} 110145132Sanholt 111145132Sanholt/* 112145132Sanholt * Waiting for events. 113145132Sanholt * 114145132Sanholt * The BIOSresets the event tag to 0 on mode changes. Therefore we 115145132Sanholt * never emit 0 to the event tag. If we find a 0 event tag we know the 116145132Sanholt * BIOS stomped on it and return success assuming that the BIOS waited 117145132Sanholt * for engine idle. 118145132Sanholt * 119145132Sanholt * Note: if the Xserver uses the event tag it has to follow the same 120145132Sanholt * rule. Otherwise there may be glitches every 2^16 events. 121145132Sanholt */ 122145132Sanholtstatic int 123145132Sanholtsavage_bci_wait_event_shadow(drm_savage_private_t *dev_priv, uint16_t e) 124145132Sanholt{ 125145132Sanholt uint32_t status; 126145132Sanholt int i; 127145132Sanholt 128145132Sanholt for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) { 129145132Sanholt DRM_MEMORYBARRIER(); 130145132Sanholt status = dev_priv->status_ptr[1]; 131145132Sanholt if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff || 132145132Sanholt (status & 0xffff) == 0) 133145132Sanholt return 0; 134145132Sanholt DRM_UDELAY(1); 135145132Sanholt } 136145132Sanholt 137145132Sanholt#if SAVAGE_BCI_DEBUG 138145132Sanholt DRM_ERROR("failed!\n"); 139145132Sanholt DRM_INFO(" status=0x%08x, e=0x%04x\n", status, e); 140145132Sanholt#endif 141145132Sanholt 142182080Srnoland return -EBUSY; 143145132Sanholt} 144145132Sanholt 145145132Sanholtstatic int 146145132Sanholtsavage_bci_wait_event_reg(drm_savage_private_t *dev_priv, uint16_t e) 147145132Sanholt{ 148145132Sanholt uint32_t status; 149145132Sanholt int i; 150145132Sanholt 151145132Sanholt for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) { 152145132Sanholt status = SAVAGE_READ(SAVAGE_STATUS_WORD1); 153145132Sanholt if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff || 154145132Sanholt (status & 0xffff) == 0) 155145132Sanholt return 0; 156145132Sanholt DRM_UDELAY(1); 157145132Sanholt } 158145132Sanholt 159145132Sanholt#if SAVAGE_BCI_DEBUG 160145132Sanholt DRM_ERROR("failed!\n"); 161145132Sanholt DRM_INFO(" status=0x%08x, e=0x%04x\n", status, e); 162145132Sanholt#endif 163145132Sanholt 164182080Srnoland return -EBUSY; 165145132Sanholt} 166145132Sanholt 167145132Sanholtuint16_t savage_bci_emit_event(drm_savage_private_t *dev_priv, 168145132Sanholt unsigned int flags) 169145132Sanholt{ 170152909Sanholt uint16_t count; 171145132Sanholt BCI_LOCALS; 172145132Sanholt 173145132Sanholt if (dev_priv->status_ptr) { 174145132Sanholt /* coordinate with Xserver */ 175145132Sanholt count = dev_priv->status_ptr[1023]; 176145132Sanholt if (count < dev_priv->event_counter) 177145132Sanholt dev_priv->event_wrap++; 178145132Sanholt } else { 179145132Sanholt count = dev_priv->event_counter; 180145132Sanholt } 181145132Sanholt count = (count + 1) & 0xffff; 182145132Sanholt if (count == 0) { 183145132Sanholt count++; /* See the comment above savage_wait_event_*. */ 184145132Sanholt dev_priv->event_wrap++; 185145132Sanholt } 186145132Sanholt dev_priv->event_counter = count; 187145132Sanholt if (dev_priv->status_ptr) 188145132Sanholt dev_priv->status_ptr[1023] = (uint32_t)count; 189145132Sanholt 190145132Sanholt if ((flags & (SAVAGE_WAIT_2D | SAVAGE_WAIT_3D))) { 191145132Sanholt unsigned int wait_cmd = BCI_CMD_WAIT; 192145132Sanholt if ((flags & SAVAGE_WAIT_2D)) 193145132Sanholt wait_cmd |= BCI_CMD_WAIT_2D; 194145132Sanholt if ((flags & SAVAGE_WAIT_3D)) 195145132Sanholt wait_cmd |= BCI_CMD_WAIT_3D; 196145132Sanholt BEGIN_BCI(2); 197145132Sanholt BCI_WRITE(wait_cmd); 198145132Sanholt } else { 199145132Sanholt BEGIN_BCI(1); 200145132Sanholt } 201145132Sanholt BCI_WRITE(BCI_CMD_UPDATE_EVENT_TAG | (uint32_t)count); 202145132Sanholt 203145132Sanholt return count; 204145132Sanholt} 205145132Sanholt 206145132Sanholt/* 207145132Sanholt * Freelist management 208145132Sanholt */ 209182080Srnolandstatic int savage_freelist_init(struct drm_device *dev) 210145132Sanholt{ 211145132Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 212182080Srnoland struct drm_device_dma *dma = dev->dma; 213182080Srnoland struct drm_buf *buf; 214145132Sanholt drm_savage_buf_priv_t *entry; 215145132Sanholt int i; 216145132Sanholt DRM_DEBUG("count=%d\n", dma->buf_count); 217145132Sanholt 218145132Sanholt dev_priv->head.next = &dev_priv->tail; 219145132Sanholt dev_priv->head.prev = NULL; 220145132Sanholt dev_priv->head.buf = NULL; 221145132Sanholt 222145132Sanholt dev_priv->tail.next = NULL; 223145132Sanholt dev_priv->tail.prev = &dev_priv->head; 224145132Sanholt dev_priv->tail.buf = NULL; 225145132Sanholt 226145132Sanholt for (i = 0; i < dma->buf_count; i++) { 227145132Sanholt buf = dma->buflist[i]; 228145132Sanholt entry = buf->dev_private; 229145132Sanholt 230145132Sanholt SET_AGE(&entry->age, 0, 0); 231145132Sanholt entry->buf = buf; 232145132Sanholt 233145132Sanholt entry->next = dev_priv->head.next; 234145132Sanholt entry->prev = &dev_priv->head; 235145132Sanholt dev_priv->head.next->prev = entry; 236145132Sanholt dev_priv->head.next = entry; 237145132Sanholt } 238145132Sanholt 239145132Sanholt return 0; 240145132Sanholt} 241145132Sanholt 242182080Srnolandstatic struct drm_buf *savage_freelist_get(struct drm_device *dev) 243145132Sanholt{ 244145132Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 245145132Sanholt drm_savage_buf_priv_t *tail = dev_priv->tail.prev; 246145132Sanholt uint16_t event; 247145132Sanholt unsigned int wrap; 248145132Sanholt DRM_DEBUG("\n"); 249145132Sanholt 250145132Sanholt UPDATE_EVENT_COUNTER(); 251145132Sanholt if (dev_priv->status_ptr) 252145132Sanholt event = dev_priv->status_ptr[1] & 0xffff; 253145132Sanholt else 254145132Sanholt event = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff; 255145132Sanholt wrap = dev_priv->event_wrap; 256145132Sanholt if (event > dev_priv->event_counter) 257145132Sanholt wrap--; /* hardware hasn't passed the last wrap yet */ 258145132Sanholt 259145132Sanholt DRM_DEBUG(" tail=0x%04x %d\n", tail->age.event, tail->age.wrap); 260145132Sanholt DRM_DEBUG(" head=0x%04x %d\n", event, wrap); 261145132Sanholt 262145132Sanholt if (tail->buf && (TEST_AGE(&tail->age, event, wrap) || event == 0)) { 263145132Sanholt drm_savage_buf_priv_t *next = tail->next; 264145132Sanholt drm_savage_buf_priv_t *prev = tail->prev; 265145132Sanholt prev->next = next; 266145132Sanholt next->prev = prev; 267145132Sanholt tail->next = tail->prev = NULL; 268145132Sanholt return tail->buf; 269145132Sanholt } 270145132Sanholt 271145132Sanholt DRM_DEBUG("returning NULL, tail->buf=%p!\n", tail->buf); 272145132Sanholt return NULL; 273145132Sanholt} 274145132Sanholt 275182080Srnolandvoid savage_freelist_put(struct drm_device *dev, struct drm_buf *buf) 276145132Sanholt{ 277145132Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 278145132Sanholt drm_savage_buf_priv_t *entry = buf->dev_private, *prev, *next; 279145132Sanholt 280145132Sanholt DRM_DEBUG("age=0x%04x wrap=%d\n", entry->age.event, entry->age.wrap); 281145132Sanholt 282145132Sanholt if (entry->next != NULL || entry->prev != NULL) { 283145132Sanholt DRM_ERROR("entry already on freelist.\n"); 284145132Sanholt return; 285145132Sanholt } 286145132Sanholt 287145132Sanholt prev = &dev_priv->head; 288145132Sanholt next = prev->next; 289145132Sanholt prev->next = entry; 290145132Sanholt next->prev = entry; 291145132Sanholt entry->prev = prev; 292145132Sanholt entry->next = next; 293145132Sanholt} 294145132Sanholt 295145132Sanholt/* 296145132Sanholt * Command DMA 297145132Sanholt */ 298145132Sanholtstatic int savage_dma_init(drm_savage_private_t *dev_priv) 299145132Sanholt{ 300145132Sanholt unsigned int i; 301145132Sanholt 302145132Sanholt dev_priv->nr_dma_pages = dev_priv->cmd_dma->size / 303145132Sanholt (SAVAGE_DMA_PAGE_SIZE*4); 304145132Sanholt dev_priv->dma_pages = drm_alloc(sizeof(drm_savage_dma_page_t) * 305157617Sanholt dev_priv->nr_dma_pages, DRM_MEM_DRIVER); 306145132Sanholt if (dev_priv->dma_pages == NULL) 307182080Srnoland return -ENOMEM; 308145132Sanholt 309145132Sanholt for (i = 0; i < dev_priv->nr_dma_pages; ++i) { 310145132Sanholt SET_AGE(&dev_priv->dma_pages[i].age, 0, 0); 311145132Sanholt dev_priv->dma_pages[i].used = 0; 312145132Sanholt dev_priv->dma_pages[i].flushed = 0; 313145132Sanholt } 314145132Sanholt SET_AGE(&dev_priv->last_dma_age, 0, 0); 315145132Sanholt 316145132Sanholt dev_priv->first_dma_page = 0; 317145132Sanholt dev_priv->current_dma_page = 0; 318145132Sanholt 319145132Sanholt return 0; 320145132Sanholt} 321145132Sanholt 322145132Sanholtvoid savage_dma_reset(drm_savage_private_t *dev_priv) 323145132Sanholt{ 324145132Sanholt uint16_t event; 325145132Sanholt unsigned int wrap, i; 326145132Sanholt event = savage_bci_emit_event(dev_priv, 0); 327145132Sanholt wrap = dev_priv->event_wrap; 328145132Sanholt for (i = 0; i < dev_priv->nr_dma_pages; ++i) { 329145132Sanholt SET_AGE(&dev_priv->dma_pages[i].age, event, wrap); 330145132Sanholt dev_priv->dma_pages[i].used = 0; 331145132Sanholt dev_priv->dma_pages[i].flushed = 0; 332145132Sanholt } 333145132Sanholt SET_AGE(&dev_priv->last_dma_age, event, wrap); 334145132Sanholt dev_priv->first_dma_page = dev_priv->current_dma_page = 0; 335145132Sanholt} 336145132Sanholt 337145132Sanholtvoid savage_dma_wait(drm_savage_private_t *dev_priv, unsigned int page) 338145132Sanholt{ 339145132Sanholt uint16_t event; 340145132Sanholt unsigned int wrap; 341145132Sanholt 342145132Sanholt /* Faked DMA buffer pages don't age. */ 343145132Sanholt if (dev_priv->cmd_dma == &dev_priv->fake_dma) 344145132Sanholt return; 345145132Sanholt 346145132Sanholt UPDATE_EVENT_COUNTER(); 347145132Sanholt if (dev_priv->status_ptr) 348145132Sanholt event = dev_priv->status_ptr[1] & 0xffff; 349145132Sanholt else 350145132Sanholt event = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff; 351145132Sanholt wrap = dev_priv->event_wrap; 352145132Sanholt if (event > dev_priv->event_counter) 353145132Sanholt wrap--; /* hardware hasn't passed the last wrap yet */ 354145132Sanholt 355145132Sanholt if (dev_priv->dma_pages[page].age.wrap > wrap || 356145132Sanholt (dev_priv->dma_pages[page].age.wrap == wrap && 357145132Sanholt dev_priv->dma_pages[page].age.event > event)) { 358145132Sanholt if (dev_priv->wait_evnt(dev_priv, 359145132Sanholt dev_priv->dma_pages[page].age.event) 360145132Sanholt < 0) 361145132Sanholt DRM_ERROR("wait_evnt failed!\n"); 362145132Sanholt } 363145132Sanholt} 364145132Sanholt 365145132Sanholtuint32_t *savage_dma_alloc(drm_savage_private_t *dev_priv, unsigned int n) 366145132Sanholt{ 367145132Sanholt unsigned int cur = dev_priv->current_dma_page; 368145132Sanholt unsigned int rest = SAVAGE_DMA_PAGE_SIZE - 369145132Sanholt dev_priv->dma_pages[cur].used; 370182080Srnoland unsigned int nr_pages = (n - rest + SAVAGE_DMA_PAGE_SIZE - 1) / 371145132Sanholt SAVAGE_DMA_PAGE_SIZE; 372145132Sanholt uint32_t *dma_ptr; 373145132Sanholt unsigned int i; 374145132Sanholt 375145132Sanholt DRM_DEBUG("cur=%u, cur->used=%u, n=%u, rest=%u, nr_pages=%u\n", 376145132Sanholt cur, dev_priv->dma_pages[cur].used, n, rest, nr_pages); 377145132Sanholt 378145132Sanholt if (cur + nr_pages < dev_priv->nr_dma_pages) { 379207066Srnoland dma_ptr = (uint32_t *)dev_priv->cmd_dma->virtual + 380182080Srnoland cur * SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used; 381145132Sanholt if (n < rest) 382145132Sanholt rest = n; 383145132Sanholt dev_priv->dma_pages[cur].used += rest; 384145132Sanholt n -= rest; 385145132Sanholt cur++; 386145132Sanholt } else { 387145132Sanholt dev_priv->dma_flush(dev_priv); 388157617Sanholt nr_pages = 389182080Srnoland (n + SAVAGE_DMA_PAGE_SIZE - 1) / SAVAGE_DMA_PAGE_SIZE; 390145132Sanholt for (i = cur; i < dev_priv->nr_dma_pages; ++i) { 391145132Sanholt dev_priv->dma_pages[i].age = dev_priv->last_dma_age; 392145132Sanholt dev_priv->dma_pages[i].used = 0; 393145132Sanholt dev_priv->dma_pages[i].flushed = 0; 394145132Sanholt } 395207066Srnoland dma_ptr = (uint32_t *)dev_priv->cmd_dma->virtual; 396145132Sanholt dev_priv->first_dma_page = cur = 0; 397145132Sanholt } 398145132Sanholt for (i = cur; nr_pages > 0; ++i, --nr_pages) { 399145132Sanholt#if SAVAGE_DMA_DEBUG 400145132Sanholt if (dev_priv->dma_pages[i].used) { 401145132Sanholt DRM_ERROR("unflushed page %u: used=%u\n", 402145132Sanholt i, dev_priv->dma_pages[i].used); 403145132Sanholt } 404145132Sanholt#endif 405145132Sanholt if (n > SAVAGE_DMA_PAGE_SIZE) 406145132Sanholt dev_priv->dma_pages[i].used = SAVAGE_DMA_PAGE_SIZE; 407145132Sanholt else 408145132Sanholt dev_priv->dma_pages[i].used = n; 409145132Sanholt n -= SAVAGE_DMA_PAGE_SIZE; 410145132Sanholt } 411145132Sanholt dev_priv->current_dma_page = --i; 412145132Sanholt 413145132Sanholt DRM_DEBUG("cur=%u, cur->used=%u, n=%u\n", 414145132Sanholt i, dev_priv->dma_pages[i].used, n); 415145132Sanholt 416145132Sanholt savage_dma_wait(dev_priv, dev_priv->current_dma_page); 417145132Sanholt 418145132Sanholt return dma_ptr; 419145132Sanholt} 420145132Sanholt 421145132Sanholtstatic void savage_dma_flush(drm_savage_private_t *dev_priv) 422145132Sanholt{ 423145132Sanholt unsigned int first = dev_priv->first_dma_page; 424145132Sanholt unsigned int cur = dev_priv->current_dma_page; 425145132Sanholt uint16_t event; 426145132Sanholt unsigned int wrap, pad, align, len, i; 427145132Sanholt unsigned long phys_addr; 428152909Sanholt BCI_LOCALS; 429145132Sanholt 430145132Sanholt if (first == cur && 431145132Sanholt dev_priv->dma_pages[cur].used == dev_priv->dma_pages[cur].flushed) 432145132Sanholt return; 433145132Sanholt 434145132Sanholt /* pad length to multiples of 2 entries 435145132Sanholt * align start of next DMA block to multiles of 8 entries */ 436145132Sanholt pad = -dev_priv->dma_pages[cur].used & 1; 437145132Sanholt align = -(dev_priv->dma_pages[cur].used + pad) & 7; 438145132Sanholt 439145132Sanholt DRM_DEBUG("first=%u, cur=%u, first->flushed=%u, cur->used=%u, " 440145132Sanholt "pad=%u, align=%u\n", 441145132Sanholt first, cur, dev_priv->dma_pages[first].flushed, 442145132Sanholt dev_priv->dma_pages[cur].used, pad, align); 443145132Sanholt 444145132Sanholt /* pad with noops */ 445145132Sanholt if (pad) { 446207066Srnoland uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->virtual + 447157617Sanholt cur * SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used; 448145132Sanholt dev_priv->dma_pages[cur].used += pad; 449182080Srnoland while (pad != 0) { 450145132Sanholt *dma_ptr++ = BCI_CMD_WAIT; 451145132Sanholt pad--; 452145132Sanholt } 453145132Sanholt } 454145132Sanholt 455145132Sanholt DRM_MEMORYBARRIER(); 456145132Sanholt 457145132Sanholt /* do flush ... */ 458145132Sanholt phys_addr = dev_priv->cmd_dma->offset + 459145132Sanholt (first * SAVAGE_DMA_PAGE_SIZE + 460145132Sanholt dev_priv->dma_pages[first].flushed) * 4; 461145132Sanholt len = (cur - first) * SAVAGE_DMA_PAGE_SIZE + 462157617Sanholt dev_priv->dma_pages[cur].used - dev_priv->dma_pages[first].flushed; 463145132Sanholt 464145132Sanholt DRM_DEBUG("phys_addr=%lx, len=%u\n", 465145132Sanholt phys_addr | dev_priv->dma_type, len); 466145132Sanholt 467145132Sanholt BEGIN_BCI(3); 468145132Sanholt BCI_SET_REGISTERS(SAVAGE_DMABUFADDR, 1); 469145132Sanholt BCI_WRITE(phys_addr | dev_priv->dma_type); 470145132Sanholt BCI_DMA(len); 471145132Sanholt 472145132Sanholt /* fix alignment of the start of the next block */ 473145132Sanholt dev_priv->dma_pages[cur].used += align; 474145132Sanholt 475145132Sanholt /* age DMA pages */ 476145132Sanholt event = savage_bci_emit_event(dev_priv, 0); 477145132Sanholt wrap = dev_priv->event_wrap; 478145132Sanholt for (i = first; i < cur; ++i) { 479145132Sanholt SET_AGE(&dev_priv->dma_pages[i].age, event, wrap); 480145132Sanholt dev_priv->dma_pages[i].used = 0; 481145132Sanholt dev_priv->dma_pages[i].flushed = 0; 482145132Sanholt } 483145132Sanholt /* age the current page only when it's full */ 484145132Sanholt if (dev_priv->dma_pages[cur].used == SAVAGE_DMA_PAGE_SIZE) { 485145132Sanholt SET_AGE(&dev_priv->dma_pages[cur].age, event, wrap); 486145132Sanholt dev_priv->dma_pages[cur].used = 0; 487145132Sanholt dev_priv->dma_pages[cur].flushed = 0; 488145132Sanholt /* advance to next page */ 489145132Sanholt cur++; 490145132Sanholt if (cur == dev_priv->nr_dma_pages) 491145132Sanholt cur = 0; 492145132Sanholt dev_priv->first_dma_page = dev_priv->current_dma_page = cur; 493145132Sanholt } else { 494145132Sanholt dev_priv->first_dma_page = cur; 495145132Sanholt dev_priv->dma_pages[cur].flushed = dev_priv->dma_pages[i].used; 496145132Sanholt } 497145132Sanholt SET_AGE(&dev_priv->last_dma_age, event, wrap); 498145132Sanholt 499145132Sanholt DRM_DEBUG("first=cur=%u, cur->used=%u, cur->flushed=%u\n", cur, 500145132Sanholt dev_priv->dma_pages[cur].used, 501145132Sanholt dev_priv->dma_pages[cur].flushed); 502145132Sanholt} 503145132Sanholt 504145132Sanholtstatic void savage_fake_dma_flush(drm_savage_private_t *dev_priv) 505145132Sanholt{ 506152909Sanholt unsigned int i, j; 507145132Sanholt BCI_LOCALS; 508152909Sanholt 509145132Sanholt if (dev_priv->first_dma_page == dev_priv->current_dma_page && 510145132Sanholt dev_priv->dma_pages[dev_priv->current_dma_page].used == 0) 511145132Sanholt return; 512145132Sanholt 513145132Sanholt DRM_DEBUG("first=%u, cur=%u, cur->used=%u\n", 514145132Sanholt dev_priv->first_dma_page, dev_priv->current_dma_page, 515145132Sanholt dev_priv->dma_pages[dev_priv->current_dma_page].used); 516145132Sanholt 517145132Sanholt for (i = dev_priv->first_dma_page; 518145132Sanholt i <= dev_priv->current_dma_page && dev_priv->dma_pages[i].used; 519145132Sanholt ++i) { 520207066Srnoland uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->virtual + 521145132Sanholt i * SAVAGE_DMA_PAGE_SIZE; 522145132Sanholt#if SAVAGE_DMA_DEBUG 523145132Sanholt /* Sanity check: all pages except the last one must be full. */ 524145132Sanholt if (i < dev_priv->current_dma_page && 525145132Sanholt dev_priv->dma_pages[i].used != SAVAGE_DMA_PAGE_SIZE) { 526145132Sanholt DRM_ERROR("partial DMA page %u: used=%u", 527145132Sanholt i, dev_priv->dma_pages[i].used); 528145132Sanholt } 529145132Sanholt#endif 530145132Sanholt BEGIN_BCI(dev_priv->dma_pages[i].used); 531145132Sanholt for (j = 0; j < dev_priv->dma_pages[i].used; ++j) { 532145132Sanholt BCI_WRITE(dma_ptr[j]); 533145132Sanholt } 534145132Sanholt dev_priv->dma_pages[i].used = 0; 535145132Sanholt } 536145132Sanholt 537145132Sanholt /* reset to first page */ 538145132Sanholt dev_priv->first_dma_page = dev_priv->current_dma_page = 0; 539145132Sanholt} 540145132Sanholt 541182080Srnolandint savage_driver_load(struct drm_device *dev, unsigned long chipset) 542145132Sanholt{ 543145132Sanholt drm_savage_private_t *dev_priv; 544145132Sanholt 545145132Sanholt dev_priv = drm_alloc(sizeof(drm_savage_private_t), DRM_MEM_DRIVER); 546145132Sanholt if (dev_priv == NULL) 547182080Srnoland return -ENOMEM; 548145132Sanholt 549145132Sanholt memset(dev_priv, 0, sizeof(drm_savage_private_t)); 550145132Sanholt dev->dev_private = (void *)dev_priv; 551152909Sanholt 552145132Sanholt dev_priv->chipset = (enum savage_family)chipset; 553145132Sanholt 554152909Sanholt return 0; 555152909Sanholt} 556152909Sanholt 557152909Sanholt/* 558298955Spfg * Initialize mappings. On Savage4 and SavageIX the alignment 559152909Sanholt * and size of the aperture is not suitable for automatic MTRR setup 560152909Sanholt * in drm_addmap. Therefore we add them manually before the maps are 561152909Sanholt * initialized, and tear them down on last close. 562152909Sanholt */ 563182080Srnolandint savage_driver_firstopen(struct drm_device *dev) 564152909Sanholt{ 565152909Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 566152909Sanholt unsigned long mmio_base, fb_base, fb_size, aperture_base; 567152909Sanholt /* fb_rsrc and aper_rsrc aren't really used currently, but still exist 568152909Sanholt * in case we decide we need information on the BAR for BSD in the 569152909Sanholt * future. 570152909Sanholt */ 571152909Sanholt unsigned int fb_rsrc, aper_rsrc; 572152909Sanholt int ret = 0; 573152909Sanholt 574145132Sanholt dev_priv->mtrr[0].handle = -1; 575145132Sanholt dev_priv->mtrr[1].handle = -1; 576145132Sanholt dev_priv->mtrr[2].handle = -1; 577145132Sanholt if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 578145132Sanholt fb_rsrc = 0; 579145132Sanholt fb_base = drm_get_resource_start(dev, 0); 580145132Sanholt fb_size = SAVAGE_FB_SIZE_S3; 581145132Sanholt mmio_base = fb_base + SAVAGE_FB_SIZE_S3; 582145132Sanholt aper_rsrc = 0; 583145132Sanholt aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; 584145132Sanholt /* this should always be true */ 585145132Sanholt if (drm_get_resource_len(dev, 0) == 0x08000000) { 586145132Sanholt /* Don't make MMIO write-cobining! We need 3 587145132Sanholt * MTRRs. */ 588145132Sanholt dev_priv->mtrr[0].base = fb_base; 589145132Sanholt dev_priv->mtrr[0].size = 0x01000000; 590182080Srnoland dev_priv->mtrr[0].handle = 591157617Sanholt drm_mtrr_add(dev_priv->mtrr[0].base, 592157617Sanholt dev_priv->mtrr[0].size, DRM_MTRR_WC); 593182080Srnoland dev_priv->mtrr[1].base = fb_base + 0x02000000; 594145132Sanholt dev_priv->mtrr[1].size = 0x02000000; 595157617Sanholt dev_priv->mtrr[1].handle = 596157617Sanholt drm_mtrr_add(dev_priv->mtrr[1].base, 597157617Sanholt dev_priv->mtrr[1].size, DRM_MTRR_WC); 598182080Srnoland dev_priv->mtrr[2].base = fb_base + 0x04000000; 599145132Sanholt dev_priv->mtrr[2].size = 0x04000000; 600157617Sanholt dev_priv->mtrr[2].handle = 601182080Srnoland drm_mtrr_add(dev_priv->mtrr[2].base, 602157617Sanholt dev_priv->mtrr[2].size, DRM_MTRR_WC); 603145132Sanholt } else { 604145132Sanholt DRM_ERROR("strange pci_resource_len %08lx\n", 605145132Sanholt drm_get_resource_len(dev, 0)); 606145132Sanholt } 607152909Sanholt } else if (dev_priv->chipset != S3_SUPERSAVAGE && 608152909Sanholt dev_priv->chipset != S3_SAVAGE2000) { 609145132Sanholt mmio_base = drm_get_resource_start(dev, 0); 610145132Sanholt fb_rsrc = 1; 611145132Sanholt fb_base = drm_get_resource_start(dev, 1); 612145132Sanholt fb_size = SAVAGE_FB_SIZE_S4; 613145132Sanholt aper_rsrc = 1; 614145132Sanholt aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; 615145132Sanholt /* this should always be true */ 616145132Sanholt if (drm_get_resource_len(dev, 1) == 0x08000000) { 617145132Sanholt /* Can use one MTRR to cover both fb and 618145132Sanholt * aperture. */ 619145132Sanholt dev_priv->mtrr[0].base = fb_base; 620145132Sanholt dev_priv->mtrr[0].size = 0x08000000; 621182080Srnoland dev_priv->mtrr[0].handle = 622157617Sanholt drm_mtrr_add(dev_priv->mtrr[0].base, 623157617Sanholt dev_priv->mtrr[0].size, DRM_MTRR_WC); 624145132Sanholt } else { 625145132Sanholt DRM_ERROR("strange pci_resource_len %08lx\n", 626145132Sanholt drm_get_resource_len(dev, 1)); 627145132Sanholt } 628145132Sanholt } else { 629145132Sanholt mmio_base = drm_get_resource_start(dev, 0); 630145132Sanholt fb_rsrc = 1; 631145132Sanholt fb_base = drm_get_resource_start(dev, 1); 632145132Sanholt fb_size = drm_get_resource_len(dev, 1); 633145132Sanholt aper_rsrc = 2; 634145132Sanholt aperture_base = drm_get_resource_start(dev, 2); 635145132Sanholt /* Automatic MTRR setup will do the right thing. */ 636145132Sanholt } 637145132Sanholt 638152909Sanholt ret = drm_addmap(dev, mmio_base, SAVAGE_MMIO_SIZE, _DRM_REGISTERS, 639152909Sanholt _DRM_READ_ONLY, &dev_priv->mmio); 640152909Sanholt if (ret) 641145132Sanholt return ret; 642145132Sanholt 643152909Sanholt ret = drm_addmap(dev, fb_base, fb_size, _DRM_FRAME_BUFFER, 644152909Sanholt _DRM_WRITE_COMBINING, &dev_priv->fb); 645152909Sanholt if (ret) 646145132Sanholt return ret; 647145132Sanholt 648152909Sanholt ret = drm_addmap(dev, aperture_base, SAVAGE_APERTURE_SIZE, 649152909Sanholt _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING, 650152909Sanholt &dev_priv->aperture); 651152909Sanholt if (ret) 652145132Sanholt return ret; 653145132Sanholt 654145132Sanholt return ret; 655145132Sanholt} 656145132Sanholt 657145132Sanholt/* 658145132Sanholt * Delete MTRRs and free device-private data. 659145132Sanholt */ 660182080Srnolandvoid savage_driver_lastclose(struct drm_device *dev) 661145132Sanholt{ 662145132Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 663145132Sanholt int i; 664145132Sanholt 665145132Sanholt for (i = 0; i < 3; ++i) 666145132Sanholt if (dev_priv->mtrr[i].handle >= 0) 667152909Sanholt drm_mtrr_del(dev_priv->mtrr[i].handle, 668152909Sanholt dev_priv->mtrr[i].base, 669157617Sanholt dev_priv->mtrr[i].size, DRM_MTRR_WC); 670152909Sanholt} 671145132Sanholt 672182080Srnolandint savage_driver_unload(struct drm_device *dev) 673152909Sanholt{ 674152909Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 675152909Sanholt 676145132Sanholt drm_free(dev_priv, sizeof(drm_savage_private_t), DRM_MEM_DRIVER); 677145132Sanholt 678145132Sanholt return 0; 679145132Sanholt} 680145132Sanholt 681182080Srnolandstatic int savage_do_init_bci(struct drm_device *dev, drm_savage_init_t *init) 682145132Sanholt{ 683145132Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 684145132Sanholt 685145132Sanholt if (init->fb_bpp != 16 && init->fb_bpp != 32) { 686145132Sanholt DRM_ERROR("invalid frame buffer bpp %d!\n", init->fb_bpp); 687182080Srnoland return -EINVAL; 688145132Sanholt } 689145132Sanholt if (init->depth_bpp != 16 && init->depth_bpp != 32) { 690145132Sanholt DRM_ERROR("invalid depth buffer bpp %d!\n", init->fb_bpp); 691182080Srnoland return -EINVAL; 692145132Sanholt } 693145132Sanholt if (init->dma_type != SAVAGE_DMA_AGP && 694145132Sanholt init->dma_type != SAVAGE_DMA_PCI) { 695145132Sanholt DRM_ERROR("invalid dma memory type %d!\n", init->dma_type); 696182080Srnoland return -EINVAL; 697145132Sanholt } 698145132Sanholt 699145132Sanholt dev_priv->cob_size = init->cob_size; 700145132Sanholt dev_priv->bci_threshold_lo = init->bci_threshold_lo; 701145132Sanholt dev_priv->bci_threshold_hi = init->bci_threshold_hi; 702145132Sanholt dev_priv->dma_type = init->dma_type; 703145132Sanholt 704145132Sanholt dev_priv->fb_bpp = init->fb_bpp; 705145132Sanholt dev_priv->front_offset = init->front_offset; 706145132Sanholt dev_priv->front_pitch = init->front_pitch; 707145132Sanholt dev_priv->back_offset = init->back_offset; 708145132Sanholt dev_priv->back_pitch = init->back_pitch; 709145132Sanholt dev_priv->depth_bpp = init->depth_bpp; 710145132Sanholt dev_priv->depth_offset = init->depth_offset; 711145132Sanholt dev_priv->depth_pitch = init->depth_pitch; 712145132Sanholt 713145132Sanholt dev_priv->texture_offset = init->texture_offset; 714145132Sanholt dev_priv->texture_size = init->texture_size; 715145132Sanholt 716182080Srnoland dev_priv->sarea = drm_getsarea(dev); 717145132Sanholt if (!dev_priv->sarea) { 718145132Sanholt DRM_ERROR("could not find sarea!\n"); 719145132Sanholt savage_do_cleanup_bci(dev); 720182080Srnoland return -EINVAL; 721145132Sanholt } 722145132Sanholt if (init->status_offset != 0) { 723145132Sanholt dev_priv->status = drm_core_findmap(dev, init->status_offset); 724145132Sanholt if (!dev_priv->status) { 725145132Sanholt DRM_ERROR("could not find shadow status region!\n"); 726145132Sanholt savage_do_cleanup_bci(dev); 727182080Srnoland return -EINVAL; 728145132Sanholt } 729145132Sanholt } else { 730145132Sanholt dev_priv->status = NULL; 731145132Sanholt } 732145132Sanholt if (dev_priv->dma_type == SAVAGE_DMA_AGP && init->buffers_offset) { 733182080Srnoland dev->agp_buffer_token = init->buffers_offset; 734145132Sanholt dev->agp_buffer_map = drm_core_findmap(dev, 735145132Sanholt init->buffers_offset); 736145132Sanholt if (!dev->agp_buffer_map) { 737145132Sanholt DRM_ERROR("could not find DMA buffer region!\n"); 738145132Sanholt savage_do_cleanup_bci(dev); 739182080Srnoland return -EINVAL; 740145132Sanholt } 741145132Sanholt drm_core_ioremap(dev->agp_buffer_map, dev); 742145132Sanholt if (!dev->agp_buffer_map) { 743145132Sanholt DRM_ERROR("failed to ioremap DMA buffer region!\n"); 744145132Sanholt savage_do_cleanup_bci(dev); 745182080Srnoland return -ENOMEM; 746145132Sanholt } 747145132Sanholt } 748145132Sanholt if (init->agp_textures_offset) { 749145132Sanholt dev_priv->agp_textures = 750145132Sanholt drm_core_findmap(dev, init->agp_textures_offset); 751145132Sanholt if (!dev_priv->agp_textures) { 752145132Sanholt DRM_ERROR("could not find agp texture region!\n"); 753145132Sanholt savage_do_cleanup_bci(dev); 754182080Srnoland return -EINVAL; 755145132Sanholt } 756145132Sanholt } else { 757145132Sanholt dev_priv->agp_textures = NULL; 758145132Sanholt } 759145132Sanholt 760145132Sanholt if (init->cmd_dma_offset) { 761145132Sanholt if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 762145132Sanholt DRM_ERROR("command DMA not supported on " 763145132Sanholt "Savage3D/MX/IX.\n"); 764145132Sanholt savage_do_cleanup_bci(dev); 765182080Srnoland return -EINVAL; 766145132Sanholt } 767145132Sanholt if (dev->dma && dev->dma->buflist) { 768145132Sanholt DRM_ERROR("command and vertex DMA not supported " 769145132Sanholt "at the same time.\n"); 770145132Sanholt savage_do_cleanup_bci(dev); 771182080Srnoland return -EINVAL; 772145132Sanholt } 773145132Sanholt dev_priv->cmd_dma = drm_core_findmap(dev, init->cmd_dma_offset); 774145132Sanholt if (!dev_priv->cmd_dma) { 775145132Sanholt DRM_ERROR("could not find command DMA region!\n"); 776145132Sanholt savage_do_cleanup_bci(dev); 777182080Srnoland return -EINVAL; 778145132Sanholt } 779145132Sanholt if (dev_priv->dma_type == SAVAGE_DMA_AGP) { 780145132Sanholt if (dev_priv->cmd_dma->type != _DRM_AGP) { 781145132Sanholt DRM_ERROR("AGP command DMA region is not a " 782145132Sanholt "_DRM_AGP map!\n"); 783145132Sanholt savage_do_cleanup_bci(dev); 784182080Srnoland return -EINVAL; 785145132Sanholt } 786145132Sanholt drm_core_ioremap(dev_priv->cmd_dma, dev); 787207066Srnoland if (!dev_priv->cmd_dma->virtual) { 788145132Sanholt DRM_ERROR("failed to ioremap command " 789145132Sanholt "DMA region!\n"); 790145132Sanholt savage_do_cleanup_bci(dev); 791182080Srnoland return -ENOMEM; 792145132Sanholt } 793145132Sanholt } else if (dev_priv->cmd_dma->type != _DRM_CONSISTENT) { 794145132Sanholt DRM_ERROR("PCI command DMA region is not a " 795145132Sanholt "_DRM_CONSISTENT map!\n"); 796145132Sanholt savage_do_cleanup_bci(dev); 797182080Srnoland return -EINVAL; 798145132Sanholt } 799145132Sanholt } else { 800145132Sanholt dev_priv->cmd_dma = NULL; 801145132Sanholt } 802145132Sanholt 803145132Sanholt dev_priv->dma_flush = savage_dma_flush; 804145132Sanholt if (!dev_priv->cmd_dma) { 805145132Sanholt DRM_DEBUG("falling back to faked command DMA.\n"); 806145132Sanholt dev_priv->fake_dma.offset = 0; 807145132Sanholt dev_priv->fake_dma.size = SAVAGE_FAKE_DMA_SIZE; 808145132Sanholt dev_priv->fake_dma.type = _DRM_SHM; 809207066Srnoland dev_priv->fake_dma.virtual = drm_alloc(SAVAGE_FAKE_DMA_SIZE, 810145132Sanholt DRM_MEM_DRIVER); 811207066Srnoland if (!dev_priv->fake_dma.virtual) { 812145132Sanholt DRM_ERROR("could not allocate faked DMA buffer!\n"); 813145132Sanholt savage_do_cleanup_bci(dev); 814182080Srnoland return -ENOMEM; 815145132Sanholt } 816145132Sanholt dev_priv->cmd_dma = &dev_priv->fake_dma; 817145132Sanholt dev_priv->dma_flush = savage_fake_dma_flush; 818145132Sanholt } 819145132Sanholt 820145132Sanholt dev_priv->sarea_priv = 821207066Srnoland (drm_savage_sarea_t *)((uint8_t *)dev_priv->sarea->virtual + 822145132Sanholt init->sarea_priv_offset); 823145132Sanholt 824145132Sanholt /* setup bitmap descriptors */ 825145132Sanholt { 826145132Sanholt unsigned int color_tile_format; 827145132Sanholt unsigned int depth_tile_format; 828145132Sanholt unsigned int front_stride, back_stride, depth_stride; 829145132Sanholt if (dev_priv->chipset <= S3_SAVAGE4) { 830145132Sanholt color_tile_format = dev_priv->fb_bpp == 16 ? 831145132Sanholt SAVAGE_BD_TILE_16BPP : SAVAGE_BD_TILE_32BPP; 832145132Sanholt depth_tile_format = dev_priv->depth_bpp == 16 ? 833145132Sanholt SAVAGE_BD_TILE_16BPP : SAVAGE_BD_TILE_32BPP; 834145132Sanholt } else { 835145132Sanholt color_tile_format = SAVAGE_BD_TILE_DEST; 836145132Sanholt depth_tile_format = SAVAGE_BD_TILE_DEST; 837145132Sanholt } 838157617Sanholt front_stride = dev_priv->front_pitch / (dev_priv->fb_bpp / 8); 839182080Srnoland back_stride = dev_priv->back_pitch / (dev_priv->fb_bpp / 8); 840182080Srnoland depth_stride = 841157617Sanholt dev_priv->depth_pitch / (dev_priv->depth_bpp / 8); 842145132Sanholt 843145132Sanholt dev_priv->front_bd = front_stride | SAVAGE_BD_BW_DISABLE | 844145132Sanholt (dev_priv->fb_bpp << SAVAGE_BD_BPP_SHIFT) | 845145132Sanholt (color_tile_format << SAVAGE_BD_TILE_SHIFT); 846145132Sanholt 847145132Sanholt dev_priv-> back_bd = back_stride | SAVAGE_BD_BW_DISABLE | 848145132Sanholt (dev_priv->fb_bpp << SAVAGE_BD_BPP_SHIFT) | 849145132Sanholt (color_tile_format << SAVAGE_BD_TILE_SHIFT); 850145132Sanholt 851145132Sanholt dev_priv->depth_bd = depth_stride | SAVAGE_BD_BW_DISABLE | 852145132Sanholt (dev_priv->depth_bpp << SAVAGE_BD_BPP_SHIFT) | 853145132Sanholt (depth_tile_format << SAVAGE_BD_TILE_SHIFT); 854145132Sanholt } 855145132Sanholt 856145132Sanholt /* setup status and bci ptr */ 857145132Sanholt dev_priv->event_counter = 0; 858145132Sanholt dev_priv->event_wrap = 0; 859145132Sanholt dev_priv->bci_ptr = (volatile uint32_t *) 860207066Srnoland ((uint8_t *)dev_priv->mmio->virtual + SAVAGE_BCI_OFFSET); 861145132Sanholt if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 862145132Sanholt dev_priv->status_used_mask = SAVAGE_FIFO_USED_MASK_S3D; 863145132Sanholt } else { 864145132Sanholt dev_priv->status_used_mask = SAVAGE_FIFO_USED_MASK_S4; 865145132Sanholt } 866145132Sanholt if (dev_priv->status != NULL) { 867145132Sanholt dev_priv->status_ptr = 868207066Srnoland (volatile uint32_t *)dev_priv->status->virtual; 869145132Sanholt dev_priv->wait_fifo = savage_bci_wait_fifo_shadow; 870145132Sanholt dev_priv->wait_evnt = savage_bci_wait_event_shadow; 871145132Sanholt dev_priv->status_ptr[1023] = dev_priv->event_counter; 872145132Sanholt } else { 873145132Sanholt dev_priv->status_ptr = NULL; 874145132Sanholt if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 875145132Sanholt dev_priv->wait_fifo = savage_bci_wait_fifo_s3d; 876145132Sanholt } else { 877145132Sanholt dev_priv->wait_fifo = savage_bci_wait_fifo_s4; 878145132Sanholt } 879145132Sanholt dev_priv->wait_evnt = savage_bci_wait_event_reg; 880145132Sanholt } 881145132Sanholt 882145132Sanholt /* cliprect functions */ 883145132Sanholt if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) 884145132Sanholt dev_priv->emit_clip_rect = savage_emit_clip_rect_s3d; 885145132Sanholt else 886145132Sanholt dev_priv->emit_clip_rect = savage_emit_clip_rect_s4; 887145132Sanholt 888145132Sanholt if (savage_freelist_init(dev) < 0) { 889145132Sanholt DRM_ERROR("could not initialize freelist\n"); 890145132Sanholt savage_do_cleanup_bci(dev); 891182080Srnoland return -ENOMEM; 892145132Sanholt } 893145132Sanholt 894182080Srnoland if (savage_dma_init(dev_priv) < 0) { 895145132Sanholt DRM_ERROR("could not initialize command DMA\n"); 896145132Sanholt savage_do_cleanup_bci(dev); 897182080Srnoland return -ENOMEM; 898145132Sanholt } 899145132Sanholt 900145132Sanholt return 0; 901145132Sanholt} 902145132Sanholt 903182080Srnolandstatic int savage_do_cleanup_bci(struct drm_device *dev) 904145132Sanholt{ 905145132Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 906145132Sanholt 907145132Sanholt if (dev_priv->cmd_dma == &dev_priv->fake_dma) { 908207066Srnoland if (dev_priv->fake_dma.virtual) 909207066Srnoland drm_free(dev_priv->fake_dma.virtual, 910145132Sanholt SAVAGE_FAKE_DMA_SIZE, DRM_MEM_DRIVER); 911207066Srnoland } else if (dev_priv->cmd_dma && dev_priv->cmd_dma->virtual && 912145132Sanholt dev_priv->cmd_dma->type == _DRM_AGP && 913145132Sanholt dev_priv->dma_type == SAVAGE_DMA_AGP) 914145132Sanholt drm_core_ioremapfree(dev_priv->cmd_dma, dev); 915145132Sanholt 916145132Sanholt if (dev_priv->dma_type == SAVAGE_DMA_AGP && 917207066Srnoland dev->agp_buffer_map && dev->agp_buffer_map->virtual) { 918145132Sanholt drm_core_ioremapfree(dev->agp_buffer_map, dev); 919145132Sanholt /* make sure the next instance (which may be running 920145132Sanholt * in PCI mode) doesn't try to use an old 921145132Sanholt * agp_buffer_map. */ 922145132Sanholt dev->agp_buffer_map = NULL; 923145132Sanholt } 924145132Sanholt 925145132Sanholt if (dev_priv->dma_pages) 926145132Sanholt drm_free(dev_priv->dma_pages, 927145132Sanholt sizeof(drm_savage_dma_page_t)*dev_priv->nr_dma_pages, 928145132Sanholt DRM_MEM_DRIVER); 929145132Sanholt 930145132Sanholt return 0; 931145132Sanholt} 932145132Sanholt 933182080Srnolandstatic int savage_bci_init(struct drm_device *dev, void *data, struct drm_file *file_priv) 934145132Sanholt{ 935182080Srnoland drm_savage_init_t *init = data; 936145132Sanholt 937182080Srnoland LOCK_TEST_WITH_RETURN(dev, file_priv); 938145132Sanholt 939182080Srnoland switch (init->func) { 940145132Sanholt case SAVAGE_INIT_BCI: 941182080Srnoland return savage_do_init_bci(dev, init); 942145132Sanholt case SAVAGE_CLEANUP_BCI: 943145132Sanholt return savage_do_cleanup_bci(dev); 944145132Sanholt } 945145132Sanholt 946182080Srnoland return -EINVAL; 947145132Sanholt} 948145132Sanholt 949182080Srnolandstatic int savage_bci_event_emit(struct drm_device *dev, void *data, struct drm_file *file_priv) 950145132Sanholt{ 951145132Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 952182080Srnoland drm_savage_event_emit_t *event = data; 953145132Sanholt 954145132Sanholt DRM_DEBUG("\n"); 955145132Sanholt 956182080Srnoland LOCK_TEST_WITH_RETURN(dev, file_priv); 957145132Sanholt 958182080Srnoland event->count = savage_bci_emit_event(dev_priv, event->flags); 959182080Srnoland event->count |= dev_priv->event_wrap << 16; 960145132Sanholt 961145132Sanholt return 0; 962145132Sanholt} 963145132Sanholt 964182080Srnolandstatic int savage_bci_event_wait(struct drm_device *dev, void *data, struct drm_file *file_priv) 965145132Sanholt{ 966145132Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 967182080Srnoland drm_savage_event_wait_t *event = data; 968145132Sanholt unsigned int event_e, hw_e; 969145132Sanholt unsigned int event_w, hw_w; 970145132Sanholt 971145132Sanholt DRM_DEBUG("\n"); 972145132Sanholt 973145132Sanholt UPDATE_EVENT_COUNTER(); 974145132Sanholt if (dev_priv->status_ptr) 975145132Sanholt hw_e = dev_priv->status_ptr[1] & 0xffff; 976145132Sanholt else 977145132Sanholt hw_e = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff; 978145132Sanholt hw_w = dev_priv->event_wrap; 979145132Sanholt if (hw_e > dev_priv->event_counter) 980145132Sanholt hw_w--; /* hardware hasn't passed the last wrap yet */ 981145132Sanholt 982182080Srnoland event_e = event->count & 0xffff; 983182080Srnoland event_w = event->count >> 16; 984145132Sanholt 985145132Sanholt /* Don't need to wait if 986145132Sanholt * - event counter wrapped since the event was emitted or 987145132Sanholt * - the hardware has advanced up to or over the event to wait for. 988145132Sanholt */ 989182080Srnoland if (event_w < hw_w || (event_w == hw_w && event_e <= hw_e)) 990145132Sanholt return 0; 991145132Sanholt else 992145132Sanholt return dev_priv->wait_evnt(dev_priv, event_e); 993145132Sanholt} 994145132Sanholt 995145132Sanholt/* 996145132Sanholt * DMA buffer management 997145132Sanholt */ 998145132Sanholt 999182080Srnolandstatic int savage_bci_get_buffers(struct drm_device *dev, 1000182080Srnoland struct drm_file *file_priv, 1001182080Srnoland struct drm_dma *d) 1002145132Sanholt{ 1003182080Srnoland struct drm_buf *buf; 1004145132Sanholt int i; 1005145132Sanholt 1006145132Sanholt for (i = d->granted_count; i < d->request_count; i++) { 1007145132Sanholt buf = savage_freelist_get(dev); 1008145132Sanholt if (!buf) 1009182080Srnoland return -EAGAIN; 1010145132Sanholt 1011182080Srnoland buf->file_priv = file_priv; 1012145132Sanholt 1013145132Sanholt if (DRM_COPY_TO_USER(&d->request_indices[i], 1014145132Sanholt &buf->idx, sizeof(buf->idx))) 1015182080Srnoland return -EFAULT; 1016145132Sanholt if (DRM_COPY_TO_USER(&d->request_sizes[i], 1017145132Sanholt &buf->total, sizeof(buf->total))) 1018182080Srnoland return -EFAULT; 1019145132Sanholt 1020145132Sanholt d->granted_count++; 1021145132Sanholt } 1022145132Sanholt return 0; 1023145132Sanholt} 1024145132Sanholt 1025182080Srnolandint savage_bci_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv) 1026145132Sanholt{ 1027182080Srnoland struct drm_device_dma *dma = dev->dma; 1028182080Srnoland struct drm_dma *d = data; 1029145132Sanholt int ret = 0; 1030145132Sanholt 1031182080Srnoland LOCK_TEST_WITH_RETURN(dev, file_priv); 1032145132Sanholt 1033145132Sanholt /* Please don't send us buffers. 1034145132Sanholt */ 1035182080Srnoland if (d->send_count != 0) { 1036145132Sanholt DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n", 1037182080Srnoland DRM_CURRENTPID, d->send_count); 1038182080Srnoland return -EINVAL; 1039145132Sanholt } 1040145132Sanholt 1041145132Sanholt /* We'll send you buffers. 1042145132Sanholt */ 1043182080Srnoland if (d->request_count < 0 || d->request_count > dma->buf_count) { 1044145132Sanholt DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n", 1045182080Srnoland DRM_CURRENTPID, d->request_count, dma->buf_count); 1046182080Srnoland return -EINVAL; 1047145132Sanholt } 1048145132Sanholt 1049182080Srnoland d->granted_count = 0; 1050145132Sanholt 1051182080Srnoland if (d->request_count) { 1052182080Srnoland ret = savage_bci_get_buffers(dev, file_priv, d); 1053145132Sanholt } 1054145132Sanholt 1055145132Sanholt return ret; 1056145132Sanholt} 1057145132Sanholt 1058182080Srnolandvoid savage_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv) 1059157617Sanholt{ 1060182080Srnoland struct drm_device_dma *dma = dev->dma; 1061145132Sanholt drm_savage_private_t *dev_priv = dev->dev_private; 1062145132Sanholt int i; 1063145132Sanholt 1064145132Sanholt if (!dma) 1065145132Sanholt return; 1066145132Sanholt if (!dev_priv) 1067145132Sanholt return; 1068145132Sanholt if (!dma->buflist) 1069145132Sanholt return; 1070145132Sanholt 1071145132Sanholt for (i = 0; i < dma->buf_count; i++) { 1072182080Srnoland struct drm_buf *buf = dma->buflist[i]; 1073145132Sanholt drm_savage_buf_priv_t *buf_priv = buf->dev_private; 1074145132Sanholt 1075182080Srnoland if (buf->file_priv == file_priv && buf_priv && 1076145132Sanholt buf_priv->next == NULL && buf_priv->prev == NULL) { 1077145132Sanholt uint16_t event; 1078145132Sanholt DRM_DEBUG("reclaimed from client\n"); 1079145132Sanholt event = savage_bci_emit_event(dev_priv, SAVAGE_WAIT_3D); 1080145132Sanholt SET_AGE(&buf_priv->age, event, dev_priv->event_wrap); 1081145132Sanholt savage_freelist_put(dev, buf); 1082145132Sanholt } 1083145132Sanholt } 1084145132Sanholt 1085182080Srnoland drm_core_reclaim_buffers(dev, file_priv); 1086145132Sanholt} 1087152909Sanholt 1088182080Srnolandstruct drm_ioctl_desc savage_ioctls[] = { 1089182080Srnoland DRM_IOCTL_DEF(DRM_SAVAGE_BCI_INIT, savage_bci_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1090182080Srnoland DRM_IOCTL_DEF(DRM_SAVAGE_BCI_CMDBUF, savage_bci_cmdbuf, DRM_AUTH), 1091182080Srnoland DRM_IOCTL_DEF(DRM_SAVAGE_BCI_EVENT_EMIT, savage_bci_event_emit, DRM_AUTH), 1092182080Srnoland DRM_IOCTL_DEF(DRM_SAVAGE_BCI_EVENT_WAIT, savage_bci_event_wait, DRM_AUTH), 1093152909Sanholt}; 1094152909Sanholt 1095152909Sanholtint savage_max_ioctl = DRM_ARRAY_SIZE(savage_ioctls); 1096