1/* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
2 */
3/*-
4 * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
5 *
6 * The Weather Channel (TM) funded Tungsten Graphics to develop the
7 * initial release of the Radeon 8500 driver under the XFree86 license.
8 * This notice must be preserved.
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
16 *
17 * The above copyright notice and this permission notice (including the next
18 * paragraph) shall be included in all copies or substantial portions of the
19 * Software.
20 *
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
24 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
25 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
26 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27 * DEALINGS IN THE SOFTWARE.
28 *
29 * Authors:
30 *    Keith Whitwell <keith@tungstengraphics.com>
31 *    Eric Anholt <anholt@FreeBSD.org>
32 */
33
34#include <sys/cdefs.h>
35__FBSDID("$FreeBSD$");
36
37#include "dev/drm/drmP.h"
38#include "dev/drm/drm.h"
39#include "dev/drm/mga_drm.h"
40#include "dev/drm/mga_drv.h"
41
42u32 mga_get_vblank_counter(struct drm_device *dev, int crtc)
43{
44	const drm_mga_private_t *const dev_priv =
45		(drm_mga_private_t *) dev->dev_private;
46
47	if (crtc != 0) {
48		return 0;
49	}
50
51
52	return atomic_read(&dev_priv->vbl_received);
53}
54
55
56irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
57{
58	struct drm_device *dev = (struct drm_device *) arg;
59	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
60	int status;
61	int handled = 0;
62
63	status = MGA_READ(MGA_STATUS);
64
65	/* VBLANK interrupt */
66	if (status & MGA_VLINEPEN) {
67		MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
68		atomic_inc(&dev_priv->vbl_received);
69		drm_handle_vblank(dev, 0);
70		handled = 1;
71	}
72
73	/* SOFTRAP interrupt */
74	if (status & MGA_SOFTRAPEN) {
75		const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
76		const u32 prim_end = MGA_READ(MGA_PRIMEND);
77
78
79		MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
80
81		/* In addition to clearing the interrupt-pending bit, we
82		 * have to write to MGA_PRIMEND to re-start the DMA operation.
83		 */
84		if ((prim_start & ~0x03) != (prim_end & ~0x03)) {
85			MGA_WRITE(MGA_PRIMEND, prim_end);
86		}
87
88		atomic_inc(&dev_priv->last_fence_retired);
89		DRM_WAKEUP(&dev_priv->fence_queue);
90		handled = 1;
91	}
92
93	if (handled)
94		return IRQ_HANDLED;
95	return IRQ_NONE;
96}
97
98int mga_enable_vblank(struct drm_device *dev, int crtc)
99{
100	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
101
102	if (crtc != 0) {
103		DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
104			  crtc);
105		return 0;
106	}
107
108	MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
109	return 0;
110}
111
112
113void mga_disable_vblank(struct drm_device *dev, int crtc)
114{
115	if (crtc != 0) {
116		DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
117			  crtc);
118	}
119
120	/* Do *NOT* disable the vertical refresh interrupt.  MGA doesn't have
121	 * a nice hardware counter that tracks the number of refreshes when
122	 * the interrupt is disabled, and the kernel doesn't know the refresh
123	 * rate to calculate an estimate.
124	 */
125	/* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
126}
127
128int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence)
129{
130	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
131	unsigned int cur_fence;
132	int ret = 0;
133
134	/* Assume that the user has missed the current sequence number
135	 * by about a day rather than she wants to wait for years
136	 * using fences.
137	 */
138	DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ,
139		    (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
140		      - *sequence) <= (1 << 23)));
141
142	if (ret == -ERESTART)
143		DRM_DEBUG("restarting syscall\n");
144
145	*sequence = cur_fence;
146
147	return ret;
148}
149
150void mga_driver_irq_preinstall(struct drm_device * dev)
151{
152	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
153
154	/* Disable *all* interrupts */
155	MGA_WRITE(MGA_IEN, 0);
156	/* Clear bits if they're already high */
157	MGA_WRITE(MGA_ICLEAR, ~0);
158}
159
160int mga_driver_irq_postinstall(struct drm_device * dev)
161{
162	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
163
164	DRM_INIT_WAITQUEUE(&dev_priv->fence_queue);
165
166	/* Turn on soft trap interrupt.  Vertical blank interrupts are enabled
167	 * in mga_enable_vblank.
168	 */
169	MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
170	return 0;
171}
172
173void mga_driver_irq_uninstall(struct drm_device * dev)
174{
175	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
176	if (!dev_priv)
177		return;
178
179	/* Disable *all* interrupts */
180	MGA_WRITE(MGA_IEN, 0);
181
182	dev->irq_enabled = 0;
183}
184