1/*- 2 * Copyright (c) 1997,1998 Maxim Bolotin and Oleg Sharoiko. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: stable/11/sys/dev/cs/if_cs.c 347962 2019-05-18 20:43:13Z brooks $"); 31 32/* 33 * 34 * Device driver for Crystal Semiconductor CS8920 based ethernet 35 * adapters. By Maxim Bolotin and Oleg Sharoiko, 27-April-1997 36 */ 37 38/* 39#define CS_DEBUG 40 */ 41 42#include <sys/param.h> 43#include <sys/systm.h> 44#include <sys/malloc.h> 45#include <sys/mbuf.h> 46#include <sys/socket.h> 47#include <sys/sockio.h> 48#include <sys/kernel.h> 49#include <sys/sysctl.h> 50#include <sys/syslog.h> 51 52#include <sys/module.h> 53#include <sys/bus.h> 54#include <machine/bus.h> 55#include <sys/rman.h> 56#include <machine/resource.h> 57 58#include <net/if.h> 59#include <net/if_var.h> 60#include <net/if_arp.h> 61#include <net/if_dl.h> 62#include <net/if_media.h> 63#include <net/if_types.h> 64#include <net/ethernet.h> 65#include <net/bpf.h> 66 67#include <dev/cs/if_csvar.h> 68#include <dev/cs/if_csreg.h> 69 70#ifdef CS_USE_64K_DMA 71#define CS_DMA_BUFFER_SIZE 65536 72#else 73#define CS_DMA_BUFFER_SIZE 16384 74#endif 75 76static void cs_init(void *); 77static void cs_init_locked(struct cs_softc *); 78static int cs_ioctl(struct ifnet *, u_long, caddr_t); 79static void cs_start(struct ifnet *); 80static void cs_start_locked(struct ifnet *); 81static void cs_stop(struct cs_softc *); 82static void cs_reset(struct cs_softc *); 83static void cs_watchdog(void *); 84 85static int cs_mediachange(struct ifnet *); 86static void cs_mediastatus(struct ifnet *, struct ifmediareq *); 87static int cs_mediaset(struct cs_softc *, int); 88 89static void cs_write_mbufs(struct cs_softc*, struct mbuf*); 90static void cs_xmit_buf(struct cs_softc*); 91static int cs_get_packet(struct cs_softc*); 92static void cs_setmode(struct cs_softc*); 93 94static int get_eeprom_data(struct cs_softc *sc, int, int, uint16_t *); 95static int get_eeprom_cksum(int, int, uint16_t *); 96static int wait_eeprom_ready( struct cs_softc *); 97static void control_dc_dc( struct cs_softc *, int ); 98static int enable_tp(struct cs_softc *); 99static int enable_aui(struct cs_softc *); 100static int enable_bnc(struct cs_softc *); 101static int cs_duplex_auto(struct cs_softc *); 102 103devclass_t cs_devclass; 104driver_intr_t csintr; 105 106/* sysctl vars */ 107static SYSCTL_NODE(_hw, OID_AUTO, cs, CTLFLAG_RD, 0, "cs device parameters"); 108 109int cs_ignore_cksum_failure = 0; 110SYSCTL_INT(_hw_cs, OID_AUTO, ignore_checksum_failure, CTLFLAG_RWTUN, 111 &cs_ignore_cksum_failure, 0, 112 "ignore checksum errors in cs card EEPROM"); 113 114static int cs_recv_delay = 570; 115SYSCTL_INT(_hw_cs, OID_AUTO, recv_delay, CTLFLAG_RWTUN, &cs_recv_delay, 570, ""); 116 117static int cs8900_eeint2irq[16] = { 118 10, 11, 12, 5, 255, 255, 255, 255, 119 255, 255, 255, 255, 255, 255, 255, 255 120}; 121 122static int cs8900_irq2eeint[16] = { 123 255, 255, 255, 255, 255, 3, 255, 255, 124 255, 0, 1, 2, 255, 255, 255, 255 125}; 126 127static int 128get_eeprom_data(struct cs_softc *sc, int off, int len, uint16_t *buffer) 129{ 130 int i; 131 132#ifdef CS_DEBUG 133 device_printf(sc->dev, "EEPROM data from %x for %x:\n", off, len); 134#endif 135 for (i=0; i < len; i++) { 136 if (wait_eeprom_ready(sc) < 0) 137 return (-1); 138 /* Send command to EEPROM to read */ 139 cs_writereg(sc, PP_EECMD, (off + i) | EEPROM_READ_CMD); 140 if (wait_eeprom_ready(sc) < 0) 141 return (-1); 142 buffer[i] = cs_readreg(sc, PP_EEData); 143 144#ifdef CS_DEBUG 145 printf("%04x ",buffer[i]); 146#endif 147 } 148 149#ifdef CS_DEBUG 150 printf("\n"); 151#endif 152 return (0); 153} 154 155static int 156get_eeprom_cksum(int off, int len, uint16_t *buffer) 157{ 158 int i; 159 uint16_t cksum=0; 160 161 for (i = 0; i < len; i++) 162 cksum += buffer[i]; 163 cksum &= 0xffff; 164 if (cksum == 0 || cs_ignore_cksum_failure) 165 return (0); 166 return (-1); 167} 168 169static int 170wait_eeprom_ready(struct cs_softc *sc) 171{ 172 int i; 173 174 /* 175 * From the CS8900A datasheet, section 3.5.2: 176 * "Before issuing any command to the EEPROM, the host must wait 177 * for the SIBUSY bit (Register 16, SelfST, bit 8) to clear. After 178 * each command has been issued, the host must wait again for SIBUSY 179 * to clear." 180 * 181 * Before we issue the command, we should be !busy, so that will 182 * be fast. The datasheet suggests that clock out from the part 183 * per word will be on the order of 25us, which is consistent with 184 * the 1MHz serial clock and 16bits... We should never hit 100, 185 * let alone 15,000 here. The original code did an unconditional 186 * 30ms DELAY here. Bad Kharma. cs_readreg takes ~2us. 187 */ 188 for (i = 0; i < 15000; i++) /* 30ms max */ 189 if (!(cs_readreg(sc, PP_SelfST) & SI_BUSY)) 190 return (0); 191 return (1); 192} 193 194static void 195control_dc_dc(struct cs_softc *sc, int on_not_off) 196{ 197 unsigned int self_control = HCB1_ENBL; 198 199 if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0) ^ on_not_off) 200 self_control |= HCB1; 201 else 202 self_control &= ~HCB1; 203 cs_writereg(sc, PP_SelfCTL, self_control); 204 DELAY(500000); /* Bad! */ 205} 206 207 208static int 209cs_duplex_auto(struct cs_softc *sc) 210{ 211 int i, error=0; 212 213 cs_writereg(sc, PP_AutoNegCTL, 214 RE_NEG_NOW | ALLOW_FDX | AUTO_NEG_ENABLE); 215 for (i=0; cs_readreg(sc, PP_AutoNegST) & AUTO_NEG_BUSY; i++) { 216 if (i > 4000) { 217 device_printf(sc->dev, 218 "full/half duplex auto negotiation timeout\n"); 219 error = ETIMEDOUT; 220 break; 221 } 222 DELAY(1000); 223 } 224 return (error); 225} 226 227static int 228enable_tp(struct cs_softc *sc) 229{ 230 231 cs_writereg(sc, PP_LineCTL, sc->line_ctl & ~AUI_ONLY); 232 control_dc_dc(sc, 0); 233 return (0); 234} 235 236static int 237enable_aui(struct cs_softc *sc) 238{ 239 240 cs_writereg(sc, PP_LineCTL, 241 (sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY); 242 control_dc_dc(sc, 0); 243 return (0); 244} 245 246static int 247enable_bnc(struct cs_softc *sc) 248{ 249 250 cs_writereg(sc, PP_LineCTL, 251 (sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY); 252 control_dc_dc(sc, 1); 253 return (0); 254} 255 256int 257cs_cs89x0_probe(device_t dev) 258{ 259 int i; 260 int error; 261 rman_res_t irq, junk; 262 struct cs_softc *sc = device_get_softc(dev); 263 unsigned rev_type = 0; 264 uint16_t id; 265 char chip_revision; 266 uint16_t eeprom_buff[CHKSUM_LEN]; 267 int chip_type, pp_isaint; 268 269 sc->dev = dev; 270 error = cs_alloc_port(dev, 0, CS_89x0_IO_PORTS); 271 if (error) 272 return (error); 273 274 if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG) { 275 /* Chip not detected. Let's try to reset it */ 276 if (bootverbose) 277 device_printf(dev, "trying to reset the chip.\n"); 278 cs_outw(sc, ADD_PORT, PP_SelfCTL); 279 i = cs_inw(sc, DATA_PORT); 280 cs_outw(sc, ADD_PORT, PP_SelfCTL); 281 cs_outw(sc, DATA_PORT, i | POWER_ON_RESET); 282 if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG) 283 return (ENXIO); 284 } 285 286 for (i = 0; i < 10000; i++) { 287 id = cs_readreg(sc, PP_ChipID); 288 if (id == CHIP_EISA_ID_SIG) 289 break; 290 } 291 if (i == 10000) 292 return (ENXIO); 293 294 rev_type = cs_readreg(sc, PRODUCT_ID_ADD); 295 chip_type = rev_type & ~REVISON_BITS; 296 chip_revision = ((rev_type & REVISON_BITS) >> 8) + 'A'; 297 298 sc->chip_type = chip_type; 299 300 if (chip_type == CS8900) { 301 pp_isaint = PP_CS8900_ISAINT; 302 sc->send_cmd = TX_CS8900_AFTER_ALL; 303 } else { 304 pp_isaint = PP_CS8920_ISAINT; 305 sc->send_cmd = TX_CS8920_AFTER_ALL; 306 } 307 308 /* 309 * Clear some fields so that fail of EEPROM will left them clean 310 */ 311 sc->auto_neg_cnf = 0; 312 sc->adapter_cnf = 0; 313 sc->isa_config = 0; 314 315 /* 316 * If no interrupt specified, use what the board tells us. 317 */ 318 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk); 319 320 /* 321 * Get data from EEPROM 322 */ 323 if((cs_readreg(sc, PP_SelfST) & EEPROM_PRESENT) == 0) { 324 device_printf(dev, "No EEPROM, assuming defaults.\n"); 325 } else if (get_eeprom_data(sc,START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) { 326 device_printf(dev, "EEPROM read failed, assuming defaults.\n"); 327 } else if (get_eeprom_cksum(START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) { 328 device_printf(dev, "EEPROM cheksum bad, assuming defaults.\n"); 329 } else { 330 sc->auto_neg_cnf = eeprom_buff[AUTO_NEG_CNF_OFFSET]; 331 sc->adapter_cnf = eeprom_buff[ADAPTER_CNF_OFFSET]; 332 sc->isa_config = eeprom_buff[ISA_CNF_OFFSET]; 333 for (i=0; i<ETHER_ADDR_LEN/2; i++) { 334 sc->enaddr[i*2] = eeprom_buff[i]; 335 sc->enaddr[i*2+1] = eeprom_buff[i] >> 8; 336 } 337 /* 338 * If no interrupt specified, use what the 339 * board tells us. 340 */ 341 if (error) { 342 irq = sc->isa_config & INT_NO_MASK; 343 error = 0; 344 if (chip_type == CS8900) { 345 irq = cs8900_eeint2irq[irq]; 346 } else { 347 if (irq > CS8920_NO_INTS) 348 irq = 255; 349 } 350 if (irq == 255) { 351 device_printf(dev, "invalid irq in EEPROM.\n"); 352 error = EINVAL; 353 } 354 if (!error) 355 bus_set_resource(dev, SYS_RES_IRQ, 0, 356 irq, 1); 357 } 358 } 359 360 if (!error && !(sc->flags & CS_NO_IRQ)) { 361 if (chip_type == CS8900) { 362 if (irq < 16) 363 irq = cs8900_irq2eeint[irq]; 364 else 365 irq = 255; 366 } else { 367 if (irq > CS8920_NO_INTS) 368 irq = 255; 369 } 370 if (irq == 255) 371 error = EINVAL; 372 } 373 374 if (error) { 375 device_printf(dev, "Unknown or invalid irq\n"); 376 return (error); 377 } 378 379 if (!(sc->flags & CS_NO_IRQ)) 380 cs_writereg(sc, pp_isaint, irq); 381 382 if (bootverbose) 383 device_printf(dev, "CS89%c0%s rev %c media%s%s%s\n", 384 chip_type == CS8900 ? '0' : '2', 385 chip_type == CS8920M ? "M" : "", 386 chip_revision, 387 (sc->adapter_cnf & A_CNF_10B_T) ? " TP" : "", 388 (sc->adapter_cnf & A_CNF_AUI) ? " AUI" : "", 389 (sc->adapter_cnf & A_CNF_10B_2) ? " BNC" : ""); 390 391 if ((sc->adapter_cnf & A_CNF_EXTND_10B_2) && 392 (sc->adapter_cnf & A_CNF_LOW_RX_SQUELCH)) 393 sc->line_ctl = LOW_RX_SQUELCH; 394 else 395 sc->line_ctl = 0; 396 397 return (0); 398} 399 400/* 401 * Allocate a port resource with the given resource id. 402 */ 403int 404cs_alloc_port(device_t dev, int rid, int size) 405{ 406 struct cs_softc *sc = device_get_softc(dev); 407 struct resource *res; 408 409 res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, &rid, 410 size, RF_ACTIVE); 411 if (res == NULL) 412 return (ENOENT); 413 sc->port_rid = rid; 414 sc->port_res = res; 415 return (0); 416} 417 418/* 419 * Allocate an irq resource with the given resource id. 420 */ 421int 422cs_alloc_irq(device_t dev, int rid) 423{ 424 struct cs_softc *sc = device_get_softc(dev); 425 struct resource *res; 426 427 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); 428 if (res == NULL) 429 return (ENOENT); 430 sc->irq_rid = rid; 431 sc->irq_res = res; 432 return (0); 433} 434 435/* 436 * Release all resources 437 */ 438void 439cs_release_resources(device_t dev) 440{ 441 struct cs_softc *sc = device_get_softc(dev); 442 443 if (sc->port_res) { 444 bus_release_resource(dev, SYS_RES_IOPORT, 445 sc->port_rid, sc->port_res); 446 sc->port_res = 0; 447 } 448 if (sc->irq_res) { 449 bus_release_resource(dev, SYS_RES_IRQ, 450 sc->irq_rid, sc->irq_res); 451 sc->irq_res = 0; 452 } 453} 454 455/* 456 * Install the interface into kernel networking data structures 457 */ 458int 459cs_attach(device_t dev) 460{ 461 int error, media=0; 462 struct cs_softc *sc = device_get_softc(dev); 463 struct ifnet *ifp; 464 465 sc->dev = dev; 466 467 ifp = sc->ifp = if_alloc(IFT_ETHER); 468 if (ifp == NULL) { 469 device_printf(dev, "can not if_alloc()\n"); 470 cs_release_resources(dev); 471 return (ENOMEM); 472 } 473 474 mtx_init(&sc->lock, device_get_nameunit(dev), MTX_NETWORK_LOCK, 475 MTX_DEF); 476 callout_init_mtx(&sc->timer, &sc->lock, 0); 477 478 CS_LOCK(sc); 479 cs_stop(sc); 480 CS_UNLOCK(sc); 481 482 ifp->if_softc=sc; 483 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 484 ifp->if_start=cs_start; 485 ifp->if_ioctl=cs_ioctl; 486 ifp->if_init=cs_init; 487 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 488 489 ifp->if_flags=(IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 490 491 /* 492 * this code still in progress (DMA support) 493 * 494 495 sc->recv_ring=malloc(CS_DMA_BUFFER_SIZE<<1, M_DEVBUF, M_NOWAIT); 496 if (sc->recv_ring == NULL) { 497 log(LOG_ERR, 498 "%s: Couldn't allocate memory for NIC\n", ifp->if_xname); 499 return(0); 500 } 501 if ((sc->recv_ring-(sc->recv_ring & 0x1FFFF)) 502 < (128*1024-CS_DMA_BUFFER_SIZE)) 503 sc->recv_ring+=16*1024; 504 505 */ 506 507 sc->buffer=malloc(ETHER_MAX_LEN-ETHER_CRC_LEN,M_DEVBUF,M_NOWAIT); 508 if (sc->buffer == NULL) { 509 device_printf(sc->dev, "Couldn't allocate memory for NIC\n"); 510 if_free(ifp); 511 mtx_destroy(&sc->lock); 512 cs_release_resources(dev); 513 return(ENOMEM); 514 } 515 516 /* 517 * Initialize the media structures. 518 */ 519 ifmedia_init(&sc->media, 0, cs_mediachange, cs_mediastatus); 520 521 if (sc->adapter_cnf & A_CNF_10B_T) { 522 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL); 523 if (sc->chip_type != CS8900) { 524 ifmedia_add(&sc->media, 525 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 526 ifmedia_add(&sc->media, 527 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 528 } 529 } 530 531 if (sc->adapter_cnf & A_CNF_10B_2) 532 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_2, 0, NULL); 533 534 if (sc->adapter_cnf & A_CNF_AUI) 535 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_5, 0, NULL); 536 537 if (sc->adapter_cnf & A_CNF_MEDIA) 538 ifmedia_add(&sc->media, IFM_ETHER|IFM_AUTO, 0, NULL); 539 540 /* Set default media from EEPROM */ 541 switch (sc->adapter_cnf & A_CNF_MEDIA_TYPE) { 542 case A_CNF_MEDIA_AUTO: media = IFM_ETHER|IFM_AUTO; break; 543 case A_CNF_MEDIA_10B_T: media = IFM_ETHER|IFM_10_T; break; 544 case A_CNF_MEDIA_10B_2: media = IFM_ETHER|IFM_10_2; break; 545 case A_CNF_MEDIA_AUI: media = IFM_ETHER|IFM_10_5; break; 546 default: 547 device_printf(sc->dev, "no media, assuming 10baseT\n"); 548 sc->adapter_cnf |= A_CNF_10B_T; 549 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL); 550 if (sc->chip_type != CS8900) { 551 ifmedia_add(&sc->media, 552 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 553 ifmedia_add(&sc->media, 554 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 555 } 556 media = IFM_ETHER | IFM_10_T; 557 break; 558 } 559 ifmedia_set(&sc->media, media); 560 cs_mediaset(sc, media); 561 562 ether_ifattach(ifp, sc->enaddr); 563 564 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, 565 NULL, csintr, sc, &sc->irq_handle); 566 if (error) { 567 ether_ifdetach(ifp); 568 free(sc->buffer, M_DEVBUF); 569 if_free(ifp); 570 mtx_destroy(&sc->lock); 571 cs_release_resources(dev); 572 return (error); 573 } 574 575 gone_by_fcp101_dev(dev); 576 577 return (0); 578} 579 580int 581cs_detach(device_t dev) 582{ 583 struct cs_softc *sc; 584 struct ifnet *ifp; 585 586 sc = device_get_softc(dev); 587 ifp = sc->ifp; 588 589 CS_LOCK(sc); 590 cs_stop(sc); 591 CS_UNLOCK(sc); 592 callout_drain(&sc->timer); 593 ether_ifdetach(ifp); 594 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle); 595 cs_release_resources(dev); 596 free(sc->buffer, M_DEVBUF); 597 if_free(ifp); 598 mtx_destroy(&sc->lock); 599 return (0); 600} 601 602/* 603 * Initialize the board 604 */ 605static void 606cs_init(void *xsc) 607{ 608 struct cs_softc *sc=(struct cs_softc *)xsc; 609 610 CS_LOCK(sc); 611 cs_init_locked(sc); 612 CS_UNLOCK(sc); 613} 614 615static void 616cs_init_locked(struct cs_softc *sc) 617{ 618 struct ifnet *ifp = sc->ifp; 619 int i, rx_cfg; 620 621 /* 622 * reset watchdog timer 623 */ 624 sc->tx_timeout = 0; 625 sc->buf_len = 0; 626 627 /* 628 * Hardware initialization of cs 629 */ 630 631 /* Enable receiver and transmitter */ 632 cs_writereg(sc, PP_LineCTL, 633 cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON | SERIAL_TX_ON); 634 635 /* Configure the receiver mode */ 636 cs_setmode(sc); 637 638 /* 639 * This defines what type of frames will cause interrupts 640 * Bad frames should generate interrupts so that the driver 641 * could track statistics of discarded packets 642 */ 643 rx_cfg = RX_OK_ENBL | RX_CRC_ERROR_ENBL | RX_RUNT_ENBL | 644 RX_EXTRA_DATA_ENBL; 645 if (sc->isa_config & STREAM_TRANSFER) 646 rx_cfg |= RX_STREAM_ENBL; 647 cs_writereg(sc, PP_RxCFG, rx_cfg); 648 cs_writereg(sc, PP_TxCFG, TX_LOST_CRS_ENBL | 649 TX_SQE_ERROR_ENBL | TX_OK_ENBL | TX_LATE_COL_ENBL | 650 TX_JBR_ENBL | TX_ANY_COL_ENBL | TX_16_COL_ENBL); 651 cs_writereg(sc, PP_BufCFG, READY_FOR_TX_ENBL | 652 RX_MISS_COUNT_OVRFLOW_ENBL | TX_COL_COUNT_OVRFLOW_ENBL | 653 TX_UNDERRUN_ENBL /*| RX_DMA_ENBL*/); 654 655 /* Write MAC address into IA filter */ 656 for (i=0; i<ETHER_ADDR_LEN/2; i++) 657 cs_writereg(sc, PP_IA + i * 2, 658 sc->enaddr[i * 2] | 659 (sc->enaddr[i * 2 + 1] << 8) ); 660 661 /* 662 * Now enable everything 663 */ 664/* 665#ifdef CS_USE_64K_DMA 666 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ | RX_DMA_SIZE_64K); 667#else 668 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ); 669#endif 670*/ 671 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ); 672 673 /* 674 * Set running and clear output active flags 675 */ 676 sc->ifp->if_drv_flags |= IFF_DRV_RUNNING; 677 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 678 callout_reset(&sc->timer, hz, cs_watchdog, sc); 679 680 /* 681 * Start sending process 682 */ 683 cs_start_locked(ifp); 684} 685 686/* 687 * Get the packet from the board and send it to the upper layer. 688 */ 689static int 690cs_get_packet(struct cs_softc *sc) 691{ 692 struct ifnet *ifp = sc->ifp; 693 int status, length; 694 struct mbuf *m; 695 696#ifdef CS_DEBUG 697 int i; 698#endif 699 700 status = cs_inw(sc, RX_FRAME_PORT); 701 length = cs_inw(sc, RX_FRAME_PORT); 702 703#ifdef CS_DEBUG 704 device_printf(sc->dev, "rcvd: stat %x, len %d\n", 705 status, length); 706#endif 707 708 if (!(status & RX_OK)) { 709#ifdef CS_DEBUG 710 device_printf(sc->dev, "bad pkt stat %x\n", status); 711#endif 712 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 713 return (-1); 714 } 715 716 MGETHDR(m, M_NOWAIT, MT_DATA); 717 if (m==NULL) 718 return (-1); 719 720 if (length > MHLEN) { 721 if (!(MCLGET(m, M_NOWAIT))) { 722 m_freem(m); 723 return (-1); 724 } 725 } 726 727 /* Initialize packet's header info */ 728 m->m_pkthdr.rcvif = ifp; 729 m->m_pkthdr.len = length; 730 m->m_len = length; 731 732 /* Get the data */ 733 bus_read_multi_2(sc->port_res, RX_FRAME_PORT, mtod(m, uint16_t *), 734 (length + 1) >> 1); 735 736#ifdef CS_DEBUG 737 for (i=0;i<length;i++) 738 printf(" %02x",(unsigned char)*((char *)(m->m_data+i))); 739 printf( "\n" ); 740#endif 741 742 if (status & (RX_IA | RX_BROADCAST) || 743 (ifp->if_flags & IFF_MULTICAST && status & RX_HASHED)) { 744 /* Feed the packet to the upper layer */ 745 (*ifp->if_input)(ifp, m); 746 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); 747 if (length == ETHER_MAX_LEN-ETHER_CRC_LEN) 748 DELAY(cs_recv_delay); 749 } else { 750 m_freem(m); 751 } 752 753 return (0); 754} 755 756/* 757 * Handle interrupts 758 */ 759void 760csintr(void *arg) 761{ 762 struct cs_softc *sc = (struct cs_softc*) arg; 763 struct ifnet *ifp = sc->ifp; 764 int status; 765 766#ifdef CS_DEBUG 767 device_printf(sc->dev, "Interrupt.\n"); 768#endif 769 770 CS_LOCK(sc); 771 while ((status=cs_inw(sc, ISQ_PORT))) { 772 773#ifdef CS_DEBUG 774 device_printf(sc->dev, "from ISQ: %04x\n", status); 775#endif 776 777 switch (status & ISQ_EVENT_MASK) { 778 case ISQ_RECEIVER_EVENT: 779 cs_get_packet(sc); 780 break; 781 782 case ISQ_TRANSMITTER_EVENT: 783 if (status & TX_OK) 784 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 785 else 786 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 787 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 788 sc->tx_timeout = 0; 789 break; 790 791 case ISQ_BUFFER_EVENT: 792 if (status & READY_FOR_TX) { 793 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 794 sc->tx_timeout = 0; 795 } 796 797 if (status & TX_UNDERRUN) { 798 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 799 sc->tx_timeout = 0; 800 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 801 } 802 break; 803 804 case ISQ_RX_MISS_EVENT: 805 if_inc_counter(ifp, IFCOUNTER_IERRORS, status >> 6); 806 break; 807 808 case ISQ_TX_COL_EVENT: 809 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, status >> 6); 810 break; 811 } 812 } 813 814 if (!(ifp->if_drv_flags & IFF_DRV_OACTIVE)) { 815 cs_start_locked(ifp); 816 } 817 CS_UNLOCK(sc); 818} 819 820/* 821 * Save the data in buffer 822 */ 823 824static void 825cs_write_mbufs( struct cs_softc *sc, struct mbuf *m ) 826{ 827 int len; 828 struct mbuf *mp; 829 unsigned char *data, *buf; 830 831 for (mp=m, buf=sc->buffer, sc->buf_len=0; mp != NULL; mp=mp->m_next) { 832 len = mp->m_len; 833 834 /* 835 * Ignore empty parts 836 */ 837 if (!len) 838 continue; 839 840 /* 841 * Find actual data address 842 */ 843 data = mtod(mp, caddr_t); 844 845 bcopy((caddr_t) data, (caddr_t) buf, len); 846 buf += len; 847 sc->buf_len += len; 848 } 849} 850 851 852static void 853cs_xmit_buf( struct cs_softc *sc ) 854{ 855 bus_write_multi_2(sc->port_res, TX_FRAME_PORT, (uint16_t *)sc->buffer, 856 (sc->buf_len + 1) >> 1); 857 sc->buf_len = 0; 858} 859 860static void 861cs_start(struct ifnet *ifp) 862{ 863 struct cs_softc *sc = ifp->if_softc; 864 865 CS_LOCK(sc); 866 cs_start_locked(ifp); 867 CS_UNLOCK(sc); 868} 869 870static void 871cs_start_locked(struct ifnet *ifp) 872{ 873 int length; 874 struct mbuf *m, *mp; 875 struct cs_softc *sc = ifp->if_softc; 876 877 for (;;) { 878 if (sc->buf_len) 879 length = sc->buf_len; 880 else { 881 IF_DEQUEUE( &ifp->if_snd, m ); 882 883 if (m==NULL) { 884 return; 885 } 886 887 for (length=0, mp=m; mp != NULL; mp=mp->m_next) 888 length += mp->m_len; 889 890 /* Skip zero-length packets */ 891 if (length == 0) { 892 m_freem(m); 893 continue; 894 } 895 896 cs_write_mbufs(sc, m); 897 898 BPF_MTAP(ifp, m); 899 900 m_freem(m); 901 } 902 903 /* 904 * Issue a SEND command 905 */ 906 cs_outw(sc, TX_CMD_PORT, sc->send_cmd); 907 cs_outw(sc, TX_LEN_PORT, length ); 908 909 /* 910 * If there's no free space in the buffer then leave 911 * this packet for the next time: indicate output active 912 * and return. 913 */ 914 if (!(cs_readreg(sc, PP_BusST) & READY_FOR_TX_NOW)) { 915 sc->tx_timeout = sc->buf_len; 916 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 917 return; 918 } 919 920 cs_xmit_buf(sc); 921 922 /* 923 * Set the watchdog timer in case we never hear 924 * from board again. (I don't know about correct 925 * value for this timeout) 926 */ 927 sc->tx_timeout = length; 928 929 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 930 return; 931 } 932} 933 934/* 935 * Stop everything on the interface 936 */ 937static void 938cs_stop(struct cs_softc *sc) 939{ 940 941 CS_ASSERT_LOCKED(sc); 942 cs_writereg(sc, PP_RxCFG, 0); 943 cs_writereg(sc, PP_TxCFG, 0); 944 cs_writereg(sc, PP_BufCFG, 0); 945 cs_writereg(sc, PP_BusCTL, 0); 946 947 sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 948 sc->tx_timeout = 0; 949 callout_stop(&sc->timer); 950} 951 952/* 953 * Reset the interface 954 */ 955static void 956cs_reset(struct cs_softc *sc) 957{ 958 959 CS_ASSERT_LOCKED(sc); 960 cs_stop(sc); 961 cs_init_locked(sc); 962} 963 964static uint16_t 965cs_hash_index(struct sockaddr_dl *addr) 966{ 967 uint32_t crc; 968 uint16_t idx; 969 caddr_t lla; 970 971 lla = LLADDR(addr); 972 crc = ether_crc32_le(lla, ETHER_ADDR_LEN); 973 idx = crc >> 26; 974 975 return (idx); 976} 977 978static void 979cs_setmode(struct cs_softc *sc) 980{ 981 int rx_ctl; 982 uint16_t af[4]; 983 uint16_t port, mask, index; 984 struct ifnet *ifp = sc->ifp; 985 struct ifmultiaddr *ifma; 986 987 /* Stop the receiver while changing filters */ 988 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) & ~SERIAL_RX_ON); 989 990 if (ifp->if_flags & IFF_PROMISC) { 991 /* Turn on promiscuous mode. */ 992 rx_ctl = RX_OK_ACCEPT | RX_PROM_ACCEPT; 993 } else if (ifp->if_flags & IFF_MULTICAST) { 994 /* Allow receiving frames with multicast addresses */ 995 rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT | 996 RX_OK_ACCEPT | RX_MULTCAST_ACCEPT; 997 998 /* Start with an empty filter */ 999 af[0] = af[1] = af[2] = af[3] = 0x0000; 1000 1001 if (ifp->if_flags & IFF_ALLMULTI) { 1002 /* Accept all multicast frames */ 1003 af[0] = af[1] = af[2] = af[3] = 0xffff; 1004 } else { 1005 /* 1006 * Set up the filter to only accept multicast 1007 * frames we're interested in. 1008 */ 1009 if_maddr_rlock(ifp); 1010 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1011 struct sockaddr_dl *dl = 1012 (struct sockaddr_dl *)ifma->ifma_addr; 1013 1014 index = cs_hash_index(dl); 1015 port = (u_int16_t) (index >> 4); 1016 mask = (u_int16_t) (1 << (index & 0xf)); 1017 af[port] |= mask; 1018 } 1019 if_maddr_runlock(ifp); 1020 } 1021 1022 cs_writereg(sc, PP_LAF + 0, af[0]); 1023 cs_writereg(sc, PP_LAF + 2, af[1]); 1024 cs_writereg(sc, PP_LAF + 4, af[2]); 1025 cs_writereg(sc, PP_LAF + 6, af[3]); 1026 } else { 1027 /* 1028 * Receive only good frames addressed for us and 1029 * good broadcasts. 1030 */ 1031 rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT | 1032 RX_OK_ACCEPT; 1033 } 1034 1035 /* Set up the filter */ 1036 cs_writereg(sc, PP_RxCTL, RX_DEF_ACCEPT | rx_ctl); 1037 1038 /* Turn on receiver */ 1039 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON); 1040} 1041 1042static int 1043cs_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1044{ 1045 struct cs_softc *sc=ifp->if_softc; 1046 struct ifreq *ifr = (struct ifreq *)data; 1047 int error=0; 1048 1049#ifdef CS_DEBUG 1050 if_printf(ifp, "%s command=%lx\n", __func__, command); 1051#endif 1052 1053 switch (command) { 1054 case SIOCSIFFLAGS: 1055 /* 1056 * Switch interface state between "running" and 1057 * "stopped", reflecting the UP flag. 1058 */ 1059 CS_LOCK(sc); 1060 if (sc->ifp->if_flags & IFF_UP) { 1061 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING)==0) { 1062 cs_init_locked(sc); 1063 } 1064 } else { 1065 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING)!=0) { 1066 cs_stop(sc); 1067 } 1068 } 1069 /* 1070 * Promiscuous and/or multicast flags may have changed, 1071 * so reprogram the multicast filter and/or receive mode. 1072 * 1073 * See note about multicasts in cs_setmode 1074 */ 1075 cs_setmode(sc); 1076 CS_UNLOCK(sc); 1077 break; 1078 1079 case SIOCADDMULTI: 1080 case SIOCDELMULTI: 1081 /* 1082 * Multicast list has changed; set the hardware filter 1083 * accordingly. 1084 * 1085 * See note about multicasts in cs_setmode 1086 */ 1087 CS_LOCK(sc); 1088 cs_setmode(sc); 1089 CS_UNLOCK(sc); 1090 error = 0; 1091 break; 1092 1093 case SIOCSIFMEDIA: 1094 case SIOCGIFMEDIA: 1095 error = ifmedia_ioctl(ifp, ifr, &sc->media, command); 1096 break; 1097 1098 default: 1099 error = ether_ioctl(ifp, command, data); 1100 break; 1101 } 1102 1103 return (error); 1104} 1105 1106/* 1107 * Device timeout/watchdog routine. Entered if the device neglects to 1108 * generate an interrupt after a transmit has been started on it. 1109 */ 1110static void 1111cs_watchdog(void *arg) 1112{ 1113 struct cs_softc *sc = arg; 1114 struct ifnet *ifp = sc->ifp; 1115 1116 CS_ASSERT_LOCKED(sc); 1117 if (sc->tx_timeout && --sc->tx_timeout == 0) { 1118 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1119 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname); 1120 1121 /* Reset the interface */ 1122 if (ifp->if_flags & IFF_UP) 1123 cs_reset(sc); 1124 else 1125 cs_stop(sc); 1126 } 1127 callout_reset(&sc->timer, hz, cs_watchdog, sc); 1128} 1129 1130static int 1131cs_mediachange(struct ifnet *ifp) 1132{ 1133 struct cs_softc *sc = ifp->if_softc; 1134 struct ifmedia *ifm = &sc->media; 1135 int error; 1136 1137 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1138 return (EINVAL); 1139 1140 CS_LOCK(sc); 1141 error = cs_mediaset(sc, ifm->ifm_media); 1142 CS_UNLOCK(sc); 1143 return (error); 1144} 1145 1146static void 1147cs_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 1148{ 1149 int line_status; 1150 struct cs_softc *sc = ifp->if_softc; 1151 1152 CS_LOCK(sc); 1153 ifmr->ifm_active = IFM_ETHER; 1154 line_status = cs_readreg(sc, PP_LineST); 1155 if (line_status & TENBASET_ON) { 1156 ifmr->ifm_active |= IFM_10_T; 1157 if (sc->chip_type != CS8900) { 1158 if (cs_readreg(sc, PP_AutoNegST) & FDX_ACTIVE) 1159 ifmr->ifm_active |= IFM_FDX; 1160 if (cs_readreg(sc, PP_AutoNegST) & HDX_ACTIVE) 1161 ifmr->ifm_active |= IFM_HDX; 1162 } 1163 ifmr->ifm_status = IFM_AVALID; 1164 if (line_status & LINK_OK) 1165 ifmr->ifm_status |= IFM_ACTIVE; 1166 } else { 1167 if (line_status & AUI_ON) { 1168 cs_writereg(sc, PP_SelfCTL, cs_readreg(sc, PP_SelfCTL) | 1169 HCB1_ENBL); 1170 if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0)^ 1171 (cs_readreg(sc, PP_SelfCTL) & HCB1)) 1172 ifmr->ifm_active |= IFM_10_2; 1173 else 1174 ifmr->ifm_active |= IFM_10_5; 1175 } 1176 } 1177 CS_UNLOCK(sc); 1178} 1179 1180static int 1181cs_mediaset(struct cs_softc *sc, int media) 1182{ 1183 int error = 0; 1184 1185 /* Stop the receiver & transmitter */ 1186 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) & 1187 ~(SERIAL_RX_ON | SERIAL_TX_ON)); 1188 1189#ifdef CS_DEBUG 1190 device_printf(sc->dev, "%s media=%x\n", __func__, media); 1191#endif 1192 1193 switch (IFM_SUBTYPE(media)) { 1194 default: 1195 case IFM_AUTO: 1196 /* 1197 * This chip makes it a little hard to support this, so treat 1198 * it as IFM_10_T, auto duplex. 1199 */ 1200 enable_tp(sc); 1201 cs_duplex_auto(sc); 1202 break; 1203 case IFM_10_T: 1204 enable_tp(sc); 1205 if (media & IFM_FDX) 1206 cs_duplex_full(sc); 1207 else if (media & IFM_HDX) 1208 cs_duplex_half(sc); 1209 else 1210 error = cs_duplex_auto(sc); 1211 break; 1212 case IFM_10_2: 1213 enable_bnc(sc); 1214 break; 1215 case IFM_10_5: 1216 enable_aui(sc); 1217 break; 1218 } 1219 1220 /* 1221 * Turn the transmitter & receiver back on 1222 */ 1223 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) | 1224 SERIAL_RX_ON | SERIAL_TX_ON); 1225 1226 return (error); 1227} 1228