1/*
2 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2008 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD$
18 */
19#include "opt_ah.h"
20
21/*
22 * NB: Merlin and later have a simpler RF backend.
23 */
24#include "ah.h"
25#include "ah_internal.h"
26
27#include "ah_eeprom_v14.h"
28
29#include "ar9002/ar9280.h"
30#include "ar5416/ar5416reg.h"
31#include "ar5416/ar5416phy.h"
32
33#define N(a)    (sizeof(a)/sizeof(a[0]))
34
35struct ar9280State {
36	RF_HAL_FUNCS	base;		/* public state, must be first */
37	uint16_t	pcdacTable[1];	/* XXX */
38};
39#define	AR9280(ah)	((struct ar9280State *) AH5212(ah)->ah_rfHal)
40
41static HAL_BOOL ar9280GetChannelMaxMinPower(struct ath_hal *,
42	const struct ieee80211_channel *, int16_t *maxPow,int16_t *minPow);
43int16_t ar9280GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c);
44
45static void
46ar9280WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
47	int writes)
48{
49	(void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain,
50		freqIndex, writes);
51}
52
53/*
54 * Take the MHz channel value and set the Channel value
55 *
56 * ASSUMES: Writes enabled to analog bus
57 *
58 * Actual Expression,
59 *
60 * For 2GHz channel,
61 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
62 * (freq_ref = 40MHz)
63 *
64 * For 5GHz channel,
65 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
66 * (freq_ref = 40MHz/(24>>amodeRefSel))
67 *
68 * For 5GHz channels which are 5MHz spaced,
69 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
70 * (freq_ref = 40MHz)
71 */
72static HAL_BOOL
73ar9280SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
74{
75	uint16_t bMode, fracMode, aModeRefSel = 0;
76	uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
77	CHAN_CENTERS centers;
78	uint32_t refDivA = 24;
79	uint8_t frac_n_5g;
80
81	OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq);
82
83	ar5416GetChannelCenters(ah, chan, &centers);
84	freq = centers.synth_center;
85
86	reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL);
87	reg32 &= 0xc0000000;
88
89	if (ath_hal_eepromGet(ah, AR_EEP_FRAC_N_5G, &frac_n_5g) != HAL_OK)
90		frac_n_5g = 0;
91
92	if (freq < 4800) {     /* 2 GHz, fractional mode */
93		uint32_t txctl;
94
95		bMode = 1;
96		fracMode = 1;
97		aModeRefSel = 0;
98		channelSel = (freq * 0x10000)/15;
99
100		txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
101		if (freq == 2484) {
102			/* Enable channel spreading for channel 14 */
103			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
104			    txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
105		} else {
106			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
107			    txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
108		}
109	} else {
110		bMode = 0;
111		fracMode = 0;
112
113		switch (frac_n_5g) {
114		case 0:
115			/*
116			 * Enable fractional mode for half/quarter rate
117			 * channels.
118			 *
119			 * This is from the Linux ath9k code, rather than
120			 * the Atheros HAL code.
121			 */
122			if (IEEE80211_IS_CHAN_QUARTER(chan) ||
123			    IEEE80211_IS_CHAN_HALF(chan))
124				aModeRefSel = 0;
125			else if ((freq % 20) == 0) {
126				aModeRefSel = 3;
127			} else if ((freq % 10) == 0) {
128				aModeRefSel = 2;
129			}
130			if (aModeRefSel) break;
131		case 1:
132		default:
133			aModeRefSel = 0;
134			/* Enable 2G (fractional) mode for channels which are 5MHz spaced */
135
136			/*
137			 * Workaround for talking on PSB non-5MHz channels;
138			 * the pre-Merlin chips only had a 2.5MHz channel
139			 * spacing so some channels aren't reachable.
140
141			 *
142			 * This interoperates on the quarter rate channels
143			 * with the AR5112 and later RF synths.  Please note
144			 * that the synthesiser isn't able to completely
145			 * accurately represent these frequencies (as the
146			 * resolution in this reference is 2.5MHz) and thus
147			 * it will be slightly "off centre."  This matches
148			 * the same slightly incorrect centre frequency
149			 * behaviour that the AR5112 and later channel
150			 * selection code has.
151			 *
152			 * This also interoperates with the AR5416
153			 * synthesiser modification for programming
154			 * fractional frequencies in 5GHz mode.  However
155			 * that modification is also disabled by default.
156			 *
157			 * This is disabled because it hasn't been tested for
158			 * regulatory compliance and neither have the NICs
159			 * which would use it.  So if you enable this code,
160			 * you must first ensure that you've re-certified the
161			 * NICs in question beforehand or you will be
162			 * violating your local regulatory rules and breaking
163			 * the law.
164			 */
165#if 0
166			if (freq % 5 == 0) {
167#endif
168				/* Normal */
169				fracMode = 1;
170				refDivA = 1;
171				channelSel = (freq * 0x8000)/15;
172#if 0
173			} else {
174				/* Offset by 500KHz */
175				uint32_t f, ch, ch2;
176
177				fracMode = 1;
178				refDivA = 1;
179
180				/* Calculate the "adjusted" frequency */
181				f = freq - 2;
182				ch = (((f - 4800) * 10) / 25) + 1;
183
184				ch2 = ((ch * 25) / 5) + 9600;
185				channelSel = (ch2 * 0x4000) / 15;
186				//ath_hal_printf(ah,
187				//    "%s: freq=%d, ch=%d, ch2=%d, "
188				//    "channelSel=%d\n",
189				//    __func__, freq, ch, ch2, channelSel);
190			}
191#endif
192
193			/* RefDivA setting */
194			OS_A_REG_RMW_FIELD(ah, AR_AN_SYNTH9,
195			    AR_AN_SYNTH9_REFDIVA, refDivA);
196		}
197
198		if (!fracMode) {
199			ndiv = (freq * (refDivA >> aModeRefSel))/60;
200			channelSel =  ndiv & 0x1ff;
201			channelFrac = (ndiv & 0xfffffe00) * 2;
202			channelSel = (channelSel << 17) | channelFrac;
203		}
204	}
205
206	reg32 = reg32 | (bMode << 29) | (fracMode << 28) |
207	    (aModeRefSel << 26) | (channelSel);
208
209	OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);
210
211	AH_PRIVATE(ah)->ah_curchan = chan;
212
213	return AH_TRUE;
214}
215
216/*
217 * Return a reference to the requested RF Bank.
218 */
219static uint32_t *
220ar9280GetRfBank(struct ath_hal *ah, int bank)
221{
222	HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
223	    __func__, bank);
224	return AH_NULL;
225}
226
227/*
228 * Reads EEPROM header info from device structure and programs
229 * all rf registers
230 */
231static HAL_BOOL
232ar9280SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
233                uint16_t modesIndex, uint16_t *rfXpdGain)
234{
235	return AH_TRUE;		/* nothing to do */
236}
237
238/*
239 * Read the transmit power levels from the structures taken from EEPROM
240 * Interpolate read transmit power values for this channel
241 * Organize the transmit power values into a table for writing into the hardware
242 */
243
244static HAL_BOOL
245ar9280SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax,
246	const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
247{
248	return AH_TRUE;
249}
250
251#if 0
252static int16_t
253ar9280GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data)
254{
255    int i, minIndex;
256    int16_t minGain,minPwr,minPcdac,retVal;
257
258    /* Assume NUM_POINTS_XPD0 > 0 */
259    minGain = data->pDataPerXPD[0].xpd_gain;
260    for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) {
261        if (data->pDataPerXPD[i].xpd_gain < minGain) {
262            minIndex = i;
263            minGain = data->pDataPerXPD[i].xpd_gain;
264        }
265    }
266    minPwr = data->pDataPerXPD[minIndex].pwr_t4[0];
267    minPcdac = data->pDataPerXPD[minIndex].pcdac[0];
268    for (i=1; i<NUM_POINTS_XPD0; i++) {
269        if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) {
270            minPwr = data->pDataPerXPD[minIndex].pwr_t4[i];
271            minPcdac = data->pDataPerXPD[minIndex].pcdac[i];
272        }
273    }
274    retVal = minPwr - (minPcdac*2);
275    return(retVal);
276}
277#endif
278
279static HAL_BOOL
280ar9280GetChannelMaxMinPower(struct ath_hal *ah,
281	const struct ieee80211_channel *chan,
282	int16_t *maxPow, int16_t *minPow)
283{
284#if 0
285    struct ath_hal_5212 *ahp = AH5212(ah);
286    int numChannels=0,i,last;
287    int totalD, totalF,totalMin;
288    EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL;
289    EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL;
290
291    *maxPow = 0;
292    if (IS_CHAN_A(chan)) {
293        powerArray = ahp->ah_modePowerArray5112;
294        data = powerArray[headerInfo11A].pDataPerChannel;
295        numChannels = powerArray[headerInfo11A].numChannels;
296    } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) {
297        /* XXX - is this correct? Should we also use the same power for turbo G? */
298        powerArray = ahp->ah_modePowerArray5112;
299        data = powerArray[headerInfo11G].pDataPerChannel;
300        numChannels = powerArray[headerInfo11G].numChannels;
301    } else if (IS_CHAN_B(chan)) {
302        powerArray = ahp->ah_modePowerArray5112;
303        data = powerArray[headerInfo11B].pDataPerChannel;
304        numChannels = powerArray[headerInfo11B].numChannels;
305    } else {
306        return (AH_TRUE);
307    }
308    /* Make sure the channel is in the range of the TP values
309     *  (freq piers)
310     */
311    if ((numChannels < 1) ||
312        (chan->channel < data[0].channelValue) ||
313        (chan->channel > data[numChannels-1].channelValue))
314        return(AH_FALSE);
315
316    /* Linearly interpolate the power value now */
317    for (last=0,i=0;
318         (i<numChannels) && (chan->channel > data[i].channelValue);
319         last=i++);
320    totalD = data[i].channelValue - data[last].channelValue;
321    if (totalD > 0) {
322        totalF = data[i].maxPower_t4 - data[last].maxPower_t4;
323        *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD);
324
325        totalMin = ar9280GetMinPower(ah,&data[i]) - ar9280GetMinPower(ah, &data[last]);
326        *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar9280GetMinPower(ah, &data[last])*totalD)/totalD);
327        return (AH_TRUE);
328    } else {
329        if (chan->channel == data[i].channelValue) {
330            *maxPow = data[i].maxPower_t4;
331            *minPow = ar9280GetMinPower(ah, &data[i]);
332            return(AH_TRUE);
333        } else
334            return(AH_FALSE);
335    }
336#else
337	*maxPow = *minPow = 0;
338	return AH_FALSE;
339#endif
340}
341
342/*
343 * The ordering of nfarray is thus:
344 *
345 * nfarray[0]: Chain 0 ctl
346 * nfarray[1]: Chain 1 ctl
347 * nfarray[2]: Chain 2 ctl
348 * nfarray[3]: Chain 0 ext
349 * nfarray[4]: Chain 1 ext
350 * nfarray[5]: Chain 2 ext
351 */
352static void
353ar9280GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
354{
355	int16_t nf;
356
357	nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR);
358	if (nf & 0x100)
359		nf = 0 - ((nf ^ 0x1ff) + 1);
360	HALDEBUG(ah, HAL_DEBUG_NFCAL,
361	    "NF calibrated [ctl] [chain 0] is %d\n", nf);
362	nfarray[0] = nf;
363
364	nf = MS(OS_REG_READ(ah, AR_PHY_CH1_CCA), AR9280_PHY_CH1_MINCCA_PWR);
365	if (nf & 0x100)
366		nf = 0 - ((nf ^ 0x1ff) + 1);
367	HALDEBUG(ah, HAL_DEBUG_NFCAL,
368	    "NF calibrated [ctl] [chain 1] is %d\n", nf);
369	nfarray[1] = nf;
370
371	nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR);
372	if (nf & 0x100)
373		nf = 0 - ((nf ^ 0x1ff) + 1);
374	HALDEBUG(ah, HAL_DEBUG_NFCAL,
375	    "NF calibrated [ext] [chain 0] is %d\n", nf);
376	nfarray[3] = nf;
377
378	nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR9280_PHY_CH1_EXT_MINCCA_PWR);
379	if (nf & 0x100)
380		nf = 0 - ((nf ^ 0x1ff) + 1);
381	HALDEBUG(ah, HAL_DEBUG_NFCAL,
382	    "NF calibrated [ext] [chain 1] is %d\n", nf);
383	nfarray[4] = nf;
384
385        /* Chain 2 - invalid */
386        nfarray[2] = 0;
387        nfarray[5] = 0;
388
389}
390
391/*
392 * Adjust NF based on statistical values for 5GHz frequencies.
393 * Stubbed:Not used by Fowl
394 */
395int16_t
396ar9280GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c)
397{
398	return 0;
399}
400
401/*
402 * Free memory for analog bank scratch buffers
403 */
404static void
405ar9280RfDetach(struct ath_hal *ah)
406{
407	struct ath_hal_5212 *ahp = AH5212(ah);
408
409	HALASSERT(ahp->ah_rfHal != AH_NULL);
410	ath_hal_free(ahp->ah_rfHal);
411	ahp->ah_rfHal = AH_NULL;
412}
413
414HAL_BOOL
415ar9280RfAttach(struct ath_hal *ah, HAL_STATUS *status)
416{
417	struct ath_hal_5212 *ahp = AH5212(ah);
418	struct ar9280State *priv;
419
420	HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR9280 radio\n", __func__);
421
422	HALASSERT(ahp->ah_rfHal == AH_NULL);
423	priv = ath_hal_malloc(sizeof(struct ar9280State));
424	if (priv == AH_NULL) {
425		HALDEBUG(ah, HAL_DEBUG_ANY,
426		    "%s: cannot allocate private state\n", __func__);
427		*status = HAL_ENOMEM;		/* XXX */
428		return AH_FALSE;
429	}
430	priv->base.rfDetach		= ar9280RfDetach;
431	priv->base.writeRegs		= ar9280WriteRegs;
432	priv->base.getRfBank		= ar9280GetRfBank;
433	priv->base.setChannel		= ar9280SetChannel;
434	priv->base.setRfRegs		= ar9280SetRfRegs;
435	priv->base.setPowerTable	= ar9280SetPowerTable;
436	priv->base.getChannelMaxMinPower = ar9280GetChannelMaxMinPower;
437	priv->base.getNfAdjust		= ar9280GetNfAdjust;
438
439	ahp->ah_pcdacTable = priv->pcdacTable;
440	ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
441	ahp->ah_rfHal = &priv->base;
442	/*
443	 * Set noise floor adjust method; we arrange a
444	 * direct call instead of thunking.
445	 */
446	AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
447	AH_PRIVATE(ah)->ah_getNoiseFloor = ar9280GetNoiseFloor;
448
449	return AH_TRUE;
450}
451
452static HAL_BOOL
453ar9280RfProbe(struct ath_hal *ah)
454{
455	return (AR_SREV_MERLIN(ah));
456}
457
458AH_RF(RF9280, ar9280RfProbe, ar9280RfAttach);
459