ar5212.h revision 218012
1103285Sikob/* 2113584Ssimokawa * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3103285Sikob * Copyright (c) 2002-2008 Atheros Communications, Inc. 4103285Sikob * 5103285Sikob * Permission to use, copy, modify, and/or distribute this software for any 6103285Sikob * purpose with or without fee is hereby granted, provided that the above 7103285Sikob * copyright notice and this permission notice appear in all copies. 8103285Sikob * 9103285Sikob * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10103285Sikob * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11103285Sikob * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12103285Sikob * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13103285Sikob * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14103285Sikob * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15103285Sikob * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16103285Sikob * 17103285Sikob * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar5212.h 218012 2011-01-28 08:45:19Z adrian $ 18103285Sikob */ 19103285Sikob#ifndef _ATH_AR5212_H_ 20103285Sikob#define _ATH_AR5212_H_ 21103285Sikob 22103285Sikob#include "ah_eeprom.h" 23103285Sikob 24103285Sikob#define AR5212_MAGIC 0x19541014 25103285Sikob 26103285Sikob/* DCU Transmit Filter macros */ 27103285Sikob#define CALC_MMR(dcu, idx) \ 28103285Sikob ( (4 * dcu) + (idx < 32 ? 0 : (idx < 64 ? 1 : (idx < 96 ? 2 : 3))) ) 29103285Sikob#define TXBLK_FROM_MMR(mmr) \ 30103285Sikob (AR_D_TXBLK_BASE + ((mmr & 0x1f) << 6) + ((mmr & 0x20) >> 3)) 31103285Sikob#define CALC_TXBLK_ADDR(dcu, idx) (TXBLK_FROM_MMR(CALC_MMR(dcu, idx))) 32103285Sikob#define CALC_TXBLK_VALUE(idx) (1 << (idx & 0x1f)) 33103285Sikob 34103285Sikob/* MAC register values */ 35103285Sikob 36103285Sikob#define INIT_INTERRUPT_MASK \ 37103285Sikob ( AR_IMR_TXERR | AR_IMR_TXOK | AR_IMR_RXORN | \ 38103285Sikob AR_IMR_RXERR | AR_IMR_RXOK | AR_IMR_TXURN | \ 39103285Sikob AR_IMR_HIUERR ) 40103285Sikob#define INIT_BEACON_CONTROL \ 41103285Sikob ((INIT_RESET_TSF << 24) | (INIT_BEACON_EN << 23) | \ 42103285Sikob (INIT_TIM_OFFSET << 16) | INIT_BEACON_PERIOD) 43103285Sikob 44103285Sikob#define INIT_CONFIG_STATUS 0x00000000 45103285Sikob#define INIT_RSSI_THR 0x00000781 /* Missed beacon counter initialized to 0x7 (max is 0xff) */ 46103285Sikob#define INIT_IQCAL_LOG_COUNT_MAX 0xF 47103285Sikob#define INIT_BCON_CNTRL_REG 0x00000000 48103285Sikob 49113584Ssimokawa#define INIT_USEC 40 50103285Sikob#define HALF_RATE_USEC 19 /* ((40 / 2) - 1 ) */ 51103285Sikob#define QUARTER_RATE_USEC 9 /* ((40 / 4) - 1 ) */ 52103285Sikob 53103285Sikob#define RX_NON_FULL_RATE_LATENCY 63 54103285Sikob#define TX_HALF_RATE_LATENCY 108 55127468Ssimokawa#define TX_QUARTER_RATE_LATENCY 216 56127468Ssimokawa 57127468Ssimokawa#define IFS_SLOT_FULL_RATE 0x168 /* 9 us half, 40 MHz core clock (9*40) */ 58127468Ssimokawa#define IFS_SLOT_HALF_RATE 0x104 /* 13 us half, 20 MHz core clock (13*20) */ 59127468Ssimokawa#define IFS_SLOT_QUARTER_RATE 0xD2 /* 21 us quarter, 10 MHz core clock (21*10) */ 60127468Ssimokawa#define IFS_EIFS_FULL_RATE 0xE60 /* (74 + (2 * 9)) * 40MHz core clock */ 61103285Sikob#define IFS_EIFS_HALF_RATE 0xDAC /* (149 + (2 * 13)) * 20MHz core clock */ 62103285Sikob#define IFS_EIFS_QUARTER_RATE 0xD48 /* (298 + (2 * 21)) * 10MHz core clock */ 63103285Sikob 64103285Sikob#define ACK_CTS_TIMEOUT_11A 0x3E8 /* ACK timeout in 11a core clocks */ 65103285Sikob 66127468Ssimokawa/* Tx frame start to tx data start delay */ 67103285Sikob#define TX_FRAME_D_START_HALF_RATE 0xc 68122161Ssimokawa#define TX_FRAME_D_START_QUARTER_RATE 0xd 69111942Ssimokawa 70103285Sikob/* 71103285Sikob * Various fifo fill before Tx start, in 64-byte units 72124169Ssimokawa * i.e. put the frame in the air while still DMAing 73124169Ssimokawa */ 74124169Ssimokawa#define MIN_TX_FIFO_THRESHOLD 0x1 75103285Sikob#define MAX_TX_FIFO_THRESHOLD ((IEEE80211_MAX_LEN / 64) + 1) 76124169Ssimokawa#define INIT_TX_FIFO_THRESHOLD MIN_TX_FIFO_THRESHOLD 77124169Ssimokawa 78124169Ssimokawa#define HAL_DECOMP_MASK_SIZE 128 /* 1 byte per key */ 79103285Sikob 80103285Sikob/* 81103285Sikob * Gain support. 82116139Ssimokawa */ 83122603Ssimokawa#define NUM_CORNER_FIX_BITS 4 84103285Sikob#define NUM_CORNER_FIX_BITS_5112 7 85108281Ssimokawa#define DYN_ADJ_UP_MARGIN 15 86103285Sikob#define DYN_ADJ_LO_MARGIN 20 87103285Sikob#define PHY_PROBE_CCK_CORRECTION 5 88103285Sikob#define CCK_OFDM_GAIN_DELTA 15 89122603Ssimokawa 90103285Sikobenum GAIN_PARAMS { 91103285Sikob GP_TXCLIP, 92116139Ssimokawa GP_PD90, 93122603Ssimokawa GP_PD84, 94122603Ssimokawa GP_GSEL, 95122603Ssimokawa}; 96103285Sikob 97122603Ssimokawaenum GAIN_PARAMS_5112 { 98122603Ssimokawa GP_MIXGAIN_OVR, 99122603Ssimokawa GP_PWD_138, 100122603Ssimokawa GP_PWD_137, 101103285Sikob GP_PWD_136, 102103285Sikob GP_PWD_132, 103103285Sikob GP_PWD_131, 104103285Sikob GP_PWD_130, 105103285Sikob}; 106103285Sikob 107103285Sikobtypedef struct _gainOptStep { 108103285Sikob int16_t paramVal[NUM_CORNER_FIX_BITS_5112]; 109103285Sikob int32_t stepGain; 110103285Sikob int8_t stepName[16]; 111103285Sikob} GAIN_OPTIMIZATION_STEP; 112103285Sikob 113103285Sikobtypedef struct { 114103285Sikob uint32_t numStepsInLadder; 115103285Sikob uint32_t defaultStepNum; 116103285Sikob GAIN_OPTIMIZATION_STEP optStep[10]; 117103285Sikob} GAIN_OPTIMIZATION_LADDER; 118103285Sikob 119103285Sikobtypedef struct { 120103285Sikob uint32_t currStepNum; 121103285Sikob uint32_t currGain; 122103285Sikob uint32_t targetGain; 123103285Sikob uint32_t loTrig; 124103285Sikob uint32_t hiTrig; 125103285Sikob uint32_t active; 126103285Sikob const GAIN_OPTIMIZATION_STEP *currStep; 127103285Sikob} GAIN_VALUES; 128103285Sikob 129103285Sikob/* RF HAL structures */ 130103285Sikobtypedef struct RfHalFuncs { 131103285Sikob void *priv; /* private state */ 132103285Sikob 133103285Sikob void (*rfDetach)(struct ath_hal *ah); 134103285Sikob void (*writeRegs)(struct ath_hal *, 135103285Sikob u_int modeIndex, u_int freqIndex, int regWrites); 136103285Sikob uint32_t *(*getRfBank)(struct ath_hal *ah, int bank); 137103285Sikob HAL_BOOL (*setChannel)(struct ath_hal *, 138103285Sikob const struct ieee80211_channel *); 139121953Ssimokawa HAL_BOOL (*setRfRegs)(struct ath_hal *, 140103285Sikob const struct ieee80211_channel *, uint16_t modesIndex, 141103285Sikob uint16_t *rfXpdGain); 142103285Sikob HAL_BOOL (*setPowerTable)(struct ath_hal *ah, 143103285Sikob int16_t *minPower, int16_t *maxPower, 144103285Sikob const struct ieee80211_channel *, uint16_t *rfXpdGain); 145103285Sikob HAL_BOOL (*getChannelMaxMinPower)(struct ath_hal *ah, 146103285Sikob const const struct ieee80211_channel *, 147103285Sikob int16_t *maxPow, int16_t *minPow); 148103285Sikob int16_t (*getNfAdjust)(struct ath_hal *, const HAL_CHANNEL_INTERNAL*); 149103285Sikob} RF_HAL_FUNCS; 150103285Sikob 151103285Sikobstruct ar5212AniParams { 152108281Ssimokawa int maxNoiseImmunityLevel; /* [0..4] */ 153103285Sikob int totalSizeDesired[5]; 154103285Sikob int coarseHigh[5]; 155103285Sikob int coarseLow[5]; 156103285Sikob int firpwr[5]; 157103285Sikob 158103285Sikob int maxSpurImmunityLevel; /* [0..7] */ 159103285Sikob int cycPwrThr1[8]; 160103285Sikob 161103285Sikob int maxFirstepLevel; /* [0..2] */ 162103285Sikob int firstep[3]; 163109814Ssimokawa 164103285Sikob uint32_t ofdmTrigHigh; 165103285Sikob uint32_t ofdmTrigLow; 166103285Sikob uint32_t cckTrigHigh; 167103285Sikob uint32_t cckTrigLow; 168103285Sikob int32_t rssiThrLow; 169103285Sikob uint32_t rssiThrHigh; 170103285Sikob 171103285Sikob int period; /* update listen period */ 172103285Sikob 173103285Sikob /* NB: intentionally ordered so data exported to user space is first */ 174124251Ssimokawa uint32_t ofdmPhyErrBase; /* Base value for ofdm err counter */ 175124251Ssimokawa uint32_t cckPhyErrBase; /* Base value for cck err counters */ 176124251Ssimokawa}; 177103285Sikob 178103285Sikob/* 179103285Sikob * Per-channel ANI state private to the driver. 180103285Sikob */ 181103285Sikobstruct ar5212AniState { 182103285Sikob uint8_t noiseImmunityLevel; 183103285Sikob uint8_t spurImmunityLevel; 184103285Sikob uint8_t firstepLevel; 185103285Sikob uint8_t ofdmWeakSigDetectOff; 186103285Sikob uint8_t cckWeakSigThreshold; 187103285Sikob uint32_t listenTime; 188103285Sikob 189109814Ssimokawa /* NB: intentionally ordered so data exported to user space is first */ 190109814Ssimokawa uint32_t txFrameCount; /* Last txFrameCount */ 191109814Ssimokawa uint32_t rxFrameCount; /* Last rx Frame count */ 192109814Ssimokawa uint32_t cycleCount; /* Last cycleCount 193109814Ssimokawa (to detect wrap-around) */ 194109814Ssimokawa uint32_t ofdmPhyErrCount;/* OFDM err count since last reset */ 195109814Ssimokawa uint32_t cckPhyErrCount; /* CCK err count since last reset */ 196109814Ssimokawa 197107653Ssimokawa const struct ar5212AniParams *params; 198107653Ssimokawa}; 199103285Sikob 200103285Sikob#define HAL_ANI_ENA 0x00000001 /* ANI operation enabled */ 201103285Sikob#define HAL_RSSI_ANI_ENA 0x00000002 /* rssi-based processing ena'd*/ 202103285Sikob 203103285Sikobstruct ar5212Stats { 204103285Sikob uint32_t ast_ani_niup; /* ANI increased noise immunity */ 205127468Ssimokawa uint32_t ast_ani_nidown; /* ANI decreased noise immunity */ 206121953Ssimokawa uint32_t ast_ani_spurup; /* ANI increased spur immunity */ 207122212Ssimokawa uint32_t ast_ani_spurdown;/* ANI descreased spur immunity */ 208122212Ssimokawa uint32_t ast_ani_ofdmon; /* ANI OFDM weak signal detect on */ 209122212Ssimokawa uint32_t ast_ani_ofdmoff;/* ANI OFDM weak signal detect off */ 210122212Ssimokawa uint32_t ast_ani_cckhigh;/* ANI CCK weak signal threshold high */ 211103285Sikob uint32_t ast_ani_ccklow; /* ANI CCK weak signal threshold low */ 212103285Sikob uint32_t ast_ani_stepup; /* ANI increased first step level */ 213103285Sikob uint32_t ast_ani_stepdown;/* ANI decreased first step level */ 214103285Sikob uint32_t ast_ani_ofdmerrs;/* ANI cumulative ofdm phy err count */ 215103285Sikob uint32_t ast_ani_cckerrs;/* ANI cumulative cck phy err count */ 216103285Sikob uint32_t ast_ani_reset; /* ANI parameters zero'd for non-STA */ 217111942Ssimokawa uint32_t ast_ani_lzero; /* ANI listen time forced to zero */ 218103285Sikob uint32_t ast_ani_lneg; /* ANI listen time calculated < 0 */ 219103285Sikob HAL_MIB_STATS ast_mibstats; /* MIB counter stats */ 220127468Ssimokawa HAL_NODE_STATS ast_nodestats; /* Latest rssi stats from driver */ 221127468Ssimokawa}; 222127468Ssimokawa 223106937Ssam/* 224108712Ssimokawa * NF Cal history buffer 225103285Sikob */ 226103285Sikob#define AR5212_CCA_MAX_GOOD_VALUE -95 227103285Sikob#define AR5212_CCA_MAX_HIGH_VALUE -62 228103285Sikob#define AR5212_CCA_MIN_BAD_VALUE -125 229127468Ssimokawa 230106937Ssam#define AR512_NF_CAL_HIST_MAX 5 231108712Ssimokawa 232103285Sikobstruct ar5212NfCalHist { 233103285Sikob int16_t nfCalBuffer[AR512_NF_CAL_HIST_MAX]; 234122161Ssimokawa int16_t privNF; 235103285Sikob uint8_t currIndex; 236103285Sikob uint8_t first_run; 237103285Sikob uint8_t invalidNFcount; 238103285Sikob}; 239103285Sikob 240103285Sikobstruct ath_hal_5212 { 241103285Sikob struct ath_hal_private ah_priv; /* base class */ 242103285Sikob 243103285Sikob /* 244111942Ssimokawa * Per-chip common Initialization data. 245111942Ssimokawa * NB: RF backends have their own ini data. 246103285Sikob */ 247103285Sikob HAL_INI_ARRAY ah_ini_modes; 248103285Sikob HAL_INI_ARRAY ah_ini_common; 249103285Sikob 250103285Sikob GAIN_VALUES ah_gainValues; 251103285Sikob 252103285Sikob uint8_t ah_macaddr[IEEE80211_ADDR_LEN]; 253103285Sikob uint8_t ah_bssid[IEEE80211_ADDR_LEN]; 254103285Sikob uint8_t ah_bssidmask[IEEE80211_ADDR_LEN]; 255103285Sikob 256103285Sikob /* 257113584Ssimokawa * Runtime state. 258113584Ssimokawa */ 259111942Ssimokawa uint32_t ah_maskReg; /* copy of AR_IMR */ 260111942Ssimokawa struct ar5212Stats ah_stats; /* various statistics */ 261111942Ssimokawa RF_HAL_FUNCS *ah_rfHal; 262111942Ssimokawa uint32_t ah_txDescMask; /* mask for TXDESC */ 263111942Ssimokawa uint32_t ah_txOkInterruptMask; 264111942Ssimokawa uint32_t ah_txErrInterruptMask; 265111942Ssimokawa uint32_t ah_txDescInterruptMask; 266111942Ssimokawa uint32_t ah_txEolInterruptMask; 267111942Ssimokawa uint32_t ah_txUrnInterruptMask; 268111942Ssimokawa HAL_TX_QUEUE_INFO ah_txq[HAL_NUM_TX_QUEUES]; 269111942Ssimokawa uint32_t ah_intrTxqs; /* tx q interrupt state */ 270111942Ssimokawa /* decomp mask array */ 271111942Ssimokawa uint8_t ah_decompMask[HAL_DECOMP_MASK_SIZE]; 272111942Ssimokawa HAL_POWER_MODE ah_powerMode; 273103285Sikob HAL_ANT_SETTING ah_antControl; /* antenna setting */ 274103285Sikob HAL_BOOL ah_diversity; /* fast diversity setting */ 275103285Sikob enum { 276103285Sikob IQ_CAL_INACTIVE, 277103285Sikob IQ_CAL_RUNNING, 278103285Sikob IQ_CAL_DONE 279103285Sikob } ah_bIQCalibration; /* IQ calibrate state */ 280103285Sikob HAL_RFGAIN ah_rfgainState; /* RF gain calibrartion state */ 281103285Sikob uint32_t ah_tx6PowerInHalfDbm; /* power output for 6Mb tx */ 282103285Sikob uint32_t ah_staId1Defaults; /* STA_ID1 default settings */ 283103285Sikob uint32_t ah_miscMode; /* MISC_MODE settings */ 284103285Sikob uint32_t ah_rssiThr; /* RSSI_THR settings */ 285103285Sikob HAL_BOOL ah_cwCalRequire; /* for ap51 */ 286103285Sikob HAL_BOOL ah_tpcEnabled; /* per-packet tpc enabled */ 287103285Sikob HAL_BOOL ah_phyPowerOn; /* PHY power state */ 288103285Sikob HAL_BOOL ah_isHb63; /* cached HB63 check */ 289127468Ssimokawa uint32_t ah_macTPC; /* tpc register */ 290127468Ssimokawa uint32_t ah_beaconInterval; /* XXX */ 291127468Ssimokawa enum { 292106937Ssam AUTO_32KHZ, /* use it if 32kHz crystal present */ 293108712Ssimokawa USE_32KHZ, /* do it regardless */ 294103285Sikob DONT_USE_32KHZ, /* don't use it regardless */ 295103285Sikob } ah_enable32kHzClock; /* whether to sleep at 32kHz */ 296103285Sikob uint32_t ah_ofdmTxPower; 297103285Sikob int16_t ah_txPowerIndexOffset; 298103285Sikob /* 299103285Sikob * Noise floor cal histogram support. 300103285Sikob */ 301103285Sikob struct ar5212NfCalHist ah_nfCalHist; 302103285Sikob 303103285Sikob u_int ah_slottime; /* user-specified slot time */ 304103285Sikob u_int ah_acktimeout; /* user-specified ack timeout */ 305103285Sikob u_int ah_ctstimeout; /* user-specified cts timeout */ 306111942Ssimokawa u_int ah_sifstime; /* user-specified sifs time */ 307113584Ssimokawa /* 308103285Sikob * RF Silent handling; setup according to the EEPROM. 309103285Sikob */ 310122161Ssimokawa uint32_t ah_gpioSelect; /* GPIO pin to use */ 311103285Sikob uint32_t ah_polarity; /* polarity to disable RF */ 312103285Sikob uint32_t ah_gpioBit; /* after init, prev value */ 313103285Sikob /* 314103285Sikob * ANI support. 315103285Sikob */ 316103285Sikob uint32_t ah_procPhyErr; /* Process Phy errs */ 317103285Sikob HAL_BOOL ah_hasHwPhyCounters; /* Hardware has phy counters */ 318103285Sikob struct ar5212AniParams ah_aniParams24; /* 2.4GHz parameters */ 319103285Sikob struct ar5212AniParams ah_aniParams5; /* 5GHz parameters */ 320103285Sikob struct ar5212AniState *ah_curani; /* cached last reference */ 321118312Ssimokawa struct ar5212AniState ah_ani[AH_MAXCHAN]; /* per-channel state */ 322103285Sikob 323118312Ssimokawa /* 324118312Ssimokawa * Transmit power state. Note these are maintained 325118312Ssimokawa * here so they can be retrieved by diagnostic tools. 326103285Sikob */ 327103285Sikob uint16_t *ah_pcdacTable; 328103285Sikob u_int ah_pcdacTableSize; 329103285Sikob uint16_t ah_ratesArray[37]; 330113584Ssimokawa 331113584Ssimokawa uint8_t ah_txTrigLev; /* current Tx trigger level */ 332112400Ssimokawa uint8_t ah_maxTxTrigLev; /* max tx trigger level */ 333103285Sikob}; 334103285Sikob#define AH5212(_ah) ((struct ath_hal_5212 *)(_ah)) 335103285Sikob 336103285Sikob/* 337122603Ssimokawa * IS_XXXX macros test the MAC version 338111942Ssimokawa * IS_RADXXX macros test the radio/RF version (matching both 2G-only and 2/5G) 339111942Ssimokawa * 340111942Ssimokawa * Some single chip radios have equivalent radio/RF (e.g. 5112) 341113584Ssimokawa * for those use IS_RADXXX_ANY macros. 342111942Ssimokawa */ 343113584Ssimokawa#define IS_2317(ah) \ 344113584Ssimokawa ((AH_PRIVATE(ah)->ah_devid == AR5212_AR2317_REV1) || \ 345111942Ssimokawa (AH_PRIVATE(ah)->ah_devid == AR5212_AR2317_REV2)) 346111942Ssimokawa#define IS_2316(ah) \ 347111942Ssimokawa (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2415) 348111942Ssimokawa#define IS_2413(ah) \ 349111942Ssimokawa (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2413 || IS_2316(ah)) 350111942Ssimokawa#define IS_5424(ah) \ 351111942Ssimokawa (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_5424 || \ 352111942Ssimokawa (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_5413 && \ 353111942Ssimokawa AH_PRIVATE(ah)->ah_macRev <= AR_SREV_D2PLUS_MS)) 354113584Ssimokawa#define IS_5413(ah) \ 355127468Ssimokawa (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_5413 || IS_5424(ah)) 356127468Ssimokawa#define IS_2425(ah) \ 357127468Ssimokawa (AH_PRIVATE(ah)->ah_macVersion == AR_SREV_2425) 358111942Ssimokawa#define IS_2417(ah) \ 359111942Ssimokawa ((AH_PRIVATE(ah)->ah_macVersion) == AR_SREV_2417) 360113584Ssimokawa#define IS_HB63(ah) (AH5212(ah)->ah_isHb63 == AH_TRUE) 361113584Ssimokawa 362113584Ssimokawa#define AH_RADIO_MAJOR(ah) \ 363113584Ssimokawa (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) 364113584Ssimokawa#define AH_RADIO_MINOR(ah) \ 365113584Ssimokawa (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MINOR) 366113584Ssimokawa#define IS_RAD5111(ah) \ 367111942Ssimokawa (AH_RADIO_MAJOR(ah) == AR_RAD5111_SREV_MAJOR || \ 368111942Ssimokawa AH_RADIO_MAJOR(ah) == AR_RAD2111_SREV_MAJOR) 369111942Ssimokawa#define IS_RAD5112(ah) \ 370111942Ssimokawa (AH_RADIO_MAJOR(ah) == AR_RAD5112_SREV_MAJOR || \ 371111942Ssimokawa AH_RADIO_MAJOR(ah) == AR_RAD2112_SREV_MAJOR) 372111942Ssimokawa/* NB: does not include 5413 as Atheros' IS_5112 macro does */ 373120660Ssimokawa#define IS_RAD5112_ANY(ah) \ 374111942Ssimokawa (AR_RAD5112_SREV_MAJOR <= AH_RADIO_MAJOR(ah) && \ 375111942Ssimokawa AH_RADIO_MAJOR(ah) <= AR_RAD2413_SREV_MAJOR) 376111942Ssimokawa#define IS_RAD5112_REV1(ah) \ 377111942Ssimokawa (IS_RAD5112(ah) && \ 378111942Ssimokawa AH_RADIO_MINOR(ah) < (AR_RAD5112_SREV_2_0 & AR_RADIO_SREV_MINOR)) 379111942Ssimokawa#define IS_RADX112_REV2(ah) \ 380103285Sikob (AH_PRIVATE(ah)->ah_analog5GhzRev == AR_RAD5112_SREV_2_0 || \ 381103285Sikob AH_PRIVATE(ah)->ah_analog5GhzRev == AR_RAD2112_SREV_2_0 || \ 382103285Sikob AH_PRIVATE(ah)->ah_analog5GhzRev == AR_RAD2112_SREV_2_1 || \ 383103285Sikob AH_PRIVATE(ah)->ah_analog5GhzRev == AR_RAD5112_SREV_2_1) 384103285Sikob 385103285Sikob#define ar5212RfDetach(ah) do { \ 386103285Sikob if (AH5212(ah)->ah_rfHal != AH_NULL) \ 387103285Sikob AH5212(ah)->ah_rfHal->rfDetach(ah); \ 388103285Sikob} while (0) 389103285Sikob#define ar5212GetRfBank(ah, b) \ 390103285Sikob AH5212(ah)->ah_rfHal->getRfBank(ah, b) 391103285Sikob 392103285Sikob/* 393103285Sikob * Hack macros for Nala/San: 11b is handled 394103285Sikob * using 11g; flip the channel flags to accomplish this. 395103285Sikob */ 396103285Sikob#define SAVE_CCK(_ah, _chan, _flag) do { \ 397103285Sikob if ((IS_2425(_ah) || IS_2417(_ah)) && \ 398103285Sikob (((_chan)->ic_flags) & IEEE80211_CHAN_CCK)) { \ 399103285Sikob (_chan)->ic_flags &= ~IEEE80211_CHAN_CCK; \ 400103285Sikob (_chan)->ic_flags |= IEEE80211_CHAN_DYN; \ 401103285Sikob (_flag) = AH_TRUE; \ 402103285Sikob } else \ 403103285Sikob (_flag) = AH_FALSE; \ 404103285Sikob} while (0) 405103285Sikob#define RESTORE_CCK(_ah, _chan, _flag) do { \ 406103285Sikob if ((_flag) && (IS_2425(_ah) || IS_2417(_ah))) { \ 407103285Sikob (_chan)->ic_flags &= ~IEEE80211_CHAN_DYN; \ 408103285Sikob (_chan)->ic_flags |= IEEE80211_CHAN_CCK; \ 409103285Sikob } \ 410103285Sikob} while (0) 411103285Sikob 412103285Sikobstruct ath_hal; 413103285Sikob 414103285Sikobextern uint32_t ar5212GetRadioRev(struct ath_hal *ah); 415103285Sikobextern void ar5212InitState(struct ath_hal_5212 *, uint16_t devid, HAL_SOFTC, 416103285Sikob HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status); 417103285Sikobextern void ar5212Detach(struct ath_hal *ah); 418103285Sikobextern HAL_BOOL ar5212ChipTest(struct ath_hal *ah); 419103285Sikobextern HAL_BOOL ar5212GetChannelEdges(struct ath_hal *ah, 420103285Sikob uint16_t flags, uint16_t *low, uint16_t *high); 421103285Sikobextern HAL_BOOL ar5212FillCapabilityInfo(struct ath_hal *ah); 422108712Ssimokawa 423103285Sikobextern void ar5212SetBeaconTimers(struct ath_hal *ah, 424103285Sikob const HAL_BEACON_TIMERS *); 425103285Sikobextern void ar5212BeaconInit(struct ath_hal *ah, 426103285Sikob uint32_t next_beacon, uint32_t beacon_period); 427103285Sikobextern void ar5212ResetStaBeaconTimers(struct ath_hal *ah); 428103285Sikobextern void ar5212SetStaBeaconTimers(struct ath_hal *ah, 429103285Sikob const HAL_BEACON_STATE *); 430103285Sikob 431103285Sikobextern HAL_BOOL ar5212IsInterruptPending(struct ath_hal *ah); 432103285Sikobextern HAL_BOOL ar5212GetPendingInterrupts(struct ath_hal *ah, HAL_INT *); 433103285Sikobextern HAL_INT ar5212GetInterrupts(struct ath_hal *ah); 434108712Ssimokawaextern HAL_INT ar5212SetInterrupts(struct ath_hal *ah, HAL_INT ints); 435127468Ssimokawa 436103285Sikobextern uint32_t ar5212GetKeyCacheSize(struct ath_hal *); 437108712Ssimokawaextern HAL_BOOL ar5212IsKeyCacheEntryValid(struct ath_hal *, uint16_t entry); 438108712Ssimokawaextern HAL_BOOL ar5212ResetKeyCacheEntry(struct ath_hal *ah, uint16_t entry); 439108712Ssimokawaextern HAL_BOOL ar5212SetKeyCacheEntryMac(struct ath_hal *, 440108712Ssimokawa uint16_t entry, const uint8_t *mac); 441108712Ssimokawaextern HAL_BOOL ar5212SetKeyCacheEntry(struct ath_hal *ah, uint16_t entry, 442106937Ssam const HAL_KEYVAL *k, const uint8_t *mac, int xorKey); 443106937Ssam 444106937Ssamextern void ar5212GetMacAddress(struct ath_hal *ah, uint8_t *mac); 445106937Ssamextern HAL_BOOL ar5212SetMacAddress(struct ath_hal *ah, const uint8_t *); 446127468Ssimokawaextern void ar5212GetBssIdMask(struct ath_hal *ah, uint8_t *mac); 447108712Ssimokawaextern HAL_BOOL ar5212SetBssIdMask(struct ath_hal *, const uint8_t *); 448108712Ssimokawaextern HAL_BOOL ar5212EepromRead(struct ath_hal *, u_int off, uint16_t *data); 449108712Ssimokawaextern HAL_BOOL ar5212EepromWrite(struct ath_hal *, u_int off, uint16_t data); 450103285Sikobextern HAL_BOOL ar5212SetRegulatoryDomain(struct ath_hal *ah, 451103285Sikob uint16_t regDomain, HAL_STATUS *stats); 452103285Sikobextern u_int ar5212GetWirelessModes(struct ath_hal *ah); 453103285Sikobextern void ar5212EnableRfKill(struct ath_hal *); 454103285Sikobextern HAL_BOOL ar5212GpioCfgOutput(struct ath_hal *, uint32_t gpio, 455103285Sikob HAL_GPIO_MUX_TYPE); 456111942Ssimokawaextern HAL_BOOL ar5212GpioCfgInput(struct ath_hal *, uint32_t gpio); 457111942Ssimokawaextern HAL_BOOL ar5212GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val); 458111942Ssimokawaextern uint32_t ar5212GpioGet(struct ath_hal *ah, uint32_t gpio); 459111942Ssimokawaextern void ar5212GpioSetIntr(struct ath_hal *ah, u_int, uint32_t ilevel); 460111942Ssimokawaextern void ar5212SetLedState(struct ath_hal *ah, HAL_LED_STATE state); 461111942Ssimokawaextern void ar5212WriteAssocid(struct ath_hal *ah, const uint8_t *bssid, 462111942Ssimokawa uint16_t assocId); 463111942Ssimokawaextern uint32_t ar5212GetTsf32(struct ath_hal *ah); 464111942Ssimokawaextern uint64_t ar5212GetTsf64(struct ath_hal *ah); 465122161Ssimokawaextern void ar5212ResetTsf(struct ath_hal *ah); 466111942Ssimokawaextern void ar5212SetBasicRate(struct ath_hal *ah, HAL_RATE_SET *pSet); 467111942Ssimokawaextern uint32_t ar5212GetRandomSeed(struct ath_hal *ah); 468111942Ssimokawaextern HAL_BOOL ar5212DetectCardPresent(struct ath_hal *ah); 469111942Ssimokawaextern void ar5212EnableMibCounters(struct ath_hal *); 470111942Ssimokawaextern void ar5212DisableMibCounters(struct ath_hal *); 471113584Ssimokawaextern void ar5212UpdateMibCounters(struct ath_hal *ah, HAL_MIB_STATS* stats); 472111942Ssimokawaextern HAL_BOOL ar5212IsJapanChannelSpreadSupported(struct ath_hal *ah); 473111942Ssimokawaextern uint32_t ar5212GetCurRssi(struct ath_hal *ah); 474111942Ssimokawaextern u_int ar5212GetDefAntenna(struct ath_hal *ah); 475113584Ssimokawaextern void ar5212SetDefAntenna(struct ath_hal *ah, u_int antenna); 476113584Ssimokawaextern HAL_ANT_SETTING ar5212GetAntennaSwitch(struct ath_hal *); 477111942Ssimokawaextern HAL_BOOL ar5212SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING); 478111942Ssimokawaextern HAL_BOOL ar5212IsSleepAfterBeaconBroken(struct ath_hal *ah); 479111942Ssimokawaextern HAL_BOOL ar5212SetSifsTime(struct ath_hal *, u_int); 480111942Ssimokawaextern u_int ar5212GetSifsTime(struct ath_hal *); 481111942Ssimokawaextern HAL_BOOL ar5212SetSlotTime(struct ath_hal *, u_int); 482103285Sikobextern u_int ar5212GetSlotTime(struct ath_hal *); 483103285Sikobextern HAL_BOOL ar5212SetAckTimeout(struct ath_hal *, u_int); 484103285Sikobextern u_int ar5212GetAckTimeout(struct ath_hal *); 485103285Sikobextern HAL_BOOL ar5212SetAckCTSRate(struct ath_hal *, u_int); 486103285Sikobextern u_int ar5212GetAckCTSRate(struct ath_hal *); 487122161Ssimokawaextern HAL_BOOL ar5212SetCTSTimeout(struct ath_hal *, u_int); 488103285Sikobextern u_int ar5212GetCTSTimeout(struct ath_hal *); 489103285Sikobextern HAL_BOOL ar5212SetDecompMask(struct ath_hal *, uint16_t, int); 490103285Sikobvoid ar5212SetCoverageClass(struct ath_hal *, uint8_t, int); 491103285Sikobextern void ar5212SetPCUConfig(struct ath_hal *); 492122161Ssimokawaextern HAL_BOOL ar5212Use32KHzclock(struct ath_hal *ah, HAL_OPMODE opmode); 493103285Sikobextern void ar5212SetupClock(struct ath_hal *ah, HAL_OPMODE opmode); 494103285Sikobextern void ar5212RestoreClock(struct ath_hal *ah, HAL_OPMODE opmode); 495103285Sikobextern int16_t ar5212GetNfAdjust(struct ath_hal *, 496103285Sikob const HAL_CHANNEL_INTERNAL *); 497103285Sikobextern void ar5212SetCompRegs(struct ath_hal *ah); 498103285Sikobextern HAL_STATUS ar5212GetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE, 499103285Sikob uint32_t, uint32_t *); 500103285Sikobextern HAL_BOOL ar5212SetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE, 501103285Sikob uint32_t, uint32_t, HAL_STATUS *); 502103285Sikobextern HAL_BOOL ar5212GetDiagState(struct ath_hal *ah, int request, 503103285Sikob const void *args, uint32_t argsize, 504103285Sikob void **result, uint32_t *resultsize); 505103285Sikob 506103285Sikobextern HAL_BOOL ar5212SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, 507103285Sikob int setChip); 508103285Sikobextern HAL_POWER_MODE ar5212GetPowerMode(struct ath_hal *ah); 509103285Sikobextern HAL_BOOL ar5212GetPowerStatus(struct ath_hal *ah); 510103285Sikob 511103285Sikobextern uint32_t ar5212GetRxDP(struct ath_hal *ath); 512103285Sikobextern void ar5212SetRxDP(struct ath_hal *ah, uint32_t rxdp); 513103285Sikobextern void ar5212EnableReceive(struct ath_hal *ah); 514103285Sikobextern HAL_BOOL ar5212StopDmaReceive(struct ath_hal *ah); 515103285Sikobextern void ar5212StartPcuReceive(struct ath_hal *ah); 516111942Ssimokawaextern void ar5212StopPcuReceive(struct ath_hal *ah); 517111942Ssimokawaextern void ar5212SetMulticastFilter(struct ath_hal *ah, 518111942Ssimokawa uint32_t filter0, uint32_t filter1); 519103285Sikobextern HAL_BOOL ar5212ClrMulticastFilterIndex(struct ath_hal *, uint32_t ix); 520103285Sikobextern HAL_BOOL ar5212SetMulticastFilterIndex(struct ath_hal *, uint32_t ix); 521103285Sikobextern uint32_t ar5212GetRxFilter(struct ath_hal *ah); 522103285Sikobextern void ar5212SetRxFilter(struct ath_hal *ah, uint32_t bits); 523103285Sikobextern HAL_BOOL ar5212SetupRxDesc(struct ath_hal *, 524103285Sikob struct ath_desc *, uint32_t size, u_int flags); 525103285Sikobextern HAL_STATUS ar5212ProcRxDesc(struct ath_hal *ah, struct ath_desc *, 526103285Sikob uint32_t, struct ath_desc *, uint64_t, 527103285Sikob struct ath_rx_status *); 528103285Sikob 529103285Sikobextern HAL_BOOL ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, 530103285Sikob struct ieee80211_channel *chan, HAL_BOOL bChannelChange, 531103285Sikob HAL_STATUS *status); 532111942Ssimokawaextern HAL_BOOL ar5212SetChannel(struct ath_hal *, 533111942Ssimokawa const struct ieee80211_channel *); 534111942Ssimokawaextern void ar5212SetOperatingMode(struct ath_hal *ah, int opmode); 535111942Ssimokawaextern HAL_BOOL ar5212PhyDisable(struct ath_hal *ah); 536111942Ssimokawaextern HAL_BOOL ar5212Disable(struct ath_hal *ah); 537111942Ssimokawaextern HAL_BOOL ar5212ChipReset(struct ath_hal *ah, 538103285Sikob const struct ieee80211_channel *); 539103285Sikobextern HAL_BOOL ar5212PerCalibration(struct ath_hal *ah, 540103285Sikob struct ieee80211_channel *chan, HAL_BOOL *isIQdone); 541111942Ssimokawaextern HAL_BOOL ar5212PerCalibrationN(struct ath_hal *ah, 542127468Ssimokawa struct ieee80211_channel *chan, u_int chainMask, 543108712Ssimokawa HAL_BOOL longCal, HAL_BOOL *isCalDone); 544108712Ssimokawaextern HAL_BOOL ar5212ResetCalValid(struct ath_hal *ah, 545127468Ssimokawa const struct ieee80211_channel *); 546127468Ssimokawaextern int16_t ar5212GetNoiseFloor(struct ath_hal *ah); 547108712Ssimokawaextern void ar5212InitNfCalHistBuffer(struct ath_hal *); 548103285Sikobextern int16_t ar5212GetNfHistMid(const int16_t calData[]); 549103285Sikobextern void ar5212SetSpurMitigation(struct ath_hal *, 550111942Ssimokawa const struct ieee80211_channel *); 551120660Ssimokawaextern HAL_BOOL ar5212SetAntennaSwitchInternal(struct ath_hal *ah, 552120660Ssimokawa HAL_ANT_SETTING settings, const struct ieee80211_channel *); 553113584Ssimokawaextern HAL_BOOL ar5212SetTxPowerLimit(struct ath_hal *ah, uint32_t limit); 554103285Sikobextern HAL_BOOL ar5212GetChipPowerLimits(struct ath_hal *ah, 555120660Ssimokawa struct ieee80211_channel *chan); 556103285Sikobextern void ar5212InitializeGainValues(struct ath_hal *); 557111942Ssimokawaextern HAL_RFGAIN ar5212GetRfgain(struct ath_hal *ah); 558103285Sikobextern void ar5212RequestRfgain(struct ath_hal *); 559103285Sikob 560103285Sikobextern HAL_BOOL ar5212UpdateTxTrigLevel(struct ath_hal *, 561103285Sikob HAL_BOOL IncTrigLevel); 562103285Sikobextern HAL_BOOL ar5212SetTxQueueProps(struct ath_hal *ah, int q, 563103285Sikob const HAL_TXQ_INFO *qInfo); 564111942Ssimokawaextern HAL_BOOL ar5212GetTxQueueProps(struct ath_hal *ah, int q, 565103285Sikob HAL_TXQ_INFO *qInfo); 566103285Sikobextern int ar5212SetupTxQueue(struct ath_hal *ah, HAL_TX_QUEUE type, 567103285Sikob const HAL_TXQ_INFO *qInfo); 568103285Sikobextern HAL_BOOL ar5212ReleaseTxQueue(struct ath_hal *ah, u_int q); 569103285Sikobextern HAL_BOOL ar5212ResetTxQueue(struct ath_hal *ah, u_int q); 570103285Sikobextern uint32_t ar5212GetTxDP(struct ath_hal *ah, u_int q); 571111942Ssimokawaextern HAL_BOOL ar5212SetTxDP(struct ath_hal *ah, u_int q, uint32_t txdp); 572111942Ssimokawaextern HAL_BOOL ar5212StartTxDma(struct ath_hal *ah, u_int q); 573103285Sikobextern uint32_t ar5212NumTxPending(struct ath_hal *ah, u_int q); 574103285Sikobextern HAL_BOOL ar5212StopTxDma(struct ath_hal *ah, u_int q); 575103285Sikobextern HAL_BOOL ar5212SetupTxDesc(struct ath_hal *ah, struct ath_desc *ds, 576103285Sikob u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int txPower, 577103285Sikob u_int txRate0, u_int txTries0, 578103285Sikob u_int keyIx, u_int antMode, u_int flags, 579113584Ssimokawa u_int rtsctsRate, u_int rtsctsDuration, 580103285Sikob u_int compicvLen, u_int compivLen, u_int comp); 581103285Sikobextern HAL_BOOL ar5212SetupXTxDesc(struct ath_hal *, struct ath_desc *, 582111942Ssimokawa u_int txRate1, u_int txRetries1, 583111942Ssimokawa u_int txRate2, u_int txRetries2, 584103285Sikob u_int txRate3, u_int txRetries3); 585127468Ssimokawaextern HAL_BOOL ar5212FillTxDesc(struct ath_hal *ah, struct ath_desc *ds, 586111942Ssimokawa u_int segLen, HAL_BOOL firstSeg, HAL_BOOL lastSeg, 587111942Ssimokawa const struct ath_desc *ds0); 588103285Sikobextern HAL_STATUS ar5212ProcTxDesc(struct ath_hal *ah, 589103285Sikob struct ath_desc *, struct ath_tx_status *); 590103285Sikobextern void ar5212GetTxIntrQueue(struct ath_hal *ah, uint32_t *); 591103285Sikobextern void ar5212IntrReqTxDesc(struct ath_hal *ah, struct ath_desc *); 592103285Sikobextern HAL_BOOL ar5212GetTxCompletionRates(struct ath_hal *ah, 593103285Sikob const struct ath_desc *ds0, int *rates, int *tries); 594111942Ssimokawa 595111942Ssimokawaextern const HAL_RATE_TABLE *ar5212GetRateTable(struct ath_hal *, u_int mode); 596113584Ssimokawa 597111942Ssimokawaextern void ar5212AniAttach(struct ath_hal *, const struct ar5212AniParams *, 598111942Ssimokawa const struct ar5212AniParams *, HAL_BOOL ena); 599111942Ssimokawaextern void ar5212AniDetach(struct ath_hal *); 600111942Ssimokawaextern struct ar5212AniState *ar5212AniGetCurrentState(struct ath_hal *); 601119119Ssimokawaextern struct ar5212Stats *ar5212AniGetCurrentStats(struct ath_hal *); 602113584Ssimokawaextern HAL_BOOL ar5212AniControl(struct ath_hal *, HAL_ANI_CMD cmd, int param); 603113584Ssimokawaextern HAL_BOOL ar5212AniSetParams(struct ath_hal *, 604113584Ssimokawa const struct ar5212AniParams *, const struct ar5212AniParams *); 605113584Ssimokawastruct ath_rx_status; 606113584Ssimokawaextern void ar5212AniPhyErrReport(struct ath_hal *ah, 607113584Ssimokawa const struct ath_rx_status *rs); 608111942Ssimokawaextern void ar5212ProcessMibIntr(struct ath_hal *, const HAL_NODE_STATS *); 609119119Ssimokawaextern void ar5212RxMonitor(struct ath_hal *, const HAL_NODE_STATS *, 610119119Ssimokawa const struct ieee80211_channel *); 611119119Ssimokawaextern void ar5212AniPoll(struct ath_hal *, const struct ieee80211_channel *); 612119119Ssimokawaextern void ar5212AniReset(struct ath_hal *, const struct ieee80211_channel *, 613119119Ssimokawa HAL_OPMODE, int); 614119119Ssimokawa 615119119Ssimokawaextern HAL_BOOL ar5212IsNFCalInProgress(struct ath_hal *ah); 616111942Ssimokawaextern HAL_BOOL ar5212WaitNFCalComplete(struct ath_hal *ah, int i); 617111942Ssimokawa 618127468Ssimokawa#endif /* _ATH_AR5212_H_ */ 619111942Ssimokawa