ah_osdep.c revision 227410
1162413Ssam/*- 2178354Ssam * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3162413Ssam * All rights reserved. 4162413Ssam * 5162413Ssam * Redistribution and use in source and binary forms, with or without 6162413Ssam * modification, are permitted provided that the following conditions 7162413Ssam * are met: 8162413Ssam * 1. Redistributions of source code must retain the above copyright 9162413Ssam * notice, this list of conditions and the following disclaimer, 10162413Ssam * without modification. 11162413Ssam * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12162413Ssam * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13162413Ssam * redistribution must be conditioned upon including a substantially 14162413Ssam * similar Disclaimer requirement for further binary redistribution. 15162413Ssam * 16162413Ssam * NO WARRANTY 17162413Ssam * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18162413Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19162413Ssam * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20162413Ssam * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21162413Ssam * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22162413Ssam * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23162413Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24162413Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25162413Ssam * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26162413Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27162413Ssam * THE POSSIBILITY OF SUCH DAMAGES. 28162413Ssam * 29162413Ssam * $FreeBSD: head/sys/dev/ath/ah_osdep.c 227410 2011-11-09 22:39:44Z adrian $ 30162413Ssam */ 31162413Ssam#include "opt_ah.h" 32162413Ssam 33162413Ssam#include <sys/param.h> 34162413Ssam#include <sys/systm.h> 35162413Ssam#include <sys/kernel.h> 36162413Ssam#include <sys/module.h> 37162413Ssam#include <sys/sysctl.h> 38162413Ssam#include <sys/bus.h> 39162413Ssam#include <sys/malloc.h> 40162413Ssam#include <sys/proc.h> 41227410Sadrian#include <sys/lock.h> 42227410Sadrian#include <sys/mutex.h> 43162413Ssam 44162413Ssam#include <machine/stdarg.h> 45162413Ssam 46162413Ssam#include <net/ethernet.h> /* XXX for ether_sprintf */ 47162413Ssam 48185522Ssam#include <dev/ath/ath_hal/ah.h> 49162413Ssam 50162413Ssam/* 51162413Ssam * WiSoC boards overload the bus tag with information about the 52162413Ssam * board layout. We must extract the bus space tag from that 53162413Ssam * indirect structure. For everyone else the tag is passed in 54162413Ssam * directly. 55162413Ssam * XXX cache indirect ref privately 56162413Ssam */ 57162413Ssam#ifdef AH_SUPPORT_AR5312 58162413Ssam#define BUSTAG(ah) \ 59162413Ssam ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 60162413Ssam#else 61185522Ssam#define BUSTAG(ah) ((ah)->ah_st) 62162413Ssam#endif 63162413Ssam 64227410Sadrian/* 65227410Sadrian * This lock is used to seralise register access for chips which have 66227410Sadrian * problems w/ SMP CPUs issuing concurrent PCI transactions. 67227410Sadrian * 68227410Sadrian * XXX This is a global lock for now; it should be pushed to 69227410Sadrian * a per-device lock in some platform-independent fashion. 70227410Sadrian */ 71227410Sadrianstruct mtx ah_regser_mtx; 72227410SadrianMTX_SYSINIT(ah_regser, &ah_regser_mtx, "Atheros register access mutex", 73227410Sadrian MTX_SPIN); 74227410Sadrian 75162413Ssamextern void ath_hal_printf(struct ath_hal *, const char*, ...) 76162413Ssam __printflike(2,3); 77162413Ssamextern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 78162413Ssam __printflike(2, 0); 79162413Ssamextern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 80162413Ssamextern void *ath_hal_malloc(size_t); 81162413Ssamextern void ath_hal_free(void *); 82162413Ssam#ifdef AH_ASSERT 83162413Ssamextern void ath_hal_assert_failed(const char* filename, 84162413Ssam int lineno, const char* msg); 85162413Ssam#endif 86162413Ssam#ifdef AH_DEBUG 87219315Sadrianextern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...); 88162413Ssam#endif /* AH_DEBUG */ 89162413Ssam 90162413Ssam/* NB: put this here instead of the driver to avoid circular references */ 91162413SsamSYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 92227309Sedstatic SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, 93227309Sed "Atheros HAL parameters"); 94162413Ssam 95223525Sadrian#ifdef AH_DEBUG 96223525Sadrianint ath_hal_debug = 0; 97223525SadrianSYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug, 98223525Sadrian 0, "Atheros HAL debugging printfs"); 99223525SadrianTUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug); 100223525Sadrian#endif /* AH_DEBUG */ 101223525Sadrian 102227293Sedstatic MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 103162413Ssam 104162413Ssamvoid* 105162413Ssamath_hal_malloc(size_t size) 106162413Ssam{ 107162413Ssam return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 108162413Ssam} 109162413Ssam 110162413Ssamvoid 111162413Ssamath_hal_free(void* p) 112162413Ssam{ 113196935Ssam free(p, M_ATH_HAL); 114162413Ssam} 115162413Ssam 116162413Ssamvoid 117162413Ssamath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 118162413Ssam{ 119162413Ssam vprintf(fmt, ap); 120162413Ssam} 121162413Ssam 122162413Ssamvoid 123162413Ssamath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 124162413Ssam{ 125162413Ssam va_list ap; 126162413Ssam va_start(ap, fmt); 127162413Ssam ath_hal_vprintf(ah, fmt, ap); 128162413Ssam va_end(ap); 129162413Ssam} 130162413Ssam 131162413Ssamconst char* 132162413Ssamath_hal_ether_sprintf(const u_int8_t *mac) 133162413Ssam{ 134162413Ssam return ether_sprintf(mac); 135162413Ssam} 136162413Ssam 137162413Ssam#ifdef AH_DEBUG 138222031Sadrian 139222031Sadrian/* This must match the definition in ath_hal/ah_debug.h */ 140222031Sadrian#define HAL_DEBUG_UNMASKABLE 0xf0000000 141162413Ssamvoid 142219315SadrianDO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...) 143184369Ssam{ 144224045Sadrian if ((mask == HAL_DEBUG_UNMASKABLE) || 145225883Sadrian (ah != NULL && ah->ah_config.ah_debug & mask) || 146224045Sadrian (ath_hal_debug & mask)) { 147184369Ssam __va_list ap; 148184369Ssam va_start(ap, fmt); 149184369Ssam ath_hal_vprintf(ah, fmt, ap); 150184369Ssam va_end(ap); 151184369Ssam } 152184369Ssam} 153222031Sadrian#undef HAL_DEBUG_UNMASKABLE 154162413Ssam#endif /* AH_DEBUG */ 155162413Ssam 156162413Ssam#ifdef AH_DEBUG_ALQ 157162413Ssam/* 158162413Ssam * ALQ register tracing support. 159162413Ssam * 160162413Ssam * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 161162413Ssam * writes to the file /tmp/ath_hal.log. The file format is a simple 162162413Ssam * fixed-size array of records. When done logging set hw.ath.hal.alq=0 163162413Ssam * and then decode the file with the arcode program (that is part of the 164162413Ssam * HAL). If you start+stop tracing the data will be appended to an 165162413Ssam * existing file. 166162413Ssam * 167162413Ssam * NB: doesn't handle multiple devices properly; only one DEVICE record 168162413Ssam * is emitted and the different devices are not identified. 169162413Ssam */ 170162413Ssam#include <sys/alq.h> 171162413Ssam#include <sys/pcpu.h> 172185522Ssam#include <dev/ath/ath_hal/ah_decode.h> 173162413Ssam 174162413Ssamstatic struct alq *ath_hal_alq; 175162413Ssamstatic int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 176162413Ssamstatic u_int ath_hal_alq_lost; /* count of lost records */ 177220367Sadrianstatic char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log"; 178220367Sadrian 179220367SadrianSYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW, 180220367Sadrian &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile"); 181220367Sadrian 182162413Ssamstatic u_int ath_hal_alq_qsize = 64*1024; 183162413Ssam 184162413Ssamstatic int 185162413Ssamath_hal_setlogging(int enable) 186162413Ssam{ 187162413Ssam int error; 188162413Ssam 189162413Ssam if (enable) { 190168589Srwatson error = alq_open(&ath_hal_alq, ath_hal_logfile, 191168589Srwatson curthread->td_ucred, ALQ_DEFAULT_CMODE, 192168589Srwatson sizeof (struct athregrec), ath_hal_alq_qsize); 193168589Srwatson ath_hal_alq_lost = 0; 194168589Srwatson ath_hal_alq_emitdev = 1; 195168589Srwatson printf("ath_hal: logging to %s enabled\n", 196168589Srwatson ath_hal_logfile); 197162413Ssam } else { 198162413Ssam if (ath_hal_alq) 199162413Ssam alq_close(ath_hal_alq); 200162413Ssam ath_hal_alq = NULL; 201162413Ssam printf("ath_hal: logging disabled\n"); 202162413Ssam error = 0; 203162413Ssam } 204162413Ssam return (error); 205162413Ssam} 206162413Ssam 207162413Ssamstatic int 208162413Ssamsysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 209162413Ssam{ 210162413Ssam int error, enable; 211162413Ssam 212162413Ssam enable = (ath_hal_alq != NULL); 213162413Ssam error = sysctl_handle_int(oidp, &enable, 0, req); 214162413Ssam if (error || !req->newptr) 215162413Ssam return (error); 216162413Ssam else 217162413Ssam return (ath_hal_setlogging(enable)); 218162413Ssam} 219162413SsamSYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 220162413Ssam 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 221162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 222162413Ssam &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 223162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 224162413Ssam &ath_hal_alq_lost, 0, "Register operations not logged"); 225162413Ssam 226162413Ssamstatic struct ale * 227162413Ssamath_hal_alq_get(struct ath_hal *ah) 228162413Ssam{ 229162413Ssam struct ale *ale; 230162413Ssam 231162413Ssam if (ath_hal_alq_emitdev) { 232162413Ssam ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 233162413Ssam if (ale) { 234162413Ssam struct athregrec *r = 235162413Ssam (struct athregrec *) ale->ae_data; 236162413Ssam r->op = OP_DEVICE; 237162413Ssam r->reg = 0; 238162413Ssam r->val = ah->ah_devid; 239162413Ssam alq_post(ath_hal_alq, ale); 240162413Ssam ath_hal_alq_emitdev = 0; 241162413Ssam } else 242162413Ssam ath_hal_alq_lost++; 243162413Ssam } 244162413Ssam ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 245162413Ssam if (!ale) 246162413Ssam ath_hal_alq_lost++; 247162413Ssam return ale; 248162413Ssam} 249162413Ssam 250162413Ssamvoid 251162413Ssamath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 252162413Ssam{ 253162413Ssam bus_space_tag_t tag = BUSTAG(ah); 254185522Ssam bus_space_handle_t h = ah->ah_sh; 255162413Ssam 256162413Ssam if (ath_hal_alq) { 257162413Ssam struct ale *ale = ath_hal_alq_get(ah); 258162413Ssam if (ale) { 259162413Ssam struct athregrec *r = (struct athregrec *) ale->ae_data; 260162413Ssam r->op = OP_WRITE; 261162413Ssam r->reg = reg; 262162413Ssam r->val = val; 263162413Ssam alq_post(ath_hal_alq, ale); 264162413Ssam } 265162413Ssam } 266227410Sadrian if (ah->ah_config.ah_serialise_reg_war) 267227410Sadrian mtx_lock_spin(&ah_regser_mtx); 268162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 269195418Ssam if (OS_REG_UNSWAPPED(reg)) 270162413Ssam bus_space_write_4(tag, h, reg, val); 271162413Ssam else 272162413Ssam#endif 273162413Ssam bus_space_write_stream_4(tag, h, reg, val); 274227410Sadrian if (ah->ah_config.ah_serialise_reg_war) 275227410Sadrian mtx_unlock_spin(&ah_regser_mtx); 276162413Ssam} 277162413Ssam 278162413Ssamu_int32_t 279162413Ssamath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 280162413Ssam{ 281162413Ssam bus_space_tag_t tag = BUSTAG(ah); 282185522Ssam bus_space_handle_t h = ah->ah_sh; 283162413Ssam u_int32_t val; 284162413Ssam 285227410Sadrian if (ah->ah_config.ah_serialise_reg_war) 286227410Sadrian mtx_lock_spin(&ah_regser_mtx); 287162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 288195418Ssam if (OS_REG_UNSWAPPED(reg)) 289162413Ssam val = bus_space_read_4(tag, h, reg); 290162413Ssam else 291162413Ssam#endif 292162413Ssam val = bus_space_read_stream_4(tag, h, reg); 293227410Sadrian if (ah->ah_config.ah_serialise_reg_war) 294227410Sadrian mtx_unlock_spin(&ah_regser_mtx); 295162413Ssam if (ath_hal_alq) { 296162413Ssam struct ale *ale = ath_hal_alq_get(ah); 297162413Ssam if (ale) { 298162413Ssam struct athregrec *r = (struct athregrec *) ale->ae_data; 299162413Ssam r->op = OP_READ; 300162413Ssam r->reg = reg; 301162413Ssam r->val = val; 302162413Ssam alq_post(ath_hal_alq, ale); 303162413Ssam } 304162413Ssam } 305162413Ssam return val; 306162413Ssam} 307162413Ssam 308162413Ssamvoid 309162413SsamOS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 310162413Ssam{ 311162413Ssam if (ath_hal_alq) { 312162413Ssam struct ale *ale = ath_hal_alq_get(ah); 313162413Ssam if (ale) { 314162413Ssam struct athregrec *r = (struct athregrec *) ale->ae_data; 315162413Ssam r->op = OP_MARK; 316162413Ssam r->reg = id; 317162413Ssam r->val = v; 318162413Ssam alq_post(ath_hal_alq, ale); 319162413Ssam } 320162413Ssam } 321162413Ssam} 322162413Ssam#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) 323162413Ssam/* 324162413Ssam * Memory-mapped device register read/write. These are here 325162413Ssam * as routines when debugging support is enabled and/or when 326162413Ssam * explicitly configured to use function calls. The latter is 327162413Ssam * for architectures that might need to do something before 328162413Ssam * referencing memory (e.g. remap an i/o window). 329162413Ssam * 330162413Ssam * NB: see the comments in ah_osdep.h about byte-swapping register 331162413Ssam * reads and writes to understand what's going on below. 332162413Ssam */ 333162413Ssam 334162413Ssamvoid 335162413Ssamath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 336162413Ssam{ 337162413Ssam bus_space_tag_t tag = BUSTAG(ah); 338185522Ssam bus_space_handle_t h = ah->ah_sh; 339162413Ssam 340227410Sadrian if (ah->ah_config.ah_serialise_reg_war) 341227410Sadrian mtx_lock_spin(&ah_regser_mtx); 342162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 343195418Ssam if (OS_REG_UNSWAPPED(reg)) 344162413Ssam bus_space_write_4(tag, h, reg, val); 345162413Ssam else 346162413Ssam#endif 347162413Ssam bus_space_write_stream_4(tag, h, reg, val); 348227410Sadrian if (ah->ah_config.ah_serialise_reg_war) 349227410Sadrian mtx_unlock_spin(&ah_regser_mtx); 350162413Ssam} 351162413Ssam 352162413Ssamu_int32_t 353162413Ssamath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 354162413Ssam{ 355162413Ssam bus_space_tag_t tag = BUSTAG(ah); 356185522Ssam bus_space_handle_t h = ah->ah_sh; 357162413Ssam u_int32_t val; 358162413Ssam 359227410Sadrian if (ah->ah_config.ah_serialise_reg_war) 360227410Sadrian mtx_lock_spin(&ah_regser_mtx); 361162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 362195418Ssam if (OS_REG_UNSWAPPED(reg)) 363162413Ssam val = bus_space_read_4(tag, h, reg); 364162413Ssam else 365162413Ssam#endif 366162413Ssam val = bus_space_read_stream_4(tag, h, reg); 367227410Sadrian if (ah->ah_config.ah_serialise_reg_war) 368227410Sadrian mtx_unlock_spin(&ah_regser_mtx); 369162413Ssam return val; 370162413Ssam} 371162413Ssam#endif /* AH_DEBUG || AH_REGOPS_FUNC */ 372162413Ssam 373162413Ssam#ifdef AH_ASSERT 374162413Ssamvoid 375162413Ssamath_hal_assert_failed(const char* filename, int lineno, const char *msg) 376162413Ssam{ 377162413Ssam printf("Atheros HAL assertion failure: %s: line %u: %s\n", 378162413Ssam filename, lineno, msg); 379162413Ssam panic("ath_hal_assert"); 380162413Ssam} 381162413Ssam#endif /* AH_ASSERT */ 382