ah_osdep.c revision 222031
1162413Ssam/*-
2178354Ssam * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3162413Ssam * All rights reserved.
4162413Ssam *
5162413Ssam * Redistribution and use in source and binary forms, with or without
6162413Ssam * modification, are permitted provided that the following conditions
7162413Ssam * are met:
8162413Ssam * 1. Redistributions of source code must retain the above copyright
9162413Ssam *    notice, this list of conditions and the following disclaimer,
10162413Ssam *    without modification.
11162413Ssam * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12162413Ssam *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13162413Ssam *    redistribution must be conditioned upon including a substantially
14162413Ssam *    similar Disclaimer requirement for further binary redistribution.
15162413Ssam *
16162413Ssam * NO WARRANTY
17162413Ssam * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18162413Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19162413Ssam * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20162413Ssam * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21162413Ssam * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22162413Ssam * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23162413Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24162413Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25162413Ssam * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26162413Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27162413Ssam * THE POSSIBILITY OF SUCH DAMAGES.
28162413Ssam *
29162413Ssam * $FreeBSD: head/sys/dev/ath/ah_osdep.c 222031 2011-05-17 16:30:34Z adrian $
30162413Ssam */
31162413Ssam#include "opt_ah.h"
32162413Ssam
33162413Ssam#include <sys/param.h>
34162413Ssam#include <sys/systm.h>
35162413Ssam#include <sys/kernel.h>
36162413Ssam#include <sys/module.h>
37162413Ssam#include <sys/sysctl.h>
38162413Ssam#include <sys/bus.h>
39162413Ssam#include <sys/malloc.h>
40162413Ssam#include <sys/proc.h>
41162413Ssam
42162413Ssam#include <machine/stdarg.h>
43162413Ssam
44162413Ssam#include <net/ethernet.h>		/* XXX for ether_sprintf */
45162413Ssam
46185522Ssam#include <dev/ath/ath_hal/ah.h>
47162413Ssam
48162413Ssam/*
49162413Ssam * WiSoC boards overload the bus tag with information about the
50162413Ssam * board layout.  We must extract the bus space tag from that
51162413Ssam * indirect structure.  For everyone else the tag is passed in
52162413Ssam * directly.
53162413Ssam * XXX cache indirect ref privately
54162413Ssam */
55162413Ssam#ifdef AH_SUPPORT_AR5312
56162413Ssam#define	BUSTAG(ah) \
57162413Ssam	((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
58162413Ssam#else
59185522Ssam#define	BUSTAG(ah)	((ah)->ah_st)
60162413Ssam#endif
61162413Ssam
62162413Ssamextern	void ath_hal_printf(struct ath_hal *, const char*, ...)
63162413Ssam		__printflike(2,3);
64162413Ssamextern	void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
65162413Ssam		__printflike(2, 0);
66162413Ssamextern	const char* ath_hal_ether_sprintf(const u_int8_t *mac);
67162413Ssamextern	void *ath_hal_malloc(size_t);
68162413Ssamextern	void ath_hal_free(void *);
69162413Ssam#ifdef AH_ASSERT
70162413Ssamextern	void ath_hal_assert_failed(const char* filename,
71162413Ssam		int lineno, const char* msg);
72162413Ssam#endif
73162413Ssam#ifdef AH_DEBUG
74219315Sadrianextern	void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...);
75162413Ssam#endif /* AH_DEBUG */
76162413Ssam
77162413Ssam/* NB: put this here instead of the driver to avoid circular references */
78162413SsamSYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters");
79162413SsamSYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters");
80162413Ssam
81162413Ssam#ifdef AH_DEBUG
82219315Sadrianint ath_hal_debug = 0;
83162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
84162413Ssam	    0, "Atheros HAL debugging printfs");
85162413SsamTUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
86162413Ssam#endif /* AH_DEBUG */
87162413Ssam
88219942Sadrianint ath_hal_ar5416_biasadj = 0;
89219942SadrianSYSCTL_INT(_hw_ath_hal, OID_AUTO, ar5416_biasadj, CTLFLAG_RW,
90219948Sadrian	&ath_hal_ar5416_biasadj, 0, "Enable 2ghz AR5416 direction sensitivity"
91219942Sadrian	" bias adjust");
92219942Sadrian
93162413Ssam/* NB: these are deprecated; they exist for now for compatibility */
94162413Ssamint	ath_hal_dma_beacon_response_time = 2;	/* in TU's */
95162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW,
96162413Ssam	   &ath_hal_dma_beacon_response_time, 0,
97162413Ssam	   "Atheros HAL DMA beacon response time");
98162413Ssamint	ath_hal_sw_beacon_response_time = 10;	/* in TU's */
99162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW,
100162413Ssam	   &ath_hal_sw_beacon_response_time, 0,
101162413Ssam	   "Atheros HAL software beacon response time");
102162413Ssamint	ath_hal_additional_swba_backoff = 0;	/* in TU's */
103162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW,
104162413Ssam	   &ath_hal_additional_swba_backoff, 0,
105162413Ssam	   "Atheros HAL additional SWBA backoff time");
106162413Ssam
107162413SsamMALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
108162413Ssam
109162413Ssamvoid*
110162413Ssamath_hal_malloc(size_t size)
111162413Ssam{
112162413Ssam	return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO);
113162413Ssam}
114162413Ssam
115162413Ssamvoid
116162413Ssamath_hal_free(void* p)
117162413Ssam{
118196935Ssam	free(p, M_ATH_HAL);
119162413Ssam}
120162413Ssam
121162413Ssamvoid
122162413Ssamath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap)
123162413Ssam{
124162413Ssam	vprintf(fmt, ap);
125162413Ssam}
126162413Ssam
127162413Ssamvoid
128162413Ssamath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
129162413Ssam{
130162413Ssam	va_list ap;
131162413Ssam	va_start(ap, fmt);
132162413Ssam	ath_hal_vprintf(ah, fmt, ap);
133162413Ssam	va_end(ap);
134162413Ssam}
135162413Ssam
136162413Ssamconst char*
137162413Ssamath_hal_ether_sprintf(const u_int8_t *mac)
138162413Ssam{
139162413Ssam	return ether_sprintf(mac);
140162413Ssam}
141162413Ssam
142162413Ssam#ifdef AH_DEBUG
143222031Sadrian
144222031Sadrian/* This must match the definition in ath_hal/ah_debug.h */
145222031Sadrian#define	HAL_DEBUG_UNMASKABLE	0xf0000000
146162413Ssamvoid
147219315SadrianDO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
148184369Ssam{
149222031Sadrian	if ((mask == HAL_DEBUG_UNMASKABLE) || (ath_hal_debug & mask)) {
150184369Ssam		__va_list ap;
151184369Ssam		va_start(ap, fmt);
152184369Ssam		ath_hal_vprintf(ah, fmt, ap);
153184369Ssam		va_end(ap);
154184369Ssam	}
155184369Ssam}
156222031Sadrian#undef	HAL_DEBUG_UNMASKABLE
157162413Ssam#endif /* AH_DEBUG */
158162413Ssam
159162413Ssam#ifdef AH_DEBUG_ALQ
160162413Ssam/*
161162413Ssam * ALQ register tracing support.
162162413Ssam *
163162413Ssam * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
164162413Ssam * writes to the file /tmp/ath_hal.log.  The file format is a simple
165162413Ssam * fixed-size array of records.  When done logging set hw.ath.hal.alq=0
166162413Ssam * and then decode the file with the arcode program (that is part of the
167162413Ssam * HAL).  If you start+stop tracing the data will be appended to an
168162413Ssam * existing file.
169162413Ssam *
170162413Ssam * NB: doesn't handle multiple devices properly; only one DEVICE record
171162413Ssam *     is emitted and the different devices are not identified.
172162413Ssam */
173162413Ssam#include <sys/alq.h>
174162413Ssam#include <sys/pcpu.h>
175185522Ssam#include <dev/ath/ath_hal/ah_decode.h>
176162413Ssam
177162413Ssamstatic	struct alq *ath_hal_alq;
178162413Ssamstatic	int ath_hal_alq_emitdev;	/* need to emit DEVICE record */
179162413Ssamstatic	u_int ath_hal_alq_lost;		/* count of lost records */
180220367Sadrianstatic	char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log";
181220367Sadrian
182220367SadrianSYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW,
183220367Sadrian    &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile");
184220367Sadrian
185162413Ssamstatic	u_int ath_hal_alq_qsize = 64*1024;
186162413Ssam
187162413Ssamstatic int
188162413Ssamath_hal_setlogging(int enable)
189162413Ssam{
190162413Ssam	int error;
191162413Ssam
192162413Ssam	if (enable) {
193168589Srwatson		error = alq_open(&ath_hal_alq, ath_hal_logfile,
194168589Srwatson			curthread->td_ucred, ALQ_DEFAULT_CMODE,
195168589Srwatson			sizeof (struct athregrec), ath_hal_alq_qsize);
196168589Srwatson		ath_hal_alq_lost = 0;
197168589Srwatson		ath_hal_alq_emitdev = 1;
198168589Srwatson		printf("ath_hal: logging to %s enabled\n",
199168589Srwatson			ath_hal_logfile);
200162413Ssam	} else {
201162413Ssam		if (ath_hal_alq)
202162413Ssam			alq_close(ath_hal_alq);
203162413Ssam		ath_hal_alq = NULL;
204162413Ssam		printf("ath_hal: logging disabled\n");
205162413Ssam		error = 0;
206162413Ssam	}
207162413Ssam	return (error);
208162413Ssam}
209162413Ssam
210162413Ssamstatic int
211162413Ssamsysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
212162413Ssam{
213162413Ssam	int error, enable;
214162413Ssam
215162413Ssam	enable = (ath_hal_alq != NULL);
216162413Ssam        error = sysctl_handle_int(oidp, &enable, 0, req);
217162413Ssam        if (error || !req->newptr)
218162413Ssam                return (error);
219162413Ssam	else
220162413Ssam		return (ath_hal_setlogging(enable));
221162413Ssam}
222162413SsamSYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW,
223162413Ssam	0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging");
224162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
225162413Ssam	&ath_hal_alq_qsize, 0, "In-memory log size (#records)");
226162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
227162413Ssam	&ath_hal_alq_lost, 0, "Register operations not logged");
228162413Ssam
229162413Ssamstatic struct ale *
230162413Ssamath_hal_alq_get(struct ath_hal *ah)
231162413Ssam{
232162413Ssam	struct ale *ale;
233162413Ssam
234162413Ssam	if (ath_hal_alq_emitdev) {
235162413Ssam		ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
236162413Ssam		if (ale) {
237162413Ssam			struct athregrec *r =
238162413Ssam				(struct athregrec *) ale->ae_data;
239162413Ssam			r->op = OP_DEVICE;
240162413Ssam			r->reg = 0;
241162413Ssam			r->val = ah->ah_devid;
242162413Ssam			alq_post(ath_hal_alq, ale);
243162413Ssam			ath_hal_alq_emitdev = 0;
244162413Ssam		} else
245162413Ssam			ath_hal_alq_lost++;
246162413Ssam	}
247162413Ssam	ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
248162413Ssam	if (!ale)
249162413Ssam		ath_hal_alq_lost++;
250162413Ssam	return ale;
251162413Ssam}
252162413Ssam
253162413Ssamvoid
254162413Ssamath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
255162413Ssam{
256162413Ssam	bus_space_tag_t tag = BUSTAG(ah);
257185522Ssam	bus_space_handle_t h = ah->ah_sh;
258162413Ssam
259162413Ssam	if (ath_hal_alq) {
260162413Ssam		struct ale *ale = ath_hal_alq_get(ah);
261162413Ssam		if (ale) {
262162413Ssam			struct athregrec *r = (struct athregrec *) ale->ae_data;
263162413Ssam			r->op = OP_WRITE;
264162413Ssam			r->reg = reg;
265162413Ssam			r->val = val;
266162413Ssam			alq_post(ath_hal_alq, ale);
267162413Ssam		}
268162413Ssam	}
269162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN
270195418Ssam	if (OS_REG_UNSWAPPED(reg))
271162413Ssam		bus_space_write_4(tag, h, reg, val);
272162413Ssam	else
273162413Ssam#endif
274162413Ssam		bus_space_write_stream_4(tag, h, reg, val);
275162413Ssam}
276162413Ssam
277162413Ssamu_int32_t
278162413Ssamath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
279162413Ssam{
280162413Ssam	bus_space_tag_t tag = BUSTAG(ah);
281185522Ssam	bus_space_handle_t h = ah->ah_sh;
282162413Ssam	u_int32_t val;
283162413Ssam
284162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN
285195418Ssam	if (OS_REG_UNSWAPPED(reg))
286162413Ssam		val = bus_space_read_4(tag, h, reg);
287162413Ssam	else
288162413Ssam#endif
289162413Ssam		val = bus_space_read_stream_4(tag, h, reg);
290162413Ssam	if (ath_hal_alq) {
291162413Ssam		struct ale *ale = ath_hal_alq_get(ah);
292162413Ssam		if (ale) {
293162413Ssam			struct athregrec *r = (struct athregrec *) ale->ae_data;
294162413Ssam			r->op = OP_READ;
295162413Ssam			r->reg = reg;
296162413Ssam			r->val = val;
297162413Ssam			alq_post(ath_hal_alq, ale);
298162413Ssam		}
299162413Ssam	}
300162413Ssam	return val;
301162413Ssam}
302162413Ssam
303162413Ssamvoid
304162413SsamOS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
305162413Ssam{
306162413Ssam	if (ath_hal_alq) {
307162413Ssam		struct ale *ale = ath_hal_alq_get(ah);
308162413Ssam		if (ale) {
309162413Ssam			struct athregrec *r = (struct athregrec *) ale->ae_data;
310162413Ssam			r->op = OP_MARK;
311162413Ssam			r->reg = id;
312162413Ssam			r->val = v;
313162413Ssam			alq_post(ath_hal_alq, ale);
314162413Ssam		}
315162413Ssam	}
316162413Ssam}
317162413Ssam#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
318162413Ssam/*
319162413Ssam * Memory-mapped device register read/write.  These are here
320162413Ssam * as routines when debugging support is enabled and/or when
321162413Ssam * explicitly configured to use function calls.  The latter is
322162413Ssam * for architectures that might need to do something before
323162413Ssam * referencing memory (e.g. remap an i/o window).
324162413Ssam *
325162413Ssam * NB: see the comments in ah_osdep.h about byte-swapping register
326162413Ssam *     reads and writes to understand what's going on below.
327162413Ssam */
328162413Ssam
329162413Ssamvoid
330162413Ssamath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
331162413Ssam{
332162413Ssam	bus_space_tag_t tag = BUSTAG(ah);
333185522Ssam	bus_space_handle_t h = ah->ah_sh;
334162413Ssam
335162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN
336195418Ssam	if (OS_REG_UNSWAPPED(reg))
337162413Ssam		bus_space_write_4(tag, h, reg, val);
338162413Ssam	else
339162413Ssam#endif
340162413Ssam		bus_space_write_stream_4(tag, h, reg, val);
341162413Ssam}
342162413Ssam
343162413Ssamu_int32_t
344162413Ssamath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
345162413Ssam{
346162413Ssam	bus_space_tag_t tag = BUSTAG(ah);
347185522Ssam	bus_space_handle_t h = ah->ah_sh;
348162413Ssam	u_int32_t val;
349162413Ssam
350162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN
351195418Ssam	if (OS_REG_UNSWAPPED(reg))
352162413Ssam		val = bus_space_read_4(tag, h, reg);
353162413Ssam	else
354162413Ssam#endif
355162413Ssam		val = bus_space_read_stream_4(tag, h, reg);
356162413Ssam	return val;
357162413Ssam}
358162413Ssam#endif /* AH_DEBUG || AH_REGOPS_FUNC */
359162413Ssam
360162413Ssam#ifdef AH_ASSERT
361162413Ssamvoid
362162413Ssamath_hal_assert_failed(const char* filename, int lineno, const char *msg)
363162413Ssam{
364162413Ssam	printf("Atheros HAL assertion failure: %s: line %u: %s\n",
365162413Ssam		filename, lineno, msg);
366162413Ssam	panic("ath_hal_assert");
367162413Ssam}
368162413Ssam#endif /* AH_ASSERT */
369