1/*- 2 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD$"); 29 30#include <sys/param.h> 31#include <sys/module.h> 32#include <sys/systm.h> 33#include <sys/kernel.h> 34#include <sys/ata.h> 35#include <sys/bus.h> 36#include <sys/endian.h> 37#include <sys/malloc.h> 38#include <sys/lock.h> 39#include <sys/mutex.h> 40#include <sys/sema.h> 41#include <sys/taskqueue.h> 42#include <vm/uma.h> 43#include <machine/stdarg.h> 44#include <machine/resource.h> 45#include <machine/bus.h> 46#include <sys/rman.h> 47#include <dev/pci/pcivar.h> 48#include <dev/pci/pcireg.h> 49#include <dev/ata/ata-all.h> 50#include <dev/ata/ata-pci.h> 51#include <ata_if.h> 52 53/* local prototypes */ 54static int ata_acard_chipinit(device_t dev); 55static int ata_acard_ch_attach(device_t dev); 56static int ata_acard_status(device_t dev); 57static int ata_acard_850_setmode(device_t dev, int target, int mode); 58static int ata_acard_86X_setmode(device_t dev, int target, int mode); 59 60/* misc defines */ 61#define ATP_OLD 1 62 63/* 64 * Acard chipset support functions 65 */ 66static int 67ata_acard_probe(device_t dev) 68{ 69 struct ata_pci_controller *ctlr = device_get_softc(dev); 70 static const struct ata_chip_id ids[] = 71 {{ ATA_ATP850R, 0, ATP_OLD, 0x00, ATA_UDMA2, "ATP850" }, 72 { ATA_ATP860A, 0, 0, 0x00, ATA_UDMA4, "ATP860A" }, 73 { ATA_ATP860R, 0, 0, 0x00, ATA_UDMA4, "ATP860R" }, 74 { ATA_ATP865A, 0, 0, 0x00, ATA_UDMA6, "ATP865A" }, 75 { ATA_ATP865R, 0, 0, 0x00, ATA_UDMA6, "ATP865R" }, 76 { 0, 0, 0, 0, 0, 0}}; 77 78 if (pci_get_vendor(dev) != ATA_ACARD_ID) 79 return ENXIO; 80 81 if (!(ctlr->chip = ata_match_chip(dev, ids))) 82 return ENXIO; 83 84 ata_set_desc(dev); 85 ctlr->chipinit = ata_acard_chipinit; 86 return (BUS_PROBE_LOW_PRIORITY); 87} 88 89static int 90ata_acard_chipinit(device_t dev) 91{ 92 struct ata_pci_controller *ctlr = device_get_softc(dev); 93 94 if (ata_setup_interrupt(dev, ata_generic_intr)) 95 return ENXIO; 96 97 ctlr->ch_attach = ata_acard_ch_attach; 98 ctlr->ch_detach = ata_pci_ch_detach; 99 if (ctlr->chip->cfg1 == ATP_OLD) { 100 ctlr->setmode = ata_acard_850_setmode; 101 /* Work around the lack of channel serialization in ATA_CAM. */ 102 ctlr->channels = 1; 103 device_printf(dev, "second channel ignored\n"); 104 } 105 else 106 ctlr->setmode = ata_acard_86X_setmode; 107 return 0; 108} 109 110static int 111ata_acard_ch_attach(device_t dev) 112{ 113 struct ata_channel *ch = device_get_softc(dev); 114 115 /* setup the usual register normal pci style */ 116 if (ata_pci_ch_attach(dev)) 117 return ENXIO; 118 119 ch->hw.status = ata_acard_status; 120 ch->flags |= ATA_NO_ATAPI_DMA; 121 return 0; 122} 123 124static int 125ata_acard_status(device_t dev) 126{ 127 struct ata_channel *ch = device_get_softc(dev); 128 129 if (ch->dma.flags & ATA_DMA_ACTIVE) { 130 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 131 132 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != 133 ATA_BMSTAT_INTERRUPT) 134 return 0; 135 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR); 136 DELAY(1); 137 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 138 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 139 DELAY(1); 140 } 141 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) { 142 DELAY(100); 143 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) 144 return 0; 145 } 146 return 1; 147} 148 149static int 150ata_acard_850_setmode(device_t dev, int target, int mode) 151{ 152 device_t parent = device_get_parent(dev); 153 struct ata_pci_controller *ctlr = device_get_softc(parent); 154 struct ata_channel *ch = device_get_softc(dev); 155 int devno = (ch->unit << 1) + target; 156 157 mode = min(mode, ctlr->chip->max_dma); 158 /* XXX SOS missing WDMA0+1 + PIO modes */ 159 if (mode >= ATA_WDMA2) { 160 u_int8_t reg54 = pci_read_config(parent, 0x54, 1); 161 162 reg54 &= ~(0x03 << (devno << 1)); 163 if (mode >= ATA_UDMA0) 164 reg54 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 1)); 165 pci_write_config(parent, 0x54, reg54, 1); 166 pci_write_config(parent, 0x4a, 0xa6, 1); 167 pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2); 168 } 169 /* we could set PIO mode timings, but we assume the BIOS did that */ 170 return (mode); 171} 172 173static int 174ata_acard_86X_setmode(device_t dev, int target, int mode) 175{ 176 device_t parent = device_get_parent(dev); 177 struct ata_pci_controller *ctlr = device_get_softc(parent); 178 struct ata_channel *ch = device_get_softc(dev); 179 int devno = (ch->unit << 1) + target; 180 181 mode = min(mode, ctlr->chip->max_dma); 182 /* XXX SOS missing WDMA0+1 + PIO modes */ 183 if (mode >= ATA_WDMA2) { 184 u_int16_t reg44 = pci_read_config(parent, 0x44, 2); 185 186 reg44 &= ~(0x000f << (devno << 2)); 187 if (mode >= ATA_UDMA0) 188 reg44 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 2)); 189 pci_write_config(parent, 0x44, reg44, 2); 190 pci_write_config(parent, 0x4a, 0xa6, 1); 191 pci_write_config(parent, 0x40 + devno, 0x31, 1); 192 } 193 /* we could set PIO mode timings, but we assume the BIOS did that */ 194 return (mode); 195} 196 197ATA_DECLARE_DRIVER(ata_acard); 198