ahci_pci.c revision 244983
1195534Sscottl/*- 2238805Smav * Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org> 3195534Sscottl * All rights reserved. 4195534Sscottl * 5195534Sscottl * Redistribution and use in source and binary forms, with or without 6195534Sscottl * modification, are permitted provided that the following conditions 7195534Sscottl * are met: 8195534Sscottl * 1. Redistributions of source code must retain the above copyright 9195534Sscottl * notice, this list of conditions and the following disclaimer, 10195534Sscottl * without modification, immediately at the beginning of the file. 11195534Sscottl * 2. Redistributions in binary form must reproduce the above copyright 12195534Sscottl * notice, this list of conditions and the following disclaimer in the 13195534Sscottl * documentation and/or other materials provided with the distribution. 14195534Sscottl * 15195534Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16195534Sscottl * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17195534Sscottl * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18195534Sscottl * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19195534Sscottl * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20195534Sscottl * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21195534Sscottl * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22195534Sscottl * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23195534Sscottl * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24195534Sscottl * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25195534Sscottl */ 26195534Sscottl 27195534Sscottl#include <sys/cdefs.h> 28195534Sscottl__FBSDID("$FreeBSD: head/sys/dev/ahci/ahci.c 244983 2013-01-02 22:26:46Z jfv $"); 29195534Sscottl 30195534Sscottl#include <sys/param.h> 31195534Sscottl#include <sys/module.h> 32195534Sscottl#include <sys/systm.h> 33195534Sscottl#include <sys/kernel.h> 34195534Sscottl#include <sys/bus.h> 35220576Smav#include <sys/conf.h> 36195534Sscottl#include <sys/endian.h> 37195534Sscottl#include <sys/malloc.h> 38195534Sscottl#include <sys/lock.h> 39195534Sscottl#include <sys/mutex.h> 40195534Sscottl#include <machine/stdarg.h> 41195534Sscottl#include <machine/resource.h> 42195534Sscottl#include <machine/bus.h> 43195534Sscottl#include <sys/rman.h> 44195534Sscottl#include <dev/pci/pcivar.h> 45195534Sscottl#include <dev/pci/pcireg.h> 46195534Sscottl#include "ahci.h" 47195534Sscottl 48195534Sscottl#include <cam/cam.h> 49195534Sscottl#include <cam/cam_ccb.h> 50195534Sscottl#include <cam/cam_sim.h> 51195534Sscottl#include <cam/cam_xpt_sim.h> 52195534Sscottl#include <cam/cam_debug.h> 53195534Sscottl 54195534Sscottl/* local prototypes */ 55195534Sscottlstatic int ahci_setup_interrupt(device_t dev); 56195534Sscottlstatic void ahci_intr(void *data); 57195534Sscottlstatic void ahci_intr_one(void *data); 58195534Sscottlstatic int ahci_suspend(device_t dev); 59195534Sscottlstatic int ahci_resume(device_t dev); 60208375Smavstatic int ahci_ch_init(device_t dev); 61208375Smavstatic int ahci_ch_deinit(device_t dev); 62195534Sscottlstatic int ahci_ch_suspend(device_t dev); 63195534Sscottlstatic int ahci_ch_resume(device_t dev); 64196656Smavstatic void ahci_ch_pm(void *arg); 65195534Sscottlstatic void ahci_ch_intr_locked(void *data); 66195534Sscottlstatic void ahci_ch_intr(void *data); 67195534Sscottlstatic int ahci_ctlr_reset(device_t dev); 68205422Smavstatic int ahci_ctlr_setup(device_t dev); 69195534Sscottlstatic void ahci_begin_transaction(device_t dev, union ccb *ccb); 70195534Sscottlstatic void ahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 71195534Sscottlstatic void ahci_execute_transaction(struct ahci_slot *slot); 72195534Sscottlstatic void ahci_timeout(struct ahci_slot *slot); 73195534Sscottlstatic void ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et); 74199821Smavstatic int ahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag); 75195534Sscottlstatic void ahci_dmainit(device_t dev); 76195534Sscottlstatic void ahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 77195534Sscottlstatic void ahci_dmafini(device_t dev); 78195534Sscottlstatic void ahci_slotsalloc(device_t dev); 79195534Sscottlstatic void ahci_slotsfree(device_t dev); 80195534Sscottlstatic void ahci_reset(device_t dev); 81203123Smavstatic void ahci_start(device_t dev, int fbs); 82195534Sscottlstatic void ahci_stop(device_t dev); 83195534Sscottlstatic void ahci_clo(device_t dev); 84195534Sscottlstatic void ahci_start_fr(device_t dev); 85195534Sscottlstatic void ahci_stop_fr(device_t dev); 86195534Sscottl 87195534Sscottlstatic int ahci_sata_connect(struct ahci_channel *ch); 88203108Smavstatic int ahci_sata_phy_reset(device_t dev); 89220576Smavstatic int ahci_wait_ready(device_t dev, int t, int t0); 90195534Sscottl 91220565Smavstatic void ahci_issue_recovery(device_t dev); 92195534Sscottlstatic void ahci_process_read_log(device_t dev, union ccb *ccb); 93220565Smavstatic void ahci_process_request_sense(device_t dev, union ccb *ccb); 94195534Sscottl 95195534Sscottlstatic void ahciaction(struct cam_sim *sim, union ccb *ccb); 96195534Sscottlstatic void ahcipoll(struct cam_sim *sim); 97195534Sscottl 98227293Sedstatic MALLOC_DEFINE(M_AHCI, "AHCI driver", "AHCI driver data buffers"); 99195534Sscottl 100199176Smavstatic struct { 101199176Smav uint32_t id; 102203030Smav uint8_t rev; 103199176Smav const char *name; 104199322Smav int quirks; 105199322Smav#define AHCI_Q_NOFORCE 1 106199322Smav#define AHCI_Q_NOPMP 2 107199322Smav#define AHCI_Q_NONCQ 4 108199322Smav#define AHCI_Q_1CH 8 109199322Smav#define AHCI_Q_2CH 16 110199322Smav#define AHCI_Q_4CH 32 111199322Smav#define AHCI_Q_EDGEIS 64 112203030Smav#define AHCI_Q_SATA2 128 113203123Smav#define AHCI_Q_NOBSYRES 256 114207499Smav#define AHCI_Q_NOAA 512 115218596Smav#define AHCI_Q_NOCOUNT 1024 116222304Smav#define AHCI_Q_ALTSIG 2048 117199176Smav} ahci_ids[] = { 118203030Smav {0x43801002, 0x00, "ATI IXP600", 0}, 119203030Smav {0x43901002, 0x00, "ATI IXP700", 0}, 120203030Smav {0x43911002, 0x00, "ATI IXP700", 0}, 121203030Smav {0x43921002, 0x00, "ATI IXP700", 0}, 122203030Smav {0x43931002, 0x00, "ATI IXP700", 0}, 123203030Smav {0x43941002, 0x00, "ATI IXP800", 0}, 124203030Smav {0x43951002, 0x00, "ATI IXP800", 0}, 125244146Smav {0x78001022, 0x00, "AMD Hudson-2", 0}, 126244146Smav {0x78011022, 0x00, "AMD Hudson-2", 0}, 127244146Smav {0x78021022, 0x00, "AMD Hudson-2", 0}, 128244146Smav {0x78031022, 0x00, "AMD Hudson-2", 0}, 129244146Smav {0x78041022, 0x00, "AMD Hudson-2", 0}, 130225140Smav {0x06121b21, 0x00, "ASMedia ASM1061", 0}, 131203030Smav {0x26528086, 0x00, "Intel ICH6", AHCI_Q_NOFORCE}, 132203030Smav {0x26538086, 0x00, "Intel ICH6M", AHCI_Q_NOFORCE}, 133203030Smav {0x26818086, 0x00, "Intel ESB2", 0}, 134203030Smav {0x26828086, 0x00, "Intel ESB2", 0}, 135203030Smav {0x26838086, 0x00, "Intel ESB2", 0}, 136203030Smav {0x27c18086, 0x00, "Intel ICH7", 0}, 137203030Smav {0x27c38086, 0x00, "Intel ICH7", 0}, 138203030Smav {0x27c58086, 0x00, "Intel ICH7M", 0}, 139203030Smav {0x27c68086, 0x00, "Intel ICH7M", 0}, 140203030Smav {0x28218086, 0x00, "Intel ICH8", 0}, 141203030Smav {0x28228086, 0x00, "Intel ICH8", 0}, 142203030Smav {0x28248086, 0x00, "Intel ICH8", 0}, 143203030Smav {0x28298086, 0x00, "Intel ICH8M", 0}, 144203030Smav {0x282a8086, 0x00, "Intel ICH8M", 0}, 145203030Smav {0x29228086, 0x00, "Intel ICH9", 0}, 146203030Smav {0x29238086, 0x00, "Intel ICH9", 0}, 147203030Smav {0x29248086, 0x00, "Intel ICH9", 0}, 148203030Smav {0x29258086, 0x00, "Intel ICH9", 0}, 149203030Smav {0x29278086, 0x00, "Intel ICH9", 0}, 150203030Smav {0x29298086, 0x00, "Intel ICH9M", 0}, 151203030Smav {0x292a8086, 0x00, "Intel ICH9M", 0}, 152203030Smav {0x292b8086, 0x00, "Intel ICH9M", 0}, 153203030Smav {0x292c8086, 0x00, "Intel ICH9M", 0}, 154203030Smav {0x292f8086, 0x00, "Intel ICH9M", 0}, 155203030Smav {0x294d8086, 0x00, "Intel ICH9", 0}, 156203030Smav {0x294e8086, 0x00, "Intel ICH9M", 0}, 157203030Smav {0x3a058086, 0x00, "Intel ICH10", 0}, 158203030Smav {0x3a228086, 0x00, "Intel ICH10", 0}, 159203030Smav {0x3a258086, 0x00, "Intel ICH10", 0}, 160211922Smav {0x3b228086, 0x00, "Intel 5 Series/3400 Series", 0}, 161211922Smav {0x3b238086, 0x00, "Intel 5 Series/3400 Series", 0}, 162211922Smav {0x3b258086, 0x00, "Intel 5 Series/3400 Series", 0}, 163211922Smav {0x3b298086, 0x00, "Intel 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180221789Sjfv {0x1e0e8086, 0x00, "Intel Panther Point", 0}, 181221789Sjfv {0x1e0f8086, 0x00, "Intel Panther Point", 0}, 182244983Sjfv {0x8c028086, 0x00, "Intel Lynx Point", 0}, 183244983Sjfv {0x8c038086, 0x00, "Intel Lynx Point", 0}, 184244983Sjfv {0x8c048086, 0x00, "Intel Lynx Point", 0}, 185244983Sjfv {0x8c058086, 0x00, "Intel Lynx Point", 0}, 186244983Sjfv {0x8c068086, 0x00, "Intel Lynx Point", 0}, 187244983Sjfv {0x8c078086, 0x00, "Intel Lynx Point", 0}, 188244983Sjfv {0x8c0e8086, 0x00, "Intel Lynx Point", 0}, 189244983Sjfv {0x8c0f8086, 0x00, "Intel Lynx Point", 0}, 190221789Sjfv {0x23238086, 0x00, "Intel DH89xxCC", 0}, 191239907Smav {0x2360197b, 0x00, "JMicron JMB360", 0}, 192203030Smav {0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE}, 193239907Smav {0x2362197b, 0x00, "JMicron JMB362", 0}, 194203030Smav {0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE}, 195203030Smav {0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE}, 196203030Smav {0x2366197b, 0x00, "JMicron JMB366", AHCI_Q_NOFORCE}, 197203030Smav {0x2368197b, 0x00, "JMicron JMB368", AHCI_Q_NOFORCE}, 198232380Smav {0x611111ab, 0x00, "Marvell 88SE6111", AHCI_Q_NOFORCE | AHCI_Q_1CH | 199218596Smav AHCI_Q_EDGEIS}, 200232380Smav {0x612111ab, 0x00, "Marvell 88SE6121", AHCI_Q_NOFORCE | AHCI_Q_2CH | 201218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 202232380Smav {0x614111ab, 0x00, "Marvell 88SE6141", AHCI_Q_NOFORCE | AHCI_Q_4CH | 203218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 204232380Smav {0x614511ab, 0x00, "Marvell 88SE6145", AHCI_Q_NOFORCE | AHCI_Q_4CH | 205218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 206220413Smav {0x91201b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_NOBSYRES}, 207222304Smav {0x91231b4b, 0x11, "Marvell 88SE912x", AHCI_Q_NOBSYRES|AHCI_Q_ALTSIG}, 208203123Smav {0x91231b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_SATA2|AHCI_Q_NOBSYRES}, 209223699Smav {0x91251b4b, 0x00, "Marvell 88SE9125", AHCI_Q_NOBSYRES}, 210225789Smav {0x91281b4b, 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238207499Smav {0x055510de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 239207499Smav {0x055610de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 240207499Smav {0x055710de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 241207499Smav {0x055810de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 242207499Smav {0x055910de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 243207499Smav {0x055A10de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 244207499Smav {0x055B10de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 245207499Smav {0x058410de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 246207499Smav {0x07f010de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 247207499Smav {0x07f110de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 248207499Smav {0x07f210de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 249207499Smav {0x07f310de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 250207499Smav {0x07f410de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 251207499Smav {0x07f510de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 252207499Smav {0x07f610de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 253207499Smav {0x07f710de, 0x00, "NVIDIA MCP73", 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MCP77", AHCI_Q_NOAA}, 270207499Smav {0x0ab410de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 271207499Smav {0x0ab510de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 272207499Smav {0x0ab610de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 273207499Smav {0x0ab710de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 274207499Smav {0x0ab810de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 275207499Smav {0x0ab910de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 276207499Smav {0x0aba10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 277207499Smav {0x0abb10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 278207499Smav {0x0abc10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 279207499Smav {0x0abd10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 280207499Smav {0x0abe10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 281207499Smav {0x0abf10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 282207499Smav {0x0d8410de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 283224603Smav {0x0d8510de, 0x00, "NVIDIA MCP89", AHCI_Q_NOFORCE|AHCI_Q_NOAA}, 284207499Smav {0x0d8610de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 285207499Smav {0x0d8710de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 286207499Smav {0x0d8810de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 287207499Smav {0x0d8910de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 288207499Smav {0x0d8a10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 289207499Smav {0x0d8b10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 290207499Smav {0x0d8c10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 291207499Smav {0x0d8d10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 292207499Smav {0x0d8e10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 293207499Smav {0x0d8f10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 294208907Smav {0x33491106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 295208907Smav {0x62871106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 296203030Smav {0x11841039, 0x00, "SiS 966", 0}, 297203030Smav {0x11851039, 0x00, "SiS 968", 0}, 298203030Smav {0x01861039, 0x00, "SiS 968", 0}, 299203030Smav {0x00000000, 0x00, NULL, 0} 300199176Smav}; 301199176Smav 302220565Smav#define recovery_type spriv_field0 303220565Smav#define RECOVERY_NONE 0 304220565Smav#define RECOVERY_READ_LOG 1 305220565Smav#define RECOVERY_REQUEST_SENSE 2 306220565Smav#define recovery_slot spriv_field1 307220565Smav 308228200Smavstatic int force_ahci = 1; 309228200SmavTUNABLE_INT("hw.ahci.force", &force_ahci); 310228200Smav 311195534Sscottlstatic int 312195534Sscottlahci_probe(device_t dev) 313195534Sscottl{ 314199176Smav char buf[64]; 315199322Smav int i, valid = 0; 316199322Smav uint32_t devid = pci_get_devid(dev); 317203030Smav uint8_t revid = pci_get_revid(dev); 318199322Smav 319199322Smav /* Is this a possible AHCI candidate? */ 320199322Smav if (pci_get_class(dev) == PCIC_STORAGE && 321199322Smav pci_get_subclass(dev) == PCIS_STORAGE_SATA && 322199322Smav pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0) 323199322Smav valid = 1; 324199322Smav /* Is this a known AHCI chip? */ 325199322Smav for (i = 0; ahci_ids[i].id != 0; i++) { 326199322Smav if (ahci_ids[i].id == devid && 327203030Smav ahci_ids[i].rev <= revid && 328228200Smav (valid || (force_ahci == 1 && 329228200Smav !(ahci_ids[i].quirks & AHCI_Q_NOFORCE)))) { 330199717Smav /* Do not attach JMicrons with single PCI function. */ 331199717Smav if (pci_get_vendor(dev) == 0x197b && 332199717Smav (pci_read_config(dev, 0xdf, 1) & 0x40) == 0) 333199717Smav return (ENXIO); 334199322Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 335199322Smav ahci_ids[i].name); 336199322Smav device_set_desc_copy(dev, buf); 337199322Smav return (BUS_PROBE_VENDOR); 338199322Smav } 339199322Smav } 340199322Smav if (!valid) 341199322Smav return (ENXIO); 342199322Smav device_set_desc_copy(dev, "AHCI SATA controller"); 343199322Smav return (BUS_PROBE_VENDOR); 344199322Smav} 345199322Smav 346199322Smavstatic int 347199322Smavahci_ata_probe(device_t dev) 348199322Smav{ 349199322Smav char buf[64]; 350199176Smav int i; 351199176Smav uint32_t devid = pci_get_devid(dev); 352203030Smav uint8_t revid = pci_get_revid(dev); 353195534Sscottl 354199322Smav if ((intptr_t)device_get_ivars(dev) >= 0) 355199322Smav return (ENXIO); 356199176Smav /* Is this a known AHCI chip? */ 357199176Smav for (i = 0; ahci_ids[i].id != 0; i++) { 358203030Smav if (ahci_ids[i].id == devid && 359203030Smav ahci_ids[i].rev <= revid) { 360199176Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 361199176Smav ahci_ids[i].name); 362199176Smav device_set_desc_copy(dev, buf); 363199176Smav return (BUS_PROBE_VENDOR); 364199176Smav } 365199176Smav } 366199176Smav device_set_desc_copy(dev, "AHCI SATA controller"); 367195534Sscottl return (BUS_PROBE_VENDOR); 368195534Sscottl} 369195534Sscottl 370195534Sscottlstatic int 371195534Sscottlahci_attach(device_t dev) 372195534Sscottl{ 373195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 374195534Sscottl device_t child; 375199322Smav int error, unit, speed, i; 376199322Smav uint32_t devid = pci_get_devid(dev); 377203030Smav uint8_t revid = pci_get_revid(dev); 378196656Smav u_int32_t version; 379195534Sscottl 380195534Sscottl ctlr->dev = dev; 381199322Smav i = 0; 382203030Smav while (ahci_ids[i].id != 0 && 383203030Smav (ahci_ids[i].id != devid || 384203030Smav ahci_ids[i].rev > revid)) 385199322Smav i++; 386199322Smav ctlr->quirks = ahci_ids[i].quirks; 387196656Smav resource_int_value(device_get_name(dev), 388196656Smav device_get_unit(dev), "ccc", &ctlr->ccc); 389195534Sscottl /* if we have a memory BAR(5) we are likely on an AHCI part */ 390195534Sscottl ctlr->r_rid = PCIR_BAR(5); 391195534Sscottl if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 392195534Sscottl &ctlr->r_rid, RF_ACTIVE))) 393195534Sscottl return ENXIO; 394195534Sscottl /* Setup our own memory management for channels. */ 395208414Smav ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 396208414Smav ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 397195534Sscottl ctlr->sc_iomem.rm_type = RMAN_ARRAY; 398195534Sscottl ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 399195534Sscottl if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 400195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 401195534Sscottl return (error); 402195534Sscottl } 403195534Sscottl if ((error = rman_manage_region(&ctlr->sc_iomem, 404195534Sscottl rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 405195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 406195534Sscottl rman_fini(&ctlr->sc_iomem); 407195534Sscottl return (error); 408195534Sscottl } 409207511Smav pci_enable_busmaster(dev); 410195534Sscottl /* Reset controller */ 411195534Sscottl if ((error = ahci_ctlr_reset(dev)) != 0) { 412195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 413195534Sscottl rman_fini(&ctlr->sc_iomem); 414195534Sscottl return (error); 415195534Sscottl }; 416199322Smav /* Get the HW capabilities */ 417199322Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 418199322Smav ctlr->caps = ATA_INL(ctlr->r_mem, AHCI_CAP); 419240383Smav if (version >= 0x00010200) 420199322Smav ctlr->caps2 = ATA_INL(ctlr->r_mem, AHCI_CAP2); 421203108Smav if (ctlr->caps & AHCI_CAP_EMS) 422203108Smav ctlr->capsem = ATA_INL(ctlr->r_mem, AHCI_EM_CTL); 423195534Sscottl ctlr->ichannels = ATA_INL(ctlr->r_mem, AHCI_PI); 424222304Smav 425222304Smav /* Identify and set separate quirks for HBA and RAID f/w Marvells. */ 426222304Smav if ((ctlr->quirks & AHCI_Q_NOBSYRES) && 427222304Smav (ctlr->quirks & AHCI_Q_ALTSIG) && 428222304Smav (ctlr->caps & AHCI_CAP_SPM) == 0) 429222304Smav ctlr->quirks &= ~AHCI_Q_NOBSYRES; 430222304Smav 431199322Smav if (ctlr->quirks & AHCI_Q_1CH) { 432199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 433199322Smav ctlr->ichannels &= 0x01; 434199322Smav } 435199322Smav if (ctlr->quirks & AHCI_Q_2CH) { 436199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 437199322Smav ctlr->caps |= 1; 438199322Smav ctlr->ichannels &= 0x03; 439199322Smav } 440199322Smav if (ctlr->quirks & AHCI_Q_4CH) { 441199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 442199322Smav ctlr->caps |= 3; 443199322Smav ctlr->ichannels &= 0x0f; 444199322Smav } 445195534Sscottl ctlr->channels = MAX(flsl(ctlr->ichannels), 446199322Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 447199322Smav if (ctlr->quirks & AHCI_Q_NOPMP) 448199322Smav ctlr->caps &= ~AHCI_CAP_SPM; 449199322Smav if (ctlr->quirks & AHCI_Q_NONCQ) 450199322Smav ctlr->caps &= ~AHCI_CAP_SNCQ; 451205422Smav if ((ctlr->caps & AHCI_CAP_CCCS) == 0) 452205422Smav ctlr->ccc = 0; 453222039Smav ctlr->emloc = ATA_INL(ctlr->r_mem, AHCI_EM_LOC); 454205422Smav ahci_ctlr_setup(dev); 455195534Sscottl /* Setup interrupts. */ 456195534Sscottl if (ahci_setup_interrupt(dev)) { 457195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 458195534Sscottl rman_fini(&ctlr->sc_iomem); 459195534Sscottl return ENXIO; 460195534Sscottl } 461195534Sscottl /* Announce HW capabilities. */ 462196656Smav speed = (ctlr->caps & AHCI_CAP_ISS) >> AHCI_CAP_ISS_SHIFT; 463195534Sscottl device_printf(dev, 464203123Smav "AHCI v%x.%02x with %d %sGbps ports, Port Multiplier %s%s\n", 465195534Sscottl ((version >> 20) & 0xf0) + ((version >> 16) & 0x0f), 466195534Sscottl ((version >> 4) & 0xf0) + (version & 0x0f), 467196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1, 468195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 469195534Sscottl ((speed == 3) ? "6":"?"))), 470196656Smav (ctlr->caps & AHCI_CAP_SPM) ? 471203123Smav "supported" : "not supported", 472203123Smav (ctlr->caps & AHCI_CAP_FBSS) ? 473203123Smav " with FBS" : ""); 474195534Sscottl if (bootverbose) { 475195534Sscottl device_printf(dev, "Caps:%s%s%s%s%s%s%s%s %sGbps", 476196656Smav (ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"", 477196656Smav (ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"", 478196656Smav (ctlr->caps & AHCI_CAP_SSNTF) ? " SNTF":"", 479196656Smav (ctlr->caps & AHCI_CAP_SMPS) ? " MPS":"", 480196656Smav (ctlr->caps & AHCI_CAP_SSS) ? " SS":"", 481196656Smav (ctlr->caps & AHCI_CAP_SALP) ? " ALP":"", 482196656Smav (ctlr->caps & AHCI_CAP_SAL) ? " AL":"", 483196656Smav (ctlr->caps & AHCI_CAP_SCLO) ? " CLO":"", 484195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 485195534Sscottl ((speed == 3) ? "6":"?")))); 486195534Sscottl printf("%s%s%s%s%s%s %dcmd%s%s%s %dports\n", 487196656Smav (ctlr->caps & AHCI_CAP_SAM) ? " AM":"", 488196656Smav (ctlr->caps & AHCI_CAP_SPM) ? " PM":"", 489196656Smav (ctlr->caps & AHCI_CAP_FBSS) ? " FBS":"", 490196656Smav (ctlr->caps & AHCI_CAP_PMD) ? " PMD":"", 491196656Smav (ctlr->caps & AHCI_CAP_SSC) ? " SSC":"", 492196656Smav (ctlr->caps & AHCI_CAP_PSC) ? " PSC":"", 493196656Smav ((ctlr->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, 494196656Smav (ctlr->caps & AHCI_CAP_CCCS) ? " CCC":"", 495196656Smav (ctlr->caps & AHCI_CAP_EMS) ? " EM":"", 496196656Smav (ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"", 497196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 498195534Sscottl } 499240383Smav if (bootverbose && version >= 0x00010200) { 500196656Smav device_printf(dev, "Caps2:%s%s%s\n", 501196656Smav (ctlr->caps2 & AHCI_CAP2_APST) ? " APST":"", 502196656Smav (ctlr->caps2 & AHCI_CAP2_NVMP) ? " NVMP":"", 503196656Smav (ctlr->caps2 & AHCI_CAP2_BOH) ? " BOH":""); 504196656Smav } 505195534Sscottl /* Attach all channels on this controller */ 506195534Sscottl for (unit = 0; unit < ctlr->channels; unit++) { 507195534Sscottl child = device_add_child(dev, "ahcich", -1); 508227635Smav if (child == NULL) { 509195534Sscottl device_printf(dev, "failed to add channel device\n"); 510227635Smav continue; 511227635Smav } 512227635Smav device_set_ivars(child, (void *)(intptr_t)unit); 513227635Smav if ((ctlr->ichannels & (1 << unit)) == 0) 514227635Smav device_disable(child); 515195534Sscottl } 516238805Smav if (ctlr->caps & AHCI_CAP_EMS) { 517238805Smav child = device_add_child(dev, "ahciem", -1); 518238805Smav if (child == NULL) 519238805Smav device_printf(dev, "failed to add enclosure device\n"); 520238805Smav else 521238805Smav device_set_ivars(child, (void *)(intptr_t)-1); 522238805Smav } 523195534Sscottl bus_generic_attach(dev); 524195534Sscottl return 0; 525195534Sscottl} 526195534Sscottl 527195534Sscottlstatic int 528195534Sscottlahci_detach(device_t dev) 529195534Sscottl{ 530195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 531227701Shselasky int i; 532195534Sscottl 533195534Sscottl /* Detach & delete all children */ 534227849Shselasky device_delete_children(dev); 535227701Shselasky 536195534Sscottl /* Free interrupts. */ 537195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 538195534Sscottl if (ctlr->irqs[i].r_irq) { 539195534Sscottl bus_teardown_intr(dev, ctlr->irqs[i].r_irq, 540195534Sscottl ctlr->irqs[i].handle); 541195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, 542195534Sscottl ctlr->irqs[i].r_irq_rid, ctlr->irqs[i].r_irq); 543195534Sscottl } 544195534Sscottl } 545195534Sscottl pci_release_msi(dev); 546195534Sscottl /* Free memory. */ 547195534Sscottl rman_fini(&ctlr->sc_iomem); 548195534Sscottl if (ctlr->r_mem) 549195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 550195534Sscottl return (0); 551195534Sscottl} 552195534Sscottl 553195534Sscottlstatic int 554195534Sscottlahci_ctlr_reset(device_t dev) 555195534Sscottl{ 556195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 557195534Sscottl int timeout; 558195534Sscottl 559240693Sgavin if (pci_read_config(dev, PCIR_DEVVENDOR, 4) == 0x28298086 && 560195534Sscottl (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04) 561195534Sscottl pci_write_config(dev, 0x92, 0x01, 1); 562195534Sscottl /* Enable AHCI mode */ 563195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 564195534Sscottl /* Reset AHCI controller */ 565195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE|AHCI_GHC_HR); 566195534Sscottl for (timeout = 1000; timeout > 0; timeout--) { 567195534Sscottl DELAY(1000); 568195534Sscottl if ((ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_HR) == 0) 569195534Sscottl break; 570195534Sscottl } 571195534Sscottl if (timeout == 0) { 572195534Sscottl device_printf(dev, "AHCI controller reset failure\n"); 573195534Sscottl return ENXIO; 574195534Sscottl } 575195534Sscottl /* Reenable AHCI mode */ 576195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 577205422Smav return (0); 578205422Smav} 579205422Smav 580205422Smavstatic int 581205422Smavahci_ctlr_setup(device_t dev) 582205422Smav{ 583205422Smav struct ahci_controller *ctlr = device_get_softc(dev); 584195534Sscottl /* Clear interrupts */ 585195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_IS, ATA_INL(ctlr->r_mem, AHCI_IS)); 586196656Smav /* Configure CCC */ 587196656Smav if (ctlr->ccc) { 588196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCP, ATA_INL(ctlr->r_mem, AHCI_PI)); 589196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCC, 590196656Smav (ctlr->ccc << AHCI_CCCC_TV_SHIFT) | 591196656Smav (4 << AHCI_CCCC_CC_SHIFT) | 592196656Smav AHCI_CCCC_EN); 593196656Smav ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) & 594196656Smav AHCI_CCCC_INT_MASK) >> AHCI_CCCC_INT_SHIFT; 595196656Smav if (bootverbose) { 596196656Smav device_printf(dev, 597196656Smav "CCC with %dms/4cmd enabled on vector %d\n", 598196656Smav ctlr->ccc, ctlr->cccv); 599196656Smav } 600196656Smav } 601195534Sscottl /* Enable AHCI interrupts */ 602195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 603195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) | AHCI_GHC_IE); 604195534Sscottl return (0); 605195534Sscottl} 606195534Sscottl 607195534Sscottlstatic int 608195534Sscottlahci_suspend(device_t dev) 609195534Sscottl{ 610195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 611195534Sscottl 612195534Sscottl bus_generic_suspend(dev); 613195534Sscottl /* Disable interupts, so the state change(s) doesn't trigger */ 614195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 615195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE)); 616195534Sscottl return 0; 617195534Sscottl} 618195534Sscottl 619195534Sscottlstatic int 620195534Sscottlahci_resume(device_t dev) 621195534Sscottl{ 622195534Sscottl int res; 623195534Sscottl 624195534Sscottl if ((res = ahci_ctlr_reset(dev)) != 0) 625195534Sscottl return (res); 626205422Smav ahci_ctlr_setup(dev); 627195534Sscottl return (bus_generic_resume(dev)); 628195534Sscottl} 629195534Sscottl 630195534Sscottlstatic int 631195534Sscottlahci_setup_interrupt(device_t dev) 632195534Sscottl{ 633195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 634195534Sscottl int i, msi = 1; 635195534Sscottl 636195534Sscottl /* Process hints. */ 637195534Sscottl resource_int_value(device_get_name(dev), 638195534Sscottl device_get_unit(dev), "msi", &msi); 639195534Sscottl if (msi < 0) 640195534Sscottl msi = 0; 641195534Sscottl else if (msi == 1) 642195534Sscottl msi = min(1, pci_msi_count(dev)); 643195534Sscottl else if (msi > 1) 644195534Sscottl msi = pci_msi_count(dev); 645195534Sscottl /* Allocate MSI if needed/present. */ 646195534Sscottl if (msi && pci_alloc_msi(dev, &msi) == 0) { 647195534Sscottl ctlr->numirqs = msi; 648195534Sscottl } else { 649195534Sscottl msi = 0; 650195534Sscottl ctlr->numirqs = 1; 651195534Sscottl } 652195534Sscottl /* Check for single MSI vector fallback. */ 653195534Sscottl if (ctlr->numirqs > 1 && 654195534Sscottl (ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_MRSM) != 0) { 655195534Sscottl device_printf(dev, "Falling back to one MSI\n"); 656195534Sscottl ctlr->numirqs = 1; 657195534Sscottl } 658195534Sscottl /* Allocate all IRQs. */ 659195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 660195534Sscottl ctlr->irqs[i].ctlr = ctlr; 661195534Sscottl ctlr->irqs[i].r_irq_rid = i + (msi ? 1 : 0); 662196656Smav if (ctlr->numirqs == 1 || i >= ctlr->channels || 663196656Smav (ctlr->ccc && i == ctlr->cccv)) 664195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ALL; 665195534Sscottl else if (i == ctlr->numirqs - 1) 666195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_AFTER; 667195534Sscottl else 668195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ONE; 669195534Sscottl if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 670195534Sscottl &ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 671195534Sscottl device_printf(dev, "unable to map interrupt\n"); 672195534Sscottl return ENXIO; 673195534Sscottl } 674195534Sscottl if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL, 675195534Sscottl (ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE) ? ahci_intr_one : ahci_intr, 676195534Sscottl &ctlr->irqs[i], &ctlr->irqs[i].handle))) { 677195534Sscottl /* SOS XXX release r_irq */ 678195534Sscottl device_printf(dev, "unable to setup interrupt\n"); 679195534Sscottl return ENXIO; 680195534Sscottl } 681202011Smav if (ctlr->numirqs > 1) { 682202011Smav bus_describe_intr(dev, ctlr->irqs[i].r_irq, 683202011Smav ctlr->irqs[i].handle, 684202011Smav ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ? 685202011Smav "ch%d" : "%d", i); 686202011Smav } 687195534Sscottl } 688195534Sscottl return (0); 689195534Sscottl} 690195534Sscottl 691195534Sscottl/* 692195534Sscottl * Common case interrupt handler. 693195534Sscottl */ 694195534Sscottlstatic void 695195534Sscottlahci_intr(void *data) 696195534Sscottl{ 697195534Sscottl struct ahci_controller_irq *irq = data; 698195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 699205422Smav u_int32_t is, ise = 0; 700195534Sscottl void *arg; 701195534Sscottl int unit; 702195534Sscottl 703196656Smav if (irq->mode == AHCI_IRQ_MODE_ALL) { 704195534Sscottl unit = 0; 705196656Smav if (ctlr->ccc) 706196656Smav is = ctlr->ichannels; 707196656Smav else 708196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 709196656Smav } else { /* AHCI_IRQ_MODE_AFTER */ 710195534Sscottl unit = irq->r_irq_rid - 1; 711196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 712196656Smav } 713205422Smav /* CCC interrupt is edge triggered. */ 714205422Smav if (ctlr->ccc) 715205422Smav ise = 1 << ctlr->cccv; 716200814Smav /* Some controllers have edge triggered IS. */ 717200814Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 718205422Smav ise |= is; 719205422Smav if (ise != 0) 720205422Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, ise); 721195534Sscottl for (; unit < ctlr->channels; unit++) { 722195534Sscottl if ((is & (1 << unit)) != 0 && 723195534Sscottl (arg = ctlr->interrupt[unit].argument)) { 724199322Smav ctlr->interrupt[unit].function(arg); 725195534Sscottl } 726195534Sscottl } 727200814Smav /* AHCI declares level triggered IS. */ 728200814Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 729200814Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, is); 730195534Sscottl} 731195534Sscottl 732195534Sscottl/* 733195534Sscottl * Simplified interrupt handler for multivector MSI mode. 734195534Sscottl */ 735195534Sscottlstatic void 736195534Sscottlahci_intr_one(void *data) 737195534Sscottl{ 738195534Sscottl struct ahci_controller_irq *irq = data; 739195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 740195534Sscottl void *arg; 741195534Sscottl int unit; 742195534Sscottl 743195534Sscottl unit = irq->r_irq_rid - 1; 744202011Smav /* Some controllers have edge triggered IS. */ 745202011Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 746202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 747195534Sscottl if ((arg = ctlr->interrupt[unit].argument)) 748195534Sscottl ctlr->interrupt[unit].function(arg); 749202011Smav /* AHCI declares level triggered IS. */ 750202011Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 751202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 752195534Sscottl} 753195534Sscottl 754195534Sscottlstatic struct resource * 755195534Sscottlahci_alloc_resource(device_t dev, device_t child, int type, int *rid, 756195534Sscottl u_long start, u_long end, u_long count, u_int flags) 757195534Sscottl{ 758195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 759238805Smav struct resource *res; 760195534Sscottl long st; 761238805Smav int offset, size, unit; 762195534Sscottl 763238805Smav unit = (intptr_t)device_get_ivars(child); 764238805Smav res = NULL; 765195534Sscottl switch (type) { 766195534Sscottl case SYS_RES_MEMORY: 767238805Smav if (unit >= 0) { 768238805Smav offset = AHCI_OFFSET + (unit << 7); 769238805Smav size = 128; 770238805Smav } else if (*rid == 0) { 771238805Smav offset = AHCI_EM_CTL; 772238805Smav size = 4; 773238805Smav } else { 774238805Smav offset = (ctlr->emloc & 0xffff0000) >> 14; 775238805Smav size = (ctlr->emloc & 0x0000ffff) << 2; 776238805Smav if (*rid != 1) { 777238805Smav if (*rid == 2 && (ctlr->capsem & 778238805Smav (AHCI_EM_XMT | AHCI_EM_SMB)) == 0) 779238805Smav offset += size; 780238805Smav else 781238805Smav break; 782238805Smav } 783238805Smav } 784195534Sscottl st = rman_get_start(ctlr->r_mem); 785195534Sscottl res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 786238805Smav st + offset + size - 1, size, RF_ACTIVE, child); 787195534Sscottl if (res) { 788195534Sscottl bus_space_handle_t bsh; 789195534Sscottl bus_space_tag_t bst; 790195534Sscottl bsh = rman_get_bushandle(ctlr->r_mem); 791195534Sscottl bst = rman_get_bustag(ctlr->r_mem); 792195534Sscottl bus_space_subregion(bst, bsh, offset, 128, &bsh); 793195534Sscottl rman_set_bushandle(res, bsh); 794195534Sscottl rman_set_bustag(res, bst); 795195534Sscottl } 796195534Sscottl break; 797195534Sscottl case SYS_RES_IRQ: 798195534Sscottl if (*rid == ATA_IRQ_RID) 799195534Sscottl res = ctlr->irqs[0].r_irq; 800195534Sscottl break; 801195534Sscottl } 802195534Sscottl return (res); 803195534Sscottl} 804195534Sscottl 805195534Sscottlstatic int 806195534Sscottlahci_release_resource(device_t dev, device_t child, int type, int rid, 807195534Sscottl struct resource *r) 808195534Sscottl{ 809195534Sscottl 810195534Sscottl switch (type) { 811195534Sscottl case SYS_RES_MEMORY: 812195534Sscottl rman_release_resource(r); 813195534Sscottl return (0); 814195534Sscottl case SYS_RES_IRQ: 815195534Sscottl if (rid != ATA_IRQ_RID) 816195534Sscottl return ENOENT; 817195534Sscottl return (0); 818195534Sscottl } 819195534Sscottl return (EINVAL); 820195534Sscottl} 821195534Sscottl 822195534Sscottlstatic int 823195534Sscottlahci_setup_intr(device_t dev, device_t child, struct resource *irq, 824195534Sscottl int flags, driver_filter_t *filter, driver_intr_t *function, 825195534Sscottl void *argument, void **cookiep) 826195534Sscottl{ 827195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 828195534Sscottl int unit = (intptr_t)device_get_ivars(child); 829195534Sscottl 830195534Sscottl if (filter != NULL) { 831195534Sscottl printf("ahci.c: we cannot use a filter here\n"); 832195534Sscottl return (EINVAL); 833195534Sscottl } 834195534Sscottl ctlr->interrupt[unit].function = function; 835195534Sscottl ctlr->interrupt[unit].argument = argument; 836195534Sscottl return (0); 837195534Sscottl} 838195534Sscottl 839195534Sscottlstatic int 840195534Sscottlahci_teardown_intr(device_t dev, device_t child, struct resource *irq, 841195534Sscottl void *cookie) 842195534Sscottl{ 843195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 844195534Sscottl int unit = (intptr_t)device_get_ivars(child); 845195534Sscottl 846195534Sscottl ctlr->interrupt[unit].function = NULL; 847195534Sscottl ctlr->interrupt[unit].argument = NULL; 848195534Sscottl return (0); 849195534Sscottl} 850195534Sscottl 851195534Sscottlstatic int 852195534Sscottlahci_print_child(device_t dev, device_t child) 853195534Sscottl{ 854238805Smav int retval, channel; 855195534Sscottl 856195534Sscottl retval = bus_print_child_header(dev, child); 857238805Smav channel = (int)(intptr_t)device_get_ivars(child); 858238805Smav if (channel >= 0) 859238805Smav retval += printf(" at channel %d", channel); 860195534Sscottl retval += bus_print_child_footer(dev, child); 861195534Sscottl return (retval); 862195534Sscottl} 863195534Sscottl 864208410Smavstatic int 865208410Smavahci_child_location_str(device_t dev, device_t child, char *buf, 866208410Smav size_t buflen) 867208410Smav{ 868238805Smav int channel; 869208410Smav 870238805Smav channel = (int)(intptr_t)device_get_ivars(child); 871238805Smav if (channel >= 0) 872238805Smav snprintf(buf, buflen, "channel=%d", channel); 873208410Smav return (0); 874208410Smav} 875208410Smav 876195534Sscottldevclass_t ahci_devclass; 877195534Sscottlstatic device_method_t ahci_methods[] = { 878195534Sscottl DEVMETHOD(device_probe, ahci_probe), 879195534Sscottl DEVMETHOD(device_attach, ahci_attach), 880195534Sscottl DEVMETHOD(device_detach, ahci_detach), 881195534Sscottl DEVMETHOD(device_suspend, ahci_suspend), 882195534Sscottl DEVMETHOD(device_resume, ahci_resume), 883195534Sscottl DEVMETHOD(bus_print_child, ahci_print_child), 884195534Sscottl DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 885195534Sscottl DEVMETHOD(bus_release_resource, ahci_release_resource), 886195534Sscottl DEVMETHOD(bus_setup_intr, ahci_setup_intr), 887195534Sscottl DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 888208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 889195534Sscottl { 0, 0 } 890195534Sscottl}; 891195534Sscottlstatic driver_t ahci_driver = { 892195534Sscottl "ahci", 893195534Sscottl ahci_methods, 894195534Sscottl sizeof(struct ahci_controller) 895195534Sscottl}; 896195534SscottlDRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, 0, 0); 897199322Smavstatic device_method_t ahci_ata_methods[] = { 898199322Smav DEVMETHOD(device_probe, ahci_ata_probe), 899199322Smav DEVMETHOD(device_attach, ahci_attach), 900199322Smav DEVMETHOD(device_detach, ahci_detach), 901199322Smav DEVMETHOD(device_suspend, ahci_suspend), 902199322Smav DEVMETHOD(device_resume, ahci_resume), 903199322Smav DEVMETHOD(bus_print_child, ahci_print_child), 904199322Smav DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 905199322Smav DEVMETHOD(bus_release_resource, ahci_release_resource), 906199322Smav DEVMETHOD(bus_setup_intr, ahci_setup_intr), 907199322Smav DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 908208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 909199322Smav { 0, 0 } 910199322Smav}; 911199322Smavstatic driver_t ahci_ata_driver = { 912199322Smav "ahci", 913199322Smav ahci_ata_methods, 914199322Smav sizeof(struct ahci_controller) 915199322Smav}; 916199322SmavDRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, 0, 0); 917195534SscottlMODULE_VERSION(ahci, 1); 918195534SscottlMODULE_DEPEND(ahci, cam, 1, 1, 1); 919195534Sscottl 920195534Sscottlstatic int 921195534Sscottlahci_ch_probe(device_t dev) 922195534Sscottl{ 923195534Sscottl 924195534Sscottl device_set_desc_copy(dev, "AHCI channel"); 925195534Sscottl return (0); 926195534Sscottl} 927195534Sscottl 928195534Sscottlstatic int 929195534Sscottlahci_ch_attach(device_t dev) 930195534Sscottl{ 931195534Sscottl struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 932195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 933195534Sscottl struct cam_devq *devq; 934199821Smav int rid, error, i, sata_rev = 0; 935203123Smav u_int32_t version; 936195534Sscottl 937195534Sscottl ch->dev = dev; 938195534Sscottl ch->unit = (intptr_t)device_get_ivars(dev); 939196656Smav ch->caps = ctlr->caps; 940196656Smav ch->caps2 = ctlr->caps2; 941199322Smav ch->quirks = ctlr->quirks; 942215725Smav ch->numslots = ((ch->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1; 943196656Smav mtx_init(&ch->mtx, "AHCI channel lock", NULL, MTX_DEF); 944195534Sscottl resource_int_value(device_get_name(dev), 945195534Sscottl device_get_unit(dev), "pm_level", &ch->pm_level); 946196656Smav if (ch->pm_level > 3) 947196656Smav callout_init_mtx(&ch->pm_timer, &ch->mtx, 0); 948220576Smav callout_init_mtx(&ch->reset_timer, &ch->mtx, 0); 949195534Sscottl /* Limit speed for my onboard JMicron external port. 950195534Sscottl * It is not eSATA really. */ 951195534Sscottl if (pci_get_devid(ctlr->dev) == 0x2363197b && 952195534Sscottl pci_get_subvendor(ctlr->dev) == 0x1043 && 953195534Sscottl pci_get_subdevice(ctlr->dev) == 0x81e4 && 954195534Sscottl ch->unit == 0) 955199821Smav sata_rev = 1; 956203030Smav if (ch->quirks & AHCI_Q_SATA2) 957203030Smav sata_rev = 2; 958195534Sscottl resource_int_value(device_get_name(dev), 959199821Smav device_get_unit(dev), "sata_rev", &sata_rev); 960199821Smav for (i = 0; i < 16; i++) { 961199821Smav ch->user[i].revision = sata_rev; 962199821Smav ch->user[i].mode = 0; 963199821Smav ch->user[i].bytecount = 8192; 964199821Smav ch->user[i].tags = ch->numslots; 965207499Smav ch->user[i].caps = 0; 966199821Smav ch->curr[i] = ch->user[i]; 967207499Smav if (ch->pm_level) { 968207499Smav ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ | 969207499Smav CTS_SATA_CAPS_H_APST | 970207499Smav CTS_SATA_CAPS_D_PMREQ | CTS_SATA_CAPS_D_APST; 971207499Smav } 972220602Smav ch->user[i].caps |= CTS_SATA_CAPS_H_DMAAA | 973220602Smav CTS_SATA_CAPS_H_AN; 974199821Smav } 975238805Smav rid = 0; 976195534Sscottl if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 977195534Sscottl &rid, RF_ACTIVE))) 978195534Sscottl return (ENXIO); 979195534Sscottl ahci_dmainit(dev); 980195534Sscottl ahci_slotsalloc(dev); 981208375Smav ahci_ch_init(dev); 982195534Sscottl mtx_lock(&ch->mtx); 983195534Sscottl rid = ATA_IRQ_RID; 984195534Sscottl if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 985195534Sscottl &rid, RF_SHAREABLE | RF_ACTIVE))) { 986195534Sscottl device_printf(dev, "Unable to map interrupt\n"); 987208813Smav error = ENXIO; 988208813Smav goto err0; 989195534Sscottl } 990195534Sscottl if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 991195534Sscottl ahci_ch_intr_locked, dev, &ch->ih))) { 992195534Sscottl device_printf(dev, "Unable to setup interrupt\n"); 993195534Sscottl error = ENXIO; 994195534Sscottl goto err1; 995195534Sscottl } 996203123Smav ch->chcaps = ATA_INL(ch->r_mem, AHCI_P_CMD); 997203123Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 998240383Smav if (version < 0x00010200 && (ctlr->caps & AHCI_CAP_FBSS)) 999203123Smav ch->chcaps |= AHCI_P_CMD_FBSCP; 1000203123Smav if (bootverbose) { 1001203123Smav device_printf(dev, "Caps:%s%s%s%s%s\n", 1002203123Smav (ch->chcaps & AHCI_P_CMD_HPCP) ? " HPCP":"", 1003203123Smav (ch->chcaps & AHCI_P_CMD_MPSP) ? " MPSP":"", 1004203123Smav (ch->chcaps & AHCI_P_CMD_CPD) ? " CPD":"", 1005203123Smav (ch->chcaps & AHCI_P_CMD_ESP) ? " ESP":"", 1006203123Smav (ch->chcaps & AHCI_P_CMD_FBSCP) ? " FBSCP":""); 1007203123Smav } 1008195534Sscottl /* Create the device queue for our SIM. */ 1009195534Sscottl devq = cam_simq_alloc(ch->numslots); 1010195534Sscottl if (devq == NULL) { 1011195534Sscottl device_printf(dev, "Unable to allocate simq\n"); 1012195534Sscottl error = ENOMEM; 1013195534Sscottl goto err1; 1014195534Sscottl } 1015195534Sscottl /* Construct SIM entry */ 1016195534Sscottl ch->sim = cam_sim_alloc(ahciaction, ahcipoll, "ahcich", ch, 1017199178Smav device_get_unit(dev), &ch->mtx, 1018199278Smav min(2, ch->numslots), 1019199278Smav (ch->caps & AHCI_CAP_SNCQ) ? ch->numslots : 0, 1020199278Smav devq); 1021195534Sscottl if (ch->sim == NULL) { 1022208813Smav cam_simq_free(devq); 1023195534Sscottl device_printf(dev, "unable to allocate sim\n"); 1024195534Sscottl error = ENOMEM; 1025208813Smav goto err1; 1026195534Sscottl } 1027195534Sscottl if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 1028195534Sscottl device_printf(dev, "unable to register xpt bus\n"); 1029195534Sscottl error = ENXIO; 1030195534Sscottl goto err2; 1031195534Sscottl } 1032195534Sscottl if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 1033195534Sscottl CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1034195534Sscottl device_printf(dev, "unable to create path\n"); 1035195534Sscottl error = ENXIO; 1036195534Sscottl goto err3; 1037195534Sscottl } 1038196656Smav if (ch->pm_level > 3) { 1039196656Smav callout_reset(&ch->pm_timer, 1040196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8, 1041196656Smav ahci_ch_pm, dev); 1042196656Smav } 1043195534Sscottl mtx_unlock(&ch->mtx); 1044195534Sscottl return (0); 1045195534Sscottl 1046195534Sscottlerr3: 1047195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1048195534Sscottlerr2: 1049195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1050195534Sscottlerr1: 1051195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1052208813Smaverr0: 1053195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1054195534Sscottl mtx_unlock(&ch->mtx); 1055214325Smav mtx_destroy(&ch->mtx); 1056195534Sscottl return (error); 1057195534Sscottl} 1058195534Sscottl 1059195534Sscottlstatic int 1060195534Sscottlahci_ch_detach(device_t dev) 1061195534Sscottl{ 1062195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1063195534Sscottl 1064195534Sscottl mtx_lock(&ch->mtx); 1065195534Sscottl xpt_async(AC_LOST_DEVICE, ch->path, NULL); 1066220576Smav /* Forget about reset. */ 1067220576Smav if (ch->resetting) { 1068220576Smav ch->resetting = 0; 1069220576Smav xpt_release_simq(ch->sim, TRUE); 1070220576Smav } 1071195534Sscottl xpt_free_path(ch->path); 1072195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1073195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1074195534Sscottl mtx_unlock(&ch->mtx); 1075195534Sscottl 1076196656Smav if (ch->pm_level > 3) 1077196656Smav callout_drain(&ch->pm_timer); 1078220576Smav callout_drain(&ch->reset_timer); 1079195534Sscottl bus_teardown_intr(dev, ch->r_irq, ch->ih); 1080195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1081195534Sscottl 1082208375Smav ahci_ch_deinit(dev); 1083195534Sscottl ahci_slotsfree(dev); 1084195534Sscottl ahci_dmafini(dev); 1085195534Sscottl 1086195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1087195534Sscottl mtx_destroy(&ch->mtx); 1088195534Sscottl return (0); 1089195534Sscottl} 1090195534Sscottl 1091195534Sscottlstatic int 1092208375Smavahci_ch_init(device_t dev) 1093195534Sscottl{ 1094195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1095208375Smav uint64_t work; 1096195534Sscottl 1097208375Smav /* Disable port interrupts */ 1098208375Smav ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1099208375Smav /* Setup work areas */ 1100208375Smav work = ch->dma.work_bus + AHCI_CL_OFFSET; 1101208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLB, work & 0xffffffff); 1102208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLBU, work >> 32); 1103208375Smav work = ch->dma.rfis_bus; 1104208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FB, work & 0xffffffff); 1105208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FBU, work >> 32); 1106208375Smav /* Activate the channel and power/spin up device */ 1107208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, 1108208375Smav (AHCI_P_CMD_ACTIVE | AHCI_P_CMD_POD | AHCI_P_CMD_SUD | 1109208375Smav ((ch->pm_level == 2 || ch->pm_level == 3) ? AHCI_P_CMD_ALPE : 0) | 1110208375Smav ((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 ))); 1111208375Smav ahci_start_fr(dev); 1112208375Smav ahci_start(dev, 1); 1113208375Smav return (0); 1114208375Smav} 1115208375Smav 1116208375Smavstatic int 1117208375Smavahci_ch_deinit(device_t dev) 1118208375Smav{ 1119208375Smav struct ahci_channel *ch = device_get_softc(dev); 1120208375Smav 1121195534Sscottl /* Disable port interrupts. */ 1122195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1123195534Sscottl /* Reset command register. */ 1124195534Sscottl ahci_stop(dev); 1125195534Sscottl ahci_stop_fr(dev); 1126195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, 0); 1127195534Sscottl /* Allow everything, including partial and slumber modes. */ 1128195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 0); 1129195534Sscottl /* Request slumber mode transition and give some time to get there. */ 1130195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, AHCI_P_CMD_SLUMBER); 1131195534Sscottl DELAY(100); 1132195534Sscottl /* Disable PHY. */ 1133195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 1134195534Sscottl return (0); 1135195534Sscottl} 1136195534Sscottl 1137195534Sscottlstatic int 1138208375Smavahci_ch_suspend(device_t dev) 1139208375Smav{ 1140208375Smav struct ahci_channel *ch = device_get_softc(dev); 1141208375Smav 1142208375Smav mtx_lock(&ch->mtx); 1143208375Smav xpt_freeze_simq(ch->sim, 1); 1144220576Smav /* Forget about reset. */ 1145220576Smav if (ch->resetting) { 1146220576Smav ch->resetting = 0; 1147220576Smav callout_stop(&ch->reset_timer); 1148220576Smav xpt_release_simq(ch->sim, TRUE); 1149220576Smav } 1150208375Smav while (ch->oslots) 1151208375Smav msleep(ch, &ch->mtx, PRIBIO, "ahcisusp", hz/100); 1152208375Smav ahci_ch_deinit(dev); 1153208375Smav mtx_unlock(&ch->mtx); 1154208375Smav return (0); 1155208375Smav} 1156208375Smav 1157208375Smavstatic int 1158195534Sscottlahci_ch_resume(device_t dev) 1159195534Sscottl{ 1160195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1161195534Sscottl 1162208375Smav mtx_lock(&ch->mtx); 1163208375Smav ahci_ch_init(dev); 1164208375Smav ahci_reset(dev); 1165208375Smav xpt_release_simq(ch->sim, TRUE); 1166208375Smav mtx_unlock(&ch->mtx); 1167195534Sscottl return (0); 1168195534Sscottl} 1169195534Sscottl 1170195534Sscottldevclass_t ahcich_devclass; 1171195534Sscottlstatic device_method_t ahcich_methods[] = { 1172195534Sscottl DEVMETHOD(device_probe, ahci_ch_probe), 1173195534Sscottl DEVMETHOD(device_attach, ahci_ch_attach), 1174195534Sscottl DEVMETHOD(device_detach, ahci_ch_detach), 1175195534Sscottl DEVMETHOD(device_suspend, ahci_ch_suspend), 1176195534Sscottl DEVMETHOD(device_resume, ahci_ch_resume), 1177195534Sscottl { 0, 0 } 1178195534Sscottl}; 1179195534Sscottlstatic driver_t ahcich_driver = { 1180195534Sscottl "ahcich", 1181195534Sscottl ahcich_methods, 1182195534Sscottl sizeof(struct ahci_channel) 1183195534Sscottl}; 1184199322SmavDRIVER_MODULE(ahcich, ahci, ahcich_driver, ahcich_devclass, 0, 0); 1185195534Sscottl 1186195534Sscottlstruct ahci_dc_cb_args { 1187195534Sscottl bus_addr_t maddr; 1188195534Sscottl int error; 1189195534Sscottl}; 1190195534Sscottl 1191195534Sscottlstatic void 1192195534Sscottlahci_dmainit(device_t dev) 1193195534Sscottl{ 1194195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1195195534Sscottl struct ahci_dc_cb_args dcba; 1196203123Smav size_t rfsize; 1197195534Sscottl 1198195534Sscottl if (ch->caps & AHCI_CAP_64BIT) 1199195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR; 1200195534Sscottl else 1201195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR_32BIT; 1202195534Sscottl /* Command area. */ 1203195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 1204195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1205195534Sscottl NULL, NULL, AHCI_WORK_SIZE, 1, AHCI_WORK_SIZE, 1206195534Sscottl 0, NULL, NULL, &ch->dma.work_tag)) 1207195534Sscottl goto error; 1208195534Sscottl if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 1209195534Sscottl &ch->dma.work_map)) 1210195534Sscottl goto error; 1211195534Sscottl if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 1212195534Sscottl AHCI_WORK_SIZE, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1213195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1214195534Sscottl goto error; 1215195534Sscottl } 1216195534Sscottl ch->dma.work_bus = dcba.maddr; 1217195534Sscottl /* FIS receive area. */ 1218203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) 1219203123Smav rfsize = 4096; 1220203123Smav else 1221203123Smav rfsize = 256; 1222203123Smav if (bus_dma_tag_create(bus_get_dma_tag(dev), rfsize, 0, 1223195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1224203123Smav NULL, NULL, rfsize, 1, rfsize, 1225195534Sscottl 0, NULL, NULL, &ch->dma.rfis_tag)) 1226195534Sscottl goto error; 1227195534Sscottl if (bus_dmamem_alloc(ch->dma.rfis_tag, (void **)&ch->dma.rfis, 0, 1228195534Sscottl &ch->dma.rfis_map)) 1229195534Sscottl goto error; 1230195534Sscottl if (bus_dmamap_load(ch->dma.rfis_tag, ch->dma.rfis_map, ch->dma.rfis, 1231203123Smav rfsize, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1232195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1233195534Sscottl goto error; 1234195534Sscottl } 1235195534Sscottl ch->dma.rfis_bus = dcba.maddr; 1236195534Sscottl /* Data area. */ 1237195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, 1238195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1239195534Sscottl NULL, NULL, 1240195534Sscottl AHCI_SG_ENTRIES * PAGE_SIZE * ch->numslots, 1241195534Sscottl AHCI_SG_ENTRIES, AHCI_PRD_MAX, 1242195534Sscottl 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 1243195534Sscottl goto error; 1244195534Sscottl } 1245195534Sscottl return; 1246195534Sscottl 1247195534Sscottlerror: 1248195534Sscottl device_printf(dev, "WARNING - DMA initialization failed\n"); 1249195534Sscottl ahci_dmafini(dev); 1250195534Sscottl} 1251195534Sscottl 1252195534Sscottlstatic void 1253195534Sscottlahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 1254195534Sscottl{ 1255195534Sscottl struct ahci_dc_cb_args *dcba = (struct ahci_dc_cb_args *)xsc; 1256195534Sscottl 1257195534Sscottl if (!(dcba->error = error)) 1258195534Sscottl dcba->maddr = segs[0].ds_addr; 1259195534Sscottl} 1260195534Sscottl 1261195534Sscottlstatic void 1262195534Sscottlahci_dmafini(device_t dev) 1263195534Sscottl{ 1264195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1265195534Sscottl 1266195534Sscottl if (ch->dma.data_tag) { 1267195534Sscottl bus_dma_tag_destroy(ch->dma.data_tag); 1268195534Sscottl ch->dma.data_tag = NULL; 1269195534Sscottl } 1270195534Sscottl if (ch->dma.rfis_bus) { 1271195534Sscottl bus_dmamap_unload(ch->dma.rfis_tag, ch->dma.rfis_map); 1272195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1273195534Sscottl ch->dma.rfis_bus = 0; 1274195534Sscottl ch->dma.rfis_map = NULL; 1275195534Sscottl ch->dma.rfis = NULL; 1276195534Sscottl } 1277195534Sscottl if (ch->dma.work_bus) { 1278195534Sscottl bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 1279195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1280195534Sscottl ch->dma.work_bus = 0; 1281195534Sscottl ch->dma.work_map = NULL; 1282195534Sscottl ch->dma.work = NULL; 1283195534Sscottl } 1284195534Sscottl if (ch->dma.work_tag) { 1285195534Sscottl bus_dma_tag_destroy(ch->dma.work_tag); 1286195534Sscottl ch->dma.work_tag = NULL; 1287195534Sscottl } 1288195534Sscottl} 1289195534Sscottl 1290195534Sscottlstatic void 1291195534Sscottlahci_slotsalloc(device_t dev) 1292195534Sscottl{ 1293195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1294195534Sscottl int i; 1295195534Sscottl 1296195534Sscottl /* Alloc and setup command/dma slots */ 1297195534Sscottl bzero(ch->slot, sizeof(ch->slot)); 1298195534Sscottl for (i = 0; i < ch->numslots; i++) { 1299195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1300195534Sscottl 1301195534Sscottl slot->dev = dev; 1302195534Sscottl slot->slot = i; 1303195534Sscottl slot->state = AHCI_SLOT_EMPTY; 1304195534Sscottl slot->ccb = NULL; 1305195534Sscottl callout_init_mtx(&slot->timeout, &ch->mtx, 0); 1306195534Sscottl 1307195534Sscottl if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 1308195534Sscottl device_printf(ch->dev, "FAILURE - create data_map\n"); 1309195534Sscottl } 1310195534Sscottl} 1311195534Sscottl 1312195534Sscottlstatic void 1313195534Sscottlahci_slotsfree(device_t dev) 1314195534Sscottl{ 1315195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1316195534Sscottl int i; 1317195534Sscottl 1318195534Sscottl /* Free all dma slots */ 1319195534Sscottl for (i = 0; i < ch->numslots; i++) { 1320195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1321195534Sscottl 1322196656Smav callout_drain(&slot->timeout); 1323195534Sscottl if (slot->dma.data_map) { 1324195534Sscottl bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 1325195534Sscottl slot->dma.data_map = NULL; 1326195534Sscottl } 1327195534Sscottl } 1328195534Sscottl} 1329195534Sscottl 1330220657Smavstatic int 1331198319Smavahci_phy_check_events(device_t dev, u_int32_t serr) 1332195534Sscottl{ 1333195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1334195534Sscottl 1335220657Smav if (((ch->pm_level == 0) && (serr & ATA_SE_PHY_CHANGED)) || 1336220657Smav ((ch->pm_level != 0 || ch->listening) && (serr & ATA_SE_EXCHANGED))) { 1337195534Sscottl u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 1338203108Smav union ccb *ccb; 1339203108Smav 1340203165Smav if (bootverbose) { 1341220657Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 1342195534Sscottl device_printf(dev, "CONNECT requested\n"); 1343220657Smav else 1344195534Sscottl device_printf(dev, "DISCONNECT requested\n"); 1345195534Sscottl } 1346203165Smav ahci_reset(dev); 1347203108Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1348220657Smav return (0); 1349203108Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, 1350203108Smav cam_sim_path(ch->sim), 1351203108Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1352203108Smav xpt_free_ccb(ccb); 1353220657Smav return (0); 1354203108Smav } 1355203108Smav xpt_rescan(ccb); 1356220657Smav return (1); 1357195534Sscottl } 1358220657Smav return (0); 1359195534Sscottl} 1360195534Sscottl 1361195534Sscottlstatic void 1362220657Smavahci_cpd_check_events(device_t dev) 1363220657Smav{ 1364220657Smav struct ahci_channel *ch = device_get_softc(dev); 1365220657Smav u_int32_t status; 1366220657Smav union ccb *ccb; 1367220657Smav 1368220657Smav if (ch->pm_level == 0) 1369220657Smav return; 1370220657Smav 1371220657Smav status = ATA_INL(ch->r_mem, AHCI_P_CMD); 1372220657Smav if ((status & AHCI_P_CMD_CPD) == 0) 1373220657Smav return; 1374220657Smav 1375220657Smav if (bootverbose) { 1376220657Smav if (status & AHCI_P_CMD_CPS) { 1377220657Smav device_printf(dev, "COLD CONNECT requested\n"); 1378220657Smav } else 1379220657Smav device_printf(dev, "COLD DISCONNECT requested\n"); 1380220657Smav } 1381220657Smav ahci_reset(dev); 1382220657Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1383220657Smav return; 1384220657Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, cam_sim_path(ch->sim), 1385220657Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1386220657Smav xpt_free_ccb(ccb); 1387220657Smav return; 1388220657Smav } 1389220657Smav xpt_rescan(ccb); 1390220657Smav} 1391220657Smav 1392220657Smavstatic void 1393196907Smavahci_notify_events(device_t dev, u_int32_t status) 1394196656Smav{ 1395196656Smav struct ahci_channel *ch = device_get_softc(dev); 1396196656Smav struct cam_path *dpath; 1397196656Smav int i; 1398196656Smav 1399200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1400200196Smav ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status); 1401196656Smav if (bootverbose) 1402196656Smav device_printf(dev, "SNTF 0x%04x\n", status); 1403196656Smav for (i = 0; i < 16; i++) { 1404196656Smav if ((status & (1 << i)) == 0) 1405196656Smav continue; 1406196656Smav if (xpt_create_path(&dpath, NULL, 1407196656Smav xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 1408196656Smav xpt_async(AC_SCSI_AEN, dpath, NULL); 1409196656Smav xpt_free_path(dpath); 1410196656Smav } 1411196656Smav } 1412196656Smav} 1413196656Smav 1414196656Smavstatic void 1415195534Sscottlahci_ch_intr_locked(void *data) 1416195534Sscottl{ 1417195534Sscottl device_t dev = (device_t)data; 1418195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1419195534Sscottl 1420195534Sscottl mtx_lock(&ch->mtx); 1421235333Smav xpt_batch_start(ch->sim); 1422195534Sscottl ahci_ch_intr(data); 1423235333Smav xpt_batch_done(ch->sim); 1424195534Sscottl mtx_unlock(&ch->mtx); 1425195534Sscottl} 1426195534Sscottl 1427195534Sscottlstatic void 1428196656Smavahci_ch_pm(void *arg) 1429196656Smav{ 1430196656Smav device_t dev = (device_t)arg; 1431196656Smav struct ahci_channel *ch = device_get_softc(dev); 1432196656Smav uint32_t work; 1433196656Smav 1434196656Smav if (ch->numrslots != 0) 1435196656Smav return; 1436196656Smav work = ATA_INL(ch->r_mem, AHCI_P_CMD); 1437196656Smav if (ch->pm_level == 4) 1438196656Smav work |= AHCI_P_CMD_PARTIAL; 1439196656Smav else 1440196656Smav work |= AHCI_P_CMD_SLUMBER; 1441196656Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, work); 1442196656Smav} 1443196656Smav 1444196656Smavstatic void 1445195534Sscottlahci_ch_intr(void *data) 1446195534Sscottl{ 1447195534Sscottl device_t dev = (device_t)data; 1448195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1449198319Smav uint32_t istatus, sstatus, cstatus, serr = 0, sntf = 0, ok, err; 1450195534Sscottl enum ahci_err_type et; 1451220657Smav int i, ccs, port, reset = 0; 1452195534Sscottl 1453195534Sscottl /* Read and clear interrupt statuses. */ 1454195534Sscottl istatus = ATA_INL(ch->r_mem, AHCI_P_IS); 1455196656Smav if (istatus == 0) 1456196656Smav return; 1457195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, istatus); 1458195534Sscottl /* Read command statuses. */ 1459196907Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1460195534Sscottl cstatus = ATA_INL(ch->r_mem, AHCI_P_CI); 1461200196Smav if (istatus & AHCI_P_IX_SDB) { 1462200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1463200196Smav sntf = ATA_INL(ch->r_mem, AHCI_P_SNTF); 1464203123Smav else if (ch->fbs_enabled) { 1465200196Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1466200196Smav 1467203123Smav for (i = 0; i < 16; i++) { 1468203123Smav if (fis[1] & 0x80) { 1469203123Smav fis[1] &= 0x7f; 1470203123Smav sntf |= 1 << i; 1471203123Smav } 1472203123Smav fis += 256; 1473203123Smav } 1474203123Smav } else { 1475203123Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1476203123Smav 1477200196Smav if (fis[1] & 0x80) 1478200196Smav sntf = (1 << (fis[1] & 0x0f)); 1479200196Smav } 1480200196Smav } 1481195534Sscottl /* Process PHY events */ 1482198319Smav if (istatus & (AHCI_P_IX_PC | AHCI_P_IX_PRC | AHCI_P_IX_OF | 1483198319Smav AHCI_P_IX_IF | AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1484198319Smav serr = ATA_INL(ch->r_mem, AHCI_P_SERR); 1485198319Smav if (serr) { 1486198319Smav ATA_OUTL(ch->r_mem, AHCI_P_SERR, serr); 1487220657Smav reset = ahci_phy_check_events(dev, serr); 1488198319Smav } 1489198319Smav } 1490220657Smav /* Process cold presence detection events */ 1491220657Smav if ((istatus & AHCI_P_IX_CPD) && !reset) 1492220657Smav ahci_cpd_check_events(dev); 1493195534Sscottl /* Process command errors */ 1494198319Smav if (istatus & (AHCI_P_IX_OF | AHCI_P_IX_IF | 1495198319Smav AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1496195534Sscottl ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1497195534Sscottl >> AHCI_P_CMD_CCS_SHIFT; 1498203123Smav//device_printf(dev, "%s ERROR is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x fbs %08x ccs %d\n", 1499203123Smav// __func__, istatus, cstatus, sstatus, ch->rslots, ATA_INL(ch->r_mem, AHCI_P_TFD), 1500203123Smav// serr, ATA_INL(ch->r_mem, AHCI_P_FBS), ccs); 1501203123Smav port = -1; 1502203123Smav if (ch->fbs_enabled) { 1503203123Smav uint32_t fbs = ATA_INL(ch->r_mem, AHCI_P_FBS); 1504203123Smav if (fbs & AHCI_P_FBS_SDE) { 1505203123Smav port = (fbs & AHCI_P_FBS_DWE) 1506203123Smav >> AHCI_P_FBS_DWE_SHIFT; 1507203123Smav } else { 1508203123Smav for (i = 0; i < 16; i++) { 1509203123Smav if (ch->numrslotspd[i] == 0) 1510203123Smav continue; 1511203123Smav if (port == -1) 1512203123Smav port = i; 1513203123Smav else if (port != i) { 1514203123Smav port = -2; 1515203123Smav break; 1516203123Smav } 1517203123Smav } 1518203123Smav } 1519203123Smav } 1520196656Smav err = ch->rslots & (cstatus | sstatus); 1521195534Sscottl } else { 1522195534Sscottl ccs = 0; 1523195534Sscottl err = 0; 1524203123Smav port = -1; 1525195534Sscottl } 1526195534Sscottl /* Complete all successfull commands. */ 1527196656Smav ok = ch->rslots & ~(cstatus | sstatus); 1528195534Sscottl for (i = 0; i < ch->numslots; i++) { 1529195534Sscottl if ((ok >> i) & 1) 1530195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_NONE); 1531195534Sscottl } 1532195534Sscottl /* On error, complete the rest of commands with error statuses. */ 1533195534Sscottl if (err) { 1534195534Sscottl if (ch->frozen) { 1535195534Sscottl union ccb *fccb = ch->frozen; 1536195534Sscottl ch->frozen = NULL; 1537195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1538198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1539198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1540198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1541198319Smav } 1542195534Sscottl xpt_done(fccb); 1543195534Sscottl } 1544195534Sscottl for (i = 0; i < ch->numslots; i++) { 1545195534Sscottl /* XXX: reqests in loading state. */ 1546195534Sscottl if (((err >> i) & 1) == 0) 1547195534Sscottl continue; 1548203123Smav if (port >= 0 && 1549203123Smav ch->slot[i].ccb->ccb_h.target_id != port) 1550203123Smav continue; 1551198390Smav if (istatus & AHCI_P_IX_TFE) { 1552203123Smav if (port != -2) { 1553195534Sscottl /* Task File Error */ 1554203123Smav if (ch->numtslotspd[ 1555203123Smav ch->slot[i].ccb->ccb_h.target_id] == 0) { 1556195534Sscottl /* Untagged operation. */ 1557195534Sscottl if (i == ccs) 1558195534Sscottl et = AHCI_ERR_TFE; 1559195534Sscottl else 1560195534Sscottl et = AHCI_ERR_INNOCENT; 1561195534Sscottl } else { 1562195534Sscottl /* Tagged operation. */ 1563195534Sscottl et = AHCI_ERR_NCQ; 1564195534Sscottl } 1565203123Smav } else { 1566203123Smav et = AHCI_ERR_TFE; 1567203123Smav ch->fatalerr = 1; 1568203123Smav } 1569198390Smav } else if (istatus & AHCI_P_IX_IF) { 1570203123Smav if (ch->numtslots == 0 && i != ccs && port != -2) 1571198390Smav et = AHCI_ERR_INNOCENT; 1572198390Smav else 1573198390Smav et = AHCI_ERR_SATA; 1574195534Sscottl } else 1575195534Sscottl et = AHCI_ERR_INVALID; 1576195534Sscottl ahci_end_transaction(&ch->slot[i], et); 1577195534Sscottl } 1578203123Smav /* 1579203123Smav * We can't reinit port if there are some other 1580203123Smav * commands active, use resume to complete them. 1581203123Smav */ 1582220565Smav if (ch->rslots != 0 && !ch->recoverycmd) 1583203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | AHCI_P_FBS_DEC); 1584195534Sscottl } 1585196656Smav /* Process NOTIFY events */ 1586196907Smav if (sntf) 1587196907Smav ahci_notify_events(dev, sntf); 1588195534Sscottl} 1589195534Sscottl 1590195534Sscottl/* Must be called with channel locked. */ 1591195534Sscottlstatic int 1592195534Sscottlahci_check_collision(device_t dev, union ccb *ccb) 1593195534Sscottl{ 1594195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1595203123Smav int t = ccb->ccb_h.target_id; 1596195534Sscottl 1597195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1598195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1599199747Smav /* Tagged command while we have no supported tag free. */ 1600199747Smav if (((~ch->oslots) & (0xffffffff >> (32 - 1601203123Smav ch->curr[t].tags))) == 0) 1602199747Smav return (1); 1603203123Smav /* If we have FBS */ 1604203123Smav if (ch->fbs_enabled) { 1605203123Smav /* Tagged command while untagged are active. */ 1606203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] == 0) 1607203123Smav return (1); 1608203123Smav } else { 1609203123Smav /* Tagged command while untagged are active. */ 1610203123Smav if (ch->numrslots != 0 && ch->numtslots == 0) 1611203123Smav return (1); 1612203123Smav /* Tagged command while tagged to other target is active. */ 1613203123Smav if (ch->numtslots != 0 && 1614203123Smav ch->taggedtarget != ccb->ccb_h.target_id) 1615203123Smav return (1); 1616203123Smav } 1617195534Sscottl } else { 1618203123Smav /* If we have FBS */ 1619203123Smav if (ch->fbs_enabled) { 1620203123Smav /* Untagged command while tagged are active. */ 1621203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] != 0) 1622203123Smav return (1); 1623203123Smav } else { 1624203123Smav /* Untagged command while tagged are active. */ 1625203123Smav if (ch->numrslots != 0 && ch->numtslots != 0) 1626203123Smav return (1); 1627203123Smav } 1628195534Sscottl } 1629195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1630195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 1631195534Sscottl /* Atomic command while anything active. */ 1632195534Sscottl if (ch->numrslots != 0) 1633195534Sscottl return (1); 1634195534Sscottl } 1635195534Sscottl /* We have some atomic command running. */ 1636195534Sscottl if (ch->aslots != 0) 1637195534Sscottl return (1); 1638195534Sscottl return (0); 1639195534Sscottl} 1640195534Sscottl 1641195534Sscottl/* Must be called with channel locked. */ 1642195534Sscottlstatic void 1643195534Sscottlahci_begin_transaction(device_t dev, union ccb *ccb) 1644195534Sscottl{ 1645195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1646195534Sscottl struct ahci_slot *slot; 1647199747Smav int tag, tags; 1648195534Sscottl 1649195534Sscottl /* Choose empty slot. */ 1650199747Smav tags = ch->numslots; 1651199747Smav if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1652199747Smav (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 1653199747Smav tags = ch->curr[ccb->ccb_h.target_id].tags; 1654195534Sscottl tag = ch->lastslot; 1655199747Smav while (1) { 1656199747Smav if (tag >= tags) 1657195534Sscottl tag = 0; 1658199747Smav if (ch->slot[tag].state == AHCI_SLOT_EMPTY) 1659199747Smav break; 1660199747Smav tag++; 1661199747Smav }; 1662195534Sscottl ch->lastslot = tag; 1663195534Sscottl /* Occupy chosen slot. */ 1664195534Sscottl slot = &ch->slot[tag]; 1665195534Sscottl slot->ccb = ccb; 1666196656Smav /* Stop PM timer. */ 1667196656Smav if (ch->numrslots == 0 && ch->pm_level > 3) 1668196656Smav callout_stop(&ch->pm_timer); 1669195534Sscottl /* Update channel stats. */ 1670199747Smav ch->oslots |= (1 << slot->slot); 1671195534Sscottl ch->numrslots++; 1672203123Smav ch->numrslotspd[ccb->ccb_h.target_id]++; 1673195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1674195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1675195534Sscottl ch->numtslots++; 1676203123Smav ch->numtslotspd[ccb->ccb_h.target_id]++; 1677195534Sscottl ch->taggedtarget = ccb->ccb_h.target_id; 1678195534Sscottl } 1679195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1680195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 1681195534Sscottl ch->aslots |= (1 << slot->slot); 1682195534Sscottl slot->dma.nsegs = 0; 1683195534Sscottl /* If request moves data, setup and load SG list */ 1684195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1685195534Sscottl void *buf; 1686195534Sscottl bus_size_t size; 1687195534Sscottl 1688195534Sscottl slot->state = AHCI_SLOT_LOADING; 1689195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1690195534Sscottl buf = ccb->ataio.data_ptr; 1691195534Sscottl size = ccb->ataio.dxfer_len; 1692195534Sscottl } else { 1693195534Sscottl buf = ccb->csio.data_ptr; 1694195534Sscottl size = ccb->csio.dxfer_len; 1695195534Sscottl } 1696195534Sscottl bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 1697195534Sscottl buf, size, ahci_dmasetprd, slot, 0); 1698195534Sscottl } else 1699195534Sscottl ahci_execute_transaction(slot); 1700195534Sscottl} 1701195534Sscottl 1702195534Sscottl/* Locked by busdma engine. */ 1703195534Sscottlstatic void 1704195534Sscottlahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1705195534Sscottl{ 1706195534Sscottl struct ahci_slot *slot = arg; 1707195534Sscottl struct ahci_channel *ch = device_get_softc(slot->dev); 1708195534Sscottl struct ahci_cmd_tab *ctp; 1709195534Sscottl struct ahci_dma_prd *prd; 1710195534Sscottl int i; 1711195534Sscottl 1712195534Sscottl if (error) { 1713195534Sscottl device_printf(slot->dev, "DMA load error\n"); 1714195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1715195534Sscottl return; 1716195534Sscottl } 1717195534Sscottl KASSERT(nsegs <= AHCI_SG_ENTRIES, ("too many DMA segment entries\n")); 1718195534Sscottl /* Get a piece of the workspace for this request */ 1719195534Sscottl ctp = (struct ahci_cmd_tab *) 1720195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1721195534Sscottl /* Fill S/G table */ 1722195534Sscottl prd = &ctp->prd_tab[0]; 1723195534Sscottl for (i = 0; i < nsegs; i++) { 1724195534Sscottl prd[i].dba = htole64(segs[i].ds_addr); 1725195534Sscottl prd[i].dbc = htole32((segs[i].ds_len - 1) & AHCI_PRD_MASK); 1726195534Sscottl } 1727195534Sscottl slot->dma.nsegs = nsegs; 1728195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1729195534Sscottl ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1730195534Sscottl BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1731195534Sscottl ahci_execute_transaction(slot); 1732195534Sscottl} 1733195534Sscottl 1734195534Sscottl/* Must be called with channel locked. */ 1735195534Sscottlstatic void 1736195534Sscottlahci_execute_transaction(struct ahci_slot *slot) 1737195534Sscottl{ 1738195534Sscottl device_t dev = slot->dev; 1739195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1740195534Sscottl struct ahci_cmd_tab *ctp; 1741195534Sscottl struct ahci_cmd_list *clp; 1742195534Sscottl union ccb *ccb = slot->ccb; 1743195534Sscottl int port = ccb->ccb_h.target_id & 0x0f; 1744222304Smav int fis_size, i, softreset; 1745203123Smav uint8_t *fis = ch->dma.rfis + 0x40; 1746203123Smav uint8_t val; 1747195534Sscottl 1748195534Sscottl /* Get a piece of the workspace for this request */ 1749195534Sscottl ctp = (struct ahci_cmd_tab *) 1750195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1751195534Sscottl /* Setup the FIS for this request */ 1752199821Smav if (!(fis_size = ahci_setup_fis(dev, ctp, ccb, slot->slot))) { 1753195534Sscottl device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1754195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1755195534Sscottl return; 1756195534Sscottl } 1757195534Sscottl /* Setup the command list entry */ 1758195534Sscottl clp = (struct ahci_cmd_list *) 1759195534Sscottl (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 1760214988Smav clp->cmd_flags = htole16( 1761214988Smav (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) | 1762214988Smav (ccb->ccb_h.func_code == XPT_SCSI_IO ? 1763214988Smav (AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) | 1764214988Smav (fis_size / sizeof(u_int32_t)) | 1765214988Smav (port << 12)); 1766214988Smav clp->prd_length = htole16(slot->dma.nsegs); 1767195534Sscottl /* Special handling for Soft Reset command. */ 1768195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1769203123Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { 1770203123Smav if (ccb->ataio.cmd.control & ATA_A_RESET) { 1771222304Smav softreset = 1; 1772203123Smav /* Kick controller into sane state */ 1773203123Smav ahci_stop(dev); 1774203123Smav ahci_clo(dev); 1775203123Smav ahci_start(dev, 0); 1776203123Smav clp->cmd_flags |= AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY; 1777203123Smav } else { 1778222304Smav softreset = 2; 1779203123Smav /* Prepare FIS receive area for check. */ 1780203123Smav for (i = 0; i < 20; i++) 1781203123Smav fis[i] = 0xff; 1782203123Smav } 1783222304Smav } else 1784222304Smav softreset = 0; 1785195534Sscottl clp->bytecount = 0; 1786195534Sscottl clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET + 1787195534Sscottl (AHCI_CT_SIZE * slot->slot)); 1788195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1789214988Smav BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1790195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 1791195534Sscottl BUS_DMASYNC_PREREAD); 1792195534Sscottl /* Set ACTIVE bit for NCQ commands. */ 1793195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1794195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1795195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot); 1796195534Sscottl } 1797203123Smav /* If FBS is enabled, set PMP port. */ 1798203123Smav if (ch->fbs_enabled) { 1799203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | 1800203123Smav (port << AHCI_P_FBS_DEV_SHIFT)); 1801203123Smav } 1802195534Sscottl /* Issue command to the controller. */ 1803195534Sscottl slot->state = AHCI_SLOT_RUNNING; 1804195534Sscottl ch->rslots |= (1 << slot->slot); 1805195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CI, (1 << slot->slot)); 1806195534Sscottl /* Device reset commands doesn't interrupt. Poll them. */ 1807195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO && 1808222304Smav (ccb->ataio.cmd.command == ATA_DEVICE_RESET || softreset)) { 1809220777Smav int count, timeout = ccb->ccb_h.timeout * 100; 1810195534Sscottl enum ahci_err_type et = AHCI_ERR_NONE; 1811195534Sscottl 1812195534Sscottl for (count = 0; count < timeout; count++) { 1813220777Smav DELAY(10); 1814195534Sscottl if (!(ATA_INL(ch->r_mem, AHCI_P_CI) & (1 << slot->slot))) 1815195534Sscottl break; 1816222304Smav if ((ATA_INL(ch->r_mem, AHCI_P_TFD) & ATA_S_ERROR) && 1817222304Smav softreset != 1) { 1818222285Smav#if 0 1819195534Sscottl device_printf(ch->dev, 1820195534Sscottl "Poll error on slot %d, TFD: %04x\n", 1821195534Sscottl slot->slot, ATA_INL(ch->r_mem, AHCI_P_TFD)); 1822222285Smav#endif 1823195534Sscottl et = AHCI_ERR_TFE; 1824195534Sscottl break; 1825195534Sscottl } 1826198851Smav /* Workaround for ATI SB600/SB700 chipsets. */ 1827198851Smav if (ccb->ccb_h.target_id == 15 && 1828198851Smav pci_get_vendor(device_get_parent(dev)) == 0x1002 && 1829198851Smav (ATA_INL(ch->r_mem, AHCI_P_IS) & AHCI_P_IX_IPM)) { 1830198851Smav et = AHCI_ERR_TIMEOUT; 1831198851Smav break; 1832198851Smav } 1833195534Sscottl } 1834222304Smav 1835222304Smav /* Marvell controllers do not wait for readyness. */ 1836222304Smav if ((ch->quirks & AHCI_Q_NOBSYRES) && softreset == 2 && 1837222304Smav et == AHCI_ERR_NONE) { 1838222304Smav while ((val = fis[2]) & ATA_S_BUSY) { 1839222304Smav DELAY(10); 1840222304Smav if (count++ >= timeout) 1841222304Smav break; 1842222304Smav } 1843222304Smav } 1844222304Smav 1845195534Sscottl if (timeout && (count >= timeout)) { 1846222304Smav device_printf(dev, "Poll timeout on slot %d port %d\n", 1847222304Smav slot->slot, port); 1848203108Smav device_printf(dev, "is %08x cs %08x ss %08x " 1849224498Smav "rs %08x tfd %02x serr %08x cmd %08x\n", 1850203108Smav ATA_INL(ch->r_mem, AHCI_P_IS), 1851203108Smav ATA_INL(ch->r_mem, AHCI_P_CI), 1852203108Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1853203108Smav ATA_INL(ch->r_mem, AHCI_P_TFD), 1854224498Smav ATA_INL(ch->r_mem, AHCI_P_SERR), 1855224498Smav ATA_INL(ch->r_mem, AHCI_P_CMD)); 1856195534Sscottl et = AHCI_ERR_TIMEOUT; 1857195534Sscottl } 1858222304Smav 1859203123Smav /* Kick controller into sane state and enable FBS. */ 1860222304Smav if (softreset == 2) 1861222285Smav ch->eslots |= (1 << slot->slot); 1862222285Smav ahci_end_transaction(slot, et); 1863195534Sscottl return; 1864195534Sscottl } 1865195534Sscottl /* Start command execution timeout */ 1866198319Smav callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000, 1867195534Sscottl (timeout_t*)ahci_timeout, slot); 1868195534Sscottl return; 1869195534Sscottl} 1870195534Sscottl 1871203873Smav/* Must be called with channel locked. */ 1872203873Smavstatic void 1873203873Smavahci_process_timeout(device_t dev) 1874203873Smav{ 1875203873Smav struct ahci_channel *ch = device_get_softc(dev); 1876203873Smav int i; 1877203873Smav 1878203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1879203873Smav /* Handle the rest of commands. */ 1880203873Smav for (i = 0; i < ch->numslots; i++) { 1881203873Smav /* Do we have a running request on slot? */ 1882203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1883203873Smav continue; 1884203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_TIMEOUT); 1885203873Smav } 1886203873Smav} 1887203873Smav 1888203873Smav/* Must be called with channel locked. */ 1889203873Smavstatic void 1890203873Smavahci_rearm_timeout(device_t dev) 1891203873Smav{ 1892203873Smav struct ahci_channel *ch = device_get_softc(dev); 1893203873Smav int i; 1894203873Smav 1895203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1896203873Smav for (i = 0; i < ch->numslots; i++) { 1897203873Smav struct ahci_slot *slot = &ch->slot[i]; 1898203873Smav 1899203873Smav /* Do we have a running request on slot? */ 1900203873Smav if (slot->state < AHCI_SLOT_RUNNING) 1901203873Smav continue; 1902203873Smav if ((ch->toslots & (1 << i)) == 0) 1903203873Smav continue; 1904203873Smav callout_reset(&slot->timeout, 1905203873Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1906203873Smav (timeout_t*)ahci_timeout, slot); 1907203873Smav } 1908203873Smav} 1909203873Smav 1910195534Sscottl/* Locked by callout mechanism. */ 1911195534Sscottlstatic void 1912195534Sscottlahci_timeout(struct ahci_slot *slot) 1913195534Sscottl{ 1914195534Sscottl device_t dev = slot->dev; 1915195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1916198319Smav uint32_t sstatus; 1917198319Smav int ccs; 1918195534Sscottl int i; 1919195534Sscottl 1920196656Smav /* Check for stale timeout. */ 1921198319Smav if (slot->state < AHCI_SLOT_RUNNING) 1922196656Smav return; 1923196656Smav 1924198319Smav /* Check if slot was not being executed last time we checked. */ 1925198319Smav if (slot->state < AHCI_SLOT_EXECUTING) { 1926198319Smav /* Check if slot started executing. */ 1927198319Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1928198319Smav ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1929198319Smav >> AHCI_P_CMD_CCS_SHIFT; 1930203123Smav if ((sstatus & (1 << slot->slot)) != 0 || ccs == slot->slot || 1931224498Smav ch->fbs_enabled || ch->wrongccs) 1932198319Smav slot->state = AHCI_SLOT_EXECUTING; 1933224498Smav else if ((ch->rslots & (1 << ccs)) == 0) { 1934224498Smav ch->wrongccs = 1; 1935224498Smav slot->state = AHCI_SLOT_EXECUTING; 1936224498Smav } 1937198319Smav 1938198319Smav callout_reset(&slot->timeout, 1939198319Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1940198319Smav (timeout_t*)ahci_timeout, slot); 1941198319Smav return; 1942198319Smav } 1943198319Smav 1944222304Smav device_printf(dev, "Timeout on slot %d port %d\n", 1945222304Smav slot->slot, slot->ccb->ccb_h.target_id & 0x0f); 1946224498Smav device_printf(dev, "is %08x cs %08x ss %08x rs %08x tfd %02x " 1947224498Smav "serr %08x cmd %08x\n", 1948198319Smav ATA_INL(ch->r_mem, AHCI_P_IS), ATA_INL(ch->r_mem, AHCI_P_CI), 1949198319Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1950224498Smav ATA_INL(ch->r_mem, AHCI_P_TFD), ATA_INL(ch->r_mem, AHCI_P_SERR), 1951224498Smav ATA_INL(ch->r_mem, AHCI_P_CMD)); 1952195534Sscottl 1953197838Smav /* Handle frozen command. */ 1954195534Sscottl if (ch->frozen) { 1955195534Sscottl union ccb *fccb = ch->frozen; 1956195534Sscottl ch->frozen = NULL; 1957195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1958198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1959198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1960198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1961198319Smav } 1962195534Sscottl xpt_done(fccb); 1963195534Sscottl } 1964224498Smav if (!ch->fbs_enabled && !ch->wrongccs) { 1965203873Smav /* Without FBS we know real timeout source. */ 1966203873Smav ch->fatalerr = 1; 1967203873Smav /* Handle command with timeout. */ 1968203873Smav ahci_end_transaction(&ch->slot[slot->slot], AHCI_ERR_TIMEOUT); 1969203873Smav /* Handle the rest of commands. */ 1970203873Smav for (i = 0; i < ch->numslots; i++) { 1971203873Smav /* Do we have a running request on slot? */ 1972203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1973203873Smav continue; 1974203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 1975203873Smav } 1976203873Smav } else { 1977203873Smav /* With FBS we wait for other commands timeout and pray. */ 1978203873Smav if (ch->toslots == 0) 1979203873Smav xpt_freeze_simq(ch->sim, 1); 1980203873Smav ch->toslots |= (1 << slot->slot); 1981203873Smav if ((ch->rslots & ~ch->toslots) == 0) 1982203873Smav ahci_process_timeout(dev); 1983203873Smav else 1984203873Smav device_printf(dev, " ... waiting for slots %08x\n", 1985203873Smav ch->rslots & ~ch->toslots); 1986195534Sscottl } 1987195534Sscottl} 1988195534Sscottl 1989195534Sscottl/* Must be called with channel locked. */ 1990195534Sscottlstatic void 1991195534Sscottlahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et) 1992195534Sscottl{ 1993195534Sscottl device_t dev = slot->dev; 1994195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1995195534Sscottl union ccb *ccb = slot->ccb; 1996214988Smav struct ahci_cmd_list *clp; 1997212732Smav int lastto; 1998222304Smav uint32_t sig; 1999195534Sscottl 2000195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 2001214988Smav BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2002214988Smav clp = (struct ahci_cmd_list *) 2003214988Smav (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 2004195534Sscottl /* Read result registers to the result struct 2005195534Sscottl * May be incorrect if several commands finished same time, 2006195534Sscottl * so read only when sure or have to. 2007195534Sscottl */ 2008195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2009195534Sscottl struct ata_res *res = &ccb->ataio.res; 2010195534Sscottl 2011195534Sscottl if ((et == AHCI_ERR_TFE) || 2012195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 2013195534Sscottl u_int8_t *fis = ch->dma.rfis + 0x40; 2014195534Sscottl 2015195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 2016195534Sscottl BUS_DMASYNC_POSTREAD); 2017203123Smav if (ch->fbs_enabled) { 2018203123Smav fis += ccb->ccb_h.target_id * 256; 2019203123Smav res->status = fis[2]; 2020203123Smav res->error = fis[3]; 2021203123Smav } else { 2022203123Smav uint16_t tfd = ATA_INL(ch->r_mem, AHCI_P_TFD); 2023203123Smav 2024203123Smav res->status = tfd; 2025203123Smav res->error = tfd >> 8; 2026203123Smav } 2027195534Sscottl res->lba_low = fis[4]; 2028195534Sscottl res->lba_mid = fis[5]; 2029195534Sscottl res->lba_high = fis[6]; 2030195534Sscottl res->device = fis[7]; 2031195534Sscottl res->lba_low_exp = fis[8]; 2032195534Sscottl res->lba_mid_exp = fis[9]; 2033195534Sscottl res->lba_high_exp = fis[10]; 2034195534Sscottl res->sector_count = fis[12]; 2035195534Sscottl res->sector_count_exp = fis[13]; 2036222304Smav 2037222304Smav /* 2038222304Smav * Some weird controllers do not return signature in 2039222304Smav * FIS receive area. Read it from PxSIG register. 2040222304Smav */ 2041222304Smav if ((ch->quirks & AHCI_Q_ALTSIG) && 2042222304Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2043222304Smav (ccb->ataio.cmd.control & ATA_A_RESET) == 0) { 2044222304Smav sig = ATA_INL(ch->r_mem, AHCI_P_SIG); 2045222304Smav res->lba_high = sig >> 24; 2046222304Smav res->lba_mid = sig >> 16; 2047222304Smav res->lba_low = sig >> 8; 2048222304Smav res->sector_count = sig; 2049222304Smav } 2050195534Sscottl } else 2051195534Sscottl bzero(res, sizeof(*res)); 2052214988Smav if ((ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) == 0 && 2053218596Smav (ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2054218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2055214988Smav ccb->ataio.resid = 2056214988Smav ccb->ataio.dxfer_len - le32toh(clp->bytecount); 2057214988Smav } 2058214988Smav } else { 2059218596Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2060218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2061214988Smav ccb->csio.resid = 2062214988Smav ccb->csio.dxfer_len - le32toh(clp->bytecount); 2063214988Smav } 2064195534Sscottl } 2065195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 2066195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 2067195534Sscottl (ccb->ccb_h.flags & CAM_DIR_IN) ? 2068195534Sscottl BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2069195534Sscottl bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 2070195534Sscottl } 2071203123Smav if (et != AHCI_ERR_NONE) 2072203123Smav ch->eslots |= (1 << slot->slot); 2073198319Smav /* In case of error, freeze device for proper recovery. */ 2074220565Smav if ((et != AHCI_ERR_NONE) && (!ch->recoverycmd) && 2075198319Smav !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 2076198319Smav xpt_freeze_devq(ccb->ccb_h.path, 1); 2077198319Smav ccb->ccb_h.status |= CAM_DEV_QFRZN; 2078198319Smav } 2079195534Sscottl /* Set proper result status. */ 2080195534Sscottl ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2081195534Sscottl switch (et) { 2082195534Sscottl case AHCI_ERR_NONE: 2083195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP; 2084195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) 2085195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_OK; 2086195534Sscottl break; 2087195534Sscottl case AHCI_ERR_INVALID: 2088198851Smav ch->fatalerr = 1; 2089195534Sscottl ccb->ccb_h.status |= CAM_REQ_INVALID; 2090195534Sscottl break; 2091195534Sscottl case AHCI_ERR_INNOCENT: 2092195534Sscottl ccb->ccb_h.status |= CAM_REQUEUE_REQ; 2093195534Sscottl break; 2094195534Sscottl case AHCI_ERR_TFE: 2095198319Smav case AHCI_ERR_NCQ: 2096195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2097195534Sscottl ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 2098195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 2099195534Sscottl } else { 2100195534Sscottl ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 2101195534Sscottl } 2102195534Sscottl break; 2103195534Sscottl case AHCI_ERR_SATA: 2104198851Smav ch->fatalerr = 1; 2105220565Smav if (!ch->recoverycmd) { 2106198319Smav xpt_freeze_simq(ch->sim, 1); 2107198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2108198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2109198319Smav } 2110198319Smav ccb->ccb_h.status |= CAM_UNCOR_PARITY; 2111195534Sscottl break; 2112195534Sscottl case AHCI_ERR_TIMEOUT: 2113220565Smav if (!ch->recoverycmd) { 2114198319Smav xpt_freeze_simq(ch->sim, 1); 2115198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2116198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2117198319Smav } 2118195534Sscottl ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 2119195534Sscottl break; 2120195534Sscottl default: 2121198851Smav ch->fatalerr = 1; 2122195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 2123195534Sscottl } 2124195534Sscottl /* Free slot. */ 2125199747Smav ch->oslots &= ~(1 << slot->slot); 2126195534Sscottl ch->rslots &= ~(1 << slot->slot); 2127195534Sscottl ch->aslots &= ~(1 << slot->slot); 2128195534Sscottl slot->state = AHCI_SLOT_EMPTY; 2129195534Sscottl slot->ccb = NULL; 2130195534Sscottl /* Update channel stats. */ 2131195534Sscottl ch->numrslots--; 2132203123Smav ch->numrslotspd[ccb->ccb_h.target_id]--; 2133195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2134195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 2135195534Sscottl ch->numtslots--; 2136203123Smav ch->numtslotspd[ccb->ccb_h.target_id]--; 2137195534Sscottl } 2138212732Smav /* Cancel timeout state if request completed normally. */ 2139212732Smav if (et != AHCI_ERR_TIMEOUT) { 2140212732Smav lastto = (ch->toslots == (1 << slot->slot)); 2141212732Smav ch->toslots &= ~(1 << slot->slot); 2142212732Smav if (lastto) 2143212732Smav xpt_release_simq(ch->sim, TRUE); 2144212732Smav } 2145195534Sscottl /* If it was first request of reset sequence and there is no error, 2146195534Sscottl * proceed to second request. */ 2147195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2148195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2149195534Sscottl (ccb->ataio.cmd.control & ATA_A_RESET) && 2150195534Sscottl et == AHCI_ERR_NONE) { 2151195534Sscottl ccb->ataio.cmd.control &= ~ATA_A_RESET; 2152195534Sscottl ahci_begin_transaction(dev, ccb); 2153195534Sscottl return; 2154195534Sscottl } 2155198851Smav /* If it was our READ LOG command - process it. */ 2156220565Smav if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { 2157198851Smav ahci_process_read_log(dev, ccb); 2158220565Smav /* If it was our REQUEST SENSE command - process it. */ 2159220565Smav } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { 2160220565Smav ahci_process_request_sense(dev, ccb); 2161220565Smav /* If it was NCQ or ATAPI command error, put result on hold. */ 2162220565Smav } else if (et == AHCI_ERR_NCQ || 2163220565Smav ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && 2164220565Smav (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { 2165195534Sscottl ch->hold[slot->slot] = ccb; 2166203123Smav ch->numhslots++; 2167198851Smav } else 2168195534Sscottl xpt_done(ccb); 2169198851Smav /* If we have no other active commands, ... */ 2170198851Smav if (ch->rslots == 0) { 2171198851Smav /* if there was fatal error - reset port. */ 2172203873Smav if (ch->toslots != 0 || ch->fatalerr) { 2173198851Smav ahci_reset(dev); 2174203123Smav } else { 2175203123Smav /* if we have slots in error, we can reinit port. */ 2176203123Smav if (ch->eslots != 0) { 2177203123Smav ahci_stop(dev); 2178222285Smav ahci_clo(dev); 2179203123Smav ahci_start(dev, 1); 2180203123Smav } 2181203123Smav /* if there commands on hold, we can do READ LOG. */ 2182220565Smav if (!ch->recoverycmd && ch->numhslots) 2183220565Smav ahci_issue_recovery(dev); 2184198851Smav } 2185203873Smav /* If all the rest of commands are in timeout - give them chance. */ 2186203873Smav } else if ((ch->rslots & ~ch->toslots) == 0 && 2187203873Smav et != AHCI_ERR_TIMEOUT) 2188203873Smav ahci_rearm_timeout(dev); 2189222285Smav /* Unfreeze frozen command. */ 2190222285Smav if (ch->frozen && !ahci_check_collision(dev, ch->frozen)) { 2191222285Smav union ccb *fccb = ch->frozen; 2192222285Smav ch->frozen = NULL; 2193222285Smav ahci_begin_transaction(dev, fccb); 2194222285Smav xpt_release_simq(ch->sim, TRUE); 2195222285Smav } 2196196656Smav /* Start PM timer. */ 2197207499Smav if (ch->numrslots == 0 && ch->pm_level > 3 && 2198207499Smav (ch->curr[ch->pm_present ? 15 : 0].caps & CTS_SATA_CAPS_D_PMREQ)) { 2199196656Smav callout_schedule(&ch->pm_timer, 2200196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8); 2201196656Smav } 2202195534Sscottl} 2203195534Sscottl 2204195534Sscottlstatic void 2205220565Smavahci_issue_recovery(device_t dev) 2206195534Sscottl{ 2207195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2208195534Sscottl union ccb *ccb; 2209195534Sscottl struct ccb_ataio *ataio; 2210220565Smav struct ccb_scsiio *csio; 2211195534Sscottl int i; 2212195534Sscottl 2213220830Smav /* Find some held command. */ 2214195534Sscottl for (i = 0; i < ch->numslots; i++) { 2215195534Sscottl if (ch->hold[i]) 2216195534Sscottl break; 2217195534Sscottl } 2218195534Sscottl ccb = xpt_alloc_ccb_nowait(); 2219195534Sscottl if (ccb == NULL) { 2220220830Smav device_printf(dev, "Unable to allocate recovery command\n"); 2221220822Smavcompleteall: 2222220830Smav /* We can't do anything -- complete held commands. */ 2223220822Smav for (i = 0; i < ch->numslots; i++) { 2224220822Smav if (ch->hold[i] == NULL) 2225220822Smav continue; 2226220822Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2227220822Smav ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; 2228220822Smav xpt_done(ch->hold[i]); 2229220822Smav ch->hold[i] = NULL; 2230220822Smav ch->numhslots--; 2231220822Smav } 2232220822Smav ahci_reset(dev); 2233220822Smav return; 2234195534Sscottl } 2235195534Sscottl ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 2236220565Smav if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2237220565Smav /* READ LOG */ 2238220565Smav ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; 2239220565Smav ccb->ccb_h.func_code = XPT_ATA_IO; 2240220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2241220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2242220565Smav ataio = &ccb->ataio; 2243220565Smav ataio->data_ptr = malloc(512, M_AHCI, M_NOWAIT); 2244220565Smav if (ataio->data_ptr == NULL) { 2245220565Smav xpt_free_ccb(ccb); 2246220822Smav device_printf(dev, 2247220830Smav "Unable to allocate memory for READ LOG command\n"); 2248220822Smav goto completeall; 2249220565Smav } 2250220565Smav ataio->dxfer_len = 512; 2251220565Smav bzero(&ataio->cmd, sizeof(ataio->cmd)); 2252220565Smav ataio->cmd.flags = CAM_ATAIO_48BIT; 2253220565Smav ataio->cmd.command = 0x2F; /* READ LOG EXT */ 2254220565Smav ataio->cmd.sector_count = 1; 2255220565Smav ataio->cmd.sector_count_exp = 0; 2256220565Smav ataio->cmd.lba_low = 0x10; 2257220565Smav ataio->cmd.lba_mid = 0; 2258220565Smav ataio->cmd.lba_mid_exp = 0; 2259220565Smav } else { 2260220565Smav /* REQUEST SENSE */ 2261220565Smav ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; 2262220565Smav ccb->ccb_h.recovery_slot = i; 2263220565Smav ccb->ccb_h.func_code = XPT_SCSI_IO; 2264220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2265220565Smav ccb->ccb_h.status = 0; 2266220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2267220565Smav csio = &ccb->csio; 2268220565Smav csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; 2269220565Smav csio->dxfer_len = ch->hold[i]->csio.sense_len; 2270220565Smav csio->cdb_len = 6; 2271220565Smav bzero(&csio->cdb_io, sizeof(csio->cdb_io)); 2272220565Smav csio->cdb_io.cdb_bytes[0] = 0x03; 2273220565Smav csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; 2274195534Sscottl } 2275220565Smav /* Freeze SIM while doing recovery. */ 2276220822Smav ch->recoverycmd = 1; 2277198319Smav xpt_freeze_simq(ch->sim, 1); 2278195534Sscottl ahci_begin_transaction(dev, ccb); 2279195534Sscottl} 2280195534Sscottl 2281195534Sscottlstatic void 2282195534Sscottlahci_process_read_log(device_t dev, union ccb *ccb) 2283195534Sscottl{ 2284195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2285195534Sscottl uint8_t *data; 2286195534Sscottl struct ata_res *res; 2287195534Sscottl int i; 2288195534Sscottl 2289220565Smav ch->recoverycmd = 0; 2290195534Sscottl 2291195534Sscottl data = ccb->ataio.data_ptr; 2292195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 2293195534Sscottl (data[0] & 0x80) == 0) { 2294195534Sscottl for (i = 0; i < ch->numslots; i++) { 2295195534Sscottl if (!ch->hold[i]) 2296195534Sscottl continue; 2297220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2298220565Smav continue; 2299195534Sscottl if ((data[0] & 0x1F) == i) { 2300195534Sscottl res = &ch->hold[i]->ataio.res; 2301195534Sscottl res->status = data[2]; 2302195534Sscottl res->error = data[3]; 2303195534Sscottl res->lba_low = data[4]; 2304195534Sscottl res->lba_mid = data[5]; 2305195534Sscottl res->lba_high = data[6]; 2306195534Sscottl res->device = data[7]; 2307195534Sscottl res->lba_low_exp = data[8]; 2308195534Sscottl res->lba_mid_exp = data[9]; 2309195534Sscottl res->lba_high_exp = data[10]; 2310195534Sscottl res->sector_count = data[12]; 2311195534Sscottl res->sector_count_exp = data[13]; 2312195534Sscottl } else { 2313195534Sscottl ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2314195534Sscottl ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 2315195534Sscottl } 2316195534Sscottl xpt_done(ch->hold[i]); 2317195534Sscottl ch->hold[i] = NULL; 2318203123Smav ch->numhslots--; 2319195534Sscottl } 2320195534Sscottl } else { 2321195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 2322195534Sscottl device_printf(dev, "Error while READ LOG EXT\n"); 2323195534Sscottl else if ((data[0] & 0x80) == 0) { 2324195534Sscottl device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 2325195534Sscottl } 2326195534Sscottl for (i = 0; i < ch->numslots; i++) { 2327195534Sscottl if (!ch->hold[i]) 2328195534Sscottl continue; 2329220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2330220565Smav continue; 2331195534Sscottl xpt_done(ch->hold[i]); 2332195534Sscottl ch->hold[i] = NULL; 2333203123Smav ch->numhslots--; 2334195534Sscottl } 2335195534Sscottl } 2336195534Sscottl free(ccb->ataio.data_ptr, M_AHCI); 2337195534Sscottl xpt_free_ccb(ccb); 2338198319Smav xpt_release_simq(ch->sim, TRUE); 2339195534Sscottl} 2340195534Sscottl 2341195534Sscottlstatic void 2342220565Smavahci_process_request_sense(device_t dev, union ccb *ccb) 2343220565Smav{ 2344220565Smav struct ahci_channel *ch = device_get_softc(dev); 2345220565Smav int i; 2346220565Smav 2347220565Smav ch->recoverycmd = 0; 2348220565Smav 2349220565Smav i = ccb->ccb_h.recovery_slot; 2350220565Smav if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { 2351220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; 2352220565Smav } else { 2353220565Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2354220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; 2355220565Smav } 2356220565Smav xpt_done(ch->hold[i]); 2357220565Smav ch->hold[i] = NULL; 2358220565Smav ch->numhslots--; 2359220565Smav xpt_free_ccb(ccb); 2360220565Smav xpt_release_simq(ch->sim, TRUE); 2361220565Smav} 2362220565Smav 2363220565Smavstatic void 2364203123Smavahci_start(device_t dev, int fbs) 2365195534Sscottl{ 2366195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2367195534Sscottl u_int32_t cmd; 2368195534Sscottl 2369195534Sscottl /* Clear SATA error register */ 2370195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xFFFFFFFF); 2371195534Sscottl /* Clear any interrupts pending on this channel */ 2372195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, 0xFFFFFFFF); 2373203123Smav /* Configure FIS-based switching if supported. */ 2374203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) { 2375203123Smav ch->fbs_enabled = (fbs && ch->pm_present) ? 1 : 0; 2376203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, 2377203123Smav ch->fbs_enabled ? AHCI_P_FBS_EN : 0); 2378203123Smav } 2379195534Sscottl /* Start operations on this channel */ 2380195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2381207430Smav cmd &= ~AHCI_P_CMD_PMA; 2382195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_ST | 2383195534Sscottl (ch->pm_present ? AHCI_P_CMD_PMA : 0)); 2384195534Sscottl} 2385195534Sscottl 2386195534Sscottlstatic void 2387195534Sscottlahci_stop(device_t dev) 2388195534Sscottl{ 2389195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2390195534Sscottl u_int32_t cmd; 2391195534Sscottl int timeout; 2392195534Sscottl 2393195534Sscottl /* Kill all activity on this channel */ 2394195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2395195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST); 2396195534Sscottl /* Wait for activity stop. */ 2397195534Sscottl timeout = 0; 2398195534Sscottl do { 2399220777Smav DELAY(10); 2400220777Smav if (timeout++ > 50000) { 2401195534Sscottl device_printf(dev, "stopping AHCI engine failed\n"); 2402195534Sscottl break; 2403195534Sscottl } 2404195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CR); 2405203123Smav ch->eslots = 0; 2406195534Sscottl} 2407195534Sscottl 2408195534Sscottlstatic void 2409195534Sscottlahci_clo(device_t dev) 2410195534Sscottl{ 2411195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2412195534Sscottl u_int32_t cmd; 2413195534Sscottl int timeout; 2414195534Sscottl 2415195534Sscottl /* Issue Command List Override if supported */ 2416195534Sscottl if (ch->caps & AHCI_CAP_SCLO) { 2417195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2418195534Sscottl cmd |= AHCI_P_CMD_CLO; 2419195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd); 2420195534Sscottl timeout = 0; 2421195534Sscottl do { 2422220777Smav DELAY(10); 2423220777Smav if (timeout++ > 50000) { 2424195534Sscottl device_printf(dev, "executing CLO failed\n"); 2425195534Sscottl break; 2426195534Sscottl } 2427195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO); 2428195534Sscottl } 2429195534Sscottl} 2430195534Sscottl 2431195534Sscottlstatic void 2432195534Sscottlahci_stop_fr(device_t dev) 2433195534Sscottl{ 2434195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2435195534Sscottl u_int32_t cmd; 2436195534Sscottl int timeout; 2437195534Sscottl 2438195534Sscottl /* Kill all FIS reception on this channel */ 2439195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2440195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE); 2441195534Sscottl /* Wait for FIS reception stop. */ 2442195534Sscottl timeout = 0; 2443195534Sscottl do { 2444220777Smav DELAY(10); 2445220777Smav if (timeout++ > 50000) { 2446195534Sscottl device_printf(dev, "stopping AHCI FR engine failed\n"); 2447195534Sscottl break; 2448195534Sscottl } 2449195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR); 2450195534Sscottl} 2451195534Sscottl 2452195534Sscottlstatic void 2453195534Sscottlahci_start_fr(device_t dev) 2454195534Sscottl{ 2455195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2456195534Sscottl u_int32_t cmd; 2457195534Sscottl 2458195534Sscottl /* Start FIS reception on this channel */ 2459195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2460195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_FRE); 2461195534Sscottl} 2462195534Sscottl 2463195534Sscottlstatic int 2464220576Smavahci_wait_ready(device_t dev, int t, int t0) 2465195534Sscottl{ 2466195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2467195534Sscottl int timeout = 0; 2468195534Sscottl uint32_t val; 2469195534Sscottl 2470195534Sscottl while ((val = ATA_INL(ch->r_mem, AHCI_P_TFD)) & 2471195534Sscottl (ATA_S_BUSY | ATA_S_DRQ)) { 2472220576Smav if (timeout > t) { 2473220576Smav if (t != 0) { 2474220576Smav device_printf(dev, 2475220576Smav "AHCI reset: device not ready after %dms " 2476220576Smav "(tfd = %08x)\n", 2477220576Smav MAX(t, 0) + t0, val); 2478220576Smav } 2479195534Sscottl return (EBUSY); 2480195534Sscottl } 2481220576Smav DELAY(1000); 2482220576Smav timeout++; 2483220576Smav } 2484195534Sscottl if (bootverbose) 2485220576Smav device_printf(dev, "AHCI reset: device ready after %dms\n", 2486220576Smav timeout + t0); 2487195534Sscottl return (0); 2488195534Sscottl} 2489195534Sscottl 2490195534Sscottlstatic void 2491220576Smavahci_reset_to(void *arg) 2492220576Smav{ 2493220576Smav device_t dev = arg; 2494220576Smav struct ahci_channel *ch = device_get_softc(dev); 2495220576Smav 2496220576Smav if (ch->resetting == 0) 2497220576Smav return; 2498220576Smav ch->resetting--; 2499220576Smav if (ahci_wait_ready(dev, ch->resetting == 0 ? -1 : 0, 2500220576Smav (310 - ch->resetting) * 100) == 0) { 2501220576Smav ch->resetting = 0; 2502220777Smav ahci_start(dev, 1); 2503220576Smav xpt_release_simq(ch->sim, TRUE); 2504220576Smav return; 2505220576Smav } 2506220576Smav if (ch->resetting == 0) { 2507220576Smav ahci_clo(dev); 2508220576Smav ahci_start(dev, 1); 2509220576Smav xpt_release_simq(ch->sim, TRUE); 2510220576Smav return; 2511220576Smav } 2512220576Smav callout_schedule(&ch->reset_timer, hz / 10); 2513220576Smav} 2514220576Smav 2515220576Smavstatic void 2516195534Sscottlahci_reset(device_t dev) 2517195534Sscottl{ 2518195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2519196656Smav struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 2520195534Sscottl int i; 2521195534Sscottl 2522203108Smav xpt_freeze_simq(ch->sim, 1); 2523195534Sscottl if (bootverbose) 2524195534Sscottl device_printf(dev, "AHCI reset...\n"); 2525220576Smav /* Forget about previous reset. */ 2526220576Smav if (ch->resetting) { 2527220576Smav ch->resetting = 0; 2528220576Smav callout_stop(&ch->reset_timer); 2529220576Smav xpt_release_simq(ch->sim, TRUE); 2530220576Smav } 2531195534Sscottl /* Requeue freezed command. */ 2532195534Sscottl if (ch->frozen) { 2533195534Sscottl union ccb *fccb = ch->frozen; 2534195534Sscottl ch->frozen = NULL; 2535195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 2536198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 2537198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 2538198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 2539198319Smav } 2540195534Sscottl xpt_done(fccb); 2541195534Sscottl } 2542195534Sscottl /* Kill the engine and requeue all running commands. */ 2543195534Sscottl ahci_stop(dev); 2544195534Sscottl for (i = 0; i < ch->numslots; i++) { 2545195534Sscottl /* Do we have a running request on slot? */ 2546195534Sscottl if (ch->slot[i].state < AHCI_SLOT_RUNNING) 2547195534Sscottl continue; 2548195534Sscottl /* XXX; Commands in loading state. */ 2549195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 2550195534Sscottl } 2551198851Smav for (i = 0; i < ch->numslots; i++) { 2552198851Smav if (!ch->hold[i]) 2553198851Smav continue; 2554198851Smav xpt_done(ch->hold[i]); 2555198851Smav ch->hold[i] = NULL; 2556203123Smav ch->numhslots--; 2557198851Smav } 2558203873Smav if (ch->toslots != 0) 2559203873Smav xpt_release_simq(ch->sim, TRUE); 2560203123Smav ch->eslots = 0; 2561203873Smav ch->toslots = 0; 2562224498Smav ch->wrongccs = 0; 2563198851Smav ch->fatalerr = 0; 2564198319Smav /* Tell the XPT about the event */ 2565198319Smav xpt_async(AC_BUS_RESET, ch->path, NULL); 2566195534Sscottl /* Disable port interrupts */ 2567195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 2568195534Sscottl /* Reset and reconnect PHY, */ 2569203108Smav if (!ahci_sata_phy_reset(dev)) { 2570195534Sscottl if (bootverbose) 2571195534Sscottl device_printf(dev, 2572220576Smav "AHCI reset: device not found\n"); 2573195534Sscottl ch->devices = 0; 2574195534Sscottl /* Enable wanted port interrupts */ 2575195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2576220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2577220657Smav AHCI_P_IX_PRC | AHCI_P_IX_PC)); 2578203108Smav xpt_release_simq(ch->sim, TRUE); 2579195534Sscottl return; 2580195534Sscottl } 2581220576Smav if (bootverbose) 2582220576Smav device_printf(dev, "AHCI reset: device found\n"); 2583195534Sscottl /* Wait for clearing busy status. */ 2584220576Smav if (ahci_wait_ready(dev, dumping ? 31000 : 0, 0)) { 2585220576Smav if (dumping) 2586220576Smav ahci_clo(dev); 2587220576Smav else 2588220576Smav ch->resetting = 310; 2589220576Smav } 2590195534Sscottl ch->devices = 1; 2591195534Sscottl /* Enable wanted port interrupts */ 2592195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2593220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2594220657Smav AHCI_P_IX_TFE | AHCI_P_IX_HBF | 2595195534Sscottl AHCI_P_IX_HBD | AHCI_P_IX_IF | AHCI_P_IX_OF | 2596220657Smav ((ch->pm_level == 0) ? AHCI_P_IX_PRC : 0) | AHCI_P_IX_PC | 2597196656Smav AHCI_P_IX_DP | AHCI_P_IX_UF | (ctlr->ccc ? 0 : AHCI_P_IX_SDB) | 2598196656Smav AHCI_P_IX_DS | AHCI_P_IX_PS | (ctlr->ccc ? 0 : AHCI_P_IX_DHR))); 2599220576Smav if (ch->resetting) 2600220576Smav callout_reset(&ch->reset_timer, hz / 10, ahci_reset_to, dev); 2601220777Smav else { 2602220777Smav ahci_start(dev, 1); 2603220576Smav xpt_release_simq(ch->sim, TRUE); 2604220777Smav } 2605195534Sscottl} 2606195534Sscottl 2607195534Sscottlstatic int 2608199821Smavahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag) 2609195534Sscottl{ 2610199821Smav struct ahci_channel *ch = device_get_softc(dev); 2611195534Sscottl u_int8_t *fis = &ctp->cfis[0]; 2612195534Sscottl 2613195534Sscottl bzero(ctp->cfis, 64); 2614195534Sscottl fis[0] = 0x27; /* host to device */ 2615195534Sscottl fis[1] = (ccb->ccb_h.target_id & 0x0f); 2616195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2617195534Sscottl fis[1] |= 0x80; 2618195534Sscottl fis[2] = ATA_PACKET_CMD; 2619199821Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2620199821Smav ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 2621195534Sscottl fis[3] = ATA_F_DMA; 2622195534Sscottl else { 2623195534Sscottl fis[5] = ccb->csio.dxfer_len; 2624195534Sscottl fis[6] = ccb->csio.dxfer_len >> 8; 2625195534Sscottl } 2626195534Sscottl fis[7] = ATA_D_LBA; 2627195534Sscottl fis[15] = ATA_A_4BIT; 2628195534Sscottl bzero(ctp->acmd, 32); 2629195534Sscottl bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 2630195534Sscottl ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 2631195534Sscottl ctp->acmd, ccb->csio.cdb_len); 2632195534Sscottl } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 2633195534Sscottl fis[1] |= 0x80; 2634195534Sscottl fis[2] = ccb->ataio.cmd.command; 2635195534Sscottl fis[3] = ccb->ataio.cmd.features; 2636195534Sscottl fis[4] = ccb->ataio.cmd.lba_low; 2637195534Sscottl fis[5] = ccb->ataio.cmd.lba_mid; 2638195534Sscottl fis[6] = ccb->ataio.cmd.lba_high; 2639195534Sscottl fis[7] = ccb->ataio.cmd.device; 2640195534Sscottl fis[8] = ccb->ataio.cmd.lba_low_exp; 2641195534Sscottl fis[9] = ccb->ataio.cmd.lba_mid_exp; 2642195534Sscottl fis[10] = ccb->ataio.cmd.lba_high_exp; 2643195534Sscottl fis[11] = ccb->ataio.cmd.features_exp; 2644195534Sscottl if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 2645195534Sscottl fis[12] = tag << 3; 2646195534Sscottl fis[13] = 0; 2647195534Sscottl } else { 2648195534Sscottl fis[12] = ccb->ataio.cmd.sector_count; 2649195534Sscottl fis[13] = ccb->ataio.cmd.sector_count_exp; 2650195534Sscottl } 2651195534Sscottl fis[15] = ATA_A_4BIT; 2652195534Sscottl } else { 2653195534Sscottl fis[15] = ccb->ataio.cmd.control; 2654195534Sscottl } 2655195534Sscottl return (20); 2656195534Sscottl} 2657195534Sscottl 2658195534Sscottlstatic int 2659195534Sscottlahci_sata_connect(struct ahci_channel *ch) 2660195534Sscottl{ 2661195534Sscottl u_int32_t status; 2662220829Smav int timeout, found = 0; 2663195534Sscottl 2664195534Sscottl /* Wait up to 100ms for "connect well" */ 2665220777Smav for (timeout = 0; timeout < 1000 ; timeout++) { 2666195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 2667220829Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 2668220829Smav found = 1; 2669195534Sscottl if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 2670195534Sscottl ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 2671195534Sscottl ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 2672195534Sscottl break; 2673196656Smav if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 2674196656Smav if (bootverbose) { 2675196656Smav device_printf(ch->dev, "SATA offline status=%08x\n", 2676196656Smav status); 2677196656Smav } 2678196656Smav return (0); 2679196656Smav } 2680220829Smav if (found == 0 && timeout >= 100) 2681220829Smav break; 2682220777Smav DELAY(100); 2683195534Sscottl } 2684220829Smav if (timeout >= 1000 || !found) { 2685195534Sscottl if (bootverbose) { 2686220829Smav device_printf(ch->dev, 2687220829Smav "SATA connect timeout time=%dus status=%08x\n", 2688220829Smav timeout * 100, status); 2689195534Sscottl } 2690195534Sscottl return (0); 2691195534Sscottl } 2692195534Sscottl if (bootverbose) { 2693220777Smav device_printf(ch->dev, "SATA connect time=%dus status=%08x\n", 2694220777Smav timeout * 100, status); 2695195534Sscottl } 2696195534Sscottl /* Clear SATA error register */ 2697195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff); 2698195534Sscottl return (1); 2699195534Sscottl} 2700195534Sscottl 2701195534Sscottlstatic int 2702203108Smavahci_sata_phy_reset(device_t dev) 2703195534Sscottl{ 2704195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2705199821Smav int sata_rev; 2706195534Sscottl uint32_t val; 2707195534Sscottl 2708220657Smav if (ch->listening) { 2709220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2710220657Smav val |= AHCI_P_CMD_SUD; 2711220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2712220657Smav ch->listening = 0; 2713220657Smav } 2714199821Smav sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 2715199821Smav if (sata_rev == 1) 2716195534Sscottl val = ATA_SC_SPD_SPEED_GEN1; 2717199821Smav else if (sata_rev == 2) 2718195534Sscottl val = ATA_SC_SPD_SPEED_GEN2; 2719199821Smav else if (sata_rev == 3) 2720195534Sscottl val = ATA_SC_SPD_SPEED_GEN3; 2721195534Sscottl else 2722195534Sscottl val = 0; 2723195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2724196656Smav ATA_SC_DET_RESET | val | 2725196656Smav ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER); 2726220777Smav DELAY(1000); 2727196656Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2728195534Sscottl ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 2729195534Sscottl (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 2730203426Smav if (!ahci_sata_connect(ch)) { 2731220657Smav if (ch->caps & AHCI_CAP_SSS) { 2732220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2733220657Smav val &= ~AHCI_P_CMD_SUD; 2734220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2735220657Smav ch->listening = 1; 2736220657Smav } else if (ch->pm_level > 0) 2737203426Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 2738203426Smav return (0); 2739203426Smav } 2740203426Smav return (1); 2741195534Sscottl} 2742195534Sscottl 2743207430Smavstatic int 2744207430Smavahci_check_ids(device_t dev, union ccb *ccb) 2745207430Smav{ 2746207430Smav struct ahci_channel *ch = device_get_softc(dev); 2747207430Smav 2748207430Smav if (ccb->ccb_h.target_id > ((ch->caps & AHCI_CAP_SPM) ? 15 : 0)) { 2749207430Smav ccb->ccb_h.status = CAM_TID_INVALID; 2750207430Smav xpt_done(ccb); 2751207430Smav return (-1); 2752207430Smav } 2753207430Smav if (ccb->ccb_h.target_lun != 0) { 2754207430Smav ccb->ccb_h.status = CAM_LUN_INVALID; 2755207430Smav xpt_done(ccb); 2756207430Smav return (-1); 2757207430Smav } 2758207430Smav return (0); 2759207430Smav} 2760207430Smav 2761195534Sscottlstatic void 2762195534Sscottlahciaction(struct cam_sim *sim, union ccb *ccb) 2763195534Sscottl{ 2764210471Smav device_t dev, parent; 2765195534Sscottl struct ahci_channel *ch; 2766195534Sscottl 2767195534Sscottl CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahciaction func_code=%x\n", 2768195534Sscottl ccb->ccb_h.func_code)); 2769195534Sscottl 2770195534Sscottl ch = (struct ahci_channel *)cam_sim_softc(sim); 2771195534Sscottl dev = ch->dev; 2772195534Sscottl switch (ccb->ccb_h.func_code) { 2773195534Sscottl /* Common cases first */ 2774195534Sscottl case XPT_ATA_IO: /* Execute the requested I/O operation */ 2775195534Sscottl case XPT_SCSI_IO: 2776207430Smav if (ahci_check_ids(dev, ccb)) 2777207430Smav return; 2778207430Smav if (ch->devices == 0 || 2779207430Smav (ch->pm_present == 0 && 2780207430Smav ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 2781195534Sscottl ccb->ccb_h.status = CAM_SEL_TIMEOUT; 2782195534Sscottl break; 2783195534Sscottl } 2784220565Smav ccb->ccb_h.recovery_type = RECOVERY_NONE; 2785195534Sscottl /* Check for command collision. */ 2786195534Sscottl if (ahci_check_collision(dev, ccb)) { 2787195534Sscottl /* Freeze command. */ 2788195534Sscottl ch->frozen = ccb; 2789195534Sscottl /* We have only one frozen slot, so freeze simq also. */ 2790195534Sscottl xpt_freeze_simq(ch->sim, 1); 2791195534Sscottl return; 2792195534Sscottl } 2793195534Sscottl ahci_begin_transaction(dev, ccb); 2794207430Smav return; 2795195534Sscottl case XPT_EN_LUN: /* Enable LUN as a target */ 2796195534Sscottl case XPT_TARGET_IO: /* Execute target I/O request */ 2797195534Sscottl case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 2798195534Sscottl case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 2799195534Sscottl case XPT_ABORT: /* Abort the specified CCB */ 2800195534Sscottl /* XXX Implement */ 2801195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2802195534Sscottl break; 2803195534Sscottl case XPT_SET_TRAN_SETTINGS: 2804195534Sscottl { 2805195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2806199747Smav struct ahci_device *d; 2807195534Sscottl 2808207430Smav if (ahci_check_ids(dev, ccb)) 2809207430Smav return; 2810199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2811199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2812199747Smav else 2813199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2814199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 2815199747Smav d->revision = cts->xport_specific.sata.revision; 2816199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 2817199747Smav d->mode = cts->xport_specific.sata.mode; 2818199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 2819199747Smav d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 2820199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 2821199747Smav d->tags = min(ch->numslots, cts->xport_specific.sata.tags); 2822199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) 2823195534Sscottl ch->pm_present = cts->xport_specific.sata.pm_present; 2824203376Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI) 2825203376Smav d->atapi = cts->xport_specific.sata.atapi; 2826207499Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 2827207499Smav d->caps = cts->xport_specific.sata.caps; 2828195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2829195534Sscottl break; 2830195534Sscottl } 2831195534Sscottl case XPT_GET_TRAN_SETTINGS: 2832195534Sscottl /* Get default/user set transfer settings for the target */ 2833195534Sscottl { 2834195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2835199747Smav struct ahci_device *d; 2836195534Sscottl uint32_t status; 2837195534Sscottl 2838207430Smav if (ahci_check_ids(dev, ccb)) 2839207430Smav return; 2840199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2841199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2842199747Smav else 2843199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2844236666Smav cts->protocol = PROTO_UNSPECIFIED; 2845196656Smav cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 2846195534Sscottl cts->transport = XPORT_SATA; 2847196656Smav cts->transport_version = XPORT_VERSION_UNSPECIFIED; 2848195534Sscottl cts->proto_specific.valid = 0; 2849195534Sscottl cts->xport_specific.sata.valid = 0; 2850199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 2851199747Smav (ccb->ccb_h.target_id == 15 || 2852199747Smav (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 2853195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS) & ATA_SS_SPD_MASK; 2854199747Smav if (status & 0x0f0) { 2855199747Smav cts->xport_specific.sata.revision = 2856199747Smav (status & 0x0f0) >> 4; 2857199747Smav cts->xport_specific.sata.valid |= 2858199747Smav CTS_SATA_VALID_REVISION; 2859199747Smav } 2860207499Smav cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 2861207499Smav if (ch->pm_level) { 2862207499Smav if (ch->caps & (AHCI_CAP_PSC | AHCI_CAP_SSC)) 2863207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 2864207499Smav if (ch->caps2 & AHCI_CAP2_APST) 2865207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_APST; 2866207499Smav } 2867207499Smav if ((ch->caps & AHCI_CAP_SNCQ) && 2868207499Smav (ch->quirks & AHCI_Q_NOAA) == 0) 2869207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_DMAAA; 2870220602Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; 2871207499Smav cts->xport_specific.sata.caps &= 2872207499Smav ch->user[ccb->ccb_h.target_id].caps; 2873207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2874195534Sscottl } else { 2875199747Smav cts->xport_specific.sata.revision = d->revision; 2876199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 2877207499Smav cts->xport_specific.sata.caps = d->caps; 2878207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2879195534Sscottl } 2880199747Smav cts->xport_specific.sata.mode = d->mode; 2881199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 2882199747Smav cts->xport_specific.sata.bytecount = d->bytecount; 2883199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 2884199747Smav cts->xport_specific.sata.pm_present = ch->pm_present; 2885195534Sscottl cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 2886199747Smav cts->xport_specific.sata.tags = d->tags; 2887199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 2888203376Smav cts->xport_specific.sata.atapi = d->atapi; 2889203376Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 2890195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2891195534Sscottl break; 2892195534Sscottl } 2893195534Sscottl case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 2894195534Sscottl case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2895195534Sscottl ahci_reset(dev); 2896195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2897195534Sscottl break; 2898195534Sscottl case XPT_TERM_IO: /* Terminate the I/O process */ 2899195534Sscottl /* XXX Implement */ 2900195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2901195534Sscottl break; 2902195534Sscottl case XPT_PATH_INQ: /* Path routing inquiry */ 2903195534Sscottl { 2904195534Sscottl struct ccb_pathinq *cpi = &ccb->cpi; 2905195534Sscottl 2906210471Smav parent = device_get_parent(dev); 2907195534Sscottl cpi->version_num = 1; /* XXX??? */ 2908199278Smav cpi->hba_inquiry = PI_SDTR_ABLE; 2909199278Smav if (ch->caps & AHCI_CAP_SNCQ) 2910199278Smav cpi->hba_inquiry |= PI_TAG_ABLE; 2911195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2912195534Sscottl cpi->hba_inquiry |= PI_SATAPM; 2913195534Sscottl cpi->target_sprt = 0; 2914195534Sscottl cpi->hba_misc = PIM_SEQSCAN; 2915195534Sscottl cpi->hba_eng_cnt = 0; 2916195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2917198322Smav cpi->max_target = 15; 2918195534Sscottl else 2919195534Sscottl cpi->max_target = 0; 2920195534Sscottl cpi->max_lun = 0; 2921195534Sscottl cpi->initiator_id = 0; 2922195534Sscottl cpi->bus_id = cam_sim_bus(sim); 2923195534Sscottl cpi->base_transfer_speed = 150000; 2924195534Sscottl strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 2925195534Sscottl strncpy(cpi->hba_vid, "AHCI", HBA_IDLEN); 2926195534Sscottl strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 2927195534Sscottl cpi->unit_number = cam_sim_unit(sim); 2928195534Sscottl cpi->transport = XPORT_SATA; 2929196656Smav cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 2930236847Smav cpi->protocol = PROTO_ATA; 2931196656Smav cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 2932195534Sscottl cpi->maxio = MAXPHYS; 2933196777Smav /* ATI SB600 can't handle 256 sectors with FPDMA (NCQ). */ 2934210471Smav if (pci_get_devid(parent) == 0x43801002) 2935196796Smav cpi->maxio = min(cpi->maxio, 128 * 512); 2936210471Smav cpi->hba_vendor = pci_get_vendor(parent); 2937210471Smav cpi->hba_device = pci_get_device(parent); 2938210471Smav cpi->hba_subvendor = pci_get_subvendor(parent); 2939210471Smav cpi->hba_subdevice = pci_get_subdevice(parent); 2940195534Sscottl cpi->ccb_h.status = CAM_REQ_CMP; 2941195534Sscottl break; 2942195534Sscottl } 2943195534Sscottl default: 2944195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2945195534Sscottl break; 2946195534Sscottl } 2947207430Smav xpt_done(ccb); 2948195534Sscottl} 2949195534Sscottl 2950195534Sscottlstatic void 2951195534Sscottlahcipoll(struct cam_sim *sim) 2952195534Sscottl{ 2953195534Sscottl struct ahci_channel *ch = (struct ahci_channel *)cam_sim_softc(sim); 2954195534Sscottl 2955195534Sscottl ahci_ch_intr(ch->dev); 2956220789Smav if (ch->resetting != 0 && 2957220789Smav (--ch->resetpolldiv <= 0 || !callout_pending(&ch->reset_timer))) { 2958220789Smav ch->resetpolldiv = 1000; 2959220789Smav ahci_reset_to(ch->dev); 2960220789Smav } 2961195534Sscottl} 2962