ahci.c revision 240383
1195534Sscottl/*- 2238805Smav * Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org> 3195534Sscottl * All rights reserved. 4195534Sscottl * 5195534Sscottl * Redistribution and use in source and binary forms, with or without 6195534Sscottl * modification, are permitted provided that the following conditions 7195534Sscottl * are met: 8195534Sscottl * 1. Redistributions of source code must retain the above copyright 9195534Sscottl * notice, this list of conditions and the following disclaimer, 10195534Sscottl * without modification, immediately at the beginning of the file. 11195534Sscottl * 2. Redistributions in binary form must reproduce the above copyright 12195534Sscottl * notice, this list of conditions and the following disclaimer in the 13195534Sscottl * documentation and/or other materials provided with the distribution. 14195534Sscottl * 15195534Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16195534Sscottl * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17195534Sscottl * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18195534Sscottl * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19195534Sscottl * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20195534Sscottl * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21195534Sscottl * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22195534Sscottl * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23195534Sscottl * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24195534Sscottl * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25195534Sscottl */ 26195534Sscottl 27195534Sscottl#include <sys/cdefs.h> 28195534Sscottl__FBSDID("$FreeBSD: head/sys/dev/ahci/ahci.c 240383 2012-09-12 09:20:37Z mav $"); 29195534Sscottl 30195534Sscottl#include <sys/param.h> 31195534Sscottl#include <sys/module.h> 32195534Sscottl#include <sys/systm.h> 33195534Sscottl#include <sys/kernel.h> 34195534Sscottl#include <sys/bus.h> 35220576Smav#include <sys/conf.h> 36195534Sscottl#include <sys/endian.h> 37195534Sscottl#include <sys/malloc.h> 38195534Sscottl#include <sys/lock.h> 39195534Sscottl#include <sys/mutex.h> 40195534Sscottl#include <machine/stdarg.h> 41195534Sscottl#include <machine/resource.h> 42195534Sscottl#include <machine/bus.h> 43195534Sscottl#include <sys/rman.h> 44195534Sscottl#include <dev/pci/pcivar.h> 45195534Sscottl#include <dev/pci/pcireg.h> 46195534Sscottl#include "ahci.h" 47195534Sscottl 48195534Sscottl#include <cam/cam.h> 49195534Sscottl#include <cam/cam_ccb.h> 50195534Sscottl#include <cam/cam_sim.h> 51195534Sscottl#include <cam/cam_xpt_sim.h> 52195534Sscottl#include <cam/cam_debug.h> 53195534Sscottl 54195534Sscottl/* local prototypes */ 55195534Sscottlstatic int ahci_setup_interrupt(device_t dev); 56195534Sscottlstatic void ahci_intr(void *data); 57195534Sscottlstatic void ahci_intr_one(void *data); 58195534Sscottlstatic int ahci_suspend(device_t dev); 59195534Sscottlstatic int ahci_resume(device_t dev); 60208375Smavstatic int ahci_ch_init(device_t dev); 61208375Smavstatic int ahci_ch_deinit(device_t dev); 62195534Sscottlstatic int ahci_ch_suspend(device_t dev); 63195534Sscottlstatic int ahci_ch_resume(device_t dev); 64196656Smavstatic void ahci_ch_pm(void *arg); 65195534Sscottlstatic void ahci_ch_intr_locked(void *data); 66195534Sscottlstatic void ahci_ch_intr(void *data); 67195534Sscottlstatic int ahci_ctlr_reset(device_t dev); 68205422Smavstatic int ahci_ctlr_setup(device_t dev); 69195534Sscottlstatic void ahci_begin_transaction(device_t dev, union ccb *ccb); 70195534Sscottlstatic void ahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 71195534Sscottlstatic void ahci_execute_transaction(struct ahci_slot *slot); 72195534Sscottlstatic void ahci_timeout(struct ahci_slot *slot); 73195534Sscottlstatic void ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et); 74199821Smavstatic int ahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag); 75195534Sscottlstatic void ahci_dmainit(device_t dev); 76195534Sscottlstatic void ahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 77195534Sscottlstatic void ahci_dmafini(device_t dev); 78195534Sscottlstatic void ahci_slotsalloc(device_t dev); 79195534Sscottlstatic void ahci_slotsfree(device_t dev); 80195534Sscottlstatic void ahci_reset(device_t dev); 81203123Smavstatic void ahci_start(device_t dev, int fbs); 82195534Sscottlstatic void ahci_stop(device_t dev); 83195534Sscottlstatic void ahci_clo(device_t dev); 84195534Sscottlstatic void ahci_start_fr(device_t dev); 85195534Sscottlstatic void ahci_stop_fr(device_t dev); 86195534Sscottl 87195534Sscottlstatic int ahci_sata_connect(struct ahci_channel *ch); 88203108Smavstatic int ahci_sata_phy_reset(device_t dev); 89220576Smavstatic int ahci_wait_ready(device_t dev, int t, int t0); 90195534Sscottl 91220565Smavstatic void ahci_issue_recovery(device_t dev); 92195534Sscottlstatic void ahci_process_read_log(device_t dev, union ccb *ccb); 93220565Smavstatic void ahci_process_request_sense(device_t dev, union ccb *ccb); 94195534Sscottl 95195534Sscottlstatic void ahciaction(struct cam_sim *sim, union ccb *ccb); 96195534Sscottlstatic void ahcipoll(struct cam_sim *sim); 97195534Sscottl 98227293Sedstatic MALLOC_DEFINE(M_AHCI, "AHCI driver", "AHCI driver data buffers"); 99195534Sscottl 100199176Smavstatic struct { 101199176Smav uint32_t id; 102203030Smav uint8_t rev; 103199176Smav const char *name; 104199322Smav int quirks; 105199322Smav#define AHCI_Q_NOFORCE 1 106199322Smav#define AHCI_Q_NOPMP 2 107199322Smav#define AHCI_Q_NONCQ 4 108199322Smav#define AHCI_Q_1CH 8 109199322Smav#define AHCI_Q_2CH 16 110199322Smav#define AHCI_Q_4CH 32 111199322Smav#define AHCI_Q_EDGEIS 64 112203030Smav#define AHCI_Q_SATA2 128 113203123Smav#define AHCI_Q_NOBSYRES 256 114207499Smav#define AHCI_Q_NOAA 512 115218596Smav#define AHCI_Q_NOCOUNT 1024 116222304Smav#define AHCI_Q_ALTSIG 2048 117199176Smav} ahci_ids[] = { 118203030Smav {0x43801002, 0x00, "ATI IXP600", 0}, 119203030Smav {0x43901002, 0x00, "ATI IXP700", 0}, 120203030Smav {0x43911002, 0x00, "ATI IXP700", 0}, 121203030Smav {0x43921002, 0x00, "ATI IXP700", 0}, 122203030Smav {0x43931002, 0x00, "ATI IXP700", 0}, 123203030Smav {0x43941002, 0x00, "ATI IXP800", 0}, 124203030Smav {0x43951002, 0x00, "ATI IXP800", 0}, 125225140Smav {0x06121b21, 0x00, "ASMedia ASM1061", 0}, 126203030Smav {0x26528086, 0x00, "Intel ICH6", AHCI_Q_NOFORCE}, 127203030Smav {0x26538086, 0x00, "Intel ICH6M", AHCI_Q_NOFORCE}, 128203030Smav {0x26818086, 0x00, "Intel ESB2", 0}, 129203030Smav {0x26828086, 0x00, "Intel ESB2", 0}, 130203030Smav {0x26838086, 0x00, "Intel ESB2", 0}, 131203030Smav {0x27c18086, 0x00, "Intel ICH7", 0}, 132203030Smav {0x27c38086, 0x00, "Intel ICH7", 0}, 133203030Smav {0x27c58086, 0x00, "Intel ICH7M", 0}, 134203030Smav {0x27c68086, 0x00, "Intel ICH7M", 0}, 135203030Smav {0x28218086, 0x00, "Intel ICH8", 0}, 136203030Smav {0x28228086, 0x00, "Intel ICH8", 0}, 137203030Smav {0x28248086, 0x00, "Intel ICH8", 0}, 138203030Smav {0x28298086, 0x00, "Intel ICH8M", 0}, 139203030Smav {0x282a8086, 0x00, "Intel ICH8M", 0}, 140203030Smav {0x29228086, 0x00, "Intel ICH9", 0}, 141203030Smav {0x29238086, 0x00, "Intel ICH9", 0}, 142203030Smav {0x29248086, 0x00, "Intel ICH9", 0}, 143203030Smav {0x29258086, 0x00, "Intel ICH9", 0}, 144203030Smav {0x29278086, 0x00, "Intel ICH9", 0}, 145203030Smav {0x29298086, 0x00, "Intel ICH9M", 0}, 146203030Smav {0x292a8086, 0x00, "Intel ICH9M", 0}, 147203030Smav {0x292b8086, 0x00, "Intel ICH9M", 0}, 148203030Smav {0x292c8086, 0x00, "Intel ICH9M", 0}, 149203030Smav {0x292f8086, 0x00, "Intel ICH9M", 0}, 150203030Smav {0x294d8086, 0x00, "Intel ICH9", 0}, 151203030Smav {0x294e8086, 0x00, "Intel ICH9M", 0}, 152203030Smav {0x3a058086, 0x00, "Intel ICH10", 0}, 153203030Smav {0x3a228086, 0x00, "Intel ICH10", 0}, 154203030Smav {0x3a258086, 0x00, "Intel ICH10", 0}, 155211922Smav {0x3b228086, 0x00, "Intel 5 Series/3400 Series", 0}, 156211922Smav {0x3b238086, 0x00, "Intel 5 Series/3400 Series", 0}, 157211922Smav {0x3b258086, 0x00, "Intel 5 Series/3400 Series", 0}, 158211922Smav {0x3b298086, 0x00, "Intel 5 Series/3400 Series", 0}, 159211922Smav {0x3b2c8086, 0x00, "Intel 5 Series/3400 Series", 0}, 160211922Smav {0x3b2f8086, 0x00, "Intel 5 Series/3400 Series", 0}, 161211922Smav {0x1c028086, 0x00, "Intel Cougar Point", 0}, 162211922Smav {0x1c038086, 0x00, "Intel Cougar Point", 0}, 163211922Smav {0x1c048086, 0x00, "Intel Cougar Point", 0}, 164211922Smav {0x1c058086, 0x00, "Intel Cougar Point", 0}, 165218605Smav {0x1d028086, 0x00, "Intel Patsburg", 0}, 166218605Smav {0x1d048086, 0x00, "Intel Patsburg", 0}, 167218605Smav {0x1d068086, 0x00, "Intel Patsburg", 0}, 168229671Sjimharris {0x28268086, 0x00, "Intel Patsburg (RAID)", 0}, 169221789Sjfv {0x1e028086, 0x00, "Intel Panther Point", 0}, 170221789Sjfv {0x1e038086, 0x00, "Intel Panther Point", 0}, 171221789Sjfv {0x1e048086, 0x00, "Intel Panther Point", 0}, 172221789Sjfv {0x1e058086, 0x00, "Intel Panther Point", 0}, 173221789Sjfv {0x1e068086, 0x00, "Intel Panther Point", 0}, 174221789Sjfv {0x1e078086, 0x00, "Intel Panther Point", 0}, 175221789Sjfv {0x1e0e8086, 0x00, "Intel Panther Point", 0}, 176221789Sjfv {0x1e0f8086, 0x00, "Intel Panther Point", 0}, 177221789Sjfv {0x23238086, 0x00, "Intel DH89xxCC", 0}, 178239907Smav {0x2360197b, 0x00, "JMicron JMB360", 0}, 179203030Smav {0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE}, 180239907Smav {0x2362197b, 0x00, "JMicron JMB362", 0}, 181203030Smav {0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE}, 182203030Smav {0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE}, 183203030Smav {0x2366197b, 0x00, "JMicron JMB366", AHCI_Q_NOFORCE}, 184203030Smav {0x2368197b, 0x00, "JMicron JMB368", AHCI_Q_NOFORCE}, 185232380Smav {0x611111ab, 0x00, "Marvell 88SE6111", AHCI_Q_NOFORCE | AHCI_Q_1CH | 186218596Smav AHCI_Q_EDGEIS}, 187232380Smav {0x612111ab, 0x00, "Marvell 88SE6121", AHCI_Q_NOFORCE | AHCI_Q_2CH | 188218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 189232380Smav {0x614111ab, 0x00, "Marvell 88SE6141", AHCI_Q_NOFORCE | AHCI_Q_4CH | 190218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 191232380Smav {0x614511ab, 0x00, "Marvell 88SE6145", AHCI_Q_NOFORCE | AHCI_Q_4CH | 192218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 193220413Smav {0x91201b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_NOBSYRES}, 194222304Smav {0x91231b4b, 0x11, "Marvell 88SE912x", AHCI_Q_NOBSYRES|AHCI_Q_ALTSIG}, 195203123Smav {0x91231b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_SATA2|AHCI_Q_NOBSYRES}, 196223699Smav {0x91251b4b, 0x00, "Marvell 88SE9125", AHCI_Q_NOBSYRES}, 197225789Smav {0x91281b4b, 0x00, "Marvell 88SE9128", AHCI_Q_NOBSYRES|AHCI_Q_ALTSIG}, 198236242Shselasky {0x91301b4b, 0x00, "Marvell 88SE9130", AHCI_Q_NOBSYRES|AHCI_Q_ALTSIG}, 199222306Smav {0x91721b4b, 0x00, "Marvell 88SE9172", AHCI_Q_NOBSYRES}, 200221504Smav {0x91821b4b, 0x00, "Marvell 88SE9182", AHCI_Q_NOBSYRES}, 201236737Smav {0x92201b4b, 0x00, "Marvell 88SE9220", AHCI_Q_NOBSYRES|AHCI_Q_ALTSIG}, 202236737Smav {0x92301b4b, 0x00, "Marvell 88SE9230", AHCI_Q_NOBSYRES|AHCI_Q_ALTSIG}, 203236737Smav {0x92351b4b, 0x00, "Marvell 88SE9235", AHCI_Q_NOBSYRES}, 204216309Smav {0x06201103, 0x00, "HighPoint RocketRAID 620", AHCI_Q_NOBSYRES}, 205216309Smav {0x06201b4b, 0x00, "HighPoint RocketRAID 620", AHCI_Q_NOBSYRES}, 206216309Smav {0x06221103, 0x00, "HighPoint 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AHCI_Q_NOAA}, 237207499Smav {0x07f410de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 238207499Smav {0x07f510de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 239207499Smav {0x07f610de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 240207499Smav {0x07f710de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 241207499Smav {0x07f810de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 242207499Smav {0x07f910de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 243207499Smav {0x07fa10de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 244207499Smav {0x07fb10de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 245207499Smav {0x0ad010de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 246207499Smav {0x0ad110de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 247207499Smav {0x0ad210de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 248207499Smav {0x0ad310de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 249207499Smav {0x0ad410de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 250207499Smav {0x0ad510de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 251207499Smav {0x0ad610de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 252207499Smav {0x0ad710de, 0x00, "NVIDIA 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"NVIDIA MCP79", AHCI_Q_NOAA}, 269207499Smav {0x0d8410de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 270224603Smav {0x0d8510de, 0x00, "NVIDIA MCP89", AHCI_Q_NOFORCE|AHCI_Q_NOAA}, 271207499Smav {0x0d8610de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 272207499Smav {0x0d8710de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 273207499Smav {0x0d8810de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 274207499Smav {0x0d8910de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 275207499Smav {0x0d8a10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 276207499Smav {0x0d8b10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 277207499Smav {0x0d8c10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 278207499Smav {0x0d8d10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 279207499Smav {0x0d8e10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 280207499Smav {0x0d8f10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 281208907Smav {0x33491106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 282208907Smav {0x62871106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 283203030Smav {0x11841039, 0x00, "SiS 966", 0}, 284203030Smav {0x11851039, 0x00, "SiS 968", 0}, 285203030Smav {0x01861039, 0x00, "SiS 968", 0}, 286203030Smav {0x00000000, 0x00, NULL, 0} 287199176Smav}; 288199176Smav 289220565Smav#define recovery_type spriv_field0 290220565Smav#define RECOVERY_NONE 0 291220565Smav#define RECOVERY_READ_LOG 1 292220565Smav#define RECOVERY_REQUEST_SENSE 2 293220565Smav#define recovery_slot spriv_field1 294220565Smav 295228200Smavstatic int force_ahci = 1; 296228200SmavTUNABLE_INT("hw.ahci.force", &force_ahci); 297228200Smav 298195534Sscottlstatic int 299195534Sscottlahci_probe(device_t dev) 300195534Sscottl{ 301199176Smav char buf[64]; 302199322Smav int i, valid = 0; 303199322Smav uint32_t devid = pci_get_devid(dev); 304203030Smav uint8_t revid = pci_get_revid(dev); 305199322Smav 306199322Smav /* Is this a possible AHCI candidate? */ 307199322Smav if (pci_get_class(dev) == PCIC_STORAGE && 308199322Smav pci_get_subclass(dev) == PCIS_STORAGE_SATA && 309199322Smav pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0) 310199322Smav valid = 1; 311199322Smav /* Is this a known AHCI chip? */ 312199322Smav for (i = 0; ahci_ids[i].id != 0; i++) { 313199322Smav if (ahci_ids[i].id == devid && 314203030Smav ahci_ids[i].rev <= revid && 315228200Smav (valid || (force_ahci == 1 && 316228200Smav !(ahci_ids[i].quirks & AHCI_Q_NOFORCE)))) { 317199717Smav /* Do not attach JMicrons with single PCI function. */ 318199717Smav if (pci_get_vendor(dev) == 0x197b && 319199717Smav (pci_read_config(dev, 0xdf, 1) & 0x40) == 0) 320199717Smav return (ENXIO); 321199322Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 322199322Smav ahci_ids[i].name); 323199322Smav device_set_desc_copy(dev, buf); 324199322Smav return (BUS_PROBE_VENDOR); 325199322Smav } 326199322Smav } 327199322Smav if (!valid) 328199322Smav return (ENXIO); 329199322Smav device_set_desc_copy(dev, "AHCI SATA controller"); 330199322Smav return (BUS_PROBE_VENDOR); 331199322Smav} 332199322Smav 333199322Smavstatic int 334199322Smavahci_ata_probe(device_t dev) 335199322Smav{ 336199322Smav char buf[64]; 337199176Smav int i; 338199176Smav uint32_t devid = pci_get_devid(dev); 339203030Smav uint8_t revid = pci_get_revid(dev); 340195534Sscottl 341199322Smav if ((intptr_t)device_get_ivars(dev) >= 0) 342199322Smav return (ENXIO); 343199176Smav /* Is this a known AHCI chip? */ 344199176Smav for (i = 0; ahci_ids[i].id != 0; i++) { 345203030Smav if (ahci_ids[i].id == devid && 346203030Smav ahci_ids[i].rev <= revid) { 347199176Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 348199176Smav ahci_ids[i].name); 349199176Smav device_set_desc_copy(dev, buf); 350199176Smav return (BUS_PROBE_VENDOR); 351199176Smav } 352199176Smav } 353199176Smav device_set_desc_copy(dev, "AHCI SATA controller"); 354195534Sscottl return (BUS_PROBE_VENDOR); 355195534Sscottl} 356195534Sscottl 357195534Sscottlstatic int 358195534Sscottlahci_attach(device_t dev) 359195534Sscottl{ 360195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 361195534Sscottl device_t child; 362199322Smav int error, unit, speed, i; 363199322Smav uint32_t devid = pci_get_devid(dev); 364203030Smav uint8_t revid = pci_get_revid(dev); 365196656Smav u_int32_t version; 366195534Sscottl 367195534Sscottl ctlr->dev = dev; 368199322Smav i = 0; 369203030Smav while (ahci_ids[i].id != 0 && 370203030Smav (ahci_ids[i].id != devid || 371203030Smav ahci_ids[i].rev > revid)) 372199322Smav i++; 373199322Smav ctlr->quirks = ahci_ids[i].quirks; 374196656Smav resource_int_value(device_get_name(dev), 375196656Smav device_get_unit(dev), "ccc", &ctlr->ccc); 376195534Sscottl /* if we have a memory BAR(5) we are likely on an AHCI part */ 377195534Sscottl ctlr->r_rid = PCIR_BAR(5); 378195534Sscottl if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 379195534Sscottl &ctlr->r_rid, RF_ACTIVE))) 380195534Sscottl return ENXIO; 381195534Sscottl /* Setup our own memory management for channels. */ 382208414Smav ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 383208414Smav ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 384195534Sscottl ctlr->sc_iomem.rm_type = RMAN_ARRAY; 385195534Sscottl ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 386195534Sscottl if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 387195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 388195534Sscottl return (error); 389195534Sscottl } 390195534Sscottl if ((error = rman_manage_region(&ctlr->sc_iomem, 391195534Sscottl rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 392195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 393195534Sscottl rman_fini(&ctlr->sc_iomem); 394195534Sscottl return (error); 395195534Sscottl } 396207511Smav pci_enable_busmaster(dev); 397195534Sscottl /* Reset controller */ 398195534Sscottl if ((error = ahci_ctlr_reset(dev)) != 0) { 399195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 400195534Sscottl rman_fini(&ctlr->sc_iomem); 401195534Sscottl return (error); 402195534Sscottl }; 403199322Smav /* Get the HW capabilities */ 404199322Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 405199322Smav ctlr->caps = ATA_INL(ctlr->r_mem, AHCI_CAP); 406240383Smav if (version >= 0x00010200) 407199322Smav ctlr->caps2 = ATA_INL(ctlr->r_mem, AHCI_CAP2); 408203108Smav if (ctlr->caps & AHCI_CAP_EMS) 409203108Smav ctlr->capsem = ATA_INL(ctlr->r_mem, AHCI_EM_CTL); 410195534Sscottl ctlr->ichannels = ATA_INL(ctlr->r_mem, AHCI_PI); 411222304Smav 412222304Smav /* Identify and set separate quirks for HBA and RAID f/w Marvells. */ 413222304Smav if ((ctlr->quirks & AHCI_Q_NOBSYRES) && 414222304Smav (ctlr->quirks & AHCI_Q_ALTSIG) && 415222304Smav (ctlr->caps & AHCI_CAP_SPM) == 0) 416222304Smav ctlr->quirks &= ~AHCI_Q_NOBSYRES; 417222304Smav 418199322Smav if (ctlr->quirks & AHCI_Q_1CH) { 419199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 420199322Smav ctlr->ichannels &= 0x01; 421199322Smav } 422199322Smav if (ctlr->quirks & AHCI_Q_2CH) { 423199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 424199322Smav ctlr->caps |= 1; 425199322Smav ctlr->ichannels &= 0x03; 426199322Smav } 427199322Smav if (ctlr->quirks & AHCI_Q_4CH) { 428199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 429199322Smav ctlr->caps |= 3; 430199322Smav ctlr->ichannels &= 0x0f; 431199322Smav } 432195534Sscottl ctlr->channels = MAX(flsl(ctlr->ichannels), 433199322Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 434199322Smav if (ctlr->quirks & AHCI_Q_NOPMP) 435199322Smav ctlr->caps &= ~AHCI_CAP_SPM; 436199322Smav if (ctlr->quirks & AHCI_Q_NONCQ) 437199322Smav ctlr->caps &= ~AHCI_CAP_SNCQ; 438205422Smav if ((ctlr->caps & AHCI_CAP_CCCS) == 0) 439205422Smav ctlr->ccc = 0; 440222039Smav ctlr->emloc = ATA_INL(ctlr->r_mem, AHCI_EM_LOC); 441205422Smav ahci_ctlr_setup(dev); 442195534Sscottl /* Setup interrupts. */ 443195534Sscottl if (ahci_setup_interrupt(dev)) { 444195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 445195534Sscottl rman_fini(&ctlr->sc_iomem); 446195534Sscottl return ENXIO; 447195534Sscottl } 448195534Sscottl /* Announce HW capabilities. */ 449196656Smav speed = (ctlr->caps & AHCI_CAP_ISS) >> AHCI_CAP_ISS_SHIFT; 450195534Sscottl device_printf(dev, 451203123Smav "AHCI v%x.%02x with %d %sGbps ports, Port Multiplier %s%s\n", 452195534Sscottl ((version >> 20) & 0xf0) + ((version >> 16) & 0x0f), 453195534Sscottl ((version >> 4) & 0xf0) + (version & 0x0f), 454196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1, 455195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 456195534Sscottl ((speed == 3) ? "6":"?"))), 457196656Smav (ctlr->caps & AHCI_CAP_SPM) ? 458203123Smav "supported" : "not supported", 459203123Smav (ctlr->caps & AHCI_CAP_FBSS) ? 460203123Smav " with FBS" : ""); 461195534Sscottl if (bootverbose) { 462195534Sscottl device_printf(dev, "Caps:%s%s%s%s%s%s%s%s %sGbps", 463196656Smav (ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"", 464196656Smav (ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"", 465196656Smav (ctlr->caps & AHCI_CAP_SSNTF) ? " SNTF":"", 466196656Smav (ctlr->caps & AHCI_CAP_SMPS) ? " MPS":"", 467196656Smav (ctlr->caps & AHCI_CAP_SSS) ? " SS":"", 468196656Smav (ctlr->caps & AHCI_CAP_SALP) ? " ALP":"", 469196656Smav (ctlr->caps & AHCI_CAP_SAL) ? " AL":"", 470196656Smav (ctlr->caps & AHCI_CAP_SCLO) ? " CLO":"", 471195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 472195534Sscottl ((speed == 3) ? "6":"?")))); 473195534Sscottl printf("%s%s%s%s%s%s %dcmd%s%s%s %dports\n", 474196656Smav (ctlr->caps & AHCI_CAP_SAM) ? " AM":"", 475196656Smav (ctlr->caps & AHCI_CAP_SPM) ? " PM":"", 476196656Smav (ctlr->caps & AHCI_CAP_FBSS) ? " FBS":"", 477196656Smav (ctlr->caps & AHCI_CAP_PMD) ? " PMD":"", 478196656Smav (ctlr->caps & AHCI_CAP_SSC) ? " SSC":"", 479196656Smav (ctlr->caps & AHCI_CAP_PSC) ? " PSC":"", 480196656Smav ((ctlr->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, 481196656Smav (ctlr->caps & AHCI_CAP_CCCS) ? " CCC":"", 482196656Smav (ctlr->caps & AHCI_CAP_EMS) ? " EM":"", 483196656Smav (ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"", 484196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 485195534Sscottl } 486240383Smav if (bootverbose && version >= 0x00010200) { 487196656Smav device_printf(dev, "Caps2:%s%s%s\n", 488196656Smav (ctlr->caps2 & AHCI_CAP2_APST) ? " APST":"", 489196656Smav (ctlr->caps2 & AHCI_CAP2_NVMP) ? " NVMP":"", 490196656Smav (ctlr->caps2 & AHCI_CAP2_BOH) ? " BOH":""); 491196656Smav } 492195534Sscottl /* Attach all channels on this controller */ 493195534Sscottl for (unit = 0; unit < ctlr->channels; unit++) { 494195534Sscottl child = device_add_child(dev, "ahcich", -1); 495227635Smav if (child == NULL) { 496195534Sscottl device_printf(dev, "failed to add channel device\n"); 497227635Smav continue; 498227635Smav } 499227635Smav device_set_ivars(child, (void *)(intptr_t)unit); 500227635Smav if ((ctlr->ichannels & (1 << unit)) == 0) 501227635Smav device_disable(child); 502195534Sscottl } 503238805Smav if (ctlr->caps & AHCI_CAP_EMS) { 504238805Smav child = device_add_child(dev, "ahciem", -1); 505238805Smav if (child == NULL) 506238805Smav device_printf(dev, "failed to add enclosure device\n"); 507238805Smav else 508238805Smav device_set_ivars(child, (void *)(intptr_t)-1); 509238805Smav } 510195534Sscottl bus_generic_attach(dev); 511195534Sscottl return 0; 512195534Sscottl} 513195534Sscottl 514195534Sscottlstatic int 515195534Sscottlahci_detach(device_t dev) 516195534Sscottl{ 517195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 518227701Shselasky int i; 519195534Sscottl 520195534Sscottl /* Detach & delete all children */ 521227849Shselasky device_delete_children(dev); 522227701Shselasky 523195534Sscottl /* Free interrupts. */ 524195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 525195534Sscottl if (ctlr->irqs[i].r_irq) { 526195534Sscottl bus_teardown_intr(dev, ctlr->irqs[i].r_irq, 527195534Sscottl ctlr->irqs[i].handle); 528195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, 529195534Sscottl ctlr->irqs[i].r_irq_rid, ctlr->irqs[i].r_irq); 530195534Sscottl } 531195534Sscottl } 532195534Sscottl pci_release_msi(dev); 533195534Sscottl /* Free memory. */ 534195534Sscottl rman_fini(&ctlr->sc_iomem); 535195534Sscottl if (ctlr->r_mem) 536195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 537195534Sscottl return (0); 538195534Sscottl} 539195534Sscottl 540195534Sscottlstatic int 541195534Sscottlahci_ctlr_reset(device_t dev) 542195534Sscottl{ 543195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 544195534Sscottl int timeout; 545195534Sscottl 546195534Sscottl if (pci_read_config(dev, 0x00, 4) == 0x28298086 && 547195534Sscottl (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04) 548195534Sscottl pci_write_config(dev, 0x92, 0x01, 1); 549195534Sscottl /* Enable AHCI mode */ 550195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 551195534Sscottl /* Reset AHCI controller */ 552195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE|AHCI_GHC_HR); 553195534Sscottl for (timeout = 1000; timeout > 0; timeout--) { 554195534Sscottl DELAY(1000); 555195534Sscottl if ((ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_HR) == 0) 556195534Sscottl break; 557195534Sscottl } 558195534Sscottl if (timeout == 0) { 559195534Sscottl device_printf(dev, "AHCI controller reset failure\n"); 560195534Sscottl return ENXIO; 561195534Sscottl } 562195534Sscottl /* Reenable AHCI mode */ 563195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 564205422Smav return (0); 565205422Smav} 566205422Smav 567205422Smavstatic int 568205422Smavahci_ctlr_setup(device_t dev) 569205422Smav{ 570205422Smav struct ahci_controller *ctlr = device_get_softc(dev); 571195534Sscottl /* Clear interrupts */ 572195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_IS, ATA_INL(ctlr->r_mem, AHCI_IS)); 573196656Smav /* Configure CCC */ 574196656Smav if (ctlr->ccc) { 575196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCP, ATA_INL(ctlr->r_mem, AHCI_PI)); 576196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCC, 577196656Smav (ctlr->ccc << AHCI_CCCC_TV_SHIFT) | 578196656Smav (4 << AHCI_CCCC_CC_SHIFT) | 579196656Smav AHCI_CCCC_EN); 580196656Smav ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) & 581196656Smav AHCI_CCCC_INT_MASK) >> AHCI_CCCC_INT_SHIFT; 582196656Smav if (bootverbose) { 583196656Smav device_printf(dev, 584196656Smav "CCC with %dms/4cmd enabled on vector %d\n", 585196656Smav ctlr->ccc, ctlr->cccv); 586196656Smav } 587196656Smav } 588195534Sscottl /* Enable AHCI interrupts */ 589195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 590195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) | AHCI_GHC_IE); 591195534Sscottl return (0); 592195534Sscottl} 593195534Sscottl 594195534Sscottlstatic int 595195534Sscottlahci_suspend(device_t dev) 596195534Sscottl{ 597195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 598195534Sscottl 599195534Sscottl bus_generic_suspend(dev); 600195534Sscottl /* Disable interupts, so the state change(s) doesn't trigger */ 601195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 602195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE)); 603195534Sscottl return 0; 604195534Sscottl} 605195534Sscottl 606195534Sscottlstatic int 607195534Sscottlahci_resume(device_t dev) 608195534Sscottl{ 609195534Sscottl int res; 610195534Sscottl 611195534Sscottl if ((res = ahci_ctlr_reset(dev)) != 0) 612195534Sscottl return (res); 613205422Smav ahci_ctlr_setup(dev); 614195534Sscottl return (bus_generic_resume(dev)); 615195534Sscottl} 616195534Sscottl 617195534Sscottlstatic int 618195534Sscottlahci_setup_interrupt(device_t dev) 619195534Sscottl{ 620195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 621195534Sscottl int i, msi = 1; 622195534Sscottl 623195534Sscottl /* Process hints. */ 624195534Sscottl resource_int_value(device_get_name(dev), 625195534Sscottl device_get_unit(dev), "msi", &msi); 626195534Sscottl if (msi < 0) 627195534Sscottl msi = 0; 628195534Sscottl else if (msi == 1) 629195534Sscottl msi = min(1, pci_msi_count(dev)); 630195534Sscottl else if (msi > 1) 631195534Sscottl msi = pci_msi_count(dev); 632195534Sscottl /* Allocate MSI if needed/present. */ 633195534Sscottl if (msi && pci_alloc_msi(dev, &msi) == 0) { 634195534Sscottl ctlr->numirqs = msi; 635195534Sscottl } else { 636195534Sscottl msi = 0; 637195534Sscottl ctlr->numirqs = 1; 638195534Sscottl } 639195534Sscottl /* Check for single MSI vector fallback. */ 640195534Sscottl if (ctlr->numirqs > 1 && 641195534Sscottl (ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_MRSM) != 0) { 642195534Sscottl device_printf(dev, "Falling back to one MSI\n"); 643195534Sscottl ctlr->numirqs = 1; 644195534Sscottl } 645195534Sscottl /* Allocate all IRQs. */ 646195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 647195534Sscottl ctlr->irqs[i].ctlr = ctlr; 648195534Sscottl ctlr->irqs[i].r_irq_rid = i + (msi ? 1 : 0); 649196656Smav if (ctlr->numirqs == 1 || i >= ctlr->channels || 650196656Smav (ctlr->ccc && i == ctlr->cccv)) 651195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ALL; 652195534Sscottl else if (i == ctlr->numirqs - 1) 653195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_AFTER; 654195534Sscottl else 655195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ONE; 656195534Sscottl if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 657195534Sscottl &ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 658195534Sscottl device_printf(dev, "unable to map interrupt\n"); 659195534Sscottl return ENXIO; 660195534Sscottl } 661195534Sscottl if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL, 662195534Sscottl (ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE) ? ahci_intr_one : ahci_intr, 663195534Sscottl &ctlr->irqs[i], &ctlr->irqs[i].handle))) { 664195534Sscottl /* SOS XXX release r_irq */ 665195534Sscottl device_printf(dev, "unable to setup interrupt\n"); 666195534Sscottl return ENXIO; 667195534Sscottl } 668202011Smav if (ctlr->numirqs > 1) { 669202011Smav bus_describe_intr(dev, ctlr->irqs[i].r_irq, 670202011Smav ctlr->irqs[i].handle, 671202011Smav ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ? 672202011Smav "ch%d" : "%d", i); 673202011Smav } 674195534Sscottl } 675195534Sscottl return (0); 676195534Sscottl} 677195534Sscottl 678195534Sscottl/* 679195534Sscottl * Common case interrupt handler. 680195534Sscottl */ 681195534Sscottlstatic void 682195534Sscottlahci_intr(void *data) 683195534Sscottl{ 684195534Sscottl struct ahci_controller_irq *irq = data; 685195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 686205422Smav u_int32_t is, ise = 0; 687195534Sscottl void *arg; 688195534Sscottl int unit; 689195534Sscottl 690196656Smav if (irq->mode == AHCI_IRQ_MODE_ALL) { 691195534Sscottl unit = 0; 692196656Smav if (ctlr->ccc) 693196656Smav is = ctlr->ichannels; 694196656Smav else 695196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 696196656Smav } else { /* AHCI_IRQ_MODE_AFTER */ 697195534Sscottl unit = irq->r_irq_rid - 1; 698196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 699196656Smav } 700205422Smav /* CCC interrupt is edge triggered. */ 701205422Smav if (ctlr->ccc) 702205422Smav ise = 1 << ctlr->cccv; 703200814Smav /* Some controllers have edge triggered IS. */ 704200814Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 705205422Smav ise |= is; 706205422Smav if (ise != 0) 707205422Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, ise); 708195534Sscottl for (; unit < ctlr->channels; unit++) { 709195534Sscottl if ((is & (1 << unit)) != 0 && 710195534Sscottl (arg = ctlr->interrupt[unit].argument)) { 711199322Smav ctlr->interrupt[unit].function(arg); 712195534Sscottl } 713195534Sscottl } 714200814Smav /* AHCI declares level triggered IS. */ 715200814Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 716200814Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, is); 717195534Sscottl} 718195534Sscottl 719195534Sscottl/* 720195534Sscottl * Simplified interrupt handler for multivector MSI mode. 721195534Sscottl */ 722195534Sscottlstatic void 723195534Sscottlahci_intr_one(void *data) 724195534Sscottl{ 725195534Sscottl struct ahci_controller_irq *irq = data; 726195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 727195534Sscottl void *arg; 728195534Sscottl int unit; 729195534Sscottl 730195534Sscottl unit = irq->r_irq_rid - 1; 731202011Smav /* Some controllers have edge triggered IS. */ 732202011Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 733202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 734195534Sscottl if ((arg = ctlr->interrupt[unit].argument)) 735195534Sscottl ctlr->interrupt[unit].function(arg); 736202011Smav /* AHCI declares level triggered IS. */ 737202011Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 738202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 739195534Sscottl} 740195534Sscottl 741195534Sscottlstatic struct resource * 742195534Sscottlahci_alloc_resource(device_t dev, device_t child, int type, int *rid, 743195534Sscottl u_long start, u_long end, u_long count, u_int flags) 744195534Sscottl{ 745195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 746238805Smav struct resource *res; 747195534Sscottl long st; 748238805Smav int offset, size, unit; 749195534Sscottl 750238805Smav unit = (intptr_t)device_get_ivars(child); 751238805Smav res = NULL; 752195534Sscottl switch (type) { 753195534Sscottl case SYS_RES_MEMORY: 754238805Smav if (unit >= 0) { 755238805Smav offset = AHCI_OFFSET + (unit << 7); 756238805Smav size = 128; 757238805Smav } else if (*rid == 0) { 758238805Smav offset = AHCI_EM_CTL; 759238805Smav size = 4; 760238805Smav } else { 761238805Smav offset = (ctlr->emloc & 0xffff0000) >> 14; 762238805Smav size = (ctlr->emloc & 0x0000ffff) << 2; 763238805Smav if (*rid != 1) { 764238805Smav if (*rid == 2 && (ctlr->capsem & 765238805Smav (AHCI_EM_XMT | AHCI_EM_SMB)) == 0) 766238805Smav offset += size; 767238805Smav else 768238805Smav break; 769238805Smav } 770238805Smav } 771195534Sscottl st = rman_get_start(ctlr->r_mem); 772195534Sscottl res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 773238805Smav st + offset + size - 1, size, RF_ACTIVE, child); 774195534Sscottl if (res) { 775195534Sscottl bus_space_handle_t bsh; 776195534Sscottl bus_space_tag_t bst; 777195534Sscottl bsh = rman_get_bushandle(ctlr->r_mem); 778195534Sscottl bst = rman_get_bustag(ctlr->r_mem); 779195534Sscottl bus_space_subregion(bst, bsh, offset, 128, &bsh); 780195534Sscottl rman_set_bushandle(res, bsh); 781195534Sscottl rman_set_bustag(res, bst); 782195534Sscottl } 783195534Sscottl break; 784195534Sscottl case SYS_RES_IRQ: 785195534Sscottl if (*rid == ATA_IRQ_RID) 786195534Sscottl res = ctlr->irqs[0].r_irq; 787195534Sscottl break; 788195534Sscottl } 789195534Sscottl return (res); 790195534Sscottl} 791195534Sscottl 792195534Sscottlstatic int 793195534Sscottlahci_release_resource(device_t dev, device_t child, int type, int rid, 794195534Sscottl struct resource *r) 795195534Sscottl{ 796195534Sscottl 797195534Sscottl switch (type) { 798195534Sscottl case SYS_RES_MEMORY: 799195534Sscottl rman_release_resource(r); 800195534Sscottl return (0); 801195534Sscottl case SYS_RES_IRQ: 802195534Sscottl if (rid != ATA_IRQ_RID) 803195534Sscottl return ENOENT; 804195534Sscottl return (0); 805195534Sscottl } 806195534Sscottl return (EINVAL); 807195534Sscottl} 808195534Sscottl 809195534Sscottlstatic int 810195534Sscottlahci_setup_intr(device_t dev, device_t child, struct resource *irq, 811195534Sscottl int flags, driver_filter_t *filter, driver_intr_t *function, 812195534Sscottl void *argument, void **cookiep) 813195534Sscottl{ 814195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 815195534Sscottl int unit = (intptr_t)device_get_ivars(child); 816195534Sscottl 817195534Sscottl if (filter != NULL) { 818195534Sscottl printf("ahci.c: we cannot use a filter here\n"); 819195534Sscottl return (EINVAL); 820195534Sscottl } 821195534Sscottl ctlr->interrupt[unit].function = function; 822195534Sscottl ctlr->interrupt[unit].argument = argument; 823195534Sscottl return (0); 824195534Sscottl} 825195534Sscottl 826195534Sscottlstatic int 827195534Sscottlahci_teardown_intr(device_t dev, device_t child, struct resource *irq, 828195534Sscottl void *cookie) 829195534Sscottl{ 830195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 831195534Sscottl int unit = (intptr_t)device_get_ivars(child); 832195534Sscottl 833195534Sscottl ctlr->interrupt[unit].function = NULL; 834195534Sscottl ctlr->interrupt[unit].argument = NULL; 835195534Sscottl return (0); 836195534Sscottl} 837195534Sscottl 838195534Sscottlstatic int 839195534Sscottlahci_print_child(device_t dev, device_t child) 840195534Sscottl{ 841238805Smav int retval, channel; 842195534Sscottl 843195534Sscottl retval = bus_print_child_header(dev, child); 844238805Smav channel = (int)(intptr_t)device_get_ivars(child); 845238805Smav if (channel >= 0) 846238805Smav retval += printf(" at channel %d", channel); 847195534Sscottl retval += bus_print_child_footer(dev, child); 848195534Sscottl return (retval); 849195534Sscottl} 850195534Sscottl 851208410Smavstatic int 852208410Smavahci_child_location_str(device_t dev, device_t child, char *buf, 853208410Smav size_t buflen) 854208410Smav{ 855238805Smav int channel; 856208410Smav 857238805Smav channel = (int)(intptr_t)device_get_ivars(child); 858238805Smav if (channel >= 0) 859238805Smav snprintf(buf, buflen, "channel=%d", channel); 860208410Smav return (0); 861208410Smav} 862208410Smav 863195534Sscottldevclass_t ahci_devclass; 864195534Sscottlstatic device_method_t ahci_methods[] = { 865195534Sscottl DEVMETHOD(device_probe, ahci_probe), 866195534Sscottl DEVMETHOD(device_attach, ahci_attach), 867195534Sscottl DEVMETHOD(device_detach, ahci_detach), 868195534Sscottl DEVMETHOD(device_suspend, ahci_suspend), 869195534Sscottl DEVMETHOD(device_resume, ahci_resume), 870195534Sscottl DEVMETHOD(bus_print_child, ahci_print_child), 871195534Sscottl DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 872195534Sscottl DEVMETHOD(bus_release_resource, ahci_release_resource), 873195534Sscottl DEVMETHOD(bus_setup_intr, ahci_setup_intr), 874195534Sscottl DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 875208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 876195534Sscottl { 0, 0 } 877195534Sscottl}; 878195534Sscottlstatic driver_t ahci_driver = { 879195534Sscottl "ahci", 880195534Sscottl ahci_methods, 881195534Sscottl sizeof(struct ahci_controller) 882195534Sscottl}; 883195534SscottlDRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, 0, 0); 884199322Smavstatic device_method_t ahci_ata_methods[] = { 885199322Smav DEVMETHOD(device_probe, ahci_ata_probe), 886199322Smav DEVMETHOD(device_attach, ahci_attach), 887199322Smav DEVMETHOD(device_detach, ahci_detach), 888199322Smav DEVMETHOD(device_suspend, ahci_suspend), 889199322Smav DEVMETHOD(device_resume, ahci_resume), 890199322Smav DEVMETHOD(bus_print_child, ahci_print_child), 891199322Smav DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 892199322Smav DEVMETHOD(bus_release_resource, ahci_release_resource), 893199322Smav DEVMETHOD(bus_setup_intr, ahci_setup_intr), 894199322Smav DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 895208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 896199322Smav { 0, 0 } 897199322Smav}; 898199322Smavstatic driver_t ahci_ata_driver = { 899199322Smav "ahci", 900199322Smav ahci_ata_methods, 901199322Smav sizeof(struct ahci_controller) 902199322Smav}; 903199322SmavDRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, 0, 0); 904195534SscottlMODULE_VERSION(ahci, 1); 905195534SscottlMODULE_DEPEND(ahci, cam, 1, 1, 1); 906195534Sscottl 907195534Sscottlstatic int 908195534Sscottlahci_ch_probe(device_t dev) 909195534Sscottl{ 910195534Sscottl 911195534Sscottl device_set_desc_copy(dev, "AHCI channel"); 912195534Sscottl return (0); 913195534Sscottl} 914195534Sscottl 915195534Sscottlstatic int 916195534Sscottlahci_ch_attach(device_t dev) 917195534Sscottl{ 918195534Sscottl struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 919195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 920195534Sscottl struct cam_devq *devq; 921199821Smav int rid, error, i, sata_rev = 0; 922203123Smav u_int32_t version; 923195534Sscottl 924195534Sscottl ch->dev = dev; 925195534Sscottl ch->unit = (intptr_t)device_get_ivars(dev); 926196656Smav ch->caps = ctlr->caps; 927196656Smav ch->caps2 = ctlr->caps2; 928199322Smav ch->quirks = ctlr->quirks; 929215725Smav ch->numslots = ((ch->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1; 930196656Smav mtx_init(&ch->mtx, "AHCI channel lock", NULL, MTX_DEF); 931195534Sscottl resource_int_value(device_get_name(dev), 932195534Sscottl device_get_unit(dev), "pm_level", &ch->pm_level); 933196656Smav if (ch->pm_level > 3) 934196656Smav callout_init_mtx(&ch->pm_timer, &ch->mtx, 0); 935220576Smav callout_init_mtx(&ch->reset_timer, &ch->mtx, 0); 936195534Sscottl /* Limit speed for my onboard JMicron external port. 937195534Sscottl * It is not eSATA really. */ 938195534Sscottl if (pci_get_devid(ctlr->dev) == 0x2363197b && 939195534Sscottl pci_get_subvendor(ctlr->dev) == 0x1043 && 940195534Sscottl pci_get_subdevice(ctlr->dev) == 0x81e4 && 941195534Sscottl ch->unit == 0) 942199821Smav sata_rev = 1; 943203030Smav if (ch->quirks & AHCI_Q_SATA2) 944203030Smav sata_rev = 2; 945195534Sscottl resource_int_value(device_get_name(dev), 946199821Smav device_get_unit(dev), "sata_rev", &sata_rev); 947199821Smav for (i = 0; i < 16; i++) { 948199821Smav ch->user[i].revision = sata_rev; 949199821Smav ch->user[i].mode = 0; 950199821Smav ch->user[i].bytecount = 8192; 951199821Smav ch->user[i].tags = ch->numslots; 952207499Smav ch->user[i].caps = 0; 953199821Smav ch->curr[i] = ch->user[i]; 954207499Smav if (ch->pm_level) { 955207499Smav ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ | 956207499Smav CTS_SATA_CAPS_H_APST | 957207499Smav CTS_SATA_CAPS_D_PMREQ | CTS_SATA_CAPS_D_APST; 958207499Smav } 959220602Smav ch->user[i].caps |= CTS_SATA_CAPS_H_DMAAA | 960220602Smav CTS_SATA_CAPS_H_AN; 961199821Smav } 962238805Smav rid = 0; 963195534Sscottl if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 964195534Sscottl &rid, RF_ACTIVE))) 965195534Sscottl return (ENXIO); 966195534Sscottl ahci_dmainit(dev); 967195534Sscottl ahci_slotsalloc(dev); 968208375Smav ahci_ch_init(dev); 969195534Sscottl mtx_lock(&ch->mtx); 970195534Sscottl rid = ATA_IRQ_RID; 971195534Sscottl if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 972195534Sscottl &rid, RF_SHAREABLE | RF_ACTIVE))) { 973195534Sscottl device_printf(dev, "Unable to map interrupt\n"); 974208813Smav error = ENXIO; 975208813Smav goto err0; 976195534Sscottl } 977195534Sscottl if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 978195534Sscottl ahci_ch_intr_locked, dev, &ch->ih))) { 979195534Sscottl device_printf(dev, "Unable to setup interrupt\n"); 980195534Sscottl error = ENXIO; 981195534Sscottl goto err1; 982195534Sscottl } 983203123Smav ch->chcaps = ATA_INL(ch->r_mem, AHCI_P_CMD); 984203123Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 985240383Smav if (version < 0x00010200 && (ctlr->caps & AHCI_CAP_FBSS)) 986203123Smav ch->chcaps |= AHCI_P_CMD_FBSCP; 987203123Smav if (bootverbose) { 988203123Smav device_printf(dev, "Caps:%s%s%s%s%s\n", 989203123Smav (ch->chcaps & AHCI_P_CMD_HPCP) ? " HPCP":"", 990203123Smav (ch->chcaps & AHCI_P_CMD_MPSP) ? " MPSP":"", 991203123Smav (ch->chcaps & AHCI_P_CMD_CPD) ? " CPD":"", 992203123Smav (ch->chcaps & AHCI_P_CMD_ESP) ? " ESP":"", 993203123Smav (ch->chcaps & AHCI_P_CMD_FBSCP) ? " FBSCP":""); 994203123Smav } 995195534Sscottl /* Create the device queue for our SIM. */ 996195534Sscottl devq = cam_simq_alloc(ch->numslots); 997195534Sscottl if (devq == NULL) { 998195534Sscottl device_printf(dev, "Unable to allocate simq\n"); 999195534Sscottl error = ENOMEM; 1000195534Sscottl goto err1; 1001195534Sscottl } 1002195534Sscottl /* Construct SIM entry */ 1003195534Sscottl ch->sim = cam_sim_alloc(ahciaction, ahcipoll, "ahcich", ch, 1004199178Smav device_get_unit(dev), &ch->mtx, 1005199278Smav min(2, ch->numslots), 1006199278Smav (ch->caps & AHCI_CAP_SNCQ) ? ch->numslots : 0, 1007199278Smav devq); 1008195534Sscottl if (ch->sim == NULL) { 1009208813Smav cam_simq_free(devq); 1010195534Sscottl device_printf(dev, "unable to allocate sim\n"); 1011195534Sscottl error = ENOMEM; 1012208813Smav goto err1; 1013195534Sscottl } 1014195534Sscottl if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 1015195534Sscottl device_printf(dev, "unable to register xpt bus\n"); 1016195534Sscottl error = ENXIO; 1017195534Sscottl goto err2; 1018195534Sscottl } 1019195534Sscottl if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 1020195534Sscottl CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1021195534Sscottl device_printf(dev, "unable to create path\n"); 1022195534Sscottl error = ENXIO; 1023195534Sscottl goto err3; 1024195534Sscottl } 1025196656Smav if (ch->pm_level > 3) { 1026196656Smav callout_reset(&ch->pm_timer, 1027196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8, 1028196656Smav ahci_ch_pm, dev); 1029196656Smav } 1030195534Sscottl mtx_unlock(&ch->mtx); 1031195534Sscottl return (0); 1032195534Sscottl 1033195534Sscottlerr3: 1034195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1035195534Sscottlerr2: 1036195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1037195534Sscottlerr1: 1038195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1039208813Smaverr0: 1040195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1041195534Sscottl mtx_unlock(&ch->mtx); 1042214325Smav mtx_destroy(&ch->mtx); 1043195534Sscottl return (error); 1044195534Sscottl} 1045195534Sscottl 1046195534Sscottlstatic int 1047195534Sscottlahci_ch_detach(device_t dev) 1048195534Sscottl{ 1049195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1050195534Sscottl 1051195534Sscottl mtx_lock(&ch->mtx); 1052195534Sscottl xpt_async(AC_LOST_DEVICE, ch->path, NULL); 1053220576Smav /* Forget about reset. */ 1054220576Smav if (ch->resetting) { 1055220576Smav ch->resetting = 0; 1056220576Smav xpt_release_simq(ch->sim, TRUE); 1057220576Smav } 1058195534Sscottl xpt_free_path(ch->path); 1059195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1060195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1061195534Sscottl mtx_unlock(&ch->mtx); 1062195534Sscottl 1063196656Smav if (ch->pm_level > 3) 1064196656Smav callout_drain(&ch->pm_timer); 1065220576Smav callout_drain(&ch->reset_timer); 1066195534Sscottl bus_teardown_intr(dev, ch->r_irq, ch->ih); 1067195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1068195534Sscottl 1069208375Smav ahci_ch_deinit(dev); 1070195534Sscottl ahci_slotsfree(dev); 1071195534Sscottl ahci_dmafini(dev); 1072195534Sscottl 1073195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1074195534Sscottl mtx_destroy(&ch->mtx); 1075195534Sscottl return (0); 1076195534Sscottl} 1077195534Sscottl 1078195534Sscottlstatic int 1079208375Smavahci_ch_init(device_t dev) 1080195534Sscottl{ 1081195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1082208375Smav uint64_t work; 1083195534Sscottl 1084208375Smav /* Disable port interrupts */ 1085208375Smav ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1086208375Smav /* Setup work areas */ 1087208375Smav work = ch->dma.work_bus + AHCI_CL_OFFSET; 1088208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLB, work & 0xffffffff); 1089208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLBU, work >> 32); 1090208375Smav work = ch->dma.rfis_bus; 1091208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FB, work & 0xffffffff); 1092208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FBU, work >> 32); 1093208375Smav /* Activate the channel and power/spin up device */ 1094208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, 1095208375Smav (AHCI_P_CMD_ACTIVE | AHCI_P_CMD_POD | AHCI_P_CMD_SUD | 1096208375Smav ((ch->pm_level == 2 || ch->pm_level == 3) ? AHCI_P_CMD_ALPE : 0) | 1097208375Smav ((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 ))); 1098208375Smav ahci_start_fr(dev); 1099208375Smav ahci_start(dev, 1); 1100208375Smav return (0); 1101208375Smav} 1102208375Smav 1103208375Smavstatic int 1104208375Smavahci_ch_deinit(device_t dev) 1105208375Smav{ 1106208375Smav struct ahci_channel *ch = device_get_softc(dev); 1107208375Smav 1108195534Sscottl /* Disable port interrupts. */ 1109195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1110195534Sscottl /* Reset command register. */ 1111195534Sscottl ahci_stop(dev); 1112195534Sscottl ahci_stop_fr(dev); 1113195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, 0); 1114195534Sscottl /* Allow everything, including partial and slumber modes. */ 1115195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 0); 1116195534Sscottl /* Request slumber mode transition and give some time to get there. */ 1117195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, AHCI_P_CMD_SLUMBER); 1118195534Sscottl DELAY(100); 1119195534Sscottl /* Disable PHY. */ 1120195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 1121195534Sscottl return (0); 1122195534Sscottl} 1123195534Sscottl 1124195534Sscottlstatic int 1125208375Smavahci_ch_suspend(device_t dev) 1126208375Smav{ 1127208375Smav struct ahci_channel *ch = device_get_softc(dev); 1128208375Smav 1129208375Smav mtx_lock(&ch->mtx); 1130208375Smav xpt_freeze_simq(ch->sim, 1); 1131220576Smav /* Forget about reset. */ 1132220576Smav if (ch->resetting) { 1133220576Smav ch->resetting = 0; 1134220576Smav callout_stop(&ch->reset_timer); 1135220576Smav xpt_release_simq(ch->sim, TRUE); 1136220576Smav } 1137208375Smav while (ch->oslots) 1138208375Smav msleep(ch, &ch->mtx, PRIBIO, "ahcisusp", hz/100); 1139208375Smav ahci_ch_deinit(dev); 1140208375Smav mtx_unlock(&ch->mtx); 1141208375Smav return (0); 1142208375Smav} 1143208375Smav 1144208375Smavstatic int 1145195534Sscottlahci_ch_resume(device_t dev) 1146195534Sscottl{ 1147195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1148195534Sscottl 1149208375Smav mtx_lock(&ch->mtx); 1150208375Smav ahci_ch_init(dev); 1151208375Smav ahci_reset(dev); 1152208375Smav xpt_release_simq(ch->sim, TRUE); 1153208375Smav mtx_unlock(&ch->mtx); 1154195534Sscottl return (0); 1155195534Sscottl} 1156195534Sscottl 1157195534Sscottldevclass_t ahcich_devclass; 1158195534Sscottlstatic device_method_t ahcich_methods[] = { 1159195534Sscottl DEVMETHOD(device_probe, ahci_ch_probe), 1160195534Sscottl DEVMETHOD(device_attach, ahci_ch_attach), 1161195534Sscottl DEVMETHOD(device_detach, ahci_ch_detach), 1162195534Sscottl DEVMETHOD(device_suspend, ahci_ch_suspend), 1163195534Sscottl DEVMETHOD(device_resume, ahci_ch_resume), 1164195534Sscottl { 0, 0 } 1165195534Sscottl}; 1166195534Sscottlstatic driver_t ahcich_driver = { 1167195534Sscottl "ahcich", 1168195534Sscottl ahcich_methods, 1169195534Sscottl sizeof(struct ahci_channel) 1170195534Sscottl}; 1171199322SmavDRIVER_MODULE(ahcich, ahci, ahcich_driver, ahcich_devclass, 0, 0); 1172195534Sscottl 1173195534Sscottlstruct ahci_dc_cb_args { 1174195534Sscottl bus_addr_t maddr; 1175195534Sscottl int error; 1176195534Sscottl}; 1177195534Sscottl 1178195534Sscottlstatic void 1179195534Sscottlahci_dmainit(device_t dev) 1180195534Sscottl{ 1181195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1182195534Sscottl struct ahci_dc_cb_args dcba; 1183203123Smav size_t rfsize; 1184195534Sscottl 1185195534Sscottl if (ch->caps & AHCI_CAP_64BIT) 1186195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR; 1187195534Sscottl else 1188195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR_32BIT; 1189195534Sscottl /* Command area. */ 1190195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 1191195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1192195534Sscottl NULL, NULL, AHCI_WORK_SIZE, 1, AHCI_WORK_SIZE, 1193195534Sscottl 0, NULL, NULL, &ch->dma.work_tag)) 1194195534Sscottl goto error; 1195195534Sscottl if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 1196195534Sscottl &ch->dma.work_map)) 1197195534Sscottl goto error; 1198195534Sscottl if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 1199195534Sscottl AHCI_WORK_SIZE, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1200195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1201195534Sscottl goto error; 1202195534Sscottl } 1203195534Sscottl ch->dma.work_bus = dcba.maddr; 1204195534Sscottl /* FIS receive area. */ 1205203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) 1206203123Smav rfsize = 4096; 1207203123Smav else 1208203123Smav rfsize = 256; 1209203123Smav if (bus_dma_tag_create(bus_get_dma_tag(dev), rfsize, 0, 1210195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1211203123Smav NULL, NULL, rfsize, 1, rfsize, 1212195534Sscottl 0, NULL, NULL, &ch->dma.rfis_tag)) 1213195534Sscottl goto error; 1214195534Sscottl if (bus_dmamem_alloc(ch->dma.rfis_tag, (void **)&ch->dma.rfis, 0, 1215195534Sscottl &ch->dma.rfis_map)) 1216195534Sscottl goto error; 1217195534Sscottl if (bus_dmamap_load(ch->dma.rfis_tag, ch->dma.rfis_map, ch->dma.rfis, 1218203123Smav rfsize, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1219195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1220195534Sscottl goto error; 1221195534Sscottl } 1222195534Sscottl ch->dma.rfis_bus = dcba.maddr; 1223195534Sscottl /* Data area. */ 1224195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, 1225195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1226195534Sscottl NULL, NULL, 1227195534Sscottl AHCI_SG_ENTRIES * PAGE_SIZE * ch->numslots, 1228195534Sscottl AHCI_SG_ENTRIES, AHCI_PRD_MAX, 1229195534Sscottl 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 1230195534Sscottl goto error; 1231195534Sscottl } 1232195534Sscottl return; 1233195534Sscottl 1234195534Sscottlerror: 1235195534Sscottl device_printf(dev, "WARNING - DMA initialization failed\n"); 1236195534Sscottl ahci_dmafini(dev); 1237195534Sscottl} 1238195534Sscottl 1239195534Sscottlstatic void 1240195534Sscottlahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 1241195534Sscottl{ 1242195534Sscottl struct ahci_dc_cb_args *dcba = (struct ahci_dc_cb_args *)xsc; 1243195534Sscottl 1244195534Sscottl if (!(dcba->error = error)) 1245195534Sscottl dcba->maddr = segs[0].ds_addr; 1246195534Sscottl} 1247195534Sscottl 1248195534Sscottlstatic void 1249195534Sscottlahci_dmafini(device_t dev) 1250195534Sscottl{ 1251195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1252195534Sscottl 1253195534Sscottl if (ch->dma.data_tag) { 1254195534Sscottl bus_dma_tag_destroy(ch->dma.data_tag); 1255195534Sscottl ch->dma.data_tag = NULL; 1256195534Sscottl } 1257195534Sscottl if (ch->dma.rfis_bus) { 1258195534Sscottl bus_dmamap_unload(ch->dma.rfis_tag, ch->dma.rfis_map); 1259195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1260195534Sscottl ch->dma.rfis_bus = 0; 1261195534Sscottl ch->dma.rfis_map = NULL; 1262195534Sscottl ch->dma.rfis = NULL; 1263195534Sscottl } 1264195534Sscottl if (ch->dma.work_bus) { 1265195534Sscottl bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 1266195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1267195534Sscottl ch->dma.work_bus = 0; 1268195534Sscottl ch->dma.work_map = NULL; 1269195534Sscottl ch->dma.work = NULL; 1270195534Sscottl } 1271195534Sscottl if (ch->dma.work_tag) { 1272195534Sscottl bus_dma_tag_destroy(ch->dma.work_tag); 1273195534Sscottl ch->dma.work_tag = NULL; 1274195534Sscottl } 1275195534Sscottl} 1276195534Sscottl 1277195534Sscottlstatic void 1278195534Sscottlahci_slotsalloc(device_t dev) 1279195534Sscottl{ 1280195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1281195534Sscottl int i; 1282195534Sscottl 1283195534Sscottl /* Alloc and setup command/dma slots */ 1284195534Sscottl bzero(ch->slot, sizeof(ch->slot)); 1285195534Sscottl for (i = 0; i < ch->numslots; i++) { 1286195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1287195534Sscottl 1288195534Sscottl slot->dev = dev; 1289195534Sscottl slot->slot = i; 1290195534Sscottl slot->state = AHCI_SLOT_EMPTY; 1291195534Sscottl slot->ccb = NULL; 1292195534Sscottl callout_init_mtx(&slot->timeout, &ch->mtx, 0); 1293195534Sscottl 1294195534Sscottl if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 1295195534Sscottl device_printf(ch->dev, "FAILURE - create data_map\n"); 1296195534Sscottl } 1297195534Sscottl} 1298195534Sscottl 1299195534Sscottlstatic void 1300195534Sscottlahci_slotsfree(device_t dev) 1301195534Sscottl{ 1302195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1303195534Sscottl int i; 1304195534Sscottl 1305195534Sscottl /* Free all dma slots */ 1306195534Sscottl for (i = 0; i < ch->numslots; i++) { 1307195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1308195534Sscottl 1309196656Smav callout_drain(&slot->timeout); 1310195534Sscottl if (slot->dma.data_map) { 1311195534Sscottl bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 1312195534Sscottl slot->dma.data_map = NULL; 1313195534Sscottl } 1314195534Sscottl } 1315195534Sscottl} 1316195534Sscottl 1317220657Smavstatic int 1318198319Smavahci_phy_check_events(device_t dev, u_int32_t serr) 1319195534Sscottl{ 1320195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1321195534Sscottl 1322220657Smav if (((ch->pm_level == 0) && (serr & ATA_SE_PHY_CHANGED)) || 1323220657Smav ((ch->pm_level != 0 || ch->listening) && (serr & ATA_SE_EXCHANGED))) { 1324195534Sscottl u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 1325203108Smav union ccb *ccb; 1326203108Smav 1327203165Smav if (bootverbose) { 1328220657Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 1329195534Sscottl device_printf(dev, "CONNECT requested\n"); 1330220657Smav else 1331195534Sscottl device_printf(dev, "DISCONNECT requested\n"); 1332195534Sscottl } 1333203165Smav ahci_reset(dev); 1334203108Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1335220657Smav return (0); 1336203108Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, 1337203108Smav cam_sim_path(ch->sim), 1338203108Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1339203108Smav xpt_free_ccb(ccb); 1340220657Smav return (0); 1341203108Smav } 1342203108Smav xpt_rescan(ccb); 1343220657Smav return (1); 1344195534Sscottl } 1345220657Smav return (0); 1346195534Sscottl} 1347195534Sscottl 1348195534Sscottlstatic void 1349220657Smavahci_cpd_check_events(device_t dev) 1350220657Smav{ 1351220657Smav struct ahci_channel *ch = device_get_softc(dev); 1352220657Smav u_int32_t status; 1353220657Smav union ccb *ccb; 1354220657Smav 1355220657Smav if (ch->pm_level == 0) 1356220657Smav return; 1357220657Smav 1358220657Smav status = ATA_INL(ch->r_mem, AHCI_P_CMD); 1359220657Smav if ((status & AHCI_P_CMD_CPD) == 0) 1360220657Smav return; 1361220657Smav 1362220657Smav if (bootverbose) { 1363220657Smav if (status & AHCI_P_CMD_CPS) { 1364220657Smav device_printf(dev, "COLD CONNECT requested\n"); 1365220657Smav } else 1366220657Smav device_printf(dev, "COLD DISCONNECT requested\n"); 1367220657Smav } 1368220657Smav ahci_reset(dev); 1369220657Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1370220657Smav return; 1371220657Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, cam_sim_path(ch->sim), 1372220657Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1373220657Smav xpt_free_ccb(ccb); 1374220657Smav return; 1375220657Smav } 1376220657Smav xpt_rescan(ccb); 1377220657Smav} 1378220657Smav 1379220657Smavstatic void 1380196907Smavahci_notify_events(device_t dev, u_int32_t status) 1381196656Smav{ 1382196656Smav struct ahci_channel *ch = device_get_softc(dev); 1383196656Smav struct cam_path *dpath; 1384196656Smav int i; 1385196656Smav 1386200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1387200196Smav ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status); 1388196656Smav if (bootverbose) 1389196656Smav device_printf(dev, "SNTF 0x%04x\n", status); 1390196656Smav for (i = 0; i < 16; i++) { 1391196656Smav if ((status & (1 << i)) == 0) 1392196656Smav continue; 1393196656Smav if (xpt_create_path(&dpath, NULL, 1394196656Smav xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 1395196656Smav xpt_async(AC_SCSI_AEN, dpath, NULL); 1396196656Smav xpt_free_path(dpath); 1397196656Smav } 1398196656Smav } 1399196656Smav} 1400196656Smav 1401196656Smavstatic void 1402195534Sscottlahci_ch_intr_locked(void *data) 1403195534Sscottl{ 1404195534Sscottl device_t dev = (device_t)data; 1405195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1406195534Sscottl 1407195534Sscottl mtx_lock(&ch->mtx); 1408235333Smav xpt_batch_start(ch->sim); 1409195534Sscottl ahci_ch_intr(data); 1410235333Smav xpt_batch_done(ch->sim); 1411195534Sscottl mtx_unlock(&ch->mtx); 1412195534Sscottl} 1413195534Sscottl 1414195534Sscottlstatic void 1415196656Smavahci_ch_pm(void *arg) 1416196656Smav{ 1417196656Smav device_t dev = (device_t)arg; 1418196656Smav struct ahci_channel *ch = device_get_softc(dev); 1419196656Smav uint32_t work; 1420196656Smav 1421196656Smav if (ch->numrslots != 0) 1422196656Smav return; 1423196656Smav work = ATA_INL(ch->r_mem, AHCI_P_CMD); 1424196656Smav if (ch->pm_level == 4) 1425196656Smav work |= AHCI_P_CMD_PARTIAL; 1426196656Smav else 1427196656Smav work |= AHCI_P_CMD_SLUMBER; 1428196656Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, work); 1429196656Smav} 1430196656Smav 1431196656Smavstatic void 1432195534Sscottlahci_ch_intr(void *data) 1433195534Sscottl{ 1434195534Sscottl device_t dev = (device_t)data; 1435195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1436198319Smav uint32_t istatus, sstatus, cstatus, serr = 0, sntf = 0, ok, err; 1437195534Sscottl enum ahci_err_type et; 1438220657Smav int i, ccs, port, reset = 0; 1439195534Sscottl 1440195534Sscottl /* Read and clear interrupt statuses. */ 1441195534Sscottl istatus = ATA_INL(ch->r_mem, AHCI_P_IS); 1442196656Smav if (istatus == 0) 1443196656Smav return; 1444195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, istatus); 1445195534Sscottl /* Read command statuses. */ 1446196907Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1447195534Sscottl cstatus = ATA_INL(ch->r_mem, AHCI_P_CI); 1448200196Smav if (istatus & AHCI_P_IX_SDB) { 1449200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1450200196Smav sntf = ATA_INL(ch->r_mem, AHCI_P_SNTF); 1451203123Smav else if (ch->fbs_enabled) { 1452200196Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1453200196Smav 1454203123Smav for (i = 0; i < 16; i++) { 1455203123Smav if (fis[1] & 0x80) { 1456203123Smav fis[1] &= 0x7f; 1457203123Smav sntf |= 1 << i; 1458203123Smav } 1459203123Smav fis += 256; 1460203123Smav } 1461203123Smav } else { 1462203123Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1463203123Smav 1464200196Smav if (fis[1] & 0x80) 1465200196Smav sntf = (1 << (fis[1] & 0x0f)); 1466200196Smav } 1467200196Smav } 1468195534Sscottl /* Process PHY events */ 1469198319Smav if (istatus & (AHCI_P_IX_PC | AHCI_P_IX_PRC | AHCI_P_IX_OF | 1470198319Smav AHCI_P_IX_IF | AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1471198319Smav serr = ATA_INL(ch->r_mem, AHCI_P_SERR); 1472198319Smav if (serr) { 1473198319Smav ATA_OUTL(ch->r_mem, AHCI_P_SERR, serr); 1474220657Smav reset = ahci_phy_check_events(dev, serr); 1475198319Smav } 1476198319Smav } 1477220657Smav /* Process cold presence detection events */ 1478220657Smav if ((istatus & AHCI_P_IX_CPD) && !reset) 1479220657Smav ahci_cpd_check_events(dev); 1480195534Sscottl /* Process command errors */ 1481198319Smav if (istatus & (AHCI_P_IX_OF | AHCI_P_IX_IF | 1482198319Smav AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1483195534Sscottl ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1484195534Sscottl >> AHCI_P_CMD_CCS_SHIFT; 1485203123Smav//device_printf(dev, "%s ERROR is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x fbs %08x ccs %d\n", 1486203123Smav// __func__, istatus, cstatus, sstatus, ch->rslots, ATA_INL(ch->r_mem, AHCI_P_TFD), 1487203123Smav// serr, ATA_INL(ch->r_mem, AHCI_P_FBS), ccs); 1488203123Smav port = -1; 1489203123Smav if (ch->fbs_enabled) { 1490203123Smav uint32_t fbs = ATA_INL(ch->r_mem, AHCI_P_FBS); 1491203123Smav if (fbs & AHCI_P_FBS_SDE) { 1492203123Smav port = (fbs & AHCI_P_FBS_DWE) 1493203123Smav >> AHCI_P_FBS_DWE_SHIFT; 1494203123Smav } else { 1495203123Smav for (i = 0; i < 16; i++) { 1496203123Smav if (ch->numrslotspd[i] == 0) 1497203123Smav continue; 1498203123Smav if (port == -1) 1499203123Smav port = i; 1500203123Smav else if (port != i) { 1501203123Smav port = -2; 1502203123Smav break; 1503203123Smav } 1504203123Smav } 1505203123Smav } 1506203123Smav } 1507196656Smav err = ch->rslots & (cstatus | sstatus); 1508195534Sscottl } else { 1509195534Sscottl ccs = 0; 1510195534Sscottl err = 0; 1511203123Smav port = -1; 1512195534Sscottl } 1513195534Sscottl /* Complete all successfull commands. */ 1514196656Smav ok = ch->rslots & ~(cstatus | sstatus); 1515195534Sscottl for (i = 0; i < ch->numslots; i++) { 1516195534Sscottl if ((ok >> i) & 1) 1517195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_NONE); 1518195534Sscottl } 1519195534Sscottl /* On error, complete the rest of commands with error statuses. */ 1520195534Sscottl if (err) { 1521195534Sscottl if (ch->frozen) { 1522195534Sscottl union ccb *fccb = ch->frozen; 1523195534Sscottl ch->frozen = NULL; 1524195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1525198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1526198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1527198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1528198319Smav } 1529195534Sscottl xpt_done(fccb); 1530195534Sscottl } 1531195534Sscottl for (i = 0; i < ch->numslots; i++) { 1532195534Sscottl /* XXX: reqests in loading state. */ 1533195534Sscottl if (((err >> i) & 1) == 0) 1534195534Sscottl continue; 1535203123Smav if (port >= 0 && 1536203123Smav ch->slot[i].ccb->ccb_h.target_id != port) 1537203123Smav continue; 1538198390Smav if (istatus & AHCI_P_IX_TFE) { 1539203123Smav if (port != -2) { 1540195534Sscottl /* Task File Error */ 1541203123Smav if (ch->numtslotspd[ 1542203123Smav ch->slot[i].ccb->ccb_h.target_id] == 0) { 1543195534Sscottl /* Untagged operation. */ 1544195534Sscottl if (i == ccs) 1545195534Sscottl et = AHCI_ERR_TFE; 1546195534Sscottl else 1547195534Sscottl et = AHCI_ERR_INNOCENT; 1548195534Sscottl } else { 1549195534Sscottl /* Tagged operation. */ 1550195534Sscottl et = AHCI_ERR_NCQ; 1551195534Sscottl } 1552203123Smav } else { 1553203123Smav et = AHCI_ERR_TFE; 1554203123Smav ch->fatalerr = 1; 1555203123Smav } 1556198390Smav } else if (istatus & AHCI_P_IX_IF) { 1557203123Smav if (ch->numtslots == 0 && i != ccs && port != -2) 1558198390Smav et = AHCI_ERR_INNOCENT; 1559198390Smav else 1560198390Smav et = AHCI_ERR_SATA; 1561195534Sscottl } else 1562195534Sscottl et = AHCI_ERR_INVALID; 1563195534Sscottl ahci_end_transaction(&ch->slot[i], et); 1564195534Sscottl } 1565203123Smav /* 1566203123Smav * We can't reinit port if there are some other 1567203123Smav * commands active, use resume to complete them. 1568203123Smav */ 1569220565Smav if (ch->rslots != 0 && !ch->recoverycmd) 1570203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | AHCI_P_FBS_DEC); 1571195534Sscottl } 1572196656Smav /* Process NOTIFY events */ 1573196907Smav if (sntf) 1574196907Smav ahci_notify_events(dev, sntf); 1575195534Sscottl} 1576195534Sscottl 1577195534Sscottl/* Must be called with channel locked. */ 1578195534Sscottlstatic int 1579195534Sscottlahci_check_collision(device_t dev, union ccb *ccb) 1580195534Sscottl{ 1581195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1582203123Smav int t = ccb->ccb_h.target_id; 1583195534Sscottl 1584195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1585195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1586199747Smav /* Tagged command while we have no supported tag free. */ 1587199747Smav if (((~ch->oslots) & (0xffffffff >> (32 - 1588203123Smav ch->curr[t].tags))) == 0) 1589199747Smav return (1); 1590203123Smav /* If we have FBS */ 1591203123Smav if (ch->fbs_enabled) { 1592203123Smav /* Tagged command while untagged are active. */ 1593203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] == 0) 1594203123Smav return (1); 1595203123Smav } else { 1596203123Smav /* Tagged command while untagged are active. */ 1597203123Smav if (ch->numrslots != 0 && ch->numtslots == 0) 1598203123Smav return (1); 1599203123Smav /* Tagged command while tagged to other target is active. */ 1600203123Smav if (ch->numtslots != 0 && 1601203123Smav ch->taggedtarget != ccb->ccb_h.target_id) 1602203123Smav return (1); 1603203123Smav } 1604195534Sscottl } else { 1605203123Smav /* If we have FBS */ 1606203123Smav if (ch->fbs_enabled) { 1607203123Smav /* Untagged command while tagged are active. */ 1608203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] != 0) 1609203123Smav return (1); 1610203123Smav } else { 1611203123Smav /* Untagged command while tagged are active. */ 1612203123Smav if (ch->numrslots != 0 && ch->numtslots != 0) 1613203123Smav return (1); 1614203123Smav } 1615195534Sscottl } 1616195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1617195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 1618195534Sscottl /* Atomic command while anything active. */ 1619195534Sscottl if (ch->numrslots != 0) 1620195534Sscottl return (1); 1621195534Sscottl } 1622195534Sscottl /* We have some atomic command running. */ 1623195534Sscottl if (ch->aslots != 0) 1624195534Sscottl return (1); 1625195534Sscottl return (0); 1626195534Sscottl} 1627195534Sscottl 1628195534Sscottl/* Must be called with channel locked. */ 1629195534Sscottlstatic void 1630195534Sscottlahci_begin_transaction(device_t dev, union ccb *ccb) 1631195534Sscottl{ 1632195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1633195534Sscottl struct ahci_slot *slot; 1634199747Smav int tag, tags; 1635195534Sscottl 1636195534Sscottl /* Choose empty slot. */ 1637199747Smav tags = ch->numslots; 1638199747Smav if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1639199747Smav (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 1640199747Smav tags = ch->curr[ccb->ccb_h.target_id].tags; 1641195534Sscottl tag = ch->lastslot; 1642199747Smav while (1) { 1643199747Smav if (tag >= tags) 1644195534Sscottl tag = 0; 1645199747Smav if (ch->slot[tag].state == AHCI_SLOT_EMPTY) 1646199747Smav break; 1647199747Smav tag++; 1648199747Smav }; 1649195534Sscottl ch->lastslot = tag; 1650195534Sscottl /* Occupy chosen slot. */ 1651195534Sscottl slot = &ch->slot[tag]; 1652195534Sscottl slot->ccb = ccb; 1653196656Smav /* Stop PM timer. */ 1654196656Smav if (ch->numrslots == 0 && ch->pm_level > 3) 1655196656Smav callout_stop(&ch->pm_timer); 1656195534Sscottl /* Update channel stats. */ 1657199747Smav ch->oslots |= (1 << slot->slot); 1658195534Sscottl ch->numrslots++; 1659203123Smav ch->numrslotspd[ccb->ccb_h.target_id]++; 1660195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1661195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1662195534Sscottl ch->numtslots++; 1663203123Smav ch->numtslotspd[ccb->ccb_h.target_id]++; 1664195534Sscottl ch->taggedtarget = ccb->ccb_h.target_id; 1665195534Sscottl } 1666195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1667195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 1668195534Sscottl ch->aslots |= (1 << slot->slot); 1669195534Sscottl slot->dma.nsegs = 0; 1670195534Sscottl /* If request moves data, setup and load SG list */ 1671195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1672195534Sscottl void *buf; 1673195534Sscottl bus_size_t size; 1674195534Sscottl 1675195534Sscottl slot->state = AHCI_SLOT_LOADING; 1676195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1677195534Sscottl buf = ccb->ataio.data_ptr; 1678195534Sscottl size = ccb->ataio.dxfer_len; 1679195534Sscottl } else { 1680195534Sscottl buf = ccb->csio.data_ptr; 1681195534Sscottl size = ccb->csio.dxfer_len; 1682195534Sscottl } 1683195534Sscottl bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 1684195534Sscottl buf, size, ahci_dmasetprd, slot, 0); 1685195534Sscottl } else 1686195534Sscottl ahci_execute_transaction(slot); 1687195534Sscottl} 1688195534Sscottl 1689195534Sscottl/* Locked by busdma engine. */ 1690195534Sscottlstatic void 1691195534Sscottlahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1692195534Sscottl{ 1693195534Sscottl struct ahci_slot *slot = arg; 1694195534Sscottl struct ahci_channel *ch = device_get_softc(slot->dev); 1695195534Sscottl struct ahci_cmd_tab *ctp; 1696195534Sscottl struct ahci_dma_prd *prd; 1697195534Sscottl int i; 1698195534Sscottl 1699195534Sscottl if (error) { 1700195534Sscottl device_printf(slot->dev, "DMA load error\n"); 1701195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1702195534Sscottl return; 1703195534Sscottl } 1704195534Sscottl KASSERT(nsegs <= AHCI_SG_ENTRIES, ("too many DMA segment entries\n")); 1705195534Sscottl /* Get a piece of the workspace for this request */ 1706195534Sscottl ctp = (struct ahci_cmd_tab *) 1707195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1708195534Sscottl /* Fill S/G table */ 1709195534Sscottl prd = &ctp->prd_tab[0]; 1710195534Sscottl for (i = 0; i < nsegs; i++) { 1711195534Sscottl prd[i].dba = htole64(segs[i].ds_addr); 1712195534Sscottl prd[i].dbc = htole32((segs[i].ds_len - 1) & AHCI_PRD_MASK); 1713195534Sscottl } 1714195534Sscottl slot->dma.nsegs = nsegs; 1715195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1716195534Sscottl ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1717195534Sscottl BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1718195534Sscottl ahci_execute_transaction(slot); 1719195534Sscottl} 1720195534Sscottl 1721195534Sscottl/* Must be called with channel locked. */ 1722195534Sscottlstatic void 1723195534Sscottlahci_execute_transaction(struct ahci_slot *slot) 1724195534Sscottl{ 1725195534Sscottl device_t dev = slot->dev; 1726195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1727195534Sscottl struct ahci_cmd_tab *ctp; 1728195534Sscottl struct ahci_cmd_list *clp; 1729195534Sscottl union ccb *ccb = slot->ccb; 1730195534Sscottl int port = ccb->ccb_h.target_id & 0x0f; 1731222304Smav int fis_size, i, softreset; 1732203123Smav uint8_t *fis = ch->dma.rfis + 0x40; 1733203123Smav uint8_t val; 1734195534Sscottl 1735195534Sscottl /* Get a piece of the workspace for this request */ 1736195534Sscottl ctp = (struct ahci_cmd_tab *) 1737195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1738195534Sscottl /* Setup the FIS for this request */ 1739199821Smav if (!(fis_size = ahci_setup_fis(dev, ctp, ccb, slot->slot))) { 1740195534Sscottl device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1741195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1742195534Sscottl return; 1743195534Sscottl } 1744195534Sscottl /* Setup the command list entry */ 1745195534Sscottl clp = (struct ahci_cmd_list *) 1746195534Sscottl (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 1747214988Smav clp->cmd_flags = htole16( 1748214988Smav (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) | 1749214988Smav (ccb->ccb_h.func_code == XPT_SCSI_IO ? 1750214988Smav (AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) | 1751214988Smav (fis_size / sizeof(u_int32_t)) | 1752214988Smav (port << 12)); 1753214988Smav clp->prd_length = htole16(slot->dma.nsegs); 1754195534Sscottl /* Special handling for Soft Reset command. */ 1755195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1756203123Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { 1757203123Smav if (ccb->ataio.cmd.control & ATA_A_RESET) { 1758222304Smav softreset = 1; 1759203123Smav /* Kick controller into sane state */ 1760203123Smav ahci_stop(dev); 1761203123Smav ahci_clo(dev); 1762203123Smav ahci_start(dev, 0); 1763203123Smav clp->cmd_flags |= AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY; 1764203123Smav } else { 1765222304Smav softreset = 2; 1766203123Smav /* Prepare FIS receive area for check. */ 1767203123Smav for (i = 0; i < 20; i++) 1768203123Smav fis[i] = 0xff; 1769203123Smav } 1770222304Smav } else 1771222304Smav softreset = 0; 1772195534Sscottl clp->bytecount = 0; 1773195534Sscottl clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET + 1774195534Sscottl (AHCI_CT_SIZE * slot->slot)); 1775195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1776214988Smav BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1777195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 1778195534Sscottl BUS_DMASYNC_PREREAD); 1779195534Sscottl /* Set ACTIVE bit for NCQ commands. */ 1780195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1781195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1782195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot); 1783195534Sscottl } 1784203123Smav /* If FBS is enabled, set PMP port. */ 1785203123Smav if (ch->fbs_enabled) { 1786203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | 1787203123Smav (port << AHCI_P_FBS_DEV_SHIFT)); 1788203123Smav } 1789195534Sscottl /* Issue command to the controller. */ 1790195534Sscottl slot->state = AHCI_SLOT_RUNNING; 1791195534Sscottl ch->rslots |= (1 << slot->slot); 1792195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CI, (1 << slot->slot)); 1793195534Sscottl /* Device reset commands doesn't interrupt. Poll them. */ 1794195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO && 1795222304Smav (ccb->ataio.cmd.command == ATA_DEVICE_RESET || softreset)) { 1796220777Smav int count, timeout = ccb->ccb_h.timeout * 100; 1797195534Sscottl enum ahci_err_type et = AHCI_ERR_NONE; 1798195534Sscottl 1799195534Sscottl for (count = 0; count < timeout; count++) { 1800220777Smav DELAY(10); 1801195534Sscottl if (!(ATA_INL(ch->r_mem, AHCI_P_CI) & (1 << slot->slot))) 1802195534Sscottl break; 1803222304Smav if ((ATA_INL(ch->r_mem, AHCI_P_TFD) & ATA_S_ERROR) && 1804222304Smav softreset != 1) { 1805222285Smav#if 0 1806195534Sscottl device_printf(ch->dev, 1807195534Sscottl "Poll error on slot %d, TFD: %04x\n", 1808195534Sscottl slot->slot, ATA_INL(ch->r_mem, AHCI_P_TFD)); 1809222285Smav#endif 1810195534Sscottl et = AHCI_ERR_TFE; 1811195534Sscottl break; 1812195534Sscottl } 1813198851Smav /* Workaround for ATI SB600/SB700 chipsets. */ 1814198851Smav if (ccb->ccb_h.target_id == 15 && 1815198851Smav pci_get_vendor(device_get_parent(dev)) == 0x1002 && 1816198851Smav (ATA_INL(ch->r_mem, AHCI_P_IS) & AHCI_P_IX_IPM)) { 1817198851Smav et = AHCI_ERR_TIMEOUT; 1818198851Smav break; 1819198851Smav } 1820195534Sscottl } 1821222304Smav 1822222304Smav /* Marvell controllers do not wait for readyness. */ 1823222304Smav if ((ch->quirks & AHCI_Q_NOBSYRES) && softreset == 2 && 1824222304Smav et == AHCI_ERR_NONE) { 1825222304Smav while ((val = fis[2]) & ATA_S_BUSY) { 1826222304Smav DELAY(10); 1827222304Smav if (count++ >= timeout) 1828222304Smav break; 1829222304Smav } 1830222304Smav } 1831222304Smav 1832195534Sscottl if (timeout && (count >= timeout)) { 1833222304Smav device_printf(dev, "Poll timeout on slot %d port %d\n", 1834222304Smav slot->slot, port); 1835203108Smav device_printf(dev, "is %08x cs %08x ss %08x " 1836224498Smav "rs %08x tfd %02x serr %08x cmd %08x\n", 1837203108Smav ATA_INL(ch->r_mem, AHCI_P_IS), 1838203108Smav ATA_INL(ch->r_mem, AHCI_P_CI), 1839203108Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1840203108Smav ATA_INL(ch->r_mem, AHCI_P_TFD), 1841224498Smav ATA_INL(ch->r_mem, AHCI_P_SERR), 1842224498Smav ATA_INL(ch->r_mem, AHCI_P_CMD)); 1843195534Sscottl et = AHCI_ERR_TIMEOUT; 1844195534Sscottl } 1845222304Smav 1846203123Smav /* Kick controller into sane state and enable FBS. */ 1847222304Smav if (softreset == 2) 1848222285Smav ch->eslots |= (1 << slot->slot); 1849222285Smav ahci_end_transaction(slot, et); 1850195534Sscottl return; 1851195534Sscottl } 1852195534Sscottl /* Start command execution timeout */ 1853198319Smav callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000, 1854195534Sscottl (timeout_t*)ahci_timeout, slot); 1855195534Sscottl return; 1856195534Sscottl} 1857195534Sscottl 1858203873Smav/* Must be called with channel locked. */ 1859203873Smavstatic void 1860203873Smavahci_process_timeout(device_t dev) 1861203873Smav{ 1862203873Smav struct ahci_channel *ch = device_get_softc(dev); 1863203873Smav int i; 1864203873Smav 1865203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1866203873Smav /* Handle the rest of commands. */ 1867203873Smav for (i = 0; i < ch->numslots; i++) { 1868203873Smav /* Do we have a running request on slot? */ 1869203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1870203873Smav continue; 1871203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_TIMEOUT); 1872203873Smav } 1873203873Smav} 1874203873Smav 1875203873Smav/* Must be called with channel locked. */ 1876203873Smavstatic void 1877203873Smavahci_rearm_timeout(device_t dev) 1878203873Smav{ 1879203873Smav struct ahci_channel *ch = device_get_softc(dev); 1880203873Smav int i; 1881203873Smav 1882203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1883203873Smav for (i = 0; i < ch->numslots; i++) { 1884203873Smav struct ahci_slot *slot = &ch->slot[i]; 1885203873Smav 1886203873Smav /* Do we have a running request on slot? */ 1887203873Smav if (slot->state < AHCI_SLOT_RUNNING) 1888203873Smav continue; 1889203873Smav if ((ch->toslots & (1 << i)) == 0) 1890203873Smav continue; 1891203873Smav callout_reset(&slot->timeout, 1892203873Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1893203873Smav (timeout_t*)ahci_timeout, slot); 1894203873Smav } 1895203873Smav} 1896203873Smav 1897195534Sscottl/* Locked by callout mechanism. */ 1898195534Sscottlstatic void 1899195534Sscottlahci_timeout(struct ahci_slot *slot) 1900195534Sscottl{ 1901195534Sscottl device_t dev = slot->dev; 1902195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1903198319Smav uint32_t sstatus; 1904198319Smav int ccs; 1905195534Sscottl int i; 1906195534Sscottl 1907196656Smav /* Check for stale timeout. */ 1908198319Smav if (slot->state < AHCI_SLOT_RUNNING) 1909196656Smav return; 1910196656Smav 1911198319Smav /* Check if slot was not being executed last time we checked. */ 1912198319Smav if (slot->state < AHCI_SLOT_EXECUTING) { 1913198319Smav /* Check if slot started executing. */ 1914198319Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1915198319Smav ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1916198319Smav >> AHCI_P_CMD_CCS_SHIFT; 1917203123Smav if ((sstatus & (1 << slot->slot)) != 0 || ccs == slot->slot || 1918224498Smav ch->fbs_enabled || ch->wrongccs) 1919198319Smav slot->state = AHCI_SLOT_EXECUTING; 1920224498Smav else if ((ch->rslots & (1 << ccs)) == 0) { 1921224498Smav ch->wrongccs = 1; 1922224498Smav slot->state = AHCI_SLOT_EXECUTING; 1923224498Smav } 1924198319Smav 1925198319Smav callout_reset(&slot->timeout, 1926198319Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1927198319Smav (timeout_t*)ahci_timeout, slot); 1928198319Smav return; 1929198319Smav } 1930198319Smav 1931222304Smav device_printf(dev, "Timeout on slot %d port %d\n", 1932222304Smav slot->slot, slot->ccb->ccb_h.target_id & 0x0f); 1933224498Smav device_printf(dev, "is %08x cs %08x ss %08x rs %08x tfd %02x " 1934224498Smav "serr %08x cmd %08x\n", 1935198319Smav ATA_INL(ch->r_mem, AHCI_P_IS), ATA_INL(ch->r_mem, AHCI_P_CI), 1936198319Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1937224498Smav ATA_INL(ch->r_mem, AHCI_P_TFD), ATA_INL(ch->r_mem, AHCI_P_SERR), 1938224498Smav ATA_INL(ch->r_mem, AHCI_P_CMD)); 1939195534Sscottl 1940197838Smav /* Handle frozen command. */ 1941195534Sscottl if (ch->frozen) { 1942195534Sscottl union ccb *fccb = ch->frozen; 1943195534Sscottl ch->frozen = NULL; 1944195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1945198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1946198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1947198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1948198319Smav } 1949195534Sscottl xpt_done(fccb); 1950195534Sscottl } 1951224498Smav if (!ch->fbs_enabled && !ch->wrongccs) { 1952203873Smav /* Without FBS we know real timeout source. */ 1953203873Smav ch->fatalerr = 1; 1954203873Smav /* Handle command with timeout. */ 1955203873Smav ahci_end_transaction(&ch->slot[slot->slot], AHCI_ERR_TIMEOUT); 1956203873Smav /* Handle the rest of commands. */ 1957203873Smav for (i = 0; i < ch->numslots; i++) { 1958203873Smav /* Do we have a running request on slot? */ 1959203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1960203873Smav continue; 1961203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 1962203873Smav } 1963203873Smav } else { 1964203873Smav /* With FBS we wait for other commands timeout and pray. */ 1965203873Smav if (ch->toslots == 0) 1966203873Smav xpt_freeze_simq(ch->sim, 1); 1967203873Smav ch->toslots |= (1 << slot->slot); 1968203873Smav if ((ch->rslots & ~ch->toslots) == 0) 1969203873Smav ahci_process_timeout(dev); 1970203873Smav else 1971203873Smav device_printf(dev, " ... waiting for slots %08x\n", 1972203873Smav ch->rslots & ~ch->toslots); 1973195534Sscottl } 1974195534Sscottl} 1975195534Sscottl 1976195534Sscottl/* Must be called with channel locked. */ 1977195534Sscottlstatic void 1978195534Sscottlahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et) 1979195534Sscottl{ 1980195534Sscottl device_t dev = slot->dev; 1981195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1982195534Sscottl union ccb *ccb = slot->ccb; 1983214988Smav struct ahci_cmd_list *clp; 1984212732Smav int lastto; 1985222304Smav uint32_t sig; 1986195534Sscottl 1987195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1988214988Smav BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1989214988Smav clp = (struct ahci_cmd_list *) 1990214988Smav (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 1991195534Sscottl /* Read result registers to the result struct 1992195534Sscottl * May be incorrect if several commands finished same time, 1993195534Sscottl * so read only when sure or have to. 1994195534Sscottl */ 1995195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1996195534Sscottl struct ata_res *res = &ccb->ataio.res; 1997195534Sscottl 1998195534Sscottl if ((et == AHCI_ERR_TFE) || 1999195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 2000195534Sscottl u_int8_t *fis = ch->dma.rfis + 0x40; 2001195534Sscottl 2002195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 2003195534Sscottl BUS_DMASYNC_POSTREAD); 2004203123Smav if (ch->fbs_enabled) { 2005203123Smav fis += ccb->ccb_h.target_id * 256; 2006203123Smav res->status = fis[2]; 2007203123Smav res->error = fis[3]; 2008203123Smav } else { 2009203123Smav uint16_t tfd = ATA_INL(ch->r_mem, AHCI_P_TFD); 2010203123Smav 2011203123Smav res->status = tfd; 2012203123Smav res->error = tfd >> 8; 2013203123Smav } 2014195534Sscottl res->lba_low = fis[4]; 2015195534Sscottl res->lba_mid = fis[5]; 2016195534Sscottl res->lba_high = fis[6]; 2017195534Sscottl res->device = fis[7]; 2018195534Sscottl res->lba_low_exp = fis[8]; 2019195534Sscottl res->lba_mid_exp = fis[9]; 2020195534Sscottl res->lba_high_exp = fis[10]; 2021195534Sscottl res->sector_count = fis[12]; 2022195534Sscottl res->sector_count_exp = fis[13]; 2023222304Smav 2024222304Smav /* 2025222304Smav * Some weird controllers do not return signature in 2026222304Smav * FIS receive area. Read it from PxSIG register. 2027222304Smav */ 2028222304Smav if ((ch->quirks & AHCI_Q_ALTSIG) && 2029222304Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2030222304Smav (ccb->ataio.cmd.control & ATA_A_RESET) == 0) { 2031222304Smav sig = ATA_INL(ch->r_mem, AHCI_P_SIG); 2032222304Smav res->lba_high = sig >> 24; 2033222304Smav res->lba_mid = sig >> 16; 2034222304Smav res->lba_low = sig >> 8; 2035222304Smav res->sector_count = sig; 2036222304Smav } 2037195534Sscottl } else 2038195534Sscottl bzero(res, sizeof(*res)); 2039214988Smav if ((ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) == 0 && 2040218596Smav (ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2041218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2042214988Smav ccb->ataio.resid = 2043214988Smav ccb->ataio.dxfer_len - le32toh(clp->bytecount); 2044214988Smav } 2045214988Smav } else { 2046218596Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2047218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2048214988Smav ccb->csio.resid = 2049214988Smav ccb->csio.dxfer_len - le32toh(clp->bytecount); 2050214988Smav } 2051195534Sscottl } 2052195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 2053195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 2054195534Sscottl (ccb->ccb_h.flags & CAM_DIR_IN) ? 2055195534Sscottl BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2056195534Sscottl bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 2057195534Sscottl } 2058203123Smav if (et != AHCI_ERR_NONE) 2059203123Smav ch->eslots |= (1 << slot->slot); 2060198319Smav /* In case of error, freeze device for proper recovery. */ 2061220565Smav if ((et != AHCI_ERR_NONE) && (!ch->recoverycmd) && 2062198319Smav !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 2063198319Smav xpt_freeze_devq(ccb->ccb_h.path, 1); 2064198319Smav ccb->ccb_h.status |= CAM_DEV_QFRZN; 2065198319Smav } 2066195534Sscottl /* Set proper result status. */ 2067195534Sscottl ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2068195534Sscottl switch (et) { 2069195534Sscottl case AHCI_ERR_NONE: 2070195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP; 2071195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) 2072195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_OK; 2073195534Sscottl break; 2074195534Sscottl case AHCI_ERR_INVALID: 2075198851Smav ch->fatalerr = 1; 2076195534Sscottl ccb->ccb_h.status |= CAM_REQ_INVALID; 2077195534Sscottl break; 2078195534Sscottl case AHCI_ERR_INNOCENT: 2079195534Sscottl ccb->ccb_h.status |= CAM_REQUEUE_REQ; 2080195534Sscottl break; 2081195534Sscottl case AHCI_ERR_TFE: 2082198319Smav case AHCI_ERR_NCQ: 2083195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2084195534Sscottl ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 2085195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 2086195534Sscottl } else { 2087195534Sscottl ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 2088195534Sscottl } 2089195534Sscottl break; 2090195534Sscottl case AHCI_ERR_SATA: 2091198851Smav ch->fatalerr = 1; 2092220565Smav if (!ch->recoverycmd) { 2093198319Smav xpt_freeze_simq(ch->sim, 1); 2094198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2095198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2096198319Smav } 2097198319Smav ccb->ccb_h.status |= CAM_UNCOR_PARITY; 2098195534Sscottl break; 2099195534Sscottl case AHCI_ERR_TIMEOUT: 2100220565Smav if (!ch->recoverycmd) { 2101198319Smav xpt_freeze_simq(ch->sim, 1); 2102198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2103198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2104198319Smav } 2105195534Sscottl ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 2106195534Sscottl break; 2107195534Sscottl default: 2108198851Smav ch->fatalerr = 1; 2109195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 2110195534Sscottl } 2111195534Sscottl /* Free slot. */ 2112199747Smav ch->oslots &= ~(1 << slot->slot); 2113195534Sscottl ch->rslots &= ~(1 << slot->slot); 2114195534Sscottl ch->aslots &= ~(1 << slot->slot); 2115195534Sscottl slot->state = AHCI_SLOT_EMPTY; 2116195534Sscottl slot->ccb = NULL; 2117195534Sscottl /* Update channel stats. */ 2118195534Sscottl ch->numrslots--; 2119203123Smav ch->numrslotspd[ccb->ccb_h.target_id]--; 2120195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2121195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 2122195534Sscottl ch->numtslots--; 2123203123Smav ch->numtslotspd[ccb->ccb_h.target_id]--; 2124195534Sscottl } 2125212732Smav /* Cancel timeout state if request completed normally. */ 2126212732Smav if (et != AHCI_ERR_TIMEOUT) { 2127212732Smav lastto = (ch->toslots == (1 << slot->slot)); 2128212732Smav ch->toslots &= ~(1 << slot->slot); 2129212732Smav if (lastto) 2130212732Smav xpt_release_simq(ch->sim, TRUE); 2131212732Smav } 2132195534Sscottl /* If it was first request of reset sequence and there is no error, 2133195534Sscottl * proceed to second request. */ 2134195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2135195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2136195534Sscottl (ccb->ataio.cmd.control & ATA_A_RESET) && 2137195534Sscottl et == AHCI_ERR_NONE) { 2138195534Sscottl ccb->ataio.cmd.control &= ~ATA_A_RESET; 2139195534Sscottl ahci_begin_transaction(dev, ccb); 2140195534Sscottl return; 2141195534Sscottl } 2142198851Smav /* If it was our READ LOG command - process it. */ 2143220565Smav if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { 2144198851Smav ahci_process_read_log(dev, ccb); 2145220565Smav /* If it was our REQUEST SENSE command - process it. */ 2146220565Smav } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { 2147220565Smav ahci_process_request_sense(dev, ccb); 2148220565Smav /* If it was NCQ or ATAPI command error, put result on hold. */ 2149220565Smav } else if (et == AHCI_ERR_NCQ || 2150220565Smav ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && 2151220565Smav (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { 2152195534Sscottl ch->hold[slot->slot] = ccb; 2153203123Smav ch->numhslots++; 2154198851Smav } else 2155195534Sscottl xpt_done(ccb); 2156198851Smav /* If we have no other active commands, ... */ 2157198851Smav if (ch->rslots == 0) { 2158198851Smav /* if there was fatal error - reset port. */ 2159203873Smav if (ch->toslots != 0 || ch->fatalerr) { 2160198851Smav ahci_reset(dev); 2161203123Smav } else { 2162203123Smav /* if we have slots in error, we can reinit port. */ 2163203123Smav if (ch->eslots != 0) { 2164203123Smav ahci_stop(dev); 2165222285Smav ahci_clo(dev); 2166203123Smav ahci_start(dev, 1); 2167203123Smav } 2168203123Smav /* if there commands on hold, we can do READ LOG. */ 2169220565Smav if (!ch->recoverycmd && ch->numhslots) 2170220565Smav ahci_issue_recovery(dev); 2171198851Smav } 2172203873Smav /* If all the rest of commands are in timeout - give them chance. */ 2173203873Smav } else if ((ch->rslots & ~ch->toslots) == 0 && 2174203873Smav et != AHCI_ERR_TIMEOUT) 2175203873Smav ahci_rearm_timeout(dev); 2176222285Smav /* Unfreeze frozen command. */ 2177222285Smav if (ch->frozen && !ahci_check_collision(dev, ch->frozen)) { 2178222285Smav union ccb *fccb = ch->frozen; 2179222285Smav ch->frozen = NULL; 2180222285Smav ahci_begin_transaction(dev, fccb); 2181222285Smav xpt_release_simq(ch->sim, TRUE); 2182222285Smav } 2183196656Smav /* Start PM timer. */ 2184207499Smav if (ch->numrslots == 0 && ch->pm_level > 3 && 2185207499Smav (ch->curr[ch->pm_present ? 15 : 0].caps & CTS_SATA_CAPS_D_PMREQ)) { 2186196656Smav callout_schedule(&ch->pm_timer, 2187196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8); 2188196656Smav } 2189195534Sscottl} 2190195534Sscottl 2191195534Sscottlstatic void 2192220565Smavahci_issue_recovery(device_t dev) 2193195534Sscottl{ 2194195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2195195534Sscottl union ccb *ccb; 2196195534Sscottl struct ccb_ataio *ataio; 2197220565Smav struct ccb_scsiio *csio; 2198195534Sscottl int i; 2199195534Sscottl 2200220830Smav /* Find some held command. */ 2201195534Sscottl for (i = 0; i < ch->numslots; i++) { 2202195534Sscottl if (ch->hold[i]) 2203195534Sscottl break; 2204195534Sscottl } 2205195534Sscottl ccb = xpt_alloc_ccb_nowait(); 2206195534Sscottl if (ccb == NULL) { 2207220830Smav device_printf(dev, "Unable to allocate recovery command\n"); 2208220822Smavcompleteall: 2209220830Smav /* We can't do anything -- complete held commands. */ 2210220822Smav for (i = 0; i < ch->numslots; i++) { 2211220822Smav if (ch->hold[i] == NULL) 2212220822Smav continue; 2213220822Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2214220822Smav ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; 2215220822Smav xpt_done(ch->hold[i]); 2216220822Smav ch->hold[i] = NULL; 2217220822Smav ch->numhslots--; 2218220822Smav } 2219220822Smav ahci_reset(dev); 2220220822Smav return; 2221195534Sscottl } 2222195534Sscottl ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 2223220565Smav if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2224220565Smav /* READ LOG */ 2225220565Smav ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; 2226220565Smav ccb->ccb_h.func_code = XPT_ATA_IO; 2227220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2228220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2229220565Smav ataio = &ccb->ataio; 2230220565Smav ataio->data_ptr = malloc(512, M_AHCI, M_NOWAIT); 2231220565Smav if (ataio->data_ptr == NULL) { 2232220565Smav xpt_free_ccb(ccb); 2233220822Smav device_printf(dev, 2234220830Smav "Unable to allocate memory for READ LOG command\n"); 2235220822Smav goto completeall; 2236220565Smav } 2237220565Smav ataio->dxfer_len = 512; 2238220565Smav bzero(&ataio->cmd, sizeof(ataio->cmd)); 2239220565Smav ataio->cmd.flags = CAM_ATAIO_48BIT; 2240220565Smav ataio->cmd.command = 0x2F; /* READ LOG EXT */ 2241220565Smav ataio->cmd.sector_count = 1; 2242220565Smav ataio->cmd.sector_count_exp = 0; 2243220565Smav ataio->cmd.lba_low = 0x10; 2244220565Smav ataio->cmd.lba_mid = 0; 2245220565Smav ataio->cmd.lba_mid_exp = 0; 2246220565Smav } else { 2247220565Smav /* REQUEST SENSE */ 2248220565Smav ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; 2249220565Smav ccb->ccb_h.recovery_slot = i; 2250220565Smav ccb->ccb_h.func_code = XPT_SCSI_IO; 2251220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2252220565Smav ccb->ccb_h.status = 0; 2253220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2254220565Smav csio = &ccb->csio; 2255220565Smav csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; 2256220565Smav csio->dxfer_len = ch->hold[i]->csio.sense_len; 2257220565Smav csio->cdb_len = 6; 2258220565Smav bzero(&csio->cdb_io, sizeof(csio->cdb_io)); 2259220565Smav csio->cdb_io.cdb_bytes[0] = 0x03; 2260220565Smav csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; 2261195534Sscottl } 2262220565Smav /* Freeze SIM while doing recovery. */ 2263220822Smav ch->recoverycmd = 1; 2264198319Smav xpt_freeze_simq(ch->sim, 1); 2265195534Sscottl ahci_begin_transaction(dev, ccb); 2266195534Sscottl} 2267195534Sscottl 2268195534Sscottlstatic void 2269195534Sscottlahci_process_read_log(device_t dev, union ccb *ccb) 2270195534Sscottl{ 2271195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2272195534Sscottl uint8_t *data; 2273195534Sscottl struct ata_res *res; 2274195534Sscottl int i; 2275195534Sscottl 2276220565Smav ch->recoverycmd = 0; 2277195534Sscottl 2278195534Sscottl data = ccb->ataio.data_ptr; 2279195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 2280195534Sscottl (data[0] & 0x80) == 0) { 2281195534Sscottl for (i = 0; i < ch->numslots; i++) { 2282195534Sscottl if (!ch->hold[i]) 2283195534Sscottl continue; 2284220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2285220565Smav continue; 2286195534Sscottl if ((data[0] & 0x1F) == i) { 2287195534Sscottl res = &ch->hold[i]->ataio.res; 2288195534Sscottl res->status = data[2]; 2289195534Sscottl res->error = data[3]; 2290195534Sscottl res->lba_low = data[4]; 2291195534Sscottl res->lba_mid = data[5]; 2292195534Sscottl res->lba_high = data[6]; 2293195534Sscottl res->device = data[7]; 2294195534Sscottl res->lba_low_exp = data[8]; 2295195534Sscottl res->lba_mid_exp = data[9]; 2296195534Sscottl res->lba_high_exp = data[10]; 2297195534Sscottl res->sector_count = data[12]; 2298195534Sscottl res->sector_count_exp = data[13]; 2299195534Sscottl } else { 2300195534Sscottl ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2301195534Sscottl ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 2302195534Sscottl } 2303195534Sscottl xpt_done(ch->hold[i]); 2304195534Sscottl ch->hold[i] = NULL; 2305203123Smav ch->numhslots--; 2306195534Sscottl } 2307195534Sscottl } else { 2308195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 2309195534Sscottl device_printf(dev, "Error while READ LOG EXT\n"); 2310195534Sscottl else if ((data[0] & 0x80) == 0) { 2311195534Sscottl device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 2312195534Sscottl } 2313195534Sscottl for (i = 0; i < ch->numslots; i++) { 2314195534Sscottl if (!ch->hold[i]) 2315195534Sscottl continue; 2316220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2317220565Smav continue; 2318195534Sscottl xpt_done(ch->hold[i]); 2319195534Sscottl ch->hold[i] = NULL; 2320203123Smav ch->numhslots--; 2321195534Sscottl } 2322195534Sscottl } 2323195534Sscottl free(ccb->ataio.data_ptr, M_AHCI); 2324195534Sscottl xpt_free_ccb(ccb); 2325198319Smav xpt_release_simq(ch->sim, TRUE); 2326195534Sscottl} 2327195534Sscottl 2328195534Sscottlstatic void 2329220565Smavahci_process_request_sense(device_t dev, union ccb *ccb) 2330220565Smav{ 2331220565Smav struct ahci_channel *ch = device_get_softc(dev); 2332220565Smav int i; 2333220565Smav 2334220565Smav ch->recoverycmd = 0; 2335220565Smav 2336220565Smav i = ccb->ccb_h.recovery_slot; 2337220565Smav if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { 2338220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; 2339220565Smav } else { 2340220565Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2341220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; 2342220565Smav } 2343220565Smav xpt_done(ch->hold[i]); 2344220565Smav ch->hold[i] = NULL; 2345220565Smav ch->numhslots--; 2346220565Smav xpt_free_ccb(ccb); 2347220565Smav xpt_release_simq(ch->sim, TRUE); 2348220565Smav} 2349220565Smav 2350220565Smavstatic void 2351203123Smavahci_start(device_t dev, int fbs) 2352195534Sscottl{ 2353195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2354195534Sscottl u_int32_t cmd; 2355195534Sscottl 2356195534Sscottl /* Clear SATA error register */ 2357195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xFFFFFFFF); 2358195534Sscottl /* Clear any interrupts pending on this channel */ 2359195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, 0xFFFFFFFF); 2360203123Smav /* Configure FIS-based switching if supported. */ 2361203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) { 2362203123Smav ch->fbs_enabled = (fbs && ch->pm_present) ? 1 : 0; 2363203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, 2364203123Smav ch->fbs_enabled ? AHCI_P_FBS_EN : 0); 2365203123Smav } 2366195534Sscottl /* Start operations on this channel */ 2367195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2368207430Smav cmd &= ~AHCI_P_CMD_PMA; 2369195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_ST | 2370195534Sscottl (ch->pm_present ? AHCI_P_CMD_PMA : 0)); 2371195534Sscottl} 2372195534Sscottl 2373195534Sscottlstatic void 2374195534Sscottlahci_stop(device_t dev) 2375195534Sscottl{ 2376195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2377195534Sscottl u_int32_t cmd; 2378195534Sscottl int timeout; 2379195534Sscottl 2380195534Sscottl /* Kill all activity on this channel */ 2381195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2382195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST); 2383195534Sscottl /* Wait for activity stop. */ 2384195534Sscottl timeout = 0; 2385195534Sscottl do { 2386220777Smav DELAY(10); 2387220777Smav if (timeout++ > 50000) { 2388195534Sscottl device_printf(dev, "stopping AHCI engine failed\n"); 2389195534Sscottl break; 2390195534Sscottl } 2391195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CR); 2392203123Smav ch->eslots = 0; 2393195534Sscottl} 2394195534Sscottl 2395195534Sscottlstatic void 2396195534Sscottlahci_clo(device_t dev) 2397195534Sscottl{ 2398195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2399195534Sscottl u_int32_t cmd; 2400195534Sscottl int timeout; 2401195534Sscottl 2402195534Sscottl /* Issue Command List Override if supported */ 2403195534Sscottl if (ch->caps & AHCI_CAP_SCLO) { 2404195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2405195534Sscottl cmd |= AHCI_P_CMD_CLO; 2406195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd); 2407195534Sscottl timeout = 0; 2408195534Sscottl do { 2409220777Smav DELAY(10); 2410220777Smav if (timeout++ > 50000) { 2411195534Sscottl device_printf(dev, "executing CLO failed\n"); 2412195534Sscottl break; 2413195534Sscottl } 2414195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO); 2415195534Sscottl } 2416195534Sscottl} 2417195534Sscottl 2418195534Sscottlstatic void 2419195534Sscottlahci_stop_fr(device_t dev) 2420195534Sscottl{ 2421195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2422195534Sscottl u_int32_t cmd; 2423195534Sscottl int timeout; 2424195534Sscottl 2425195534Sscottl /* Kill all FIS reception on this channel */ 2426195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2427195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE); 2428195534Sscottl /* Wait for FIS reception stop. */ 2429195534Sscottl timeout = 0; 2430195534Sscottl do { 2431220777Smav DELAY(10); 2432220777Smav if (timeout++ > 50000) { 2433195534Sscottl device_printf(dev, "stopping AHCI FR engine failed\n"); 2434195534Sscottl break; 2435195534Sscottl } 2436195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR); 2437195534Sscottl} 2438195534Sscottl 2439195534Sscottlstatic void 2440195534Sscottlahci_start_fr(device_t dev) 2441195534Sscottl{ 2442195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2443195534Sscottl u_int32_t cmd; 2444195534Sscottl 2445195534Sscottl /* Start FIS reception on this channel */ 2446195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2447195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_FRE); 2448195534Sscottl} 2449195534Sscottl 2450195534Sscottlstatic int 2451220576Smavahci_wait_ready(device_t dev, int t, int t0) 2452195534Sscottl{ 2453195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2454195534Sscottl int timeout = 0; 2455195534Sscottl uint32_t val; 2456195534Sscottl 2457195534Sscottl while ((val = ATA_INL(ch->r_mem, AHCI_P_TFD)) & 2458195534Sscottl (ATA_S_BUSY | ATA_S_DRQ)) { 2459220576Smav if (timeout > t) { 2460220576Smav if (t != 0) { 2461220576Smav device_printf(dev, 2462220576Smav "AHCI reset: device not ready after %dms " 2463220576Smav "(tfd = %08x)\n", 2464220576Smav MAX(t, 0) + t0, val); 2465220576Smav } 2466195534Sscottl return (EBUSY); 2467195534Sscottl } 2468220576Smav DELAY(1000); 2469220576Smav timeout++; 2470220576Smav } 2471195534Sscottl if (bootverbose) 2472220576Smav device_printf(dev, "AHCI reset: device ready after %dms\n", 2473220576Smav timeout + t0); 2474195534Sscottl return (0); 2475195534Sscottl} 2476195534Sscottl 2477195534Sscottlstatic void 2478220576Smavahci_reset_to(void *arg) 2479220576Smav{ 2480220576Smav device_t dev = arg; 2481220576Smav struct ahci_channel *ch = device_get_softc(dev); 2482220576Smav 2483220576Smav if (ch->resetting == 0) 2484220576Smav return; 2485220576Smav ch->resetting--; 2486220576Smav if (ahci_wait_ready(dev, ch->resetting == 0 ? -1 : 0, 2487220576Smav (310 - ch->resetting) * 100) == 0) { 2488220576Smav ch->resetting = 0; 2489220777Smav ahci_start(dev, 1); 2490220576Smav xpt_release_simq(ch->sim, TRUE); 2491220576Smav return; 2492220576Smav } 2493220576Smav if (ch->resetting == 0) { 2494220576Smav ahci_clo(dev); 2495220576Smav ahci_start(dev, 1); 2496220576Smav xpt_release_simq(ch->sim, TRUE); 2497220576Smav return; 2498220576Smav } 2499220576Smav callout_schedule(&ch->reset_timer, hz / 10); 2500220576Smav} 2501220576Smav 2502220576Smavstatic void 2503195534Sscottlahci_reset(device_t dev) 2504195534Sscottl{ 2505195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2506196656Smav struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 2507195534Sscottl int i; 2508195534Sscottl 2509203108Smav xpt_freeze_simq(ch->sim, 1); 2510195534Sscottl if (bootverbose) 2511195534Sscottl device_printf(dev, "AHCI reset...\n"); 2512220576Smav /* Forget about previous reset. */ 2513220576Smav if (ch->resetting) { 2514220576Smav ch->resetting = 0; 2515220576Smav callout_stop(&ch->reset_timer); 2516220576Smav xpt_release_simq(ch->sim, TRUE); 2517220576Smav } 2518195534Sscottl /* Requeue freezed command. */ 2519195534Sscottl if (ch->frozen) { 2520195534Sscottl union ccb *fccb = ch->frozen; 2521195534Sscottl ch->frozen = NULL; 2522195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 2523198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 2524198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 2525198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 2526198319Smav } 2527195534Sscottl xpt_done(fccb); 2528195534Sscottl } 2529195534Sscottl /* Kill the engine and requeue all running commands. */ 2530195534Sscottl ahci_stop(dev); 2531195534Sscottl for (i = 0; i < ch->numslots; i++) { 2532195534Sscottl /* Do we have a running request on slot? */ 2533195534Sscottl if (ch->slot[i].state < AHCI_SLOT_RUNNING) 2534195534Sscottl continue; 2535195534Sscottl /* XXX; Commands in loading state. */ 2536195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 2537195534Sscottl } 2538198851Smav for (i = 0; i < ch->numslots; i++) { 2539198851Smav if (!ch->hold[i]) 2540198851Smav continue; 2541198851Smav xpt_done(ch->hold[i]); 2542198851Smav ch->hold[i] = NULL; 2543203123Smav ch->numhslots--; 2544198851Smav } 2545203873Smav if (ch->toslots != 0) 2546203873Smav xpt_release_simq(ch->sim, TRUE); 2547203123Smav ch->eslots = 0; 2548203873Smav ch->toslots = 0; 2549224498Smav ch->wrongccs = 0; 2550198851Smav ch->fatalerr = 0; 2551198319Smav /* Tell the XPT about the event */ 2552198319Smav xpt_async(AC_BUS_RESET, ch->path, NULL); 2553195534Sscottl /* Disable port interrupts */ 2554195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 2555195534Sscottl /* Reset and reconnect PHY, */ 2556203108Smav if (!ahci_sata_phy_reset(dev)) { 2557195534Sscottl if (bootverbose) 2558195534Sscottl device_printf(dev, 2559220576Smav "AHCI reset: device not found\n"); 2560195534Sscottl ch->devices = 0; 2561195534Sscottl /* Enable wanted port interrupts */ 2562195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2563220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2564220657Smav AHCI_P_IX_PRC | AHCI_P_IX_PC)); 2565203108Smav xpt_release_simq(ch->sim, TRUE); 2566195534Sscottl return; 2567195534Sscottl } 2568220576Smav if (bootverbose) 2569220576Smav device_printf(dev, "AHCI reset: device found\n"); 2570195534Sscottl /* Wait for clearing busy status. */ 2571220576Smav if (ahci_wait_ready(dev, dumping ? 31000 : 0, 0)) { 2572220576Smav if (dumping) 2573220576Smav ahci_clo(dev); 2574220576Smav else 2575220576Smav ch->resetting = 310; 2576220576Smav } 2577195534Sscottl ch->devices = 1; 2578195534Sscottl /* Enable wanted port interrupts */ 2579195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2580220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2581220657Smav AHCI_P_IX_TFE | AHCI_P_IX_HBF | 2582195534Sscottl AHCI_P_IX_HBD | AHCI_P_IX_IF | AHCI_P_IX_OF | 2583220657Smav ((ch->pm_level == 0) ? AHCI_P_IX_PRC : 0) | AHCI_P_IX_PC | 2584196656Smav AHCI_P_IX_DP | AHCI_P_IX_UF | (ctlr->ccc ? 0 : AHCI_P_IX_SDB) | 2585196656Smav AHCI_P_IX_DS | AHCI_P_IX_PS | (ctlr->ccc ? 0 : AHCI_P_IX_DHR))); 2586220576Smav if (ch->resetting) 2587220576Smav callout_reset(&ch->reset_timer, hz / 10, ahci_reset_to, dev); 2588220777Smav else { 2589220777Smav ahci_start(dev, 1); 2590220576Smav xpt_release_simq(ch->sim, TRUE); 2591220777Smav } 2592195534Sscottl} 2593195534Sscottl 2594195534Sscottlstatic int 2595199821Smavahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag) 2596195534Sscottl{ 2597199821Smav struct ahci_channel *ch = device_get_softc(dev); 2598195534Sscottl u_int8_t *fis = &ctp->cfis[0]; 2599195534Sscottl 2600195534Sscottl bzero(ctp->cfis, 64); 2601195534Sscottl fis[0] = 0x27; /* host to device */ 2602195534Sscottl fis[1] = (ccb->ccb_h.target_id & 0x0f); 2603195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2604195534Sscottl fis[1] |= 0x80; 2605195534Sscottl fis[2] = ATA_PACKET_CMD; 2606199821Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2607199821Smav ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 2608195534Sscottl fis[3] = ATA_F_DMA; 2609195534Sscottl else { 2610195534Sscottl fis[5] = ccb->csio.dxfer_len; 2611195534Sscottl fis[6] = ccb->csio.dxfer_len >> 8; 2612195534Sscottl } 2613195534Sscottl fis[7] = ATA_D_LBA; 2614195534Sscottl fis[15] = ATA_A_4BIT; 2615195534Sscottl bzero(ctp->acmd, 32); 2616195534Sscottl bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 2617195534Sscottl ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 2618195534Sscottl ctp->acmd, ccb->csio.cdb_len); 2619195534Sscottl } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 2620195534Sscottl fis[1] |= 0x80; 2621195534Sscottl fis[2] = ccb->ataio.cmd.command; 2622195534Sscottl fis[3] = ccb->ataio.cmd.features; 2623195534Sscottl fis[4] = ccb->ataio.cmd.lba_low; 2624195534Sscottl fis[5] = ccb->ataio.cmd.lba_mid; 2625195534Sscottl fis[6] = ccb->ataio.cmd.lba_high; 2626195534Sscottl fis[7] = ccb->ataio.cmd.device; 2627195534Sscottl fis[8] = ccb->ataio.cmd.lba_low_exp; 2628195534Sscottl fis[9] = ccb->ataio.cmd.lba_mid_exp; 2629195534Sscottl fis[10] = ccb->ataio.cmd.lba_high_exp; 2630195534Sscottl fis[11] = ccb->ataio.cmd.features_exp; 2631195534Sscottl if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 2632195534Sscottl fis[12] = tag << 3; 2633195534Sscottl fis[13] = 0; 2634195534Sscottl } else { 2635195534Sscottl fis[12] = ccb->ataio.cmd.sector_count; 2636195534Sscottl fis[13] = ccb->ataio.cmd.sector_count_exp; 2637195534Sscottl } 2638195534Sscottl fis[15] = ATA_A_4BIT; 2639195534Sscottl } else { 2640195534Sscottl fis[15] = ccb->ataio.cmd.control; 2641195534Sscottl } 2642195534Sscottl return (20); 2643195534Sscottl} 2644195534Sscottl 2645195534Sscottlstatic int 2646195534Sscottlahci_sata_connect(struct ahci_channel *ch) 2647195534Sscottl{ 2648195534Sscottl u_int32_t status; 2649220829Smav int timeout, found = 0; 2650195534Sscottl 2651195534Sscottl /* Wait up to 100ms for "connect well" */ 2652220777Smav for (timeout = 0; timeout < 1000 ; timeout++) { 2653195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 2654220829Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 2655220829Smav found = 1; 2656195534Sscottl if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 2657195534Sscottl ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 2658195534Sscottl ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 2659195534Sscottl break; 2660196656Smav if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 2661196656Smav if (bootverbose) { 2662196656Smav device_printf(ch->dev, "SATA offline status=%08x\n", 2663196656Smav status); 2664196656Smav } 2665196656Smav return (0); 2666196656Smav } 2667220829Smav if (found == 0 && timeout >= 100) 2668220829Smav break; 2669220777Smav DELAY(100); 2670195534Sscottl } 2671220829Smav if (timeout >= 1000 || !found) { 2672195534Sscottl if (bootverbose) { 2673220829Smav device_printf(ch->dev, 2674220829Smav "SATA connect timeout time=%dus status=%08x\n", 2675220829Smav timeout * 100, status); 2676195534Sscottl } 2677195534Sscottl return (0); 2678195534Sscottl } 2679195534Sscottl if (bootverbose) { 2680220777Smav device_printf(ch->dev, "SATA connect time=%dus status=%08x\n", 2681220777Smav timeout * 100, status); 2682195534Sscottl } 2683195534Sscottl /* Clear SATA error register */ 2684195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff); 2685195534Sscottl return (1); 2686195534Sscottl} 2687195534Sscottl 2688195534Sscottlstatic int 2689203108Smavahci_sata_phy_reset(device_t dev) 2690195534Sscottl{ 2691195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2692199821Smav int sata_rev; 2693195534Sscottl uint32_t val; 2694195534Sscottl 2695220657Smav if (ch->listening) { 2696220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2697220657Smav val |= AHCI_P_CMD_SUD; 2698220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2699220657Smav ch->listening = 0; 2700220657Smav } 2701199821Smav sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 2702199821Smav if (sata_rev == 1) 2703195534Sscottl val = ATA_SC_SPD_SPEED_GEN1; 2704199821Smav else if (sata_rev == 2) 2705195534Sscottl val = ATA_SC_SPD_SPEED_GEN2; 2706199821Smav else if (sata_rev == 3) 2707195534Sscottl val = ATA_SC_SPD_SPEED_GEN3; 2708195534Sscottl else 2709195534Sscottl val = 0; 2710195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2711196656Smav ATA_SC_DET_RESET | val | 2712196656Smav ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER); 2713220777Smav DELAY(1000); 2714196656Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2715195534Sscottl ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 2716195534Sscottl (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 2717203426Smav if (!ahci_sata_connect(ch)) { 2718220657Smav if (ch->caps & AHCI_CAP_SSS) { 2719220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2720220657Smav val &= ~AHCI_P_CMD_SUD; 2721220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2722220657Smav ch->listening = 1; 2723220657Smav } else if (ch->pm_level > 0) 2724203426Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 2725203426Smav return (0); 2726203426Smav } 2727203426Smav return (1); 2728195534Sscottl} 2729195534Sscottl 2730207430Smavstatic int 2731207430Smavahci_check_ids(device_t dev, union ccb *ccb) 2732207430Smav{ 2733207430Smav struct ahci_channel *ch = device_get_softc(dev); 2734207430Smav 2735207430Smav if (ccb->ccb_h.target_id > ((ch->caps & AHCI_CAP_SPM) ? 15 : 0)) { 2736207430Smav ccb->ccb_h.status = CAM_TID_INVALID; 2737207430Smav xpt_done(ccb); 2738207430Smav return (-1); 2739207430Smav } 2740207430Smav if (ccb->ccb_h.target_lun != 0) { 2741207430Smav ccb->ccb_h.status = CAM_LUN_INVALID; 2742207430Smav xpt_done(ccb); 2743207430Smav return (-1); 2744207430Smav } 2745207430Smav return (0); 2746207430Smav} 2747207430Smav 2748195534Sscottlstatic void 2749195534Sscottlahciaction(struct cam_sim *sim, union ccb *ccb) 2750195534Sscottl{ 2751210471Smav device_t dev, parent; 2752195534Sscottl struct ahci_channel *ch; 2753195534Sscottl 2754195534Sscottl CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahciaction func_code=%x\n", 2755195534Sscottl ccb->ccb_h.func_code)); 2756195534Sscottl 2757195534Sscottl ch = (struct ahci_channel *)cam_sim_softc(sim); 2758195534Sscottl dev = ch->dev; 2759195534Sscottl switch (ccb->ccb_h.func_code) { 2760195534Sscottl /* Common cases first */ 2761195534Sscottl case XPT_ATA_IO: /* Execute the requested I/O operation */ 2762195534Sscottl case XPT_SCSI_IO: 2763207430Smav if (ahci_check_ids(dev, ccb)) 2764207430Smav return; 2765207430Smav if (ch->devices == 0 || 2766207430Smav (ch->pm_present == 0 && 2767207430Smav ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 2768195534Sscottl ccb->ccb_h.status = CAM_SEL_TIMEOUT; 2769195534Sscottl break; 2770195534Sscottl } 2771220565Smav ccb->ccb_h.recovery_type = RECOVERY_NONE; 2772195534Sscottl /* Check for command collision. */ 2773195534Sscottl if (ahci_check_collision(dev, ccb)) { 2774195534Sscottl /* Freeze command. */ 2775195534Sscottl ch->frozen = ccb; 2776195534Sscottl /* We have only one frozen slot, so freeze simq also. */ 2777195534Sscottl xpt_freeze_simq(ch->sim, 1); 2778195534Sscottl return; 2779195534Sscottl } 2780195534Sscottl ahci_begin_transaction(dev, ccb); 2781207430Smav return; 2782195534Sscottl case XPT_EN_LUN: /* Enable LUN as a target */ 2783195534Sscottl case XPT_TARGET_IO: /* Execute target I/O request */ 2784195534Sscottl case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 2785195534Sscottl case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 2786195534Sscottl case XPT_ABORT: /* Abort the specified CCB */ 2787195534Sscottl /* XXX Implement */ 2788195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2789195534Sscottl break; 2790195534Sscottl case XPT_SET_TRAN_SETTINGS: 2791195534Sscottl { 2792195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2793199747Smav struct ahci_device *d; 2794195534Sscottl 2795207430Smav if (ahci_check_ids(dev, ccb)) 2796207430Smav return; 2797199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2798199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2799199747Smav else 2800199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2801199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 2802199747Smav d->revision = cts->xport_specific.sata.revision; 2803199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 2804199747Smav d->mode = cts->xport_specific.sata.mode; 2805199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 2806199747Smav d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 2807199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 2808199747Smav d->tags = min(ch->numslots, cts->xport_specific.sata.tags); 2809199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) 2810195534Sscottl ch->pm_present = cts->xport_specific.sata.pm_present; 2811203376Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI) 2812203376Smav d->atapi = cts->xport_specific.sata.atapi; 2813207499Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 2814207499Smav d->caps = cts->xport_specific.sata.caps; 2815195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2816195534Sscottl break; 2817195534Sscottl } 2818195534Sscottl case XPT_GET_TRAN_SETTINGS: 2819195534Sscottl /* Get default/user set transfer settings for the target */ 2820195534Sscottl { 2821195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2822199747Smav struct ahci_device *d; 2823195534Sscottl uint32_t status; 2824195534Sscottl 2825207430Smav if (ahci_check_ids(dev, ccb)) 2826207430Smav return; 2827199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2828199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2829199747Smav else 2830199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2831236666Smav cts->protocol = PROTO_UNSPECIFIED; 2832196656Smav cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 2833195534Sscottl cts->transport = XPORT_SATA; 2834196656Smav cts->transport_version = XPORT_VERSION_UNSPECIFIED; 2835195534Sscottl cts->proto_specific.valid = 0; 2836195534Sscottl cts->xport_specific.sata.valid = 0; 2837199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 2838199747Smav (ccb->ccb_h.target_id == 15 || 2839199747Smav (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 2840195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS) & ATA_SS_SPD_MASK; 2841199747Smav if (status & 0x0f0) { 2842199747Smav cts->xport_specific.sata.revision = 2843199747Smav (status & 0x0f0) >> 4; 2844199747Smav cts->xport_specific.sata.valid |= 2845199747Smav CTS_SATA_VALID_REVISION; 2846199747Smav } 2847207499Smav cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 2848207499Smav if (ch->pm_level) { 2849207499Smav if (ch->caps & (AHCI_CAP_PSC | AHCI_CAP_SSC)) 2850207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 2851207499Smav if (ch->caps2 & AHCI_CAP2_APST) 2852207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_APST; 2853207499Smav } 2854207499Smav if ((ch->caps & AHCI_CAP_SNCQ) && 2855207499Smav (ch->quirks & AHCI_Q_NOAA) == 0) 2856207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_DMAAA; 2857220602Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; 2858207499Smav cts->xport_specific.sata.caps &= 2859207499Smav ch->user[ccb->ccb_h.target_id].caps; 2860207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2861195534Sscottl } else { 2862199747Smav cts->xport_specific.sata.revision = d->revision; 2863199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 2864207499Smav cts->xport_specific.sata.caps = d->caps; 2865207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2866195534Sscottl } 2867199747Smav cts->xport_specific.sata.mode = d->mode; 2868199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 2869199747Smav cts->xport_specific.sata.bytecount = d->bytecount; 2870199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 2871199747Smav cts->xport_specific.sata.pm_present = ch->pm_present; 2872195534Sscottl cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 2873199747Smav cts->xport_specific.sata.tags = d->tags; 2874199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 2875203376Smav cts->xport_specific.sata.atapi = d->atapi; 2876203376Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 2877195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2878195534Sscottl break; 2879195534Sscottl } 2880195534Sscottl case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 2881195534Sscottl case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2882195534Sscottl ahci_reset(dev); 2883195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2884195534Sscottl break; 2885195534Sscottl case XPT_TERM_IO: /* Terminate the I/O process */ 2886195534Sscottl /* XXX Implement */ 2887195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2888195534Sscottl break; 2889195534Sscottl case XPT_PATH_INQ: /* Path routing inquiry */ 2890195534Sscottl { 2891195534Sscottl struct ccb_pathinq *cpi = &ccb->cpi; 2892195534Sscottl 2893210471Smav parent = device_get_parent(dev); 2894195534Sscottl cpi->version_num = 1; /* XXX??? */ 2895199278Smav cpi->hba_inquiry = PI_SDTR_ABLE; 2896199278Smav if (ch->caps & AHCI_CAP_SNCQ) 2897199278Smav cpi->hba_inquiry |= PI_TAG_ABLE; 2898195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2899195534Sscottl cpi->hba_inquiry |= PI_SATAPM; 2900195534Sscottl cpi->target_sprt = 0; 2901195534Sscottl cpi->hba_misc = PIM_SEQSCAN; 2902195534Sscottl cpi->hba_eng_cnt = 0; 2903195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2904198322Smav cpi->max_target = 15; 2905195534Sscottl else 2906195534Sscottl cpi->max_target = 0; 2907195534Sscottl cpi->max_lun = 0; 2908195534Sscottl cpi->initiator_id = 0; 2909195534Sscottl cpi->bus_id = cam_sim_bus(sim); 2910195534Sscottl cpi->base_transfer_speed = 150000; 2911195534Sscottl strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 2912195534Sscottl strncpy(cpi->hba_vid, "AHCI", HBA_IDLEN); 2913195534Sscottl strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 2914195534Sscottl cpi->unit_number = cam_sim_unit(sim); 2915195534Sscottl cpi->transport = XPORT_SATA; 2916196656Smav cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 2917236847Smav cpi->protocol = PROTO_ATA; 2918196656Smav cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 2919195534Sscottl cpi->maxio = MAXPHYS; 2920196777Smav /* ATI SB600 can't handle 256 sectors with FPDMA (NCQ). */ 2921210471Smav if (pci_get_devid(parent) == 0x43801002) 2922196796Smav cpi->maxio = min(cpi->maxio, 128 * 512); 2923210471Smav cpi->hba_vendor = pci_get_vendor(parent); 2924210471Smav cpi->hba_device = pci_get_device(parent); 2925210471Smav cpi->hba_subvendor = pci_get_subvendor(parent); 2926210471Smav cpi->hba_subdevice = pci_get_subdevice(parent); 2927195534Sscottl cpi->ccb_h.status = CAM_REQ_CMP; 2928195534Sscottl break; 2929195534Sscottl } 2930195534Sscottl default: 2931195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2932195534Sscottl break; 2933195534Sscottl } 2934207430Smav xpt_done(ccb); 2935195534Sscottl} 2936195534Sscottl 2937195534Sscottlstatic void 2938195534Sscottlahcipoll(struct cam_sim *sim) 2939195534Sscottl{ 2940195534Sscottl struct ahci_channel *ch = (struct ahci_channel *)cam_sim_softc(sim); 2941195534Sscottl 2942195534Sscottl ahci_ch_intr(ch->dev); 2943220789Smav if (ch->resetting != 0 && 2944220789Smav (--ch->resetpolldiv <= 0 || !callout_pending(&ch->reset_timer))) { 2945220789Smav ch->resetpolldiv = 1000; 2946220789Smav ahci_reset_to(ch->dev); 2947220789Smav } 2948195534Sscottl} 2949