ahci.c revision 200814
1195534Sscottl/*- 2195534Sscottl * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3195534Sscottl * All rights reserved. 4195534Sscottl * 5195534Sscottl * Redistribution and use in source and binary forms, with or without 6195534Sscottl * modification, are permitted provided that the following conditions 7195534Sscottl * are met: 8195534Sscottl * 1. Redistributions of source code must retain the above copyright 9195534Sscottl * notice, this list of conditions and the following disclaimer, 10195534Sscottl * without modification, immediately at the beginning of the file. 11195534Sscottl * 2. Redistributions in binary form must reproduce the above copyright 12195534Sscottl * notice, this list of conditions and the following disclaimer in the 13195534Sscottl * documentation and/or other materials provided with the distribution. 14195534Sscottl * 15195534Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16195534Sscottl * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17195534Sscottl * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18195534Sscottl * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19195534Sscottl * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20195534Sscottl * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21195534Sscottl * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22195534Sscottl * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23195534Sscottl * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24195534Sscottl * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25195534Sscottl */ 26195534Sscottl 27195534Sscottl#include <sys/cdefs.h> 28195534Sscottl__FBSDID("$FreeBSD: head/sys/dev/ahci/ahci.c 200814 2009-12-21 21:27:56Z mav $"); 29195534Sscottl 30195534Sscottl#include <sys/param.h> 31195534Sscottl#include <sys/module.h> 32195534Sscottl#include <sys/systm.h> 33195534Sscottl#include <sys/kernel.h> 34195534Sscottl#include <sys/ata.h> 35195534Sscottl#include <sys/bus.h> 36195534Sscottl#include <sys/endian.h> 37195534Sscottl#include <sys/malloc.h> 38195534Sscottl#include <sys/lock.h> 39195534Sscottl#include <sys/mutex.h> 40195534Sscottl#include <sys/sema.h> 41195534Sscottl#include <sys/taskqueue.h> 42195534Sscottl#include <vm/uma.h> 43195534Sscottl#include <machine/stdarg.h> 44195534Sscottl#include <machine/resource.h> 45195534Sscottl#include <machine/bus.h> 46195534Sscottl#include <sys/rman.h> 47195534Sscottl#include <dev/pci/pcivar.h> 48195534Sscottl#include <dev/pci/pcireg.h> 49195534Sscottl#include "ahci.h" 50195534Sscottl 51195534Sscottl#include <cam/cam.h> 52195534Sscottl#include <cam/cam_ccb.h> 53195534Sscottl#include <cam/cam_sim.h> 54195534Sscottl#include <cam/cam_xpt_sim.h> 55195534Sscottl#include <cam/cam_xpt_periph.h> 56195534Sscottl#include <cam/cam_debug.h> 57195534Sscottl 58195534Sscottl/* local prototypes */ 59195534Sscottlstatic int ahci_setup_interrupt(device_t dev); 60195534Sscottlstatic void ahci_intr(void *data); 61195534Sscottlstatic void ahci_intr_one(void *data); 62195534Sscottlstatic int ahci_suspend(device_t dev); 63195534Sscottlstatic int ahci_resume(device_t dev); 64195534Sscottlstatic int ahci_ch_suspend(device_t dev); 65195534Sscottlstatic int ahci_ch_resume(device_t dev); 66196656Smavstatic void ahci_ch_pm(void *arg); 67195534Sscottlstatic void ahci_ch_intr_locked(void *data); 68195534Sscottlstatic void ahci_ch_intr(void *data); 69195534Sscottlstatic int ahci_ctlr_reset(device_t dev); 70195534Sscottlstatic void ahci_begin_transaction(device_t dev, union ccb *ccb); 71195534Sscottlstatic void ahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 72195534Sscottlstatic void ahci_execute_transaction(struct ahci_slot *slot); 73195534Sscottlstatic void ahci_timeout(struct ahci_slot *slot); 74195534Sscottlstatic void ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et); 75199821Smavstatic int ahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag); 76195534Sscottlstatic void ahci_dmainit(device_t dev); 77195534Sscottlstatic void ahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 78195534Sscottlstatic void ahci_dmafini(device_t dev); 79195534Sscottlstatic void ahci_slotsalloc(device_t dev); 80195534Sscottlstatic void ahci_slotsfree(device_t dev); 81195534Sscottlstatic void ahci_reset(device_t dev); 82195534Sscottlstatic void ahci_start(device_t dev); 83195534Sscottlstatic void ahci_stop(device_t dev); 84195534Sscottlstatic void ahci_clo(device_t dev); 85195534Sscottlstatic void ahci_start_fr(device_t dev); 86195534Sscottlstatic void ahci_stop_fr(device_t dev); 87195534Sscottl 88195534Sscottlstatic int ahci_sata_connect(struct ahci_channel *ch); 89195534Sscottlstatic int ahci_sata_phy_reset(device_t dev, int quick); 90195534Sscottl 91195534Sscottlstatic void ahci_issue_read_log(device_t dev); 92195534Sscottlstatic void ahci_process_read_log(device_t dev, union ccb *ccb); 93195534Sscottl 94195534Sscottlstatic void ahciaction(struct cam_sim *sim, union ccb *ccb); 95195534Sscottlstatic void ahcipoll(struct cam_sim *sim); 96195534Sscottl 97195534SscottlMALLOC_DEFINE(M_AHCI, "AHCI driver", "AHCI driver data buffers"); 98195534Sscottl 99199176Smavstatic struct { 100199176Smav uint32_t id; 101199176Smav const char *name; 102199322Smav int quirks; 103199322Smav#define AHCI_Q_NOFORCE 1 104199322Smav#define AHCI_Q_NOPMP 2 105199322Smav#define AHCI_Q_NONCQ 4 106199322Smav#define AHCI_Q_1CH 8 107199322Smav#define AHCI_Q_2CH 16 108199322Smav#define AHCI_Q_4CH 32 109199322Smav#define AHCI_Q_EDGEIS 64 110199176Smav} ahci_ids[] = { 111199176Smav {0x43801002, "ATI IXP600", 0}, 112199176Smav {0x43901002, "ATI IXP700", 0}, 113199176Smav {0x43911002, "ATI IXP700", 0}, 114199176Smav {0x43921002, "ATI IXP700", 0}, 115199176Smav {0x43931002, "ATI IXP700", 0}, 116199176Smav {0x43941002, "ATI IXP800", 0}, 117199176Smav {0x43951002, "ATI IXP800", 0}, 118199176Smav {0x26528086, "Intel ICH6", 0}, 119199176Smav {0x26538086, "Intel ICH6M", 0}, 120199176Smav {0x26818086, "Intel ESB2", 0}, 121199176Smav {0x26828086, "Intel ESB2", 0}, 122199176Smav {0x26838086, "Intel ESB2", 0}, 123199176Smav {0x27c18086, "Intel ICH7", 0}, 124199176Smav {0x27c38086, "Intel ICH7", 0}, 125199176Smav {0x27c58086, "Intel ICH7M", 0}, 126199176Smav {0x27c68086, "Intel ICH7M", 0}, 127199176Smav {0x28218086, "Intel ICH8", 0}, 128199176Smav {0x28228086, "Intel ICH8", 0}, 129199176Smav {0x28248086, "Intel ICH8", 0}, 130199176Smav {0x28298086, "Intel ICH8M", 0}, 131199176Smav {0x282a8086, "Intel ICH8M", 0}, 132199176Smav {0x29228086, "Intel ICH9", 0}, 133199176Smav {0x29238086, "Intel ICH9", 0}, 134199176Smav {0x29248086, "Intel ICH9", 0}, 135199176Smav {0x29258086, "Intel ICH9", 0}, 136199176Smav {0x29278086, "Intel ICH9", 0}, 137199176Smav {0x29298086, "Intel ICH9M", 0}, 138199176Smav {0x292a8086, "Intel ICH9M", 0}, 139199176Smav {0x292b8086, "Intel ICH9M", 0}, 140199176Smav {0x292c8086, "Intel ICH9M", 0}, 141199176Smav {0x292f8086, "Intel ICH9M", 0}, 142199176Smav {0x294d8086, "Intel ICH9", 0}, 143199176Smav {0x294e8086, "Intel ICH9M", 0}, 144199176Smav {0x3a058086, "Intel ICH10", 0}, 145199176Smav {0x3a228086, "Intel ICH10", 0}, 146199176Smav {0x3a258086, "Intel ICH10", 0}, 147199176Smav {0x3b228086, "Intel PCH", 0}, 148199176Smav {0x3b238086, "Intel PCH", 0}, 149199176Smav {0x3b248086, "Intel PCH", 0}, 150199176Smav {0x3b258086, "Intel PCH", 0}, 151199176Smav {0x3b298086, "Intel PCH", 0}, 152199176Smav {0x3b2b8086, "Intel PCH", 0}, 153199176Smav {0x3b2c8086, "Intel PCH", 0}, 154199176Smav {0x3b2f8086, "Intel PCH", 0}, 155199322Smav {0x2361197b, "JMicron JMB361", AHCI_Q_NOFORCE}, 156199322Smav {0x2363197b, "JMicron JMB363", AHCI_Q_NOFORCE}, 157199322Smav {0x2365197b, "JMicron JMB365", AHCI_Q_NOFORCE}, 158199322Smav {0x2366197b, "JMicron JMB366", AHCI_Q_NOFORCE}, 159199322Smav {0x2368197b, "JMicron JMB368", AHCI_Q_NOFORCE}, 160199322Smav {0x611111ab, "Marvell 88SX6111", AHCI_Q_NOFORCE|AHCI_Q_1CH|AHCI_Q_EDGEIS}, 161199322Smav {0x612111ab, "Marvell 88SX6121", AHCI_Q_NOFORCE|AHCI_Q_2CH|AHCI_Q_EDGEIS}, 162199322Smav {0x614111ab, "Marvell 88SX6141", AHCI_Q_NOFORCE|AHCI_Q_4CH|AHCI_Q_EDGEIS}, 163199322Smav {0x614511ab, "Marvell 88SX6145", AHCI_Q_NOFORCE|AHCI_Q_4CH|AHCI_Q_EDGEIS}, 164199176Smav {0x044c10de, "NVIDIA MCP65", 0}, 165199176Smav {0x044d10de, "NVIDIA MCP65", 0}, 166199176Smav {0x044e10de, "NVIDIA MCP65", 0}, 167199176Smav {0x044f10de, "NVIDIA MCP65", 0}, 168199176Smav {0x045c10de, "NVIDIA MCP65", 0}, 169199176Smav {0x045d10de, "NVIDIA MCP65", 0}, 170199176Smav {0x045e10de, "NVIDIA MCP65", 0}, 171199176Smav {0x045f10de, "NVIDIA MCP65", 0}, 172199176Smav {0x055010de, "NVIDIA MCP67", 0}, 173199176Smav {0x055110de, "NVIDIA MCP67", 0}, 174199176Smav {0x055210de, "NVIDIA MCP67", 0}, 175199176Smav {0x055310de, "NVIDIA MCP67", 0}, 176199176Smav {0x055410de, "NVIDIA MCP67", 0}, 177199176Smav {0x055510de, "NVIDIA MCP67", 0}, 178199176Smav {0x055610de, "NVIDIA MCP67", 0}, 179199176Smav {0x055710de, "NVIDIA MCP67", 0}, 180199176Smav {0x055810de, "NVIDIA MCP67", 0}, 181199176Smav {0x055910de, "NVIDIA MCP67", 0}, 182199176Smav {0x055A10de, "NVIDIA MCP67", 0}, 183199176Smav {0x055B10de, "NVIDIA MCP67", 0}, 184199176Smav {0x058410de, "NVIDIA MCP67", 0}, 185199176Smav {0x07f010de, "NVIDIA MCP73", 0}, 186199176Smav {0x07f110de, "NVIDIA MCP73", 0}, 187199176Smav {0x07f210de, "NVIDIA MCP73", 0}, 188199176Smav {0x07f310de, "NVIDIA MCP73", 0}, 189199176Smav {0x07f410de, "NVIDIA MCP73", 0}, 190199176Smav {0x07f510de, "NVIDIA MCP73", 0}, 191199176Smav {0x07f610de, "NVIDIA MCP73", 0}, 192199176Smav {0x07f710de, "NVIDIA MCP73", 0}, 193199176Smav {0x07f810de, "NVIDIA MCP73", 0}, 194199176Smav {0x07f910de, "NVIDIA MCP73", 0}, 195199176Smav {0x07fa10de, "NVIDIA MCP73", 0}, 196199176Smav {0x07fb10de, "NVIDIA MCP73", 0}, 197199176Smav {0x0ad010de, "NVIDIA MCP77", 0}, 198199176Smav {0x0ad110de, "NVIDIA MCP77", 0}, 199199176Smav {0x0ad210de, "NVIDIA MCP77", 0}, 200199176Smav {0x0ad310de, "NVIDIA MCP77", 0}, 201199176Smav {0x0ad410de, "NVIDIA MCP77", 0}, 202199176Smav {0x0ad510de, "NVIDIA MCP77", 0}, 203199176Smav {0x0ad610de, "NVIDIA MCP77", 0}, 204199176Smav {0x0ad710de, "NVIDIA MCP77", 0}, 205199176Smav {0x0ad810de, "NVIDIA MCP77", 0}, 206199176Smav {0x0ad910de, "NVIDIA MCP77", 0}, 207199176Smav {0x0ada10de, "NVIDIA MCP77", 0}, 208199176Smav {0x0adb10de, "NVIDIA MCP77", 0}, 209199176Smav {0x0ab410de, "NVIDIA MCP79", 0}, 210199176Smav {0x0ab510de, "NVIDIA MCP79", 0}, 211199176Smav {0x0ab610de, "NVIDIA MCP79", 0}, 212199176Smav {0x0ab710de, "NVIDIA MCP79", 0}, 213199176Smav {0x0ab810de, "NVIDIA MCP79", 0}, 214199176Smav {0x0ab910de, "NVIDIA MCP79", 0}, 215199176Smav {0x0aba10de, "NVIDIA MCP79", 0}, 216199176Smav {0x0abb10de, "NVIDIA MCP79", 0}, 217199176Smav {0x0abc10de, "NVIDIA MCP79", 0}, 218199176Smav {0x0abd10de, "NVIDIA MCP79", 0}, 219199176Smav {0x0abe10de, "NVIDIA MCP79", 0}, 220199176Smav {0x0abf10de, "NVIDIA MCP79", 0}, 221199176Smav {0x0d8410de, "NVIDIA MCP89", 0}, 222199176Smav {0x0d8510de, "NVIDIA MCP89", 0}, 223199176Smav {0x0d8610de, "NVIDIA MCP89", 0}, 224199176Smav {0x0d8710de, "NVIDIA MCP89", 0}, 225199176Smav {0x0d8810de, "NVIDIA MCP89", 0}, 226199176Smav {0x0d8910de, "NVIDIA MCP89", 0}, 227199176Smav {0x0d8a10de, "NVIDIA MCP89", 0}, 228199176Smav {0x0d8b10de, "NVIDIA MCP89", 0}, 229199176Smav {0x0d8c10de, "NVIDIA MCP89", 0}, 230199176Smav {0x0d8d10de, "NVIDIA MCP89", 0}, 231199176Smav {0x0d8e10de, "NVIDIA MCP89", 0}, 232199176Smav {0x0d8f10de, "NVIDIA MCP89", 0}, 233199176Smav {0x33491106, "VIA VT8251", 0}, 234199176Smav {0x62871106, "VIA VT8251", 0}, 235199176Smav {0x11841039, "SiS 966", 0}, 236199176Smav {0x11851039, "SiS 968", 0}, 237199176Smav {0x01861039, "SiS 968", 0}, 238199176Smav {0, NULL, 0} 239199176Smav}; 240199176Smav 241195534Sscottlstatic int 242195534Sscottlahci_probe(device_t dev) 243195534Sscottl{ 244199176Smav char buf[64]; 245199322Smav int i, valid = 0; 246199322Smav uint32_t devid = pci_get_devid(dev); 247199322Smav 248199322Smav /* Is this a possible AHCI candidate? */ 249199322Smav if (pci_get_class(dev) == PCIC_STORAGE && 250199322Smav pci_get_subclass(dev) == PCIS_STORAGE_SATA && 251199322Smav pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0) 252199322Smav valid = 1; 253199322Smav /* Is this a known AHCI chip? */ 254199322Smav for (i = 0; ahci_ids[i].id != 0; i++) { 255199322Smav if (ahci_ids[i].id == devid && 256199322Smav (valid || !(ahci_ids[i].quirks & AHCI_Q_NOFORCE))) { 257199717Smav /* Do not attach JMicrons with single PCI function. */ 258199717Smav if (pci_get_vendor(dev) == 0x197b && 259199717Smav (pci_read_config(dev, 0xdf, 1) & 0x40) == 0) 260199717Smav return (ENXIO); 261199322Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 262199322Smav ahci_ids[i].name); 263199322Smav device_set_desc_copy(dev, buf); 264199322Smav return (BUS_PROBE_VENDOR); 265199322Smav } 266199322Smav } 267199322Smav if (!valid) 268199322Smav return (ENXIO); 269199322Smav device_set_desc_copy(dev, "AHCI SATA controller"); 270199322Smav return (BUS_PROBE_VENDOR); 271199322Smav} 272199322Smav 273199322Smavstatic int 274199322Smavahci_ata_probe(device_t dev) 275199322Smav{ 276199322Smav char buf[64]; 277199176Smav int i; 278199176Smav uint32_t devid = pci_get_devid(dev); 279195534Sscottl 280199322Smav if ((intptr_t)device_get_ivars(dev) >= 0) 281199322Smav return (ENXIO); 282199176Smav /* Is this a known AHCI chip? */ 283199176Smav for (i = 0; ahci_ids[i].id != 0; i++) { 284199176Smav if (ahci_ids[i].id == devid) { 285199176Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 286199176Smav ahci_ids[i].name); 287199176Smav device_set_desc_copy(dev, buf); 288199176Smav return (BUS_PROBE_VENDOR); 289199176Smav } 290199176Smav } 291199176Smav device_set_desc_copy(dev, "AHCI SATA controller"); 292195534Sscottl return (BUS_PROBE_VENDOR); 293195534Sscottl} 294195534Sscottl 295195534Sscottlstatic int 296195534Sscottlahci_attach(device_t dev) 297195534Sscottl{ 298195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 299195534Sscottl device_t child; 300199322Smav int error, unit, speed, i; 301199322Smav uint32_t devid = pci_get_devid(dev); 302196656Smav u_int32_t version; 303195534Sscottl 304195534Sscottl ctlr->dev = dev; 305199322Smav i = 0; 306199322Smav while (ahci_ids[i].id != 0 && ahci_ids[i].id != devid) 307199322Smav i++; 308199322Smav ctlr->quirks = ahci_ids[i].quirks; 309196656Smav resource_int_value(device_get_name(dev), 310196656Smav device_get_unit(dev), "ccc", &ctlr->ccc); 311195534Sscottl /* if we have a memory BAR(5) we are likely on an AHCI part */ 312195534Sscottl ctlr->r_rid = PCIR_BAR(5); 313195534Sscottl if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 314195534Sscottl &ctlr->r_rid, RF_ACTIVE))) 315195534Sscottl return ENXIO; 316195534Sscottl /* Setup our own memory management for channels. */ 317195534Sscottl ctlr->sc_iomem.rm_type = RMAN_ARRAY; 318195534Sscottl ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 319195534Sscottl if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 320195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 321195534Sscottl return (error); 322195534Sscottl } 323195534Sscottl if ((error = rman_manage_region(&ctlr->sc_iomem, 324195534Sscottl rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 325195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 326195534Sscottl rman_fini(&ctlr->sc_iomem); 327195534Sscottl return (error); 328195534Sscottl } 329195534Sscottl /* Reset controller */ 330195534Sscottl if ((error = ahci_ctlr_reset(dev)) != 0) { 331195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 332195534Sscottl rman_fini(&ctlr->sc_iomem); 333195534Sscottl return (error); 334195534Sscottl }; 335199322Smav /* Get the HW capabilities */ 336199322Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 337199322Smav ctlr->caps = ATA_INL(ctlr->r_mem, AHCI_CAP); 338199322Smav if (version >= 0x00010020) 339199322Smav ctlr->caps2 = ATA_INL(ctlr->r_mem, AHCI_CAP2); 340195534Sscottl ctlr->ichannels = ATA_INL(ctlr->r_mem, AHCI_PI); 341199322Smav if (ctlr->quirks & AHCI_Q_1CH) { 342199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 343199322Smav ctlr->ichannels &= 0x01; 344199322Smav } 345199322Smav if (ctlr->quirks & AHCI_Q_2CH) { 346199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 347199322Smav ctlr->caps |= 1; 348199322Smav ctlr->ichannels &= 0x03; 349199322Smav } 350199322Smav if (ctlr->quirks & AHCI_Q_4CH) { 351199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 352199322Smav ctlr->caps |= 3; 353199322Smav ctlr->ichannels &= 0x0f; 354199322Smav } 355195534Sscottl ctlr->channels = MAX(flsl(ctlr->ichannels), 356199322Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 357199322Smav if (ctlr->quirks & AHCI_Q_NOPMP) 358199322Smav ctlr->caps &= ~AHCI_CAP_SPM; 359199322Smav if (ctlr->quirks & AHCI_Q_NONCQ) 360199322Smav ctlr->caps &= ~AHCI_CAP_SNCQ; 361195534Sscottl /* Setup interrupts. */ 362195534Sscottl if (ahci_setup_interrupt(dev)) { 363195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 364195534Sscottl rman_fini(&ctlr->sc_iomem); 365195534Sscottl return ENXIO; 366195534Sscottl } 367195534Sscottl /* Announce HW capabilities. */ 368196656Smav speed = (ctlr->caps & AHCI_CAP_ISS) >> AHCI_CAP_ISS_SHIFT; 369195534Sscottl device_printf(dev, 370195534Sscottl "AHCI v%x.%02x with %d %sGbps ports, Port Multiplier %s\n", 371195534Sscottl ((version >> 20) & 0xf0) + ((version >> 16) & 0x0f), 372195534Sscottl ((version >> 4) & 0xf0) + (version & 0x0f), 373196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1, 374195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 375195534Sscottl ((speed == 3) ? "6":"?"))), 376196656Smav (ctlr->caps & AHCI_CAP_SPM) ? 377195534Sscottl "supported" : "not supported"); 378195534Sscottl if (bootverbose) { 379195534Sscottl device_printf(dev, "Caps:%s%s%s%s%s%s%s%s %sGbps", 380196656Smav (ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"", 381196656Smav (ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"", 382196656Smav (ctlr->caps & AHCI_CAP_SSNTF) ? " SNTF":"", 383196656Smav (ctlr->caps & AHCI_CAP_SMPS) ? " MPS":"", 384196656Smav (ctlr->caps & AHCI_CAP_SSS) ? " SS":"", 385196656Smav (ctlr->caps & AHCI_CAP_SALP) ? " ALP":"", 386196656Smav (ctlr->caps & AHCI_CAP_SAL) ? " AL":"", 387196656Smav (ctlr->caps & AHCI_CAP_SCLO) ? " CLO":"", 388195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 389195534Sscottl ((speed == 3) ? "6":"?")))); 390195534Sscottl printf("%s%s%s%s%s%s %dcmd%s%s%s %dports\n", 391196656Smav (ctlr->caps & AHCI_CAP_SAM) ? " AM":"", 392196656Smav (ctlr->caps & AHCI_CAP_SPM) ? " PM":"", 393196656Smav (ctlr->caps & AHCI_CAP_FBSS) ? " FBS":"", 394196656Smav (ctlr->caps & AHCI_CAP_PMD) ? " PMD":"", 395196656Smav (ctlr->caps & AHCI_CAP_SSC) ? " SSC":"", 396196656Smav (ctlr->caps & AHCI_CAP_PSC) ? " PSC":"", 397196656Smav ((ctlr->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, 398196656Smav (ctlr->caps & AHCI_CAP_CCCS) ? " CCC":"", 399196656Smav (ctlr->caps & AHCI_CAP_EMS) ? " EM":"", 400196656Smav (ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"", 401196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 402195534Sscottl } 403196656Smav if (bootverbose && version >= 0x00010020) { 404196656Smav device_printf(dev, "Caps2:%s%s%s\n", 405196656Smav (ctlr->caps2 & AHCI_CAP2_APST) ? " APST":"", 406196656Smav (ctlr->caps2 & AHCI_CAP2_NVMP) ? " NVMP":"", 407196656Smav (ctlr->caps2 & AHCI_CAP2_BOH) ? " BOH":""); 408196656Smav } 409195534Sscottl /* Attach all channels on this controller */ 410195534Sscottl for (unit = 0; unit < ctlr->channels; unit++) { 411195534Sscottl if ((ctlr->ichannels & (1 << unit)) == 0) 412195534Sscottl continue; 413195534Sscottl child = device_add_child(dev, "ahcich", -1); 414195534Sscottl if (child == NULL) 415195534Sscottl device_printf(dev, "failed to add channel device\n"); 416195534Sscottl else 417195534Sscottl device_set_ivars(child, (void *)(intptr_t)unit); 418195534Sscottl } 419195534Sscottl bus_generic_attach(dev); 420195534Sscottl return 0; 421195534Sscottl} 422195534Sscottl 423195534Sscottlstatic int 424195534Sscottlahci_detach(device_t dev) 425195534Sscottl{ 426195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 427195534Sscottl device_t *children; 428195534Sscottl int nchildren, i; 429195534Sscottl 430195534Sscottl /* Detach & delete all children */ 431195534Sscottl if (!device_get_children(dev, &children, &nchildren)) { 432195534Sscottl for (i = 0; i < nchildren; i++) 433195534Sscottl device_delete_child(dev, children[i]); 434195534Sscottl free(children, M_TEMP); 435195534Sscottl } 436195534Sscottl /* Free interrupts. */ 437195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 438195534Sscottl if (ctlr->irqs[i].r_irq) { 439195534Sscottl bus_teardown_intr(dev, ctlr->irqs[i].r_irq, 440195534Sscottl ctlr->irqs[i].handle); 441195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, 442195534Sscottl ctlr->irqs[i].r_irq_rid, ctlr->irqs[i].r_irq); 443195534Sscottl } 444195534Sscottl } 445195534Sscottl pci_release_msi(dev); 446195534Sscottl /* Free memory. */ 447195534Sscottl rman_fini(&ctlr->sc_iomem); 448195534Sscottl if (ctlr->r_mem) 449195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 450195534Sscottl return (0); 451195534Sscottl} 452195534Sscottl 453195534Sscottlstatic int 454195534Sscottlahci_ctlr_reset(device_t dev) 455195534Sscottl{ 456195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 457195534Sscottl int timeout; 458195534Sscottl 459195534Sscottl if (pci_read_config(dev, 0x00, 4) == 0x28298086 && 460195534Sscottl (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04) 461195534Sscottl pci_write_config(dev, 0x92, 0x01, 1); 462195534Sscottl /* Enable AHCI mode */ 463195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 464195534Sscottl /* Reset AHCI controller */ 465195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE|AHCI_GHC_HR); 466195534Sscottl for (timeout = 1000; timeout > 0; timeout--) { 467195534Sscottl DELAY(1000); 468195534Sscottl if ((ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_HR) == 0) 469195534Sscottl break; 470195534Sscottl } 471195534Sscottl if (timeout == 0) { 472195534Sscottl device_printf(dev, "AHCI controller reset failure\n"); 473195534Sscottl return ENXIO; 474195534Sscottl } 475195534Sscottl /* Reenable AHCI mode */ 476195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 477195534Sscottl /* Clear interrupts */ 478195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_IS, ATA_INL(ctlr->r_mem, AHCI_IS)); 479196656Smav /* Configure CCC */ 480196656Smav if (ctlr->ccc) { 481196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCP, ATA_INL(ctlr->r_mem, AHCI_PI)); 482196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCC, 483196656Smav (ctlr->ccc << AHCI_CCCC_TV_SHIFT) | 484196656Smav (4 << AHCI_CCCC_CC_SHIFT) | 485196656Smav AHCI_CCCC_EN); 486196656Smav ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) & 487196656Smav AHCI_CCCC_INT_MASK) >> AHCI_CCCC_INT_SHIFT; 488196656Smav if (bootverbose) { 489196656Smav device_printf(dev, 490196656Smav "CCC with %dms/4cmd enabled on vector %d\n", 491196656Smav ctlr->ccc, ctlr->cccv); 492196656Smav } 493196656Smav } 494195534Sscottl /* Enable AHCI interrupts */ 495195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 496195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) | AHCI_GHC_IE); 497195534Sscottl return (0); 498195534Sscottl} 499195534Sscottl 500195534Sscottlstatic int 501195534Sscottlahci_suspend(device_t dev) 502195534Sscottl{ 503195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 504195534Sscottl 505195534Sscottl bus_generic_suspend(dev); 506195534Sscottl /* Disable interupts, so the state change(s) doesn't trigger */ 507195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 508195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE)); 509195534Sscottl return 0; 510195534Sscottl} 511195534Sscottl 512195534Sscottlstatic int 513195534Sscottlahci_resume(device_t dev) 514195534Sscottl{ 515195534Sscottl int res; 516195534Sscottl 517195534Sscottl if ((res = ahci_ctlr_reset(dev)) != 0) 518195534Sscottl return (res); 519195534Sscottl return (bus_generic_resume(dev)); 520195534Sscottl} 521195534Sscottl 522195534Sscottlstatic int 523195534Sscottlahci_setup_interrupt(device_t dev) 524195534Sscottl{ 525195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 526195534Sscottl int i, msi = 1; 527195534Sscottl 528195534Sscottl /* Process hints. */ 529195534Sscottl resource_int_value(device_get_name(dev), 530195534Sscottl device_get_unit(dev), "msi", &msi); 531195534Sscottl if (msi < 0) 532195534Sscottl msi = 0; 533195534Sscottl else if (msi == 1) 534195534Sscottl msi = min(1, pci_msi_count(dev)); 535195534Sscottl else if (msi > 1) 536195534Sscottl msi = pci_msi_count(dev); 537195534Sscottl /* Allocate MSI if needed/present. */ 538195534Sscottl if (msi && pci_alloc_msi(dev, &msi) == 0) { 539195534Sscottl ctlr->numirqs = msi; 540195534Sscottl } else { 541195534Sscottl msi = 0; 542195534Sscottl ctlr->numirqs = 1; 543195534Sscottl } 544195534Sscottl /* Check for single MSI vector fallback. */ 545195534Sscottl if (ctlr->numirqs > 1 && 546195534Sscottl (ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_MRSM) != 0) { 547195534Sscottl device_printf(dev, "Falling back to one MSI\n"); 548195534Sscottl ctlr->numirqs = 1; 549195534Sscottl } 550195534Sscottl /* Allocate all IRQs. */ 551195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 552195534Sscottl ctlr->irqs[i].ctlr = ctlr; 553195534Sscottl ctlr->irqs[i].r_irq_rid = i + (msi ? 1 : 0); 554196656Smav if (ctlr->numirqs == 1 || i >= ctlr->channels || 555196656Smav (ctlr->ccc && i == ctlr->cccv)) 556195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ALL; 557195534Sscottl else if (i == ctlr->numirqs - 1) 558195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_AFTER; 559195534Sscottl else 560195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ONE; 561195534Sscottl if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 562195534Sscottl &ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 563195534Sscottl device_printf(dev, "unable to map interrupt\n"); 564195534Sscottl return ENXIO; 565195534Sscottl } 566195534Sscottl if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL, 567195534Sscottl (ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE) ? ahci_intr_one : ahci_intr, 568195534Sscottl &ctlr->irqs[i], &ctlr->irqs[i].handle))) { 569195534Sscottl /* SOS XXX release r_irq */ 570195534Sscottl device_printf(dev, "unable to setup interrupt\n"); 571195534Sscottl return ENXIO; 572195534Sscottl } 573195534Sscottl } 574195534Sscottl return (0); 575195534Sscottl} 576195534Sscottl 577195534Sscottl/* 578195534Sscottl * Common case interrupt handler. 579195534Sscottl */ 580195534Sscottlstatic void 581195534Sscottlahci_intr(void *data) 582195534Sscottl{ 583195534Sscottl struct ahci_controller_irq *irq = data; 584195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 585195534Sscottl u_int32_t is; 586195534Sscottl void *arg; 587195534Sscottl int unit; 588195534Sscottl 589196656Smav if (irq->mode == AHCI_IRQ_MODE_ALL) { 590195534Sscottl unit = 0; 591196656Smav if (ctlr->ccc) 592196656Smav is = ctlr->ichannels; 593196656Smav else 594196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 595196656Smav } else { /* AHCI_IRQ_MODE_AFTER */ 596195534Sscottl unit = irq->r_irq_rid - 1; 597196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 598196656Smav } 599200814Smav /* Some controllers have edge triggered IS. */ 600200814Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 601200814Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, is); 602195534Sscottl for (; unit < ctlr->channels; unit++) { 603195534Sscottl if ((is & (1 << unit)) != 0 && 604195534Sscottl (arg = ctlr->interrupt[unit].argument)) { 605199322Smav ctlr->interrupt[unit].function(arg); 606195534Sscottl } 607195534Sscottl } 608200814Smav /* AHCI declares level triggered IS. */ 609200814Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 610200814Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, is); 611195534Sscottl} 612195534Sscottl 613195534Sscottl/* 614195534Sscottl * Simplified interrupt handler for multivector MSI mode. 615195534Sscottl */ 616195534Sscottlstatic void 617195534Sscottlahci_intr_one(void *data) 618195534Sscottl{ 619195534Sscottl struct ahci_controller_irq *irq = data; 620195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 621195534Sscottl void *arg; 622195534Sscottl int unit; 623195534Sscottl 624195534Sscottl unit = irq->r_irq_rid - 1; 625195534Sscottl if ((arg = ctlr->interrupt[unit].argument)) 626195534Sscottl ctlr->interrupt[unit].function(arg); 627195534Sscottl} 628195534Sscottl 629195534Sscottlstatic struct resource * 630195534Sscottlahci_alloc_resource(device_t dev, device_t child, int type, int *rid, 631195534Sscottl u_long start, u_long end, u_long count, u_int flags) 632195534Sscottl{ 633195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 634195534Sscottl int unit = ((struct ahci_channel *)device_get_softc(child))->unit; 635195534Sscottl struct resource *res = NULL; 636195534Sscottl int offset = AHCI_OFFSET + (unit << 7); 637195534Sscottl long st; 638195534Sscottl 639195534Sscottl switch (type) { 640195534Sscottl case SYS_RES_MEMORY: 641195534Sscottl st = rman_get_start(ctlr->r_mem); 642195534Sscottl res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 643195534Sscottl st + offset + 127, 128, RF_ACTIVE, child); 644195534Sscottl if (res) { 645195534Sscottl bus_space_handle_t bsh; 646195534Sscottl bus_space_tag_t bst; 647195534Sscottl bsh = rman_get_bushandle(ctlr->r_mem); 648195534Sscottl bst = rman_get_bustag(ctlr->r_mem); 649195534Sscottl bus_space_subregion(bst, bsh, offset, 128, &bsh); 650195534Sscottl rman_set_bushandle(res, bsh); 651195534Sscottl rman_set_bustag(res, bst); 652195534Sscottl } 653195534Sscottl break; 654195534Sscottl case SYS_RES_IRQ: 655195534Sscottl if (*rid == ATA_IRQ_RID) 656195534Sscottl res = ctlr->irqs[0].r_irq; 657195534Sscottl break; 658195534Sscottl } 659195534Sscottl return (res); 660195534Sscottl} 661195534Sscottl 662195534Sscottlstatic int 663195534Sscottlahci_release_resource(device_t dev, device_t child, int type, int rid, 664195534Sscottl struct resource *r) 665195534Sscottl{ 666195534Sscottl 667195534Sscottl switch (type) { 668195534Sscottl case SYS_RES_MEMORY: 669195534Sscottl rman_release_resource(r); 670195534Sscottl return (0); 671195534Sscottl case SYS_RES_IRQ: 672195534Sscottl if (rid != ATA_IRQ_RID) 673195534Sscottl return ENOENT; 674195534Sscottl return (0); 675195534Sscottl } 676195534Sscottl return (EINVAL); 677195534Sscottl} 678195534Sscottl 679195534Sscottlstatic int 680195534Sscottlahci_setup_intr(device_t dev, device_t child, struct resource *irq, 681195534Sscottl int flags, driver_filter_t *filter, driver_intr_t *function, 682195534Sscottl void *argument, void **cookiep) 683195534Sscottl{ 684195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 685195534Sscottl int unit = (intptr_t)device_get_ivars(child); 686195534Sscottl 687195534Sscottl if (filter != NULL) { 688195534Sscottl printf("ahci.c: we cannot use a filter here\n"); 689195534Sscottl return (EINVAL); 690195534Sscottl } 691195534Sscottl ctlr->interrupt[unit].function = function; 692195534Sscottl ctlr->interrupt[unit].argument = argument; 693195534Sscottl return (0); 694195534Sscottl} 695195534Sscottl 696195534Sscottlstatic int 697195534Sscottlahci_teardown_intr(device_t dev, device_t child, struct resource *irq, 698195534Sscottl void *cookie) 699195534Sscottl{ 700195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 701195534Sscottl int unit = (intptr_t)device_get_ivars(child); 702195534Sscottl 703195534Sscottl ctlr->interrupt[unit].function = NULL; 704195534Sscottl ctlr->interrupt[unit].argument = NULL; 705195534Sscottl return (0); 706195534Sscottl} 707195534Sscottl 708195534Sscottlstatic int 709195534Sscottlahci_print_child(device_t dev, device_t child) 710195534Sscottl{ 711195534Sscottl int retval; 712195534Sscottl 713195534Sscottl retval = bus_print_child_header(dev, child); 714195534Sscottl retval += printf(" at channel %d", 715195534Sscottl (int)(intptr_t)device_get_ivars(child)); 716195534Sscottl retval += bus_print_child_footer(dev, child); 717195534Sscottl 718195534Sscottl return (retval); 719195534Sscottl} 720195534Sscottl 721195534Sscottldevclass_t ahci_devclass; 722195534Sscottlstatic device_method_t ahci_methods[] = { 723195534Sscottl DEVMETHOD(device_probe, ahci_probe), 724195534Sscottl DEVMETHOD(device_attach, ahci_attach), 725195534Sscottl DEVMETHOD(device_detach, ahci_detach), 726195534Sscottl DEVMETHOD(device_suspend, ahci_suspend), 727195534Sscottl DEVMETHOD(device_resume, ahci_resume), 728195534Sscottl DEVMETHOD(bus_print_child, ahci_print_child), 729195534Sscottl DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 730195534Sscottl DEVMETHOD(bus_release_resource, ahci_release_resource), 731195534Sscottl DEVMETHOD(bus_setup_intr, ahci_setup_intr), 732195534Sscottl DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 733195534Sscottl { 0, 0 } 734195534Sscottl}; 735195534Sscottlstatic driver_t ahci_driver = { 736195534Sscottl "ahci", 737195534Sscottl ahci_methods, 738195534Sscottl sizeof(struct ahci_controller) 739195534Sscottl}; 740195534SscottlDRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, 0, 0); 741199322Smavstatic device_method_t ahci_ata_methods[] = { 742199322Smav DEVMETHOD(device_probe, ahci_ata_probe), 743199322Smav DEVMETHOD(device_attach, ahci_attach), 744199322Smav DEVMETHOD(device_detach, ahci_detach), 745199322Smav DEVMETHOD(device_suspend, ahci_suspend), 746199322Smav DEVMETHOD(device_resume, ahci_resume), 747199322Smav DEVMETHOD(bus_print_child, ahci_print_child), 748199322Smav DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 749199322Smav DEVMETHOD(bus_release_resource, ahci_release_resource), 750199322Smav DEVMETHOD(bus_setup_intr, ahci_setup_intr), 751199322Smav DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 752199322Smav { 0, 0 } 753199322Smav}; 754199322Smavstatic driver_t ahci_ata_driver = { 755199322Smav "ahci", 756199322Smav ahci_ata_methods, 757199322Smav sizeof(struct ahci_controller) 758199322Smav}; 759199322SmavDRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, 0, 0); 760195534SscottlMODULE_VERSION(ahci, 1); 761195534SscottlMODULE_DEPEND(ahci, cam, 1, 1, 1); 762195534Sscottl 763195534Sscottlstatic int 764195534Sscottlahci_ch_probe(device_t dev) 765195534Sscottl{ 766195534Sscottl 767195534Sscottl device_set_desc_copy(dev, "AHCI channel"); 768195534Sscottl return (0); 769195534Sscottl} 770195534Sscottl 771195534Sscottlstatic int 772195534Sscottlahci_ch_attach(device_t dev) 773195534Sscottl{ 774195534Sscottl struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 775195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 776195534Sscottl struct cam_devq *devq; 777199821Smav int rid, error, i, sata_rev = 0; 778195534Sscottl 779195534Sscottl ch->dev = dev; 780195534Sscottl ch->unit = (intptr_t)device_get_ivars(dev); 781196656Smav ch->caps = ctlr->caps; 782196656Smav ch->caps2 = ctlr->caps2; 783199322Smav ch->quirks = ctlr->quirks; 784195534Sscottl ch->numslots = ((ch->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, 785196656Smav mtx_init(&ch->mtx, "AHCI channel lock", NULL, MTX_DEF); 786195534Sscottl resource_int_value(device_get_name(dev), 787195534Sscottl device_get_unit(dev), "pm_level", &ch->pm_level); 788196656Smav if (ch->pm_level > 3) 789196656Smav callout_init_mtx(&ch->pm_timer, &ch->mtx, 0); 790195534Sscottl /* Limit speed for my onboard JMicron external port. 791195534Sscottl * It is not eSATA really. */ 792195534Sscottl if (pci_get_devid(ctlr->dev) == 0x2363197b && 793195534Sscottl pci_get_subvendor(ctlr->dev) == 0x1043 && 794195534Sscottl pci_get_subdevice(ctlr->dev) == 0x81e4 && 795195534Sscottl ch->unit == 0) 796199821Smav sata_rev = 1; 797195534Sscottl resource_int_value(device_get_name(dev), 798199821Smav device_get_unit(dev), "sata_rev", &sata_rev); 799199821Smav for (i = 0; i < 16; i++) { 800199821Smav ch->user[i].revision = sata_rev; 801199821Smav ch->user[i].mode = 0; 802199821Smav ch->user[i].bytecount = 8192; 803199821Smav ch->user[i].tags = ch->numslots; 804199821Smav ch->curr[i] = ch->user[i]; 805199821Smav } 806195534Sscottl rid = ch->unit; 807195534Sscottl if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 808195534Sscottl &rid, RF_ACTIVE))) 809195534Sscottl return (ENXIO); 810195534Sscottl ahci_dmainit(dev); 811195534Sscottl ahci_slotsalloc(dev); 812195534Sscottl ahci_ch_resume(dev); 813195534Sscottl mtx_lock(&ch->mtx); 814195534Sscottl rid = ATA_IRQ_RID; 815195534Sscottl if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 816195534Sscottl &rid, RF_SHAREABLE | RF_ACTIVE))) { 817195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 818195534Sscottl device_printf(dev, "Unable to map interrupt\n"); 819195534Sscottl return (ENXIO); 820195534Sscottl } 821195534Sscottl if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 822195534Sscottl ahci_ch_intr_locked, dev, &ch->ih))) { 823195534Sscottl device_printf(dev, "Unable to setup interrupt\n"); 824195534Sscottl error = ENXIO; 825195534Sscottl goto err1; 826195534Sscottl } 827195534Sscottl /* Create the device queue for our SIM. */ 828195534Sscottl devq = cam_simq_alloc(ch->numslots); 829195534Sscottl if (devq == NULL) { 830195534Sscottl device_printf(dev, "Unable to allocate simq\n"); 831195534Sscottl error = ENOMEM; 832195534Sscottl goto err1; 833195534Sscottl } 834195534Sscottl /* Construct SIM entry */ 835195534Sscottl ch->sim = cam_sim_alloc(ahciaction, ahcipoll, "ahcich", ch, 836199178Smav device_get_unit(dev), &ch->mtx, 837199278Smav min(2, ch->numslots), 838199278Smav (ch->caps & AHCI_CAP_SNCQ) ? ch->numslots : 0, 839199278Smav devq); 840195534Sscottl if (ch->sim == NULL) { 841195534Sscottl device_printf(dev, "unable to allocate sim\n"); 842195534Sscottl error = ENOMEM; 843195534Sscottl goto err2; 844195534Sscottl } 845195534Sscottl if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 846195534Sscottl device_printf(dev, "unable to register xpt bus\n"); 847195534Sscottl error = ENXIO; 848195534Sscottl goto err2; 849195534Sscottl } 850195534Sscottl if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 851195534Sscottl CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 852195534Sscottl device_printf(dev, "unable to create path\n"); 853195534Sscottl error = ENXIO; 854195534Sscottl goto err3; 855195534Sscottl } 856196656Smav if (ch->pm_level > 3) { 857196656Smav callout_reset(&ch->pm_timer, 858196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8, 859196656Smav ahci_ch_pm, dev); 860196656Smav } 861195534Sscottl mtx_unlock(&ch->mtx); 862195534Sscottl return (0); 863195534Sscottl 864195534Sscottlerr3: 865195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 866195534Sscottlerr2: 867195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 868195534Sscottlerr1: 869195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 870195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 871195534Sscottl mtx_unlock(&ch->mtx); 872195534Sscottl return (error); 873195534Sscottl} 874195534Sscottl 875195534Sscottlstatic int 876195534Sscottlahci_ch_detach(device_t dev) 877195534Sscottl{ 878195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 879195534Sscottl 880195534Sscottl mtx_lock(&ch->mtx); 881195534Sscottl xpt_async(AC_LOST_DEVICE, ch->path, NULL); 882195534Sscottl xpt_free_path(ch->path); 883195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 884195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 885195534Sscottl mtx_unlock(&ch->mtx); 886195534Sscottl 887196656Smav if (ch->pm_level > 3) 888196656Smav callout_drain(&ch->pm_timer); 889195534Sscottl bus_teardown_intr(dev, ch->r_irq, ch->ih); 890195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 891195534Sscottl 892195534Sscottl ahci_ch_suspend(dev); 893195534Sscottl ahci_slotsfree(dev); 894195534Sscottl ahci_dmafini(dev); 895195534Sscottl 896195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 897195534Sscottl mtx_destroy(&ch->mtx); 898195534Sscottl return (0); 899195534Sscottl} 900195534Sscottl 901195534Sscottlstatic int 902195534Sscottlahci_ch_suspend(device_t dev) 903195534Sscottl{ 904195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 905195534Sscottl 906195534Sscottl /* Disable port interrupts. */ 907195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 908195534Sscottl /* Reset command register. */ 909195534Sscottl ahci_stop(dev); 910195534Sscottl ahci_stop_fr(dev); 911195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, 0); 912195534Sscottl /* Allow everything, including partial and slumber modes. */ 913195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 0); 914195534Sscottl /* Request slumber mode transition and give some time to get there. */ 915195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, AHCI_P_CMD_SLUMBER); 916195534Sscottl DELAY(100); 917195534Sscottl /* Disable PHY. */ 918195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 919195534Sscottl return (0); 920195534Sscottl} 921195534Sscottl 922195534Sscottlstatic int 923195534Sscottlahci_ch_resume(device_t dev) 924195534Sscottl{ 925195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 926195534Sscottl uint64_t work; 927195534Sscottl 928195534Sscottl /* Disable port interrupts */ 929195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 930195534Sscottl /* Setup work areas */ 931195534Sscottl work = ch->dma.work_bus + AHCI_CL_OFFSET; 932195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CLB, work & 0xffffffff); 933195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CLBU, work >> 32); 934195534Sscottl work = ch->dma.rfis_bus; 935195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_FB, work & 0xffffffff); 936195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_FBU, work >> 32); 937195534Sscottl /* Activate the channel and power/spin up device */ 938195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, 939195534Sscottl (AHCI_P_CMD_ACTIVE | AHCI_P_CMD_POD | AHCI_P_CMD_SUD | 940196656Smav ((ch->pm_level == 2 || ch->pm_level == 3) ? AHCI_P_CMD_ALPE : 0) | 941195534Sscottl ((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 ))); 942195534Sscottl ahci_start_fr(dev); 943195534Sscottl ahci_start(dev); 944195534Sscottl return (0); 945195534Sscottl} 946195534Sscottl 947195534Sscottldevclass_t ahcich_devclass; 948195534Sscottlstatic device_method_t ahcich_methods[] = { 949195534Sscottl DEVMETHOD(device_probe, ahci_ch_probe), 950195534Sscottl DEVMETHOD(device_attach, ahci_ch_attach), 951195534Sscottl DEVMETHOD(device_detach, ahci_ch_detach), 952195534Sscottl DEVMETHOD(device_suspend, ahci_ch_suspend), 953195534Sscottl DEVMETHOD(device_resume, ahci_ch_resume), 954195534Sscottl { 0, 0 } 955195534Sscottl}; 956195534Sscottlstatic driver_t ahcich_driver = { 957195534Sscottl "ahcich", 958195534Sscottl ahcich_methods, 959195534Sscottl sizeof(struct ahci_channel) 960195534Sscottl}; 961199322SmavDRIVER_MODULE(ahcich, ahci, ahcich_driver, ahcich_devclass, 0, 0); 962195534Sscottl 963195534Sscottlstruct ahci_dc_cb_args { 964195534Sscottl bus_addr_t maddr; 965195534Sscottl int error; 966195534Sscottl}; 967195534Sscottl 968195534Sscottlstatic void 969195534Sscottlahci_dmainit(device_t dev) 970195534Sscottl{ 971195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 972195534Sscottl struct ahci_dc_cb_args dcba; 973195534Sscottl 974195534Sscottl if (ch->caps & AHCI_CAP_64BIT) 975195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR; 976195534Sscottl else 977195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR_32BIT; 978195534Sscottl /* Command area. */ 979195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 980195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 981195534Sscottl NULL, NULL, AHCI_WORK_SIZE, 1, AHCI_WORK_SIZE, 982195534Sscottl 0, NULL, NULL, &ch->dma.work_tag)) 983195534Sscottl goto error; 984195534Sscottl if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 985195534Sscottl &ch->dma.work_map)) 986195534Sscottl goto error; 987195534Sscottl if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 988195534Sscottl AHCI_WORK_SIZE, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 989195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 990195534Sscottl goto error; 991195534Sscottl } 992195534Sscottl ch->dma.work_bus = dcba.maddr; 993195534Sscottl /* FIS receive area. */ 994195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 4096, 0, 995195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 996195534Sscottl NULL, NULL, 4096, 1, 4096, 997195534Sscottl 0, NULL, NULL, &ch->dma.rfis_tag)) 998195534Sscottl goto error; 999195534Sscottl if (bus_dmamem_alloc(ch->dma.rfis_tag, (void **)&ch->dma.rfis, 0, 1000195534Sscottl &ch->dma.rfis_map)) 1001195534Sscottl goto error; 1002195534Sscottl if (bus_dmamap_load(ch->dma.rfis_tag, ch->dma.rfis_map, ch->dma.rfis, 1003195534Sscottl 4096, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1004195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1005195534Sscottl goto error; 1006195534Sscottl } 1007195534Sscottl ch->dma.rfis_bus = dcba.maddr; 1008195534Sscottl /* Data area. */ 1009195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, 1010195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1011195534Sscottl NULL, NULL, 1012195534Sscottl AHCI_SG_ENTRIES * PAGE_SIZE * ch->numslots, 1013195534Sscottl AHCI_SG_ENTRIES, AHCI_PRD_MAX, 1014195534Sscottl 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 1015195534Sscottl goto error; 1016195534Sscottl } 1017195534Sscottl return; 1018195534Sscottl 1019195534Sscottlerror: 1020195534Sscottl device_printf(dev, "WARNING - DMA initialization failed\n"); 1021195534Sscottl ahci_dmafini(dev); 1022195534Sscottl} 1023195534Sscottl 1024195534Sscottlstatic void 1025195534Sscottlahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 1026195534Sscottl{ 1027195534Sscottl struct ahci_dc_cb_args *dcba = (struct ahci_dc_cb_args *)xsc; 1028195534Sscottl 1029195534Sscottl if (!(dcba->error = error)) 1030195534Sscottl dcba->maddr = segs[0].ds_addr; 1031195534Sscottl} 1032195534Sscottl 1033195534Sscottlstatic void 1034195534Sscottlahci_dmafini(device_t dev) 1035195534Sscottl{ 1036195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1037195534Sscottl 1038195534Sscottl if (ch->dma.data_tag) { 1039195534Sscottl bus_dma_tag_destroy(ch->dma.data_tag); 1040195534Sscottl ch->dma.data_tag = NULL; 1041195534Sscottl } 1042195534Sscottl if (ch->dma.rfis_bus) { 1043195534Sscottl bus_dmamap_unload(ch->dma.rfis_tag, ch->dma.rfis_map); 1044195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1045195534Sscottl ch->dma.rfis_bus = 0; 1046195534Sscottl ch->dma.rfis_map = NULL; 1047195534Sscottl ch->dma.rfis = NULL; 1048195534Sscottl } 1049195534Sscottl if (ch->dma.work_bus) { 1050195534Sscottl bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 1051195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1052195534Sscottl ch->dma.work_bus = 0; 1053195534Sscottl ch->dma.work_map = NULL; 1054195534Sscottl ch->dma.work = NULL; 1055195534Sscottl } 1056195534Sscottl if (ch->dma.work_tag) { 1057195534Sscottl bus_dma_tag_destroy(ch->dma.work_tag); 1058195534Sscottl ch->dma.work_tag = NULL; 1059195534Sscottl } 1060195534Sscottl} 1061195534Sscottl 1062195534Sscottlstatic void 1063195534Sscottlahci_slotsalloc(device_t dev) 1064195534Sscottl{ 1065195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1066195534Sscottl int i; 1067195534Sscottl 1068195534Sscottl /* Alloc and setup command/dma slots */ 1069195534Sscottl bzero(ch->slot, sizeof(ch->slot)); 1070195534Sscottl for (i = 0; i < ch->numslots; i++) { 1071195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1072195534Sscottl 1073195534Sscottl slot->dev = dev; 1074195534Sscottl slot->slot = i; 1075195534Sscottl slot->state = AHCI_SLOT_EMPTY; 1076195534Sscottl slot->ccb = NULL; 1077195534Sscottl callout_init_mtx(&slot->timeout, &ch->mtx, 0); 1078195534Sscottl 1079195534Sscottl if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 1080195534Sscottl device_printf(ch->dev, "FAILURE - create data_map\n"); 1081195534Sscottl } 1082195534Sscottl} 1083195534Sscottl 1084195534Sscottlstatic void 1085195534Sscottlahci_slotsfree(device_t dev) 1086195534Sscottl{ 1087195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1088195534Sscottl int i; 1089195534Sscottl 1090195534Sscottl /* Free all dma slots */ 1091195534Sscottl for (i = 0; i < ch->numslots; i++) { 1092195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1093195534Sscottl 1094196656Smav callout_drain(&slot->timeout); 1095195534Sscottl if (slot->dma.data_map) { 1096195534Sscottl bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 1097195534Sscottl slot->dma.data_map = NULL; 1098195534Sscottl } 1099195534Sscottl } 1100195534Sscottl} 1101195534Sscottl 1102195534Sscottlstatic void 1103198319Smavahci_phy_check_events(device_t dev, u_int32_t serr) 1104195534Sscottl{ 1105195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1106195534Sscottl 1107198319Smav if ((serr & ATA_SE_PHY_CHANGED) && (ch->pm_level == 0)) { 1108195534Sscottl u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 1109195534Sscottl if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1110195534Sscottl ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1111195534Sscottl ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 1112195534Sscottl if (bootverbose) 1113195534Sscottl device_printf(dev, "CONNECT requested\n"); 1114195534Sscottl ahci_reset(dev); 1115195534Sscottl } else { 1116195534Sscottl if (bootverbose) 1117195534Sscottl device_printf(dev, "DISCONNECT requested\n"); 1118195534Sscottl ch->devices = 0; 1119195534Sscottl } 1120195534Sscottl } 1121195534Sscottl} 1122195534Sscottl 1123195534Sscottlstatic void 1124196907Smavahci_notify_events(device_t dev, u_int32_t status) 1125196656Smav{ 1126196656Smav struct ahci_channel *ch = device_get_softc(dev); 1127196656Smav struct cam_path *dpath; 1128196656Smav int i; 1129196656Smav 1130200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1131200196Smav ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status); 1132196656Smav if (bootverbose) 1133196656Smav device_printf(dev, "SNTF 0x%04x\n", status); 1134196656Smav for (i = 0; i < 16; i++) { 1135196656Smav if ((status & (1 << i)) == 0) 1136196656Smav continue; 1137196656Smav if (xpt_create_path(&dpath, NULL, 1138196656Smav xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 1139196656Smav xpt_async(AC_SCSI_AEN, dpath, NULL); 1140196656Smav xpt_free_path(dpath); 1141196656Smav } 1142196656Smav } 1143196656Smav} 1144196656Smav 1145196656Smavstatic void 1146195534Sscottlahci_ch_intr_locked(void *data) 1147195534Sscottl{ 1148195534Sscottl device_t dev = (device_t)data; 1149195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1150195534Sscottl 1151195534Sscottl mtx_lock(&ch->mtx); 1152195534Sscottl ahci_ch_intr(data); 1153195534Sscottl mtx_unlock(&ch->mtx); 1154195534Sscottl} 1155195534Sscottl 1156195534Sscottlstatic void 1157196656Smavahci_ch_pm(void *arg) 1158196656Smav{ 1159196656Smav device_t dev = (device_t)arg; 1160196656Smav struct ahci_channel *ch = device_get_softc(dev); 1161196656Smav uint32_t work; 1162196656Smav 1163196656Smav if (ch->numrslots != 0) 1164196656Smav return; 1165196656Smav work = ATA_INL(ch->r_mem, AHCI_P_CMD); 1166196656Smav if (ch->pm_level == 4) 1167196656Smav work |= AHCI_P_CMD_PARTIAL; 1168196656Smav else 1169196656Smav work |= AHCI_P_CMD_SLUMBER; 1170196656Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, work); 1171196656Smav} 1172196656Smav 1173196656Smavstatic void 1174195534Sscottlahci_ch_intr(void *data) 1175195534Sscottl{ 1176195534Sscottl device_t dev = (device_t)data; 1177195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1178198319Smav uint32_t istatus, sstatus, cstatus, serr = 0, sntf = 0, ok, err; 1179195534Sscottl enum ahci_err_type et; 1180195534Sscottl int i, ccs, ncq_err = 0; 1181195534Sscottl 1182195534Sscottl /* Read and clear interrupt statuses. */ 1183195534Sscottl istatus = ATA_INL(ch->r_mem, AHCI_P_IS); 1184196656Smav if (istatus == 0) 1185196656Smav return; 1186195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, istatus); 1187195534Sscottl /* Read command statuses. */ 1188196907Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1189195534Sscottl cstatus = ATA_INL(ch->r_mem, AHCI_P_CI); 1190200196Smav if (istatus & AHCI_P_IX_SDB) { 1191200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1192200196Smav sntf = ATA_INL(ch->r_mem, AHCI_P_SNTF); 1193200196Smav else { 1194200196Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1195200196Smav 1196200196Smav if (fis[1] & 0x80) 1197200196Smav sntf = (1 << (fis[1] & 0x0f)); 1198200196Smav } 1199200196Smav } 1200195534Sscottl /* Process PHY events */ 1201198319Smav if (istatus & (AHCI_P_IX_PC | AHCI_P_IX_PRC | AHCI_P_IX_OF | 1202198319Smav AHCI_P_IX_IF | AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1203198319Smav serr = ATA_INL(ch->r_mem, AHCI_P_SERR); 1204198319Smav if (serr) { 1205198319Smav ATA_OUTL(ch->r_mem, AHCI_P_SERR, serr); 1206198319Smav ahci_phy_check_events(dev, serr); 1207198319Smav } 1208198319Smav } 1209195534Sscottl /* Process command errors */ 1210198319Smav if (istatus & (AHCI_P_IX_OF | AHCI_P_IX_IF | 1211198319Smav AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1212195534Sscottl//device_printf(dev, "%s ERROR is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x\n", 1213195534Sscottl// __func__, istatus, cstatus, sstatus, ch->rslots, ATA_INL(ch->r_mem, AHCI_P_TFD), 1214198319Smav// serr); 1215195534Sscottl ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1216195534Sscottl >> AHCI_P_CMD_CCS_SHIFT; 1217196656Smav err = ch->rslots & (cstatus | sstatus); 1218195534Sscottl /* Kick controller into sane state */ 1219195534Sscottl ahci_stop(dev); 1220195534Sscottl ahci_start(dev); 1221195534Sscottl } else { 1222195534Sscottl ccs = 0; 1223195534Sscottl err = 0; 1224195534Sscottl } 1225195534Sscottl /* Complete all successfull commands. */ 1226196656Smav ok = ch->rslots & ~(cstatus | sstatus); 1227195534Sscottl for (i = 0; i < ch->numslots; i++) { 1228195534Sscottl if ((ok >> i) & 1) 1229195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_NONE); 1230195534Sscottl } 1231195534Sscottl /* On error, complete the rest of commands with error statuses. */ 1232195534Sscottl if (err) { 1233195534Sscottl if (ch->frozen) { 1234195534Sscottl union ccb *fccb = ch->frozen; 1235195534Sscottl ch->frozen = NULL; 1236195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1237198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1238198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1239198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1240198319Smav } 1241195534Sscottl xpt_done(fccb); 1242195534Sscottl } 1243195534Sscottl for (i = 0; i < ch->numslots; i++) { 1244195534Sscottl /* XXX: reqests in loading state. */ 1245195534Sscottl if (((err >> i) & 1) == 0) 1246195534Sscottl continue; 1247198390Smav if (istatus & AHCI_P_IX_TFE) { 1248195534Sscottl /* Task File Error */ 1249195534Sscottl if (ch->numtslots == 0) { 1250195534Sscottl /* Untagged operation. */ 1251195534Sscottl if (i == ccs) 1252195534Sscottl et = AHCI_ERR_TFE; 1253195534Sscottl else 1254195534Sscottl et = AHCI_ERR_INNOCENT; 1255195534Sscottl } else { 1256195534Sscottl /* Tagged operation. */ 1257195534Sscottl et = AHCI_ERR_NCQ; 1258195534Sscottl ncq_err = 1; 1259195534Sscottl } 1260198390Smav } else if (istatus & AHCI_P_IX_IF) { 1261198390Smav if (ch->numtslots == 0 && i != ccs) 1262198390Smav et = AHCI_ERR_INNOCENT; 1263198390Smav else 1264198390Smav et = AHCI_ERR_SATA; 1265195534Sscottl } else 1266195534Sscottl et = AHCI_ERR_INVALID; 1267195534Sscottl ahci_end_transaction(&ch->slot[i], et); 1268195534Sscottl } 1269195534Sscottl if (ncq_err) 1270195534Sscottl ahci_issue_read_log(dev); 1271195534Sscottl } 1272196656Smav /* Process NOTIFY events */ 1273196907Smav if (sntf) 1274196907Smav ahci_notify_events(dev, sntf); 1275195534Sscottl} 1276195534Sscottl 1277195534Sscottl/* Must be called with channel locked. */ 1278195534Sscottlstatic int 1279195534Sscottlahci_check_collision(device_t dev, union ccb *ccb) 1280195534Sscottl{ 1281195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1282195534Sscottl 1283195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1284195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1285195534Sscottl /* Tagged command while untagged are active. */ 1286195534Sscottl if (ch->numrslots != 0 && ch->numtslots == 0) 1287195534Sscottl return (1); 1288195534Sscottl /* Tagged command while tagged to other target is active. */ 1289195534Sscottl if (ch->numtslots != 0 && 1290195534Sscottl ch->taggedtarget != ccb->ccb_h.target_id) 1291195534Sscottl return (1); 1292199747Smav /* Tagged command while we have no supported tag free. */ 1293199747Smav if (((~ch->oslots) & (0xffffffff >> (32 - 1294199747Smav ch->curr[ccb->ccb_h.target_id].tags))) == 0) 1295199747Smav return (1); 1296195534Sscottl } else { 1297195534Sscottl /* Untagged command while tagged are active. */ 1298195534Sscottl if (ch->numrslots != 0 && ch->numtslots != 0) 1299195534Sscottl return (1); 1300195534Sscottl } 1301195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1302195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 1303195534Sscottl /* Atomic command while anything active. */ 1304195534Sscottl if (ch->numrslots != 0) 1305195534Sscottl return (1); 1306195534Sscottl } 1307195534Sscottl /* We have some atomic command running. */ 1308195534Sscottl if (ch->aslots != 0) 1309195534Sscottl return (1); 1310195534Sscottl return (0); 1311195534Sscottl} 1312195534Sscottl 1313195534Sscottl/* Must be called with channel locked. */ 1314195534Sscottlstatic void 1315195534Sscottlahci_begin_transaction(device_t dev, union ccb *ccb) 1316195534Sscottl{ 1317195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1318195534Sscottl struct ahci_slot *slot; 1319199747Smav int tag, tags; 1320195534Sscottl 1321195534Sscottl /* Choose empty slot. */ 1322199747Smav tags = ch->numslots; 1323199747Smav if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1324199747Smav (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 1325199747Smav tags = ch->curr[ccb->ccb_h.target_id].tags; 1326195534Sscottl tag = ch->lastslot; 1327199747Smav while (1) { 1328199747Smav if (tag >= tags) 1329195534Sscottl tag = 0; 1330199747Smav if (ch->slot[tag].state == AHCI_SLOT_EMPTY) 1331199747Smav break; 1332199747Smav tag++; 1333199747Smav }; 1334195534Sscottl ch->lastslot = tag; 1335195534Sscottl /* Occupy chosen slot. */ 1336195534Sscottl slot = &ch->slot[tag]; 1337195534Sscottl slot->ccb = ccb; 1338196656Smav /* Stop PM timer. */ 1339196656Smav if (ch->numrslots == 0 && ch->pm_level > 3) 1340196656Smav callout_stop(&ch->pm_timer); 1341195534Sscottl /* Update channel stats. */ 1342199747Smav ch->oslots |= (1 << slot->slot); 1343195534Sscottl ch->numrslots++; 1344195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1345195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1346195534Sscottl ch->numtslots++; 1347195534Sscottl ch->taggedtarget = ccb->ccb_h.target_id; 1348195534Sscottl } 1349195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1350195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 1351195534Sscottl ch->aslots |= (1 << slot->slot); 1352195534Sscottl slot->dma.nsegs = 0; 1353195534Sscottl /* If request moves data, setup and load SG list */ 1354195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1355195534Sscottl void *buf; 1356195534Sscottl bus_size_t size; 1357195534Sscottl 1358195534Sscottl slot->state = AHCI_SLOT_LOADING; 1359195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1360195534Sscottl buf = ccb->ataio.data_ptr; 1361195534Sscottl size = ccb->ataio.dxfer_len; 1362195534Sscottl } else { 1363195534Sscottl buf = ccb->csio.data_ptr; 1364195534Sscottl size = ccb->csio.dxfer_len; 1365195534Sscottl } 1366195534Sscottl bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 1367195534Sscottl buf, size, ahci_dmasetprd, slot, 0); 1368195534Sscottl } else 1369195534Sscottl ahci_execute_transaction(slot); 1370195534Sscottl} 1371195534Sscottl 1372195534Sscottl/* Locked by busdma engine. */ 1373195534Sscottlstatic void 1374195534Sscottlahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1375195534Sscottl{ 1376195534Sscottl struct ahci_slot *slot = arg; 1377195534Sscottl struct ahci_channel *ch = device_get_softc(slot->dev); 1378195534Sscottl struct ahci_cmd_tab *ctp; 1379195534Sscottl struct ahci_dma_prd *prd; 1380195534Sscottl int i; 1381195534Sscottl 1382195534Sscottl if (error) { 1383195534Sscottl device_printf(slot->dev, "DMA load error\n"); 1384195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1385195534Sscottl return; 1386195534Sscottl } 1387195534Sscottl KASSERT(nsegs <= AHCI_SG_ENTRIES, ("too many DMA segment entries\n")); 1388195534Sscottl /* Get a piece of the workspace for this request */ 1389195534Sscottl ctp = (struct ahci_cmd_tab *) 1390195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1391195534Sscottl /* Fill S/G table */ 1392195534Sscottl prd = &ctp->prd_tab[0]; 1393195534Sscottl for (i = 0; i < nsegs; i++) { 1394195534Sscottl prd[i].dba = htole64(segs[i].ds_addr); 1395195534Sscottl prd[i].dbc = htole32((segs[i].ds_len - 1) & AHCI_PRD_MASK); 1396195534Sscottl } 1397195534Sscottl slot->dma.nsegs = nsegs; 1398195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1399195534Sscottl ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1400195534Sscottl BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1401195534Sscottl ahci_execute_transaction(slot); 1402195534Sscottl} 1403195534Sscottl 1404195534Sscottl/* Must be called with channel locked. */ 1405195534Sscottlstatic void 1406195534Sscottlahci_execute_transaction(struct ahci_slot *slot) 1407195534Sscottl{ 1408195534Sscottl device_t dev = slot->dev; 1409195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1410195534Sscottl struct ahci_cmd_tab *ctp; 1411195534Sscottl struct ahci_cmd_list *clp; 1412195534Sscottl union ccb *ccb = slot->ccb; 1413195534Sscottl int port = ccb->ccb_h.target_id & 0x0f; 1414195534Sscottl int fis_size; 1415195534Sscottl 1416195534Sscottl /* Get a piece of the workspace for this request */ 1417195534Sscottl ctp = (struct ahci_cmd_tab *) 1418195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1419195534Sscottl /* Setup the FIS for this request */ 1420199821Smav if (!(fis_size = ahci_setup_fis(dev, ctp, ccb, slot->slot))) { 1421195534Sscottl device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1422195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1423195534Sscottl return; 1424195534Sscottl } 1425195534Sscottl /* Setup the command list entry */ 1426195534Sscottl clp = (struct ahci_cmd_list *) 1427195534Sscottl (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 1428195534Sscottl clp->prd_length = slot->dma.nsegs; 1429195534Sscottl clp->cmd_flags = (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) | 1430195534Sscottl (ccb->ccb_h.func_code == XPT_SCSI_IO ? 1431195534Sscottl (AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) | 1432195534Sscottl (fis_size / sizeof(u_int32_t)) | 1433195534Sscottl (port << 12); 1434195534Sscottl /* Special handling for Soft Reset command. */ 1435195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1436195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1437195534Sscottl (ccb->ataio.cmd.control & ATA_A_RESET)) { 1438195534Sscottl /* Kick controller into sane state */ 1439195534Sscottl ahci_stop(dev); 1440195534Sscottl ahci_clo(dev); 1441195534Sscottl ahci_start(dev); 1442195534Sscottl clp->cmd_flags |= AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY; 1443195534Sscottl } 1444195534Sscottl clp->bytecount = 0; 1445195534Sscottl clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET + 1446195534Sscottl (AHCI_CT_SIZE * slot->slot)); 1447195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1448195534Sscottl BUS_DMASYNC_PREWRITE); 1449195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 1450195534Sscottl BUS_DMASYNC_PREREAD); 1451195534Sscottl /* Set ACTIVE bit for NCQ commands. */ 1452195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1453195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1454195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot); 1455195534Sscottl } 1456195534Sscottl /* Issue command to the controller. */ 1457195534Sscottl slot->state = AHCI_SLOT_RUNNING; 1458195534Sscottl ch->rslots |= (1 << slot->slot); 1459195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CI, (1 << slot->slot)); 1460195534Sscottl /* Device reset commands doesn't interrupt. Poll them. */ 1461195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO && 1462195534Sscottl (ccb->ataio.cmd.command == ATA_DEVICE_RESET || 1463195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL))) { 1464195534Sscottl int count, timeout = ccb->ccb_h.timeout; 1465195534Sscottl enum ahci_err_type et = AHCI_ERR_NONE; 1466195534Sscottl 1467195534Sscottl for (count = 0; count < timeout; count++) { 1468195534Sscottl DELAY(1000); 1469195534Sscottl if (!(ATA_INL(ch->r_mem, AHCI_P_CI) & (1 << slot->slot))) 1470195534Sscottl break; 1471195534Sscottl if (ATA_INL(ch->r_mem, AHCI_P_TFD) & ATA_S_ERROR) { 1472195534Sscottl device_printf(ch->dev, 1473195534Sscottl "Poll error on slot %d, TFD: %04x\n", 1474195534Sscottl slot->slot, ATA_INL(ch->r_mem, AHCI_P_TFD)); 1475195534Sscottl et = AHCI_ERR_TFE; 1476195534Sscottl break; 1477195534Sscottl } 1478198851Smav /* Workaround for ATI SB600/SB700 chipsets. */ 1479198851Smav if (ccb->ccb_h.target_id == 15 && 1480198851Smav pci_get_vendor(device_get_parent(dev)) == 0x1002 && 1481198851Smav (ATA_INL(ch->r_mem, AHCI_P_IS) & AHCI_P_IX_IPM)) { 1482198851Smav et = AHCI_ERR_TIMEOUT; 1483198851Smav break; 1484198851Smav } 1485195534Sscottl } 1486195534Sscottl if (timeout && (count >= timeout)) { 1487195534Sscottl device_printf(ch->dev, 1488195534Sscottl "Poll timeout on slot %d\n", slot->slot); 1489195534Sscottl et = AHCI_ERR_TIMEOUT; 1490195534Sscottl } 1491195534Sscottl if (et != AHCI_ERR_NONE) { 1492195534Sscottl /* Kick controller into sane state */ 1493195534Sscottl ahci_stop(ch->dev); 1494195534Sscottl ahci_start(ch->dev); 1495195534Sscottl } 1496195534Sscottl ahci_end_transaction(slot, et); 1497195534Sscottl return; 1498195534Sscottl } 1499195534Sscottl /* Start command execution timeout */ 1500198319Smav callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000, 1501195534Sscottl (timeout_t*)ahci_timeout, slot); 1502195534Sscottl return; 1503195534Sscottl} 1504195534Sscottl 1505195534Sscottl/* Locked by callout mechanism. */ 1506195534Sscottlstatic void 1507195534Sscottlahci_timeout(struct ahci_slot *slot) 1508195534Sscottl{ 1509195534Sscottl device_t dev = slot->dev; 1510195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1511198319Smav uint32_t sstatus; 1512198319Smav int ccs; 1513195534Sscottl int i; 1514195534Sscottl 1515196656Smav /* Check for stale timeout. */ 1516198319Smav if (slot->state < AHCI_SLOT_RUNNING) 1517196656Smav return; 1518196656Smav 1519198319Smav /* Check if slot was not being executed last time we checked. */ 1520198319Smav if (slot->state < AHCI_SLOT_EXECUTING) { 1521198319Smav /* Check if slot started executing. */ 1522198319Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1523198319Smav ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1524198319Smav >> AHCI_P_CMD_CCS_SHIFT; 1525198319Smav if ((sstatus & (1 << slot->slot)) != 0 || ccs == slot->slot) 1526198319Smav slot->state = AHCI_SLOT_EXECUTING; 1527198319Smav 1528198319Smav callout_reset(&slot->timeout, 1529198319Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1530198319Smav (timeout_t*)ahci_timeout, slot); 1531198319Smav return; 1532198319Smav } 1533198319Smav 1534195534Sscottl device_printf(dev, "Timeout on slot %d\n", slot->slot); 1535198319Smav device_printf(dev, "is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x\n", 1536198319Smav ATA_INL(ch->r_mem, AHCI_P_IS), ATA_INL(ch->r_mem, AHCI_P_CI), 1537198319Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1538198319Smav ATA_INL(ch->r_mem, AHCI_P_TFD), ATA_INL(ch->r_mem, AHCI_P_SERR)); 1539195534Sscottl 1540198851Smav ch->fatalerr = 1; 1541197838Smav /* Handle frozen command. */ 1542195534Sscottl if (ch->frozen) { 1543195534Sscottl union ccb *fccb = ch->frozen; 1544195534Sscottl ch->frozen = NULL; 1545195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1546198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1547198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1548198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1549198319Smav } 1550195534Sscottl xpt_done(fccb); 1551195534Sscottl } 1552197838Smav /* Handle command with timeout. */ 1553197838Smav ahci_end_transaction(&ch->slot[slot->slot], AHCI_ERR_TIMEOUT); 1554197838Smav /* Handle the rest of commands. */ 1555195534Sscottl for (i = 0; i < ch->numslots; i++) { 1556195534Sscottl /* Do we have a running request on slot? */ 1557195534Sscottl if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1558195534Sscottl continue; 1559195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 1560195534Sscottl } 1561195534Sscottl} 1562195534Sscottl 1563195534Sscottl/* Must be called with channel locked. */ 1564195534Sscottlstatic void 1565195534Sscottlahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et) 1566195534Sscottl{ 1567195534Sscottl device_t dev = slot->dev; 1568195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1569195534Sscottl union ccb *ccb = slot->ccb; 1570195534Sscottl 1571195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1572195534Sscottl BUS_DMASYNC_POSTWRITE); 1573195534Sscottl /* Read result registers to the result struct 1574195534Sscottl * May be incorrect if several commands finished same time, 1575195534Sscottl * so read only when sure or have to. 1576195534Sscottl */ 1577195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1578195534Sscottl struct ata_res *res = &ccb->ataio.res; 1579195534Sscottl 1580195534Sscottl if ((et == AHCI_ERR_TFE) || 1581195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1582195534Sscottl u_int8_t *fis = ch->dma.rfis + 0x40; 1583195534Sscottl uint16_t tfd = ATA_INL(ch->r_mem, AHCI_P_TFD); 1584195534Sscottl 1585195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 1586195534Sscottl BUS_DMASYNC_POSTREAD); 1587195534Sscottl res->status = tfd; 1588195534Sscottl res->error = tfd >> 8; 1589195534Sscottl res->lba_low = fis[4]; 1590195534Sscottl res->lba_mid = fis[5]; 1591195534Sscottl res->lba_high = fis[6]; 1592195534Sscottl res->device = fis[7]; 1593195534Sscottl res->lba_low_exp = fis[8]; 1594195534Sscottl res->lba_mid_exp = fis[9]; 1595195534Sscottl res->lba_high_exp = fis[10]; 1596195534Sscottl res->sector_count = fis[12]; 1597195534Sscottl res->sector_count_exp = fis[13]; 1598195534Sscottl } else 1599195534Sscottl bzero(res, sizeof(*res)); 1600195534Sscottl } 1601195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1602195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1603195534Sscottl (ccb->ccb_h.flags & CAM_DIR_IN) ? 1604195534Sscottl BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1605195534Sscottl bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1606195534Sscottl } 1607198319Smav /* In case of error, freeze device for proper recovery. */ 1608198319Smav if ((et != AHCI_ERR_NONE) && (!ch->readlog) && 1609198319Smav !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1610198319Smav xpt_freeze_devq(ccb->ccb_h.path, 1); 1611198319Smav ccb->ccb_h.status |= CAM_DEV_QFRZN; 1612198319Smav } 1613195534Sscottl /* Set proper result status. */ 1614195534Sscottl ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1615195534Sscottl switch (et) { 1616195534Sscottl case AHCI_ERR_NONE: 1617195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP; 1618195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1619195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_OK; 1620195534Sscottl break; 1621195534Sscottl case AHCI_ERR_INVALID: 1622198851Smav ch->fatalerr = 1; 1623195534Sscottl ccb->ccb_h.status |= CAM_REQ_INVALID; 1624195534Sscottl break; 1625195534Sscottl case AHCI_ERR_INNOCENT: 1626195534Sscottl ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1627195534Sscottl break; 1628195534Sscottl case AHCI_ERR_TFE: 1629198319Smav case AHCI_ERR_NCQ: 1630195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1631195534Sscottl ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1632195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1633195534Sscottl } else { 1634195534Sscottl ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1635195534Sscottl } 1636195534Sscottl break; 1637195534Sscottl case AHCI_ERR_SATA: 1638198851Smav ch->fatalerr = 1; 1639198319Smav if (!ch->readlog) { 1640198319Smav xpt_freeze_simq(ch->sim, 1); 1641198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1642198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1643198319Smav } 1644198319Smav ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1645195534Sscottl break; 1646195534Sscottl case AHCI_ERR_TIMEOUT: 1647198851Smav /* Do no treat soft-reset timeout as fatal here. */ 1648198851Smav if (ccb->ccb_h.func_code != XPT_ATA_IO || 1649198851Smav !(ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) 1650198851Smav ch->fatalerr = 1; 1651198319Smav if (!ch->readlog) { 1652198319Smav xpt_freeze_simq(ch->sim, 1); 1653198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1654198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1655198319Smav } 1656195534Sscottl ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1657195534Sscottl break; 1658195534Sscottl default: 1659198851Smav ch->fatalerr = 1; 1660195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1661195534Sscottl } 1662195534Sscottl /* Free slot. */ 1663199747Smav ch->oslots &= ~(1 << slot->slot); 1664195534Sscottl ch->rslots &= ~(1 << slot->slot); 1665195534Sscottl ch->aslots &= ~(1 << slot->slot); 1666195534Sscottl slot->state = AHCI_SLOT_EMPTY; 1667195534Sscottl slot->ccb = NULL; 1668195534Sscottl /* Update channel stats. */ 1669195534Sscottl ch->numrslots--; 1670195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1671195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1672195534Sscottl ch->numtslots--; 1673195534Sscottl } 1674195534Sscottl /* If it was first request of reset sequence and there is no error, 1675195534Sscottl * proceed to second request. */ 1676195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1677195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1678195534Sscottl (ccb->ataio.cmd.control & ATA_A_RESET) && 1679195534Sscottl et == AHCI_ERR_NONE) { 1680195534Sscottl ccb->ataio.cmd.control &= ~ATA_A_RESET; 1681195534Sscottl ahci_begin_transaction(dev, ccb); 1682195534Sscottl return; 1683195534Sscottl } 1684198851Smav /* If it was our READ LOG command - process it. */ 1685198851Smav if (ch->readlog) { 1686198851Smav ahci_process_read_log(dev, ccb); 1687195534Sscottl /* If it was NCQ command error, put result on hold. */ 1688198851Smav } else if (et == AHCI_ERR_NCQ) { 1689195534Sscottl ch->hold[slot->slot] = ccb; 1690198851Smav } else 1691195534Sscottl xpt_done(ccb); 1692195534Sscottl /* Unfreeze frozen command. */ 1693199747Smav if (ch->frozen && !ahci_check_collision(dev, ch->frozen)) { 1694195534Sscottl union ccb *fccb = ch->frozen; 1695195534Sscottl ch->frozen = NULL; 1696195534Sscottl ahci_begin_transaction(dev, fccb); 1697195534Sscottl xpt_release_simq(ch->sim, TRUE); 1698195534Sscottl } 1699198851Smav /* If we have no other active commands, ... */ 1700198851Smav if (ch->rslots == 0) { 1701198851Smav /* if there was fatal error - reset port. */ 1702198851Smav if (ch->fatalerr) { 1703198851Smav ahci_reset(dev); 1704198851Smav } 1705198851Smav } 1706196656Smav /* Start PM timer. */ 1707196656Smav if (ch->numrslots == 0 && ch->pm_level > 3) { 1708196656Smav callout_schedule(&ch->pm_timer, 1709196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8); 1710196656Smav } 1711195534Sscottl} 1712195534Sscottl 1713195534Sscottlstatic void 1714195534Sscottlahci_issue_read_log(device_t dev) 1715195534Sscottl{ 1716195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1717195534Sscottl union ccb *ccb; 1718195534Sscottl struct ccb_ataio *ataio; 1719195534Sscottl int i; 1720195534Sscottl 1721195534Sscottl ch->readlog = 1; 1722195534Sscottl /* Find some holden command. */ 1723195534Sscottl for (i = 0; i < ch->numslots; i++) { 1724195534Sscottl if (ch->hold[i]) 1725195534Sscottl break; 1726195534Sscottl } 1727195534Sscottl ccb = xpt_alloc_ccb_nowait(); 1728195534Sscottl if (ccb == NULL) { 1729195534Sscottl device_printf(dev, "Unable allocate READ LOG command"); 1730195534Sscottl return; /* XXX */ 1731195534Sscottl } 1732195534Sscottl ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1733195534Sscottl ccb->ccb_h.func_code = XPT_ATA_IO; 1734195534Sscottl ccb->ccb_h.flags = CAM_DIR_IN; 1735195534Sscottl ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1736195534Sscottl ataio = &ccb->ataio; 1737195534Sscottl ataio->data_ptr = malloc(512, M_AHCI, M_NOWAIT); 1738195534Sscottl if (ataio->data_ptr == NULL) { 1739195534Sscottl device_printf(dev, "Unable allocate memory for READ LOG command"); 1740195534Sscottl return; /* XXX */ 1741195534Sscottl } 1742195534Sscottl ataio->dxfer_len = 512; 1743195534Sscottl bzero(&ataio->cmd, sizeof(ataio->cmd)); 1744195534Sscottl ataio->cmd.flags = CAM_ATAIO_48BIT; 1745195534Sscottl ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1746195534Sscottl ataio->cmd.sector_count = 1; 1747195534Sscottl ataio->cmd.sector_count_exp = 0; 1748195534Sscottl ataio->cmd.lba_low = 0x10; 1749195534Sscottl ataio->cmd.lba_mid = 0; 1750195534Sscottl ataio->cmd.lba_mid_exp = 0; 1751198319Smav /* Freeze SIM while doing READ LOG EXT. */ 1752198319Smav xpt_freeze_simq(ch->sim, 1); 1753195534Sscottl ahci_begin_transaction(dev, ccb); 1754195534Sscottl} 1755195534Sscottl 1756195534Sscottlstatic void 1757195534Sscottlahci_process_read_log(device_t dev, union ccb *ccb) 1758195534Sscottl{ 1759195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1760195534Sscottl uint8_t *data; 1761195534Sscottl struct ata_res *res; 1762195534Sscottl int i; 1763195534Sscottl 1764195534Sscottl ch->readlog = 0; 1765195534Sscottl 1766195534Sscottl data = ccb->ataio.data_ptr; 1767195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1768195534Sscottl (data[0] & 0x80) == 0) { 1769195534Sscottl for (i = 0; i < ch->numslots; i++) { 1770195534Sscottl if (!ch->hold[i]) 1771195534Sscottl continue; 1772195534Sscottl if ((data[0] & 0x1F) == i) { 1773195534Sscottl res = &ch->hold[i]->ataio.res; 1774195534Sscottl res->status = data[2]; 1775195534Sscottl res->error = data[3]; 1776195534Sscottl res->lba_low = data[4]; 1777195534Sscottl res->lba_mid = data[5]; 1778195534Sscottl res->lba_high = data[6]; 1779195534Sscottl res->device = data[7]; 1780195534Sscottl res->lba_low_exp = data[8]; 1781195534Sscottl res->lba_mid_exp = data[9]; 1782195534Sscottl res->lba_high_exp = data[10]; 1783195534Sscottl res->sector_count = data[12]; 1784195534Sscottl res->sector_count_exp = data[13]; 1785195534Sscottl } else { 1786195534Sscottl ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1787195534Sscottl ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1788195534Sscottl } 1789195534Sscottl xpt_done(ch->hold[i]); 1790195534Sscottl ch->hold[i] = NULL; 1791195534Sscottl } 1792195534Sscottl } else { 1793195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1794195534Sscottl device_printf(dev, "Error while READ LOG EXT\n"); 1795195534Sscottl else if ((data[0] & 0x80) == 0) { 1796195534Sscottl device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1797195534Sscottl } 1798195534Sscottl for (i = 0; i < ch->numslots; i++) { 1799195534Sscottl if (!ch->hold[i]) 1800195534Sscottl continue; 1801195534Sscottl xpt_done(ch->hold[i]); 1802195534Sscottl ch->hold[i] = NULL; 1803195534Sscottl } 1804195534Sscottl } 1805195534Sscottl free(ccb->ataio.data_ptr, M_AHCI); 1806195534Sscottl xpt_free_ccb(ccb); 1807198319Smav xpt_release_simq(ch->sim, TRUE); 1808195534Sscottl} 1809195534Sscottl 1810195534Sscottlstatic void 1811195534Sscottlahci_start(device_t dev) 1812195534Sscottl{ 1813195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1814195534Sscottl u_int32_t cmd; 1815195534Sscottl 1816195534Sscottl /* Clear SATA error register */ 1817195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xFFFFFFFF); 1818195534Sscottl /* Clear any interrupts pending on this channel */ 1819195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, 0xFFFFFFFF); 1820195534Sscottl /* Start operations on this channel */ 1821195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 1822195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_ST | 1823195534Sscottl (ch->pm_present ? AHCI_P_CMD_PMA : 0)); 1824195534Sscottl} 1825195534Sscottl 1826195534Sscottlstatic void 1827195534Sscottlahci_stop(device_t dev) 1828195534Sscottl{ 1829195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1830195534Sscottl u_int32_t cmd; 1831195534Sscottl int timeout; 1832195534Sscottl 1833195534Sscottl /* Kill all activity on this channel */ 1834195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 1835195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST); 1836195534Sscottl /* Wait for activity stop. */ 1837195534Sscottl timeout = 0; 1838195534Sscottl do { 1839195534Sscottl DELAY(1000); 1840195534Sscottl if (timeout++ > 1000) { 1841195534Sscottl device_printf(dev, "stopping AHCI engine failed\n"); 1842195534Sscottl break; 1843195534Sscottl } 1844195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CR); 1845195534Sscottl} 1846195534Sscottl 1847195534Sscottlstatic void 1848195534Sscottlahci_clo(device_t dev) 1849195534Sscottl{ 1850195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1851195534Sscottl u_int32_t cmd; 1852195534Sscottl int timeout; 1853195534Sscottl 1854195534Sscottl /* Issue Command List Override if supported */ 1855195534Sscottl if (ch->caps & AHCI_CAP_SCLO) { 1856195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 1857195534Sscottl cmd |= AHCI_P_CMD_CLO; 1858195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd); 1859195534Sscottl timeout = 0; 1860195534Sscottl do { 1861195534Sscottl DELAY(1000); 1862195534Sscottl if (timeout++ > 1000) { 1863195534Sscottl device_printf(dev, "executing CLO failed\n"); 1864195534Sscottl break; 1865195534Sscottl } 1866195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO); 1867195534Sscottl } 1868195534Sscottl} 1869195534Sscottl 1870195534Sscottlstatic void 1871195534Sscottlahci_stop_fr(device_t dev) 1872195534Sscottl{ 1873195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1874195534Sscottl u_int32_t cmd; 1875195534Sscottl int timeout; 1876195534Sscottl 1877195534Sscottl /* Kill all FIS reception on this channel */ 1878195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 1879195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE); 1880195534Sscottl /* Wait for FIS reception stop. */ 1881195534Sscottl timeout = 0; 1882195534Sscottl do { 1883195534Sscottl DELAY(1000); 1884195534Sscottl if (timeout++ > 1000) { 1885195534Sscottl device_printf(dev, "stopping AHCI FR engine failed\n"); 1886195534Sscottl break; 1887195534Sscottl } 1888195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR); 1889195534Sscottl} 1890195534Sscottl 1891195534Sscottlstatic void 1892195534Sscottlahci_start_fr(device_t dev) 1893195534Sscottl{ 1894195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1895195534Sscottl u_int32_t cmd; 1896195534Sscottl 1897195534Sscottl /* Start FIS reception on this channel */ 1898195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 1899195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_FRE); 1900195534Sscottl} 1901195534Sscottl 1902195534Sscottlstatic int 1903195534Sscottlahci_wait_ready(device_t dev, int t) 1904195534Sscottl{ 1905195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1906195534Sscottl int timeout = 0; 1907195534Sscottl uint32_t val; 1908195534Sscottl 1909195534Sscottl while ((val = ATA_INL(ch->r_mem, AHCI_P_TFD)) & 1910195534Sscottl (ATA_S_BUSY | ATA_S_DRQ)) { 1911195534Sscottl DELAY(1000); 1912195534Sscottl if (timeout++ > t) { 1913195534Sscottl device_printf(dev, "port is not ready (timeout %dms) " 1914195534Sscottl "tfd = %08x\n", t, val); 1915195534Sscottl return (EBUSY); 1916195534Sscottl } 1917195534Sscottl } 1918195534Sscottl if (bootverbose) 1919195534Sscottl device_printf(dev, "ready wait time=%dms\n", timeout); 1920195534Sscottl return (0); 1921195534Sscottl} 1922195534Sscottl 1923195534Sscottlstatic void 1924195534Sscottlahci_reset(device_t dev) 1925195534Sscottl{ 1926195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1927196656Smav struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 1928195534Sscottl int i; 1929195534Sscottl 1930195534Sscottl if (bootverbose) 1931195534Sscottl device_printf(dev, "AHCI reset...\n"); 1932195534Sscottl /* Requeue freezed command. */ 1933195534Sscottl if (ch->frozen) { 1934195534Sscottl union ccb *fccb = ch->frozen; 1935195534Sscottl ch->frozen = NULL; 1936195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1937198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1938198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1939198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1940198319Smav } 1941195534Sscottl xpt_done(fccb); 1942195534Sscottl } 1943195534Sscottl /* Kill the engine and requeue all running commands. */ 1944195534Sscottl ahci_stop(dev); 1945195534Sscottl for (i = 0; i < ch->numslots; i++) { 1946195534Sscottl /* Do we have a running request on slot? */ 1947195534Sscottl if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1948195534Sscottl continue; 1949195534Sscottl /* XXX; Commands in loading state. */ 1950195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 1951195534Sscottl } 1952198851Smav for (i = 0; i < ch->numslots; i++) { 1953198851Smav if (!ch->hold[i]) 1954198851Smav continue; 1955198851Smav xpt_done(ch->hold[i]); 1956198851Smav ch->hold[i] = NULL; 1957198851Smav } 1958198851Smav ch->fatalerr = 0; 1959198319Smav /* Tell the XPT about the event */ 1960198319Smav xpt_async(AC_BUS_RESET, ch->path, NULL); 1961195534Sscottl /* Disable port interrupts */ 1962195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1963195534Sscottl /* Reset and reconnect PHY, */ 1964195534Sscottl if (!ahci_sata_phy_reset(dev, 0)) { 1965195534Sscottl if (bootverbose) 1966195534Sscottl device_printf(dev, 1967195534Sscottl "AHCI reset done: phy reset found no device\n"); 1968195534Sscottl ch->devices = 0; 1969195534Sscottl /* Enable wanted port interrupts */ 1970195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 1971195534Sscottl (AHCI_P_IX_CPD | AHCI_P_IX_PRC | AHCI_P_IX_PC)); 1972195534Sscottl return; 1973195534Sscottl } 1974195534Sscottl /* Wait for clearing busy status. */ 1975195534Sscottl if (ahci_wait_ready(dev, 10000)) { 1976195534Sscottl device_printf(dev, "device ready timeout\n"); 1977195534Sscottl ahci_clo(dev); 1978195534Sscottl } 1979195534Sscottl ahci_start(dev); 1980195534Sscottl ch->devices = 1; 1981195534Sscottl /* Enable wanted port interrupts */ 1982195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 1983195534Sscottl (AHCI_P_IX_CPD | AHCI_P_IX_TFE | AHCI_P_IX_HBF | 1984195534Sscottl AHCI_P_IX_HBD | AHCI_P_IX_IF | AHCI_P_IX_OF | 1985195534Sscottl ((ch->pm_level == 0) ? AHCI_P_IX_PRC | AHCI_P_IX_PC : 0) | 1986196656Smav AHCI_P_IX_DP | AHCI_P_IX_UF | (ctlr->ccc ? 0 : AHCI_P_IX_SDB) | 1987196656Smav AHCI_P_IX_DS | AHCI_P_IX_PS | (ctlr->ccc ? 0 : AHCI_P_IX_DHR))); 1988195534Sscottl if (bootverbose) 1989196656Smav device_printf(dev, "AHCI reset done: device found\n"); 1990195534Sscottl} 1991195534Sscottl 1992195534Sscottlstatic int 1993199821Smavahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag) 1994195534Sscottl{ 1995199821Smav struct ahci_channel *ch = device_get_softc(dev); 1996195534Sscottl u_int8_t *fis = &ctp->cfis[0]; 1997195534Sscottl 1998195534Sscottl bzero(ctp->cfis, 64); 1999195534Sscottl fis[0] = 0x27; /* host to device */ 2000195534Sscottl fis[1] = (ccb->ccb_h.target_id & 0x0f); 2001195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2002195534Sscottl fis[1] |= 0x80; 2003195534Sscottl fis[2] = ATA_PACKET_CMD; 2004199821Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2005199821Smav ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 2006195534Sscottl fis[3] = ATA_F_DMA; 2007195534Sscottl else { 2008195534Sscottl fis[5] = ccb->csio.dxfer_len; 2009195534Sscottl fis[6] = ccb->csio.dxfer_len >> 8; 2010195534Sscottl } 2011195534Sscottl fis[7] = ATA_D_LBA; 2012195534Sscottl fis[15] = ATA_A_4BIT; 2013195534Sscottl bzero(ctp->acmd, 32); 2014195534Sscottl bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 2015195534Sscottl ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 2016195534Sscottl ctp->acmd, ccb->csio.cdb_len); 2017195534Sscottl } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 2018195534Sscottl fis[1] |= 0x80; 2019195534Sscottl fis[2] = ccb->ataio.cmd.command; 2020195534Sscottl fis[3] = ccb->ataio.cmd.features; 2021195534Sscottl fis[4] = ccb->ataio.cmd.lba_low; 2022195534Sscottl fis[5] = ccb->ataio.cmd.lba_mid; 2023195534Sscottl fis[6] = ccb->ataio.cmd.lba_high; 2024195534Sscottl fis[7] = ccb->ataio.cmd.device; 2025195534Sscottl fis[8] = ccb->ataio.cmd.lba_low_exp; 2026195534Sscottl fis[9] = ccb->ataio.cmd.lba_mid_exp; 2027195534Sscottl fis[10] = ccb->ataio.cmd.lba_high_exp; 2028195534Sscottl fis[11] = ccb->ataio.cmd.features_exp; 2029195534Sscottl if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 2030195534Sscottl fis[12] = tag << 3; 2031195534Sscottl fis[13] = 0; 2032195534Sscottl } else { 2033195534Sscottl fis[12] = ccb->ataio.cmd.sector_count; 2034195534Sscottl fis[13] = ccb->ataio.cmd.sector_count_exp; 2035195534Sscottl } 2036195534Sscottl fis[15] = ATA_A_4BIT; 2037195534Sscottl } else { 2038195534Sscottl fis[15] = ccb->ataio.cmd.control; 2039195534Sscottl } 2040195534Sscottl return (20); 2041195534Sscottl} 2042195534Sscottl 2043195534Sscottlstatic int 2044195534Sscottlahci_sata_connect(struct ahci_channel *ch) 2045195534Sscottl{ 2046195534Sscottl u_int32_t status; 2047195534Sscottl int timeout; 2048195534Sscottl 2049195534Sscottl /* Wait up to 100ms for "connect well" */ 2050195534Sscottl for (timeout = 0; timeout < 100 ; timeout++) { 2051195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 2052195534Sscottl if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 2053195534Sscottl ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 2054195534Sscottl ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 2055195534Sscottl break; 2056196656Smav if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 2057196656Smav if (bootverbose) { 2058196656Smav device_printf(ch->dev, "SATA offline status=%08x\n", 2059196656Smav status); 2060196656Smav } 2061196656Smav return (0); 2062196656Smav } 2063195534Sscottl DELAY(1000); 2064195534Sscottl } 2065195534Sscottl if (timeout >= 100) { 2066195534Sscottl if (bootverbose) { 2067195534Sscottl device_printf(ch->dev, "SATA connect timeout status=%08x\n", 2068195534Sscottl status); 2069195534Sscottl } 2070195534Sscottl return (0); 2071195534Sscottl } 2072195534Sscottl if (bootverbose) { 2073195534Sscottl device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 2074195534Sscottl timeout, status); 2075195534Sscottl } 2076195534Sscottl /* Clear SATA error register */ 2077195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff); 2078195534Sscottl return (1); 2079195534Sscottl} 2080195534Sscottl 2081195534Sscottlstatic int 2082195534Sscottlahci_sata_phy_reset(device_t dev, int quick) 2083195534Sscottl{ 2084195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2085199821Smav int sata_rev; 2086195534Sscottl uint32_t val; 2087195534Sscottl 2088195534Sscottl if (quick) { 2089195534Sscottl val = ATA_INL(ch->r_mem, AHCI_P_SCTL); 2090195534Sscottl if ((val & ATA_SC_DET_MASK) == ATA_SC_DET_IDLE) 2091195534Sscottl return (ahci_sata_connect(ch)); 2092195534Sscottl } 2093195534Sscottl 2094195534Sscottl if (bootverbose) 2095195534Sscottl device_printf(dev, "hardware reset ...\n"); 2096199821Smav sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 2097199821Smav if (sata_rev == 1) 2098195534Sscottl val = ATA_SC_SPD_SPEED_GEN1; 2099199821Smav else if (sata_rev == 2) 2100195534Sscottl val = ATA_SC_SPD_SPEED_GEN2; 2101199821Smav else if (sata_rev == 3) 2102195534Sscottl val = ATA_SC_SPD_SPEED_GEN3; 2103195534Sscottl else 2104195534Sscottl val = 0; 2105195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2106196656Smav ATA_SC_DET_RESET | val | 2107196656Smav ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER); 2108196656Smav DELAY(5000); 2109196656Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2110195534Sscottl ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 2111195534Sscottl (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 2112196656Smav DELAY(5000); 2113195534Sscottl return (ahci_sata_connect(ch)); 2114195534Sscottl} 2115195534Sscottl 2116195534Sscottlstatic void 2117195534Sscottlahciaction(struct cam_sim *sim, union ccb *ccb) 2118195534Sscottl{ 2119195534Sscottl device_t dev; 2120195534Sscottl struct ahci_channel *ch; 2121195534Sscottl 2122195534Sscottl CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahciaction func_code=%x\n", 2123195534Sscottl ccb->ccb_h.func_code)); 2124195534Sscottl 2125195534Sscottl ch = (struct ahci_channel *)cam_sim_softc(sim); 2126195534Sscottl dev = ch->dev; 2127195534Sscottl switch (ccb->ccb_h.func_code) { 2128195534Sscottl /* Common cases first */ 2129195534Sscottl case XPT_ATA_IO: /* Execute the requested I/O operation */ 2130195534Sscottl case XPT_SCSI_IO: 2131195534Sscottl if (ch->devices == 0) { 2132195534Sscottl ccb->ccb_h.status = CAM_SEL_TIMEOUT; 2133195534Sscottl xpt_done(ccb); 2134195534Sscottl break; 2135195534Sscottl } 2136195534Sscottl /* Check for command collision. */ 2137195534Sscottl if (ahci_check_collision(dev, ccb)) { 2138195534Sscottl /* Freeze command. */ 2139195534Sscottl ch->frozen = ccb; 2140195534Sscottl /* We have only one frozen slot, so freeze simq also. */ 2141195534Sscottl xpt_freeze_simq(ch->sim, 1); 2142195534Sscottl return; 2143195534Sscottl } 2144195534Sscottl ahci_begin_transaction(dev, ccb); 2145195534Sscottl break; 2146195534Sscottl case XPT_EN_LUN: /* Enable LUN as a target */ 2147195534Sscottl case XPT_TARGET_IO: /* Execute target I/O request */ 2148195534Sscottl case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 2149195534Sscottl case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 2150195534Sscottl case XPT_ABORT: /* Abort the specified CCB */ 2151195534Sscottl /* XXX Implement */ 2152195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2153195534Sscottl xpt_done(ccb); 2154195534Sscottl break; 2155195534Sscottl case XPT_SET_TRAN_SETTINGS: 2156195534Sscottl { 2157195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2158199747Smav struct ahci_device *d; 2159195534Sscottl 2160199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2161199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2162199747Smav else 2163199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2164199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 2165199747Smav d->revision = cts->xport_specific.sata.revision; 2166199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 2167199747Smav d->mode = cts->xport_specific.sata.mode; 2168199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 2169199747Smav d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 2170199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 2171199747Smav d->tags = min(ch->numslots, cts->xport_specific.sata.tags); 2172199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) 2173195534Sscottl ch->pm_present = cts->xport_specific.sata.pm_present; 2174195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2175195534Sscottl xpt_done(ccb); 2176195534Sscottl break; 2177195534Sscottl } 2178195534Sscottl case XPT_GET_TRAN_SETTINGS: 2179195534Sscottl /* Get default/user set transfer settings for the target */ 2180195534Sscottl { 2181195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2182199747Smav struct ahci_device *d; 2183195534Sscottl uint32_t status; 2184195534Sscottl 2185199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2186199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2187199747Smav else 2188199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2189195534Sscottl cts->protocol = PROTO_ATA; 2190196656Smav cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 2191195534Sscottl cts->transport = XPORT_SATA; 2192196656Smav cts->transport_version = XPORT_VERSION_UNSPECIFIED; 2193195534Sscottl cts->proto_specific.valid = 0; 2194195534Sscottl cts->xport_specific.sata.valid = 0; 2195199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 2196199747Smav (ccb->ccb_h.target_id == 15 || 2197199747Smav (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 2198195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS) & ATA_SS_SPD_MASK; 2199199747Smav if (status & 0x0f0) { 2200199747Smav cts->xport_specific.sata.revision = 2201199747Smav (status & 0x0f0) >> 4; 2202199747Smav cts->xport_specific.sata.valid |= 2203199747Smav CTS_SATA_VALID_REVISION; 2204199747Smav } 2205195534Sscottl } else { 2206199747Smav cts->xport_specific.sata.revision = d->revision; 2207199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 2208195534Sscottl } 2209199747Smav cts->xport_specific.sata.mode = d->mode; 2210199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 2211199747Smav cts->xport_specific.sata.bytecount = d->bytecount; 2212199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 2213199747Smav cts->xport_specific.sata.pm_present = ch->pm_present; 2214195534Sscottl cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 2215199747Smav cts->xport_specific.sata.tags = d->tags; 2216199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 2217195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2218195534Sscottl xpt_done(ccb); 2219195534Sscottl break; 2220195534Sscottl } 2221195534Sscottl#if 0 2222195534Sscottl case XPT_CALC_GEOMETRY: 2223195534Sscottl { 2224195534Sscottl struct ccb_calc_geometry *ccg; 2225195534Sscottl uint32_t size_mb; 2226195534Sscottl uint32_t secs_per_cylinder; 2227195534Sscottl 2228195534Sscottl ccg = &ccb->ccg; 2229195534Sscottl size_mb = ccg->volume_size 2230195534Sscottl / ((1024L * 1024L) / ccg->block_size); 2231195534Sscottl if (size_mb >= 1024 && (aha->extended_trans != 0)) { 2232195534Sscottl if (size_mb >= 2048) { 2233195534Sscottl ccg->heads = 255; 2234195534Sscottl ccg->secs_per_track = 63; 2235195534Sscottl } else { 2236195534Sscottl ccg->heads = 128; 2237195534Sscottl ccg->secs_per_track = 32; 2238195534Sscottl } 2239195534Sscottl } else { 2240195534Sscottl ccg->heads = 64; 2241195534Sscottl ccg->secs_per_track = 32; 2242195534Sscottl } 2243195534Sscottl secs_per_cylinder = ccg->heads * ccg->secs_per_track; 2244195534Sscottl ccg->cylinders = ccg->volume_size / secs_per_cylinder; 2245195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2246195534Sscottl xpt_done(ccb); 2247195534Sscottl break; 2248195534Sscottl } 2249195534Sscottl#endif 2250195534Sscottl case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 2251195534Sscottl case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2252195534Sscottl ahci_reset(dev); 2253195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2254195534Sscottl xpt_done(ccb); 2255195534Sscottl break; 2256195534Sscottl case XPT_TERM_IO: /* Terminate the I/O process */ 2257195534Sscottl /* XXX Implement */ 2258195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2259195534Sscottl xpt_done(ccb); 2260195534Sscottl break; 2261195534Sscottl case XPT_PATH_INQ: /* Path routing inquiry */ 2262195534Sscottl { 2263195534Sscottl struct ccb_pathinq *cpi = &ccb->cpi; 2264195534Sscottl 2265195534Sscottl cpi->version_num = 1; /* XXX??? */ 2266199278Smav cpi->hba_inquiry = PI_SDTR_ABLE; 2267199278Smav if (ch->caps & AHCI_CAP_SNCQ) 2268199278Smav cpi->hba_inquiry |= PI_TAG_ABLE; 2269195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2270195534Sscottl cpi->hba_inquiry |= PI_SATAPM; 2271195534Sscottl cpi->target_sprt = 0; 2272195534Sscottl cpi->hba_misc = PIM_SEQSCAN; 2273195534Sscottl cpi->hba_eng_cnt = 0; 2274195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2275198322Smav cpi->max_target = 15; 2276195534Sscottl else 2277195534Sscottl cpi->max_target = 0; 2278195534Sscottl cpi->max_lun = 0; 2279195534Sscottl cpi->initiator_id = 0; 2280195534Sscottl cpi->bus_id = cam_sim_bus(sim); 2281195534Sscottl cpi->base_transfer_speed = 150000; 2282195534Sscottl strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 2283195534Sscottl strncpy(cpi->hba_vid, "AHCI", HBA_IDLEN); 2284195534Sscottl strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 2285195534Sscottl cpi->unit_number = cam_sim_unit(sim); 2286195534Sscottl cpi->transport = XPORT_SATA; 2287196656Smav cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 2288195534Sscottl cpi->protocol = PROTO_ATA; 2289196656Smav cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 2290195534Sscottl cpi->maxio = MAXPHYS; 2291196777Smav /* ATI SB600 can't handle 256 sectors with FPDMA (NCQ). */ 2292196777Smav if (pci_get_devid(device_get_parent(dev)) == 0x43801002) 2293196796Smav cpi->maxio = min(cpi->maxio, 128 * 512); 2294195534Sscottl cpi->ccb_h.status = CAM_REQ_CMP; 2295195534Sscottl xpt_done(ccb); 2296195534Sscottl break; 2297195534Sscottl } 2298195534Sscottl default: 2299195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2300195534Sscottl xpt_done(ccb); 2301195534Sscottl break; 2302195534Sscottl } 2303195534Sscottl} 2304195534Sscottl 2305195534Sscottlstatic void 2306195534Sscottlahcipoll(struct cam_sim *sim) 2307195534Sscottl{ 2308195534Sscottl struct ahci_channel *ch = (struct ahci_channel *)cam_sim_softc(sim); 2309195534Sscottl 2310195534Sscottl ahci_ch_intr(ch->dev); 2311195534Sscottl} 2312