if_agevar.h revision 184107
1231200Smm/*-
2231200Smm * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
3231200Smm * All rights reserved.
4231200Smm *
5231200Smm * Redistribution and use in source and binary forms, with or without
6231200Smm * modification, are permitted provided that the following conditions
7231200Smm * are met:
8231200Smm * 1. Redistributions of source code must retain the above copyright
9231200Smm *    notice unmodified, this list of conditions, and the following
10231200Smm *    disclaimer.
11231200Smm * 2. Redistributions in binary form must reproduce the above copyright
12231200Smm *    notice, this list of conditions and the following disclaimer in the
13231200Smm *    documentation and/or other materials provided with the distribution.
14231200Smm *
15231200Smm * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16231200Smm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17231200Smm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18231200Smm * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19231200Smm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20231200Smm * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21231200Smm * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22231200Smm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23231200Smm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24231200Smm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25231200Smm * SUCH DAMAGE.
26231200Smm *
27231200Smm * $FreeBSD: head/sys/dev/age/if_agevar.h 184107 2008-10-21 03:18:02Z kevlo $
28231200Smm */
29231200Smm
30231200Smm#ifndef	_IF_AGEVAR_H
31231200Smm#define	_IF_AGEVAR_H
32231200Smm
33231200Smm#define	AGE_TX_RING_CNT		256
34231200Smm#define	AGE_RX_RING_CNT		256
35231200Smm#define	AGE_RR_RING_CNT		(AGE_TX_RING_CNT + AGE_RX_RING_CNT)
36231200Smm/* The following ring alignments are just guessing. */
37231200Smm#define	AGE_TX_RING_ALIGN	16
38231200Smm#define	AGE_RX_RING_ALIGN	16
39231200Smm#define	AGE_RR_RING_ALIGN	16
40231200Smm#define	AGE_CMB_ALIGN		16
41231200Smm#define	AGE_SMB_ALIGN		16
42231200Smm
43231200Smm#define	AGE_TSO_MAXSEGSIZE	4096
44231200Smm#define	AGE_TSO_MAXSIZE		(65535 + sizeof(struct ether_vlan_header))
45231200Smm#define	AGE_MAXTXSEGS		32
46231200Smm
47231200Smm#define	AGE_ADDR_LO(x)		((uint64_t) (x) & 0xFFFFFFFF)
48248616Smm#define	AGE_ADDR_HI(x)		((uint64_t) (x) >> 32)
49231200Smm
50231200Smm#define	AGE_MSI_MESSAGES	1
51231200Smm#define	AGE_MSIX_MESSAGES	1
52231200Smm
53231200Smm/* TODO : Should get real jumbo MTU size. */
54231200Smm#define AGE_JUMBO_FRAMELEN	10240
55231200Smm#define AGE_JUMBO_MTU					\
56	(AGE_JUMBO_FRAMELEN - ETHER_VLAN_ENCAP_LEN - 	\
57	 ETHER_HDR_LEN - ETHER_CRC_LEN)
58
59#define	AGE_DESC_INC(x, y)	((x) = ((x) + 1) % (y))
60
61#define	AGE_PROC_MIN		30
62#define	AGE_PROC_MAX		(AGE_RX_RING_CNT - 1)
63#define	AGE_PROC_DEFAULT	(AGE_RX_RING_CNT / 2)
64
65struct age_txdesc {
66	struct mbuf		*tx_m;
67	bus_dmamap_t		tx_dmamap;
68	struct tx_desc		*tx_desc;
69};
70
71struct age_rxdesc {
72	struct mbuf 		*rx_m;
73	bus_dmamap_t		rx_dmamap;
74	struct rx_desc		*rx_desc;
75};
76
77struct age_chain_data{
78	bus_dma_tag_t		age_parent_tag;
79	bus_dma_tag_t		age_buffer_tag;
80	bus_dma_tag_t		age_tx_tag;
81	struct age_txdesc	age_txdesc[AGE_TX_RING_CNT];
82	bus_dma_tag_t		age_rx_tag;
83	struct age_rxdesc	age_rxdesc[AGE_RX_RING_CNT];
84	bus_dma_tag_t		age_tx_ring_tag;
85	bus_dmamap_t		age_tx_ring_map;
86	bus_dma_tag_t		age_rx_ring_tag;
87	bus_dmamap_t		age_rx_ring_map;
88	bus_dmamap_t		age_rx_sparemap;
89	bus_dma_tag_t		age_rr_ring_tag;
90	bus_dmamap_t		age_rr_ring_map;
91	bus_dma_tag_t		age_cmb_block_tag;
92	bus_dmamap_t		age_cmb_block_map;
93	bus_dma_tag_t		age_smb_block_tag;
94	bus_dmamap_t		age_smb_block_map;
95
96	int			age_tx_prod;
97	int			age_tx_cons;
98	int			age_tx_cnt;
99	int			age_rx_cons;
100	int			age_rr_cons;
101	int			age_rxlen;
102
103	struct mbuf		*age_rxhead;
104	struct mbuf		*age_rxtail;
105	struct mbuf		*age_rxprev_tail;
106};
107
108struct age_ring_data {
109	struct tx_desc		*age_tx_ring;
110	bus_addr_t		age_tx_ring_paddr;
111	struct rx_desc		*age_rx_ring;
112	bus_addr_t		age_rx_ring_paddr;
113	struct rx_rdesc		*age_rr_ring;
114	bus_addr_t		age_rr_ring_paddr;
115	struct cmb		*age_cmb_block;
116	bus_addr_t		age_cmb_block_paddr;
117	struct smb		*age_smb_block;
118	bus_addr_t		age_smb_block_paddr;
119};
120
121#define AGE_TX_RING_SZ		\
122    (sizeof(struct tx_desc) * AGE_TX_RING_CNT)
123#define AGE_RX_RING_SZ		\
124    (sizeof(struct rx_desc) * AGE_RX_RING_CNT)
125#define	AGE_RR_RING_SZ		\
126    (sizeof(struct rx_rdesc) * AGE_RR_RING_CNT)
127#define	AGE_CMB_BLOCK_SZ	sizeof(struct cmb)
128#define	AGE_SMB_BLOCK_SZ	sizeof(struct smb)
129
130struct age_stats {
131	/* Rx stats. */
132	uint64_t rx_frames;
133	uint64_t rx_bcast_frames;
134	uint64_t rx_mcast_frames;
135	uint32_t rx_pause_frames;
136	uint32_t rx_control_frames;
137	uint32_t rx_crcerrs;
138	uint32_t rx_lenerrs;
139	uint64_t rx_bytes;
140	uint32_t rx_runts;
141	uint64_t rx_fragments;
142	uint64_t rx_pkts_64;
143	uint64_t rx_pkts_65_127;
144	uint64_t rx_pkts_128_255;
145	uint64_t rx_pkts_256_511;
146	uint64_t rx_pkts_512_1023;
147	uint64_t rx_pkts_1024_1518;
148	uint64_t rx_pkts_1519_max;
149	uint64_t rx_pkts_truncated;
150	uint32_t rx_fifo_oflows;
151	uint32_t rx_desc_oflows;
152	uint32_t rx_alignerrs;
153	uint64_t rx_bcast_bytes;
154	uint64_t rx_mcast_bytes;
155	uint64_t rx_pkts_filtered;
156	/* Tx stats. */
157	uint64_t tx_frames;
158	uint64_t tx_bcast_frames;
159	uint64_t tx_mcast_frames;
160	uint32_t tx_pause_frames;
161	uint32_t tx_excess_defer;
162	uint32_t tx_control_frames;
163	uint32_t tx_deferred;
164	uint64_t tx_bytes;
165	uint64_t tx_pkts_64;
166	uint64_t tx_pkts_65_127;
167	uint64_t tx_pkts_128_255;
168	uint64_t tx_pkts_256_511;
169	uint64_t tx_pkts_512_1023;
170	uint64_t tx_pkts_1024_1518;
171	uint64_t tx_pkts_1519_max;
172	uint32_t tx_single_colls;
173	uint32_t tx_multi_colls;
174	uint32_t tx_late_colls;
175	uint32_t tx_excess_colls;
176	uint32_t tx_underrun;
177	uint32_t tx_desc_underrun;
178	uint32_t tx_lenerrs;
179	uint32_t tx_pkts_truncated;
180	uint64_t tx_bcast_bytes;
181	uint64_t tx_mcast_bytes;
182};
183
184/*
185 * Software state per device.
186 */
187struct age_softc {
188	struct ifnet 		*age_ifp;
189	device_t		age_dev;
190	device_t		age_miibus;
191	struct resource		*age_res[1];
192	struct resource_spec	*age_res_spec;
193	struct resource		*age_irq[AGE_MSI_MESSAGES];
194	struct resource_spec	*age_irq_spec;
195	void			*age_intrhand[AGE_MSI_MESSAGES];
196	int			age_rev;
197	int			age_chip_rev;
198	int			age_phyaddr;
199	uint8_t			age_eaddr[ETHER_ADDR_LEN];
200	uint32_t		age_dma_rd_burst;
201	uint32_t		age_dma_wr_burst;
202	int			age_flags;
203#define	AGE_FLAG_PCIE		0x0001
204#define	AGE_FLAG_PCIX		0x0002
205#define	AGE_FLAG_MSI		0x0004
206#define	AGE_FLAG_MSIX		0x0008
207#define	AGE_FLAG_PMCAP		0x0010
208#define	AGE_FLAG_DETACH		0x4000
209#define	AGE_FLAG_LINK		0x8000
210
211	struct callout		age_tick_ch;
212	struct age_stats	age_stat;
213	struct age_chain_data	age_cdata;
214	struct age_ring_data	age_rdata;
215	int			age_if_flags;
216	int			age_watchdog_timer;
217	int			age_process_limit;
218	int			age_int_mod;
219	int			age_max_frame_size;
220	int			age_morework;
221	int			age_rr_prod;
222	int			age_tpd_cons;
223
224	struct task		age_int_task;
225	struct task		age_tx_task;
226	struct task		age_link_task;
227	struct taskqueue	*age_tq;
228	struct mtx		age_mtx;
229};
230
231/* Register access macros. */
232#define CSR_WRITE_4(_sc, reg, val)	\
233	bus_write_4((_sc)->age_res[0], (reg), (val))
234#define CSR_WRITE_2(_sc, reg, val)	\
235	bus_write_2((_sc)->age_res[0], (reg), (val))
236#define CSR_READ_2(_sc, reg)		\
237	bus_read_2((_sc)->age_res[0], (reg))
238#define CSR_READ_4(_sc, reg)		\
239	bus_read_4((_sc)->age_res[0], (reg))
240
241#define AGE_LOCK(_sc)		mtx_lock(&(_sc)->age_mtx)
242#define AGE_UNLOCK(_sc)		mtx_unlock(&(_sc)->age_mtx)
243#define AGE_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->age_mtx, MA_OWNED)
244
245
246#define	AGE_COMMIT_MBOX(_sc)						\
247do {									\
248	CSR_WRITE_4(_sc, AGE_MBOX,					\
249	    (((_sc)->age_cdata.age_rx_cons << MBOX_RD_PROD_IDX_SHIFT) &	\
250	    MBOX_RD_PROD_IDX_MASK) |					\
251	    (((_sc)->age_cdata.age_rr_cons <<				\
252	    MBOX_RRD_CONS_IDX_SHIFT) & MBOX_RRD_CONS_IDX_MASK) |	\
253	    (((_sc)->age_cdata.age_tx_prod << MBOX_TD_PROD_IDX_SHIFT) &	\
254	    MBOX_TD_PROD_IDX_MASK));					\
255} while (0)
256
257#define	AGE_RXCHAIN_RESET(_sc)						\
258do {									\
259	(_sc)->age_cdata.age_rxhead = NULL;				\
260	(_sc)->age_cdata.age_rxtail = NULL;				\
261	(_sc)->age_cdata.age_rxprev_tail = NULL;			\
262	(_sc)->age_cdata.age_rxlen = 0;					\
263} while (0)
264
265#define	AGE_TX_TIMEOUT		5
266#define AGE_RESET_TIMEOUT	100
267#define AGE_TIMEOUT		1000
268#define AGE_PHY_TIMEOUT		1000
269
270#endif	/* _IF_AGEVAR_H */
271