1296177Sjhibbits/******************************************************************************
2296177Sjhibbits
3296177Sjhibbits � 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
4296177Sjhibbits All rights reserved.
5296177Sjhibbits
6296177Sjhibbits This is proprietary source code of Freescale Semiconductor Inc.,
7296177Sjhibbits and its use is subject to the NetComm Device Drivers EULA.
8296177Sjhibbits The copyright notice above does not evidence any actual or intended
9296177Sjhibbits publication of such source code.
10296177Sjhibbits
11296177Sjhibbits ALTERNATIVELY, redistribution and use in source and binary forms, with
12296177Sjhibbits or without modification, are permitted provided that the following
13296177Sjhibbits conditions are met:
14296177Sjhibbits     * Redistributions of source code must retain the above copyright
15296177Sjhibbits       notice, this list of conditions and the following disclaimer.
16296177Sjhibbits     * Redistributions in binary form must reproduce the above copyright
17296177Sjhibbits       notice, this list of conditions and the following disclaimer in the
18296177Sjhibbits       documentation and/or other materials provided with the distribution.
19296177Sjhibbits     * Neither the name of Freescale Semiconductor nor the
20296177Sjhibbits       names of its contributors may be used to endorse or promote products
21296177Sjhibbits       derived from this software without specific prior written permission.
22296177Sjhibbits
23296177Sjhibbits THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24296177Sjhibbits EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25296177Sjhibbits WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26296177Sjhibbits DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27296177Sjhibbits DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28296177Sjhibbits (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29296177Sjhibbits LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30296177Sjhibbits ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31296177Sjhibbits (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32296177Sjhibbits SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33296177Sjhibbits *
34296177Sjhibbits
35296177Sjhibbits **************************************************************************/
36296177Sjhibbits/******************************************************************************
37296177Sjhibbits @File          bm.h
38296177Sjhibbits
39296177Sjhibbits @Description   BM header
40296177Sjhibbits*//***************************************************************************/
41296177Sjhibbits#ifndef __BM_H
42296177Sjhibbits#define __BM_H
43296177Sjhibbits
44296177Sjhibbits#include "bm_ext.h"
45296177Sjhibbits#include "mm_ext.h"
46296177Sjhibbits
47296177Sjhibbits#include "bman_private.h"
48296177Sjhibbits#include "bm_ipc.h"
49296177Sjhibbits
50296177Sjhibbits
51296177Sjhibbits#define __ERR_MODULE__  MODULE_BM
52296177Sjhibbits
53296177Sjhibbits#define BM_NUM_OF_POOLS             64
54296177Sjhibbits#define BM_NUM_OF_PM                8
55296177Sjhibbits
56296177Sjhibbits/**************************************************************************//**
57296177Sjhibbits @Description       Exceptions
58296177Sjhibbits*//***************************************************************************/
59296177Sjhibbits#define BM_EX_INVALID_COMMAND       0x00000010
60296177Sjhibbits#define BM_EX_FBPR_THRESHOLD        0x00000008
61296177Sjhibbits#define BM_EX_MULTI_ECC             0x00000004
62296177Sjhibbits#define BM_EX_SINGLE_ECC            0x00000002
63296177Sjhibbits#define BM_EX_POOLS_AVAIL_STATE     0x00000001
64296177Sjhibbits
65296177Sjhibbits#define GET_EXCEPTION_FLAG(bitMask, exception)                          \
66296177Sjhibbitsswitch(exception){                                                      \
67296177Sjhibbits    case e_BM_EX_INVALID_COMMAND:                                       \
68296177Sjhibbits        bitMask = BM_EX_INVALID_COMMAND; break;                         \
69296177Sjhibbits    case e_BM_EX_FBPR_THRESHOLD:                                        \
70296177Sjhibbits        bitMask = BM_EX_FBPR_THRESHOLD; break;                          \
71296177Sjhibbits    case e_BM_EX_SINGLE_ECC:                                            \
72296177Sjhibbits        bitMask = BM_EX_SINGLE_ECC; break;                              \
73296177Sjhibbits    case e_BM_EX_MULTI_ECC:                                             \
74296177Sjhibbits        bitMask = BM_EX_MULTI_ECC; break;                               \
75296177Sjhibbits    default: bitMask = 0;break;                                         \
76296177Sjhibbits}
77296177Sjhibbits
78296177Sjhibbits/**************************************************************************//**
79296177Sjhibbits @Description       defaults
80296177Sjhibbits*//***************************************************************************/
81296177Sjhibbits/* BM defaults */
82296177Sjhibbits#define DEFAULT_exceptions                  (BM_EX_INVALID_COMMAND      |\
83296177Sjhibbits                                            BM_EX_FBPR_THRESHOLD        |\
84296177Sjhibbits                                            BM_EX_MULTI_ECC             |\
85296177Sjhibbits                                            BM_EX_SINGLE_ECC            )
86296177Sjhibbits
87296177Sjhibbits#define DEFAULT_fbprThreshold               0
88296177Sjhibbits/* BM-Portal defaults */
89296177Sjhibbits#define DEFAULT_memAttr                     MEMORY_ATTR_CACHEABLE
90296177Sjhibbits
91296177Sjhibbits/* BM-Pool defaults */
92296177Sjhibbits#define DEFAULT_dynamicBpid                 TRUE
93296177Sjhibbits#define DEFAULT_useDepletion                FALSE
94296177Sjhibbits#define DEFAULT_useStockpile                FALSE
95296177Sjhibbits#define DEFAULT_numOfBufsPerCmd             8
96296177Sjhibbits
97296177Sjhibbits/**************************************************************************//**
98296177Sjhibbits @Description       Memory Mapped Registers
99296177Sjhibbits*//***************************************************************************/
100296177Sjhibbits
101296177Sjhibbits#if defined(__MWERKS__) && !defined(__GNUC__)
102296177Sjhibbits#pragma pack(push,1)
103296177Sjhibbits#endif /* defined(__MWERKS__) && ... */
104296177Sjhibbits#define MEM_MAP_START
105296177Sjhibbits
106296177Sjhibbitstypedef _Packed struct
107296177Sjhibbits{
108296177Sjhibbits    /* BMan Buffer Pool Configuration & Status Registers */
109296177Sjhibbits    volatile uint32_t   swdet[BM_NUM_OF_POOLS];     /**< S/W Portal depletion entry threshold */
110296177Sjhibbits    volatile uint32_t   hwdet[BM_NUM_OF_POOLS];     /**< H/W Portal depletion entry threshold */
111296177Sjhibbits    volatile uint32_t   swdxt[BM_NUM_OF_POOLS];     /**< S/W Portal depletion exit threshold */
112296177Sjhibbits    volatile uint32_t   hwdxt[BM_NUM_OF_POOLS];     /**< H/W Portal depletion exit threshold */
113296177Sjhibbits    volatile uint32_t   sdcnt[BM_NUM_OF_POOLS];     /**< S/W Portal depletion count */
114296177Sjhibbits    volatile uint32_t   hdcnt[BM_NUM_OF_POOLS];     /**< H/W Portal depletion count */
115296177Sjhibbits    volatile uint32_t   content[BM_NUM_OF_POOLS];   /**< Snapshot of buffer count in Pool */
116296177Sjhibbits    volatile uint32_t   hdptr[BM_NUM_OF_POOLS];     /**< Head Pointer for Pool's FBPR list. */
117296177Sjhibbits
118296177Sjhibbits    /* Free Buffer Proxy Record (FBPR) Manager Query Registers */
119296177Sjhibbits    volatile uint32_t   fbpr_fpc;                   /**< FBPR Free Pool Count */
120296177Sjhibbits    volatile uint32_t   fbpr_fp_lwit;               /**< FBPR Free Pool Low Watermark Interrupt Threshold  */
121296177Sjhibbits    volatile uint8_t    res1[248];                  /**< reserved */
122296177Sjhibbits
123296177Sjhibbits    /* Performance Monitor (PM) Configuration Register */
124296177Sjhibbits    volatile uint32_t   cmd_pm_cfg[BM_NUM_OF_PM];   /**< BMan Command Performance Monitor configuration registers. */
125296177Sjhibbits    volatile uint32_t   fl_pm_cfg[BM_NUM_OF_PM];    /**< BMan Free List Performance Monitor configuration registers */
126296177Sjhibbits    volatile uint8_t    res2[192];                  /**< reserved */
127296177Sjhibbits
128296177Sjhibbits    /* BMan Error Capture Registers */
129296177Sjhibbits    volatile uint32_t   ecsr;                       /**< BMan Error Capture Status Register */
130296177Sjhibbits    volatile uint32_t   ecir;                       /**< BMan Error Capture Information Register */
131296177Sjhibbits    volatile uint32_t   eadr;                       /**< BMan Error Capture Address Register */
132296177Sjhibbits    volatile uint8_t    res3[4];                    /**< reserved */
133296177Sjhibbits    volatile uint32_t   edata[8];                   /**< BMan ECC Error Data Register */
134296177Sjhibbits    volatile uint32_t   sbet;                       /**< BMan Single Bit ECC Error Threshold Register */
135296177Sjhibbits    volatile uint32_t   efcr;                       /**< BMan Error Fetch Capture Register */
136296177Sjhibbits    volatile uint32_t   efar;                       /**< BMan Error Fetch Address Register */
137296177Sjhibbits    volatile uint8_t    res4[68];                   /**< reserved */
138296177Sjhibbits    volatile uint32_t   sbec0;                      /**< BMan Single Bit ECC Error Count 0 Register */
139296177Sjhibbits    volatile uint32_t   sbec1;                      /**< BMan Single Bit ECC Error Count 1 Register */
140296177Sjhibbits    volatile uint8_t    res5[368];                  /**< reserved */
141296177Sjhibbits
142296177Sjhibbits    /* BMan ID/Revision Registers */
143296177Sjhibbits    volatile uint32_t   ip_rev_1;                   /**< BMan IP Block Revision 1 register */
144296177Sjhibbits    volatile uint32_t   ip_rev_2;                   /**< BMan IP Block Revision 2 register */
145296177Sjhibbits
146296177Sjhibbits    /* CoreNet Initiator Interface Memory Window Configuration Registers */
147296177Sjhibbits    volatile uint32_t   fbpr_bare;                  /**< Data Structure Extended Base Address Register */
148296177Sjhibbits    volatile uint32_t   fbpr_bar;                   /**< Data Structure Base Address Register */
149296177Sjhibbits    volatile uint8_t    res6[8];                    /**< reserved */
150296177Sjhibbits    volatile uint32_t   fbpr_ar;                    /**< Data Structure Attributes Register */
151296177Sjhibbits    volatile uint8_t    res7[240];                  /**< reserved */
152296177Sjhibbits    volatile uint32_t   srcidr;                     /**< BMan Source ID Register */
153296177Sjhibbits    volatile uint32_t   liodnr;                     /**< BMan Logical I/O Device Number Register */
154296177Sjhibbits    volatile uint8_t    res8[244];                  /**< reserved */
155296177Sjhibbits
156296177Sjhibbits    /* BMan Interrupt and Error Registers */
157296177Sjhibbits    volatile uint32_t   err_isr;                    /**< BMan Error Interrupt Status Register */
158296177Sjhibbits    volatile uint32_t   err_ier;                    /**< BMan Error Interrupt Enable Register */
159296177Sjhibbits    volatile uint32_t   err_isdr;                   /**< BMan Error Interrupt Status Disable Register */
160296177Sjhibbits    volatile uint32_t   err_iir;                    /**< BMan Error Interrupt Inhibit Register */
161296177Sjhibbits    volatile uint32_t   err_ifr;                    /**< BMan Error Interrupt Force Register */
162296177Sjhibbits} _PackedType t_BmRegs;
163296177Sjhibbits
164296177Sjhibbits#define MEM_MAP_END
165296177Sjhibbits#if defined(__MWERKS__) && !defined(__GNUC__)
166296177Sjhibbits#pragma pack(pop)
167296177Sjhibbits#endif /* defined(__MWERKS__) && ... */
168296177Sjhibbits
169296177Sjhibbits/**************************************************************************//**
170296177Sjhibbits @Description       General defines
171296177Sjhibbits*//***************************************************************************/
172296177Sjhibbits#define MODULE_NAME_SIZE            30
173296177Sjhibbits
174296177Sjhibbits#define FBPR_ENTRY_SIZE             64 /* 64 bytes */
175296177Sjhibbits
176296177Sjhibbits/* Compilation constants */
177296177Sjhibbits#define RCR_THRESH      2    /* reread h/w CI when running out of space */
178296177Sjhibbits#define RCR_ITHRESH     4    /* if RCR congests, interrupt threshold */
179296177Sjhibbits
180296177Sjhibbits/* Lock/unlock portals, subject to "UNLOCKED" flag */
181296177Sjhibbits#define NCSW_PLOCK(p) ((t_BmPortal*)(p))->irq_flags = XX_DisableAllIntr()
182296177Sjhibbits#define PUNLOCK(p) XX_RestoreAllIntr(((t_BmPortal*)(p))->irq_flags)
183296177Sjhibbits
184296177Sjhibbits#define BM_RCR_RING         0
185296177Sjhibbits#define BM_NUM_OF_RINGS     1
186296177Sjhibbits
187296177Sjhibbits/**************************************************************************//**
188296177Sjhibbits @Description       Register defines
189296177Sjhibbits*//***************************************************************************/
190296177Sjhibbits
191296177Sjhibbits/* masks */
192296177Sjhibbits#define REV1_MAJOR_MASK             0x0000FF00
193296177Sjhibbits#define REV1_MINOR_MASK             0x000000FF
194296177Sjhibbits
195296177Sjhibbits#define REV2_INTEG_MASK             0x00FF0000
196296177Sjhibbits#define REV2_ERR_MASK               0x0000FF00
197296177Sjhibbits#define REV2_CFG_MASK               0x000000FF
198296177Sjhibbits
199296177Sjhibbits#define AR_PRIORITY                 0x40000000
200296177Sjhibbits#define AR_SIZE_MASK                0x0000003f
201296177Sjhibbits
202296177Sjhibbits/* shifts */
203296177Sjhibbits#define REV1_MAJOR_SHIFT            8
204296177Sjhibbits#define REV1_MINOR_SHIFT            0
205296177Sjhibbits
206296177Sjhibbits#define REV2_INTEG_SHIFT            16
207296177Sjhibbits#define REV2_ERR_SHIFT              8
208296177Sjhibbits#define REV2_CFG_SHIFT              0
209296177Sjhibbits
210296177Sjhibbits#define AR_SIZE_SHIFT               0
211296177Sjhibbits
212296177Sjhibbitstypedef uint8_t bmRingType_t;
213296177Sjhibbitstypedef uint8_t (t_BmUpdateCb)(struct bm_portal *p_BmPortalLow);
214296177Sjhibbitstypedef void    (t_BmPrefetchCb)(struct bm_portal *p_BmPortalLow);
215296177Sjhibbitstypedef void    (t_BmCommitCb)(struct bm_portal *p_BmPortalLow, uint8_t myverb);
216296177Sjhibbits
217296177Sjhibbitstypedef struct {
218296177Sjhibbits    bool                        useStockpile;       /**<  */
219296177Sjhibbits    bool                        dynamicBpid;        /**< boolean indicates use of dynamic Bpid */
220296177Sjhibbits    bool                        useDepletion;       /**< boolean indicates use of depletion */
221296177Sjhibbits    uint32_t                    depletionThresholds[MAX_DEPLETION_THRESHOLDS];      /**< depletion-entry/exit thresholds, if useThresholds is set. NB:
222296177Sjhibbits                                                         this is only allowed if useThresholds is used and
223296177Sjhibbits                                                         when run in the control plane (which controls Bman CCSR) */
224296177Sjhibbits} t_BmPoolDriverParams;
225296177Sjhibbits
226296177Sjhibbitstypedef struct BmPool {
227296177Sjhibbits    uint8_t                     bpid;           /**< index of the buffer pool to encapsulate (0-63) */
228296177Sjhibbits    t_Handle                    h_Bm;
229296177Sjhibbits    t_Handle                    h_BmPortal;
230296177Sjhibbits    bool                        shadowMode;
231296177Sjhibbits    uint32_t                    numOfBuffers;   /**< Number of buffers use by this pool */
232296177Sjhibbits    t_BufferPoolInfo            bufferPoolInfo; /**< Data buffers pool information */
233296177Sjhibbits    uint32_t                    flags;          /**< bit-mask of BMAN_POOL_FLAG_*** options */
234296177Sjhibbits    t_Handle                    h_App;          /**< opaque user value passed as a parameter to 'cb' */
235296177Sjhibbits    t_BmDepletionCallback       *f_Depletion;   /**< depletion-entry/exit callback, if BMAN_POOL_FLAG_DEPLETION is set */
236296177Sjhibbits    uint32_t                    swDepletionCount;
237296177Sjhibbits    uint32_t                    hwDepletionCount;
238296177Sjhibbits    /* stockpile state - NULL unless BMAN_POOL_FLAG_STOCKPILE is set */
239296177Sjhibbits    struct bm_buffer            *sp;
240296177Sjhibbits    uint16_t                    spFill;
241296177Sjhibbits    uint8_t                     spBufsCmd;
242296177Sjhibbits    uint16_t                    spMaxBufs;
243296177Sjhibbits    uint16_t                    spMinBufs;
244296177Sjhibbits    bool                        noBuffCtxt;
245296177Sjhibbits
246296177Sjhibbits    t_BmPoolDriverParams        *p_BmPoolDriverParams;
247296177Sjhibbits} t_BmPool;
248296177Sjhibbits
249296177Sjhibbitstypedef struct {
250296177Sjhibbits    t_BmUpdateCb            *f_BmUpdateCb;
251296177Sjhibbits    t_BmPrefetchCb          *f_BmPrefetchCb;
252296177Sjhibbits    t_BmCommitCb            *f_BmCommitCb;
253296177Sjhibbits} t_BmPortalCallbacks;
254296177Sjhibbits
255296177Sjhibbitstypedef struct {
256296177Sjhibbits    uint32_t                hwExtStructsMemAttr;
257296177Sjhibbits    struct bman_depletion   mask;
258296177Sjhibbits} t_BmPortalDriverParams;
259296177Sjhibbits
260296177Sjhibbitstypedef struct {
261296177Sjhibbits    t_Handle                h_Bm;
262296177Sjhibbits    struct bm_portal        *p_BmPortalLow;
263296177Sjhibbits    t_BmPortalCallbacks     cbs[BM_NUM_OF_RINGS];
264296177Sjhibbits    int                     irq;
265296177Sjhibbits    int                     cpu; /* This is used for any "core-affine" portals, ie. default portals
266296177Sjhibbits                                  * associated to the corresponding cpu. -1 implies that there is no core
267296177Sjhibbits                                  * affinity configured. */
268296177Sjhibbits    struct bman_depletion   pools[2];   /**< 2-element array. pools[0] is mask, pools[1] is snapshot. */
269296177Sjhibbits    uint32_t                flags;        /**< BMAN_PORTAL_FLAG_*** - static, caller-provided */
270296177Sjhibbits    uint32_t                irq_flags;
271296177Sjhibbits    int                     thresh_set;
272296177Sjhibbits    uint32_t                slowpoll;
273296177Sjhibbits    uint32_t                rcrProd;   /**< The wrap-around rcr_[prod|cons] counters are used to support BMAN_RELEASE_FLAG_WAIT_SYNC. */
274296177Sjhibbits    uint32_t                rcrCons;
275296177Sjhibbits    /**< 64-entry hash-table of pool objects that are tracking depletion
276296177Sjhibbits     * entry/exit (ie. BMAN_POOL_FLAG_DEPLETION). This isn't fast-path, so
277296177Sjhibbits     * we're not fussy about cache-misses and so forth - whereas the above
278296177Sjhibbits     * members should all fit in one cacheline.
279296177Sjhibbits     * BTW, with BM_MAX_NUM_OF_POOLS entries in the hash table and BM_MAX_NUM_OF_POOLS buffer pools to track,
280296177Sjhibbits     * you'll never guess the hash-function ... */
281296177Sjhibbits    t_BmPool                *depletionPoolsTable[BM_MAX_NUM_OF_POOLS];
282296177Sjhibbits    t_BmPortalDriverParams  *p_BmPortalDriverParams;
283296177Sjhibbits} t_BmPortal;
284296177Sjhibbits
285296177Sjhibbitstypedef struct {
286296177Sjhibbits    uint8_t                     partBpidBase;
287296177Sjhibbits    uint8_t                     partNumOfPools;
288296177Sjhibbits    uint32_t                    totalNumOfBuffers;      /**< total number of buffers */
289296177Sjhibbits    uint32_t                    fbprMemPartitionId;
290296177Sjhibbits    uint32_t                    fbprThreshold;
291296177Sjhibbits    uint16_t                    liodn;
292296177Sjhibbits} t_BmDriverParams;
293296177Sjhibbits
294296177Sjhibbitstypedef struct {
295296177Sjhibbits    uint8_t                     guestId;
296296177Sjhibbits    t_Handle                    h_BpidMm;
297296177Sjhibbits    t_Handle                    h_SpinLock;
298296177Sjhibbits    t_Handle                    h_Portals[DPAA_MAX_NUM_OF_SW_PORTALS];
299296177Sjhibbits    t_Handle                    h_Session;
300296177Sjhibbits    char                        moduleName[MODULE_NAME_SIZE];
301296177Sjhibbits    t_BmRegs                    *p_BmRegs;
302296177Sjhibbits    void                        *p_FbprBase;
303296177Sjhibbits    uint32_t                    exceptions;
304296177Sjhibbits    t_BmExceptionsCallback      *f_Exception;
305296177Sjhibbits    t_Handle                    h_App;
306296177Sjhibbits    int                         errIrq;                 /**< error interrupt line; NO_IRQ if interrupts not used */
307296177Sjhibbits    t_BmDriverParams            *p_BmDriverParams;
308296177Sjhibbits} t_Bm;
309296177Sjhibbits
310296177Sjhibbitsstatic __inline__ void BmSetPortalHandle(t_Handle h_Bm, t_Handle h_Portal, e_DpaaSwPortal portalId)
311296177Sjhibbits{
312296177Sjhibbits    ASSERT_COND(!((t_Bm*)h_Bm)->h_Portals[portalId] || !h_Portal);
313296177Sjhibbits    ((t_Bm*)h_Bm)->h_Portals[portalId] = h_Portal;
314296177Sjhibbits}
315296177Sjhibbits
316296177Sjhibbitsstatic __inline__ t_Handle BmGetPortalHandle(t_Handle h_Bm)
317296177Sjhibbits{
318296177Sjhibbits    t_Bm *p_Bm = (t_Bm*)h_Bm;
319296177Sjhibbits    ASSERT_COND(p_Bm);
320296177Sjhibbits    return p_Bm->h_Portals[CORE_GetId()];
321296177Sjhibbits}
322296177Sjhibbits
323296177Sjhibbitsstatic __inline__ uint8_t BmUpdate(t_BmPortal *p_BmPortal, bmRingType_t type)
324296177Sjhibbits{
325296177Sjhibbits    return p_BmPortal->cbs[type].f_BmUpdateCb(p_BmPortal->p_BmPortalLow);
326296177Sjhibbits}
327296177Sjhibbits
328296177Sjhibbitsstatic __inline__ void BmPrefetch(t_BmPortal *p_BmPortal, bmRingType_t type)
329296177Sjhibbits{
330296177Sjhibbits    if (p_BmPortal->cbs[type].f_BmPrefetchCb)
331296177Sjhibbits        p_BmPortal->cbs[type].f_BmPrefetchCb(p_BmPortal->p_BmPortalLow);
332296177Sjhibbits}
333296177Sjhibbits
334296177Sjhibbitsstatic __inline__ void BmCommit(t_BmPortal *p_BmPortal, bmRingType_t type, uint8_t myverb)
335296177Sjhibbits{
336296177Sjhibbits    p_BmPortal->cbs[type].f_BmCommitCb(p_BmPortal->p_BmPortalLow, myverb);
337296177Sjhibbits}
338296177Sjhibbits
339296177Sjhibbitsstatic __inline__ uint32_t BmBpidGet(t_Bm *p_Bm, bool force, uint32_t base)
340296177Sjhibbits{
341296177Sjhibbits    uint64_t ans, size = 1;
342296177Sjhibbits    uint32_t alignment = 1;
343296177Sjhibbits
344296177Sjhibbits    if (force)
345296177Sjhibbits    {
346296177Sjhibbits        if (MM_InRange(p_Bm->h_BpidMm, (uint64_t)base))
347296177Sjhibbits        {
348296177Sjhibbits            ans = MM_GetForce(p_Bm->h_BpidMm,
349296177Sjhibbits                              base,
350296177Sjhibbits                              (int)size,
351296177Sjhibbits                              "BM BPID MEM");
352296177Sjhibbits            ans = base;
353296177Sjhibbits        }
354296177Sjhibbits        else if (p_Bm->h_Session)
355296177Sjhibbits        {
356296177Sjhibbits            t_BmIpcMsg              msg;
357296177Sjhibbits            t_BmIpcReply            reply;
358296177Sjhibbits            uint32_t                replyLength;
359296177Sjhibbits            t_BmIpcBpidParams       ipcBpid;
360296177Sjhibbits            t_Error                 errCode = E_OK;
361296177Sjhibbits
362296177Sjhibbits            memset(&msg, 0, sizeof(t_BmIpcMsg));
363296177Sjhibbits            memset(&reply, 0, sizeof(t_BmIpcReply));
364296177Sjhibbits            ipcBpid.bpid        = (uint8_t)base;
365296177Sjhibbits            msg.msgId           = BM_FORCE_BPID;
366296177Sjhibbits            memcpy(msg.msgBody, &ipcBpid, sizeof(t_BmIpcBpidParams));
367296177Sjhibbits            replyLength = sizeof(uint32_t) + sizeof(uint32_t);
368296177Sjhibbits            if ((errCode = XX_IpcSendMessage(p_Bm->h_Session,
369296177Sjhibbits                                             (uint8_t*)&msg,
370296177Sjhibbits                                             sizeof(msg.msgId) + sizeof(t_BmIpcBpidParams),
371296177Sjhibbits                                             (uint8_t*)&reply,
372296177Sjhibbits                                             &replyLength,
373296177Sjhibbits                                             NULL,
374296177Sjhibbits                                             NULL)) != E_OK)
375296177Sjhibbits            {
376296177Sjhibbits                REPORT_ERROR(MAJOR, errCode, NO_MSG);
377296177Sjhibbits                return (uint32_t)ILLEGAL_BASE;
378296177Sjhibbits            }
379296177Sjhibbits            if (replyLength != (sizeof(uint32_t) + sizeof(uint32_t)))
380296177Sjhibbits            {
381296177Sjhibbits                REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
382296177Sjhibbits                return (uint32_t)ILLEGAL_BASE;
383296177Sjhibbits            }
384296177Sjhibbits            memcpy((uint8_t*)&ans, reply.replyBody, sizeof(uint32_t));
385296177Sjhibbits        }
386296177Sjhibbits        else
387296177Sjhibbits        {
388296177Sjhibbits            DBG(WARNING, ("No Ipc - can't validate bpid."));
389296177Sjhibbits            ans = base;
390296177Sjhibbits        }
391296177Sjhibbits    }
392296177Sjhibbits    else
393296177Sjhibbits        ans = MM_Get(p_Bm->h_BpidMm,
394296177Sjhibbits                     size,
395296177Sjhibbits                     alignment,
396296177Sjhibbits                     "BM BPID MEM");
397296177Sjhibbits    return (uint32_t)ans;
398296177Sjhibbits}
399296177Sjhibbits
400296177Sjhibbitsstatic __inline__ t_Error BmBpidPut(t_Bm *p_Bm, uint32_t base)
401296177Sjhibbits{
402296177Sjhibbits    if (MM_InRange(p_Bm->h_BpidMm, (uint64_t)base))
403296177Sjhibbits    {
404296177Sjhibbits        if (MM_Put(p_Bm->h_BpidMm, (uint64_t)base) != base)
405296177Sjhibbits            return E_OK;
406296177Sjhibbits        else
407296177Sjhibbits            return ERROR_CODE(E_NOT_FOUND);
408296177Sjhibbits    }
409296177Sjhibbits    else if (p_Bm->h_Session)
410296177Sjhibbits    {
411296177Sjhibbits        t_BmIpcMsg              msg;
412296177Sjhibbits        t_BmIpcBpidParams       ipcBpid;
413296177Sjhibbits        t_Error                 errCode = E_OK;
414296177Sjhibbits
415296177Sjhibbits        memset(&msg, 0, sizeof(t_BmIpcMsg));
416296177Sjhibbits        ipcBpid.bpid        = (uint8_t)base;
417296177Sjhibbits        msg.msgId           = BM_PUT_BPID;
418296177Sjhibbits        memcpy(msg.msgBody, &ipcBpid, sizeof(t_BmIpcBpidParams));
419296177Sjhibbits        if ((errCode = XX_IpcSendMessage(p_Bm->h_Session,
420296177Sjhibbits                                         (uint8_t*)&msg,
421296177Sjhibbits                                         sizeof(msg.msgId) + sizeof(t_BmIpcBpidParams),
422296177Sjhibbits                                         NULL,
423296177Sjhibbits                                         NULL,
424296177Sjhibbits                                         NULL,
425296177Sjhibbits                                         NULL)) != E_OK)
426296177Sjhibbits            RETURN_ERROR(MAJOR, errCode, NO_MSG);
427296177Sjhibbits    }
428296177Sjhibbits    else
429296177Sjhibbits        DBG(WARNING, ("No Ipc - can't validate bpid."));
430296177Sjhibbits    return E_OK;
431296177Sjhibbits}
432296177Sjhibbits
433296177Sjhibbits/****************************************/
434296177Sjhibbits/*       Inter-Module functions        */
435296177Sjhibbits/****************************************/
436296177Sjhibbitstypedef enum e_BmInterModuleCounters {
437296177Sjhibbits    e_BM_IM_COUNTERS_FBPR = 0,
438296177Sjhibbits    e_BM_IM_COUNTERS_POOL_CONTENT,
439296177Sjhibbits    e_BM_IM_COUNTERS_POOL_SW_DEPLETION,
440296177Sjhibbits    e_BM_IM_COUNTERS_POOL_HW_DEPLETION
441296177Sjhibbits} e_BmInterModuleCounters;
442296177Sjhibbits
443296177Sjhibbits
444296177Sjhibbitst_Error BmSetPoolThresholds(t_Handle h_Bm, uint8_t bpid, const uint32_t *thresholds);
445296177Sjhibbitst_Error BmUnSetPoolThresholds(t_Handle h_Bm, uint8_t bpid);
446296177Sjhibbitsuint8_t BmPortalAcquire(t_Handle h_BmPortal, uint8_t bpid, struct bm_buffer *bufs, uint8_t num);
447296177Sjhibbitst_Error BmPortalRelease(t_Handle h_BmPortal, uint8_t bpid, struct bm_buffer *bufs, uint8_t num, uint32_t flags);
448296177Sjhibbitst_Error BmPortalQuery(t_Handle h_BmPortal, struct bman_depletion *p_Pools, bool depletion);
449296177Sjhibbitsuint32_t BmGetCounter(t_Handle h_Bm, e_BmInterModuleCounters counter, uint8_t bpid);
450296177Sjhibbitst_Error BmGetRevision(t_Handle h_Bm, t_BmRevisionInfo *p_BmRevisionInfo);
451296177Sjhibbits
452296177Sjhibbits
453296177Sjhibbits#endif /* __BM_H */
454