1/*-
2*******************************************************************************
3Copyright (C) 2015 Annapurna Labs Ltd.
4
5This file may be licensed under the terms of the Annapurna Labs Commercial
6License Agreement.
7
8Alternatively, this file can be distributed under the terms of the GNU General
9Public License V2 as published by the Free Software Foundation and can be
10found at http://www.gnu.org/licenses/gpl-2.0.html
11
12Alternatively, redistribution and use in source and binary forms, with or
13without modification, are permitted provided that the following conditions are
14met:
15
16    *     Redistributions of source code must retain the above copyright notice,
17this list of conditions and the following disclaimer.
18
19    *     Redistributions in binary form must reproduce the above copyright
20notice, this list of conditions and the following disclaimer in
21the documentation and/or other materials provided with the
22distribution.
23
24THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
31ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34
35*******************************************************************************/
36
37
38#ifndef __AL_HAL_UDMA_IOFIC_REG_H
39#define __AL_HAL_UDMA_IOFIC_REG_H
40
41#include "al_hal_iofic_regs.h"
42#ifdef __cplusplus
43extern "C" {
44#endif
45
46/** This structure covers all interrupt registers of a given UDMA, which is
47 * built of an al_iofic_regs, which is the common I/O Fabric Interrupt
48 * controller (IOFIC), and additional two interrupts groups dedicated for the
49 * application-specific engine attached to the UDMA, the interrupt summary
50 * of those two groups routed to gourp D of the main controller.
51 */
52struct udma_iofic_regs {
53	struct al_iofic_regs	main_iofic;
54	uint32_t rsrvd1[(0x1c00) >> 2];
55	struct al_iofic_grp_ctrl secondary_iofic_ctrl[2];
56};
57
58#ifdef __cplusplus
59}
60#endif
61
62#endif /* __AL_HAL_UDMA_IOFIC_REG_H */
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