1/*-
2********************************************************************************
3Copyright (C) 2015 Annapurna Labs Ltd.
4
5This file may be licensed under the terms of the Annapurna Labs Commercial
6License Agreement.
7
8Alternatively, this file can be distributed under the terms of the GNU General
9Public License V2 as published by the Free Software Foundation and can be
10found at http://www.gnu.org/licenses/gpl-2.0.html
11
12Alternatively, redistribution and use in source and binary forms, with or
13without modification, are permitted provided that the following conditions are
14met:
15
16    *     Redistributions of source code must retain the above copyright notice,
17this list of conditions and the following disclaimer.
18
19    *     Redistributions in binary form must reproduce the above copyright
20notice, this list of conditions and the following disclaimer in
21the documentation and/or other materials provided with the
22distribution.
23
24THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
31ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34
35*******************************************************************************/
36
37/**
38 * @defgroup group_interrupts Common I/O Fabric Interrupt Controller
39 * This HAL provides the API for programming the Common I/O Fabric Interrupt
40 * Controller (IOFIC) found in most of the units attached to the I/O Fabric of
41 * Alpine platform
42 *  @{
43 * @file   al_hal_iofic.h
44 *
45 * @brief Header file for the interrupt controller that's embedded in various units
46 *
47 */
48
49#ifndef __AL_HAL_IOFIC_H__
50#define __AL_HAL_IOFIC_H__
51
52#include <al_hal_common.h>
53
54/* *INDENT-OFF* */
55#ifdef __cplusplus
56extern "C" {
57#endif
58/* *INDENT-ON* */
59
60#define AL_IOFIC_MAX_GROUPS	4
61
62/*
63 * Configurations
64 */
65
66/**
67 * Configure the interrupt controller registers, actual interrupts are still
68 * masked at this stage.
69 *
70 * @param regs_base regs pointer to interrupt controller registers
71 * @param group the interrupt group.
72 * @param flags flags of Interrupt Control Register
73 *
74 * @return 0 on success. -EINVAL otherwise.
75 */
76int al_iofic_config(void __iomem *regs_base, int group,
77		   uint32_t flags);
78
79/**
80 * configure the moderation timer resolution for a given group
81 * Applies for both msix and legacy mode.
82 *
83 * @param regs_base pointer to unit registers
84 * @param group the interrupt group
85 * @param resolution resolution of the timer interval, the resolution determines the rate
86 * of decrementing the interval timer, setting value N means that the interval
87 * timer will be decremented each (N+1) * (0.68) micro seconds.
88 *
89 * @return 0 on success. -EINVAL otherwise.
90 */
91int al_iofic_moder_res_config(void __iomem *regs_base, int group,
92			     uint8_t resolution);
93
94/**
95 * configure the moderation timer interval for a given legacy interrupt group
96 *
97 * @param regs_base regs pointer to unit registers
98 * @param group the interrupt group
99 * @param interval between interrupts in resolution units. 0 disable
100 *
101 * @return 0 on success. -EINVAL otherwise.
102 */
103int al_iofic_legacy_moder_interval_config(void __iomem *regs_base, int group,
104					 uint8_t interval);
105
106/**
107 * configure the moderation timer interval for a given msix vector
108 *
109 * @param regs_base pointer to unit registers
110 * @param group the interrupt group
111 * @param vector vector index
112 * @param interval interval between interrupts, 0 disable
113 *
114 * @return 0 on success. -EINVAL otherwise.
115 */
116int al_iofic_msix_moder_interval_config(void __iomem *regs_base, int group,
117				       uint8_t vector, uint8_t interval);
118
119/**
120* configure the vmid attributes for a given msix vector.
121*
122* @param group the interrupt group
123* @param vector index
124* @param vmid the vmid value
125* @param vmid_en take vmid from the intc
126*
127* @return 0 on success. -EINVAL otherwise.
128*/
129int al_iofic_msix_vmid_attributes_config(void __iomem *regs_base, int group,
130				       uint8_t vector, uint32_t vmid, uint8_t vmid_en);
131
132/**
133 * return the offset of the unmask register for a given group.
134 * this function can be used when the upper layer wants to directly
135 * access the unmask regiter and bypass the al_iofic_unmask() API.
136 *
137 * @param regs_base regs pointer to unit registers
138 * @param group the interrupt group
139 * @return the offset of the unmask register.
140 */
141uint32_t __iomem * al_iofic_unmask_offset_get(void __iomem *regs_base, int group);
142
143/**
144 * unmask specific interrupts for a given group
145 * this functions guarantees atomic operations, it is performance optimized as
146 * it will not require read-modify-write. The unmask done using the interrupt
147 * mask clear register, so it's safe to call it while the mask is changed by
148 * the HW (auto mask) or another core.
149 *
150 * @param regs_base pointer to unit registers
151 * @param group the interrupt group
152 * @param mask bitwise of interrupts to unmask, set bits will be unmasked.
153 */
154void al_iofic_unmask(void __iomem *regs_base, int group, uint32_t mask);
155
156/**
157 * mask specific interrupts for a given group
158 * this functions modifies interrupt mask register, the callee must make sure
159 * the mask is not changed by another cpu.
160 *
161 * @param regs_base pointer to unit registers
162 * @param group the interrupt group
163 * @param mask bitwise of interrupts to mask, set bits will be masked.
164 */
165void al_iofic_mask(void __iomem *regs_base, int group, uint32_t mask);
166
167/**
168 * read the mask register for a given group
169 * this functions return the interrupt mask register
170 *
171 * @param regs_base pointer to unit registers
172 * @param group the interrupt group
173 */
174uint32_t al_iofic_read_mask(void __iomem *regs_base, int group);
175
176/**
177 * read interrupt cause register for a given group
178 * this will clear the set bits if the Clear on Read mode enabled.
179 * @param regs_base pointer to unit registers
180 * @param group the interrupt group
181 */
182uint32_t al_iofic_read_cause(void __iomem *regs_base, int group);
183
184/**
185 * clear bits in the interrupt cause register for a given group
186 *
187 * @param regs_base pointer to unit registers
188 * @param group the interrupt group
189 * @param mask bitwise of bits to be cleared, set bits will be cleared.
190 */
191void al_iofic_clear_cause(void __iomem *regs_base, int group, uint32_t mask);
192
193/**
194 * set the cause register for a given group
195 * this function set the cause register. It will generate an interrupt (if
196 * the the interrupt isn't masked )
197 *
198 * @param regs_base pointer to unit registers
199 * @param group the interrupt group
200 * @param mask bitwise of bits to be set.
201 */
202void al_iofic_set_cause(void __iomem *regs_base, int group, uint32_t mask);
203
204/**
205 * unmask specific interrupts from aborting the udma a given group
206 *
207 * @param regs_base pointer to unit registers
208 * @param group the interrupt group
209 * @param mask bitwise of interrupts to mask
210 */
211void al_iofic_abort_mask(void __iomem *regs_base, int group, uint32_t mask);
212
213/**
214 * trigger all interrupts that are waiting for moderation timers to expire
215 *
216 * @param regs_base pointer to unit registers
217 * @param group the interrupt group
218 */
219void al_iofic_interrupt_moderation_reset(void __iomem *regs_base, int group);
220
221#endif
222/** @} end of interrupt controller group */
223