1/*- 2 * Copyright (c) 2015 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * This software was developed by Semihalf under 6 * the sponsorship of the FreeBSD Foundation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h> 31__FBSDID("$FreeBSD$"); 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bitstring.h> 36#include <sys/bus.h> 37#include <sys/kernel.h> 38#include <sys/module.h> 39#include <sys/rman.h> 40 41#include <machine/intr.h> 42#include <machine/resource.h> 43 44#include <dev/ofw/openfirm.h> 45#include <dev/ofw/ofw_bus.h> 46#include <dev/ofw/ofw_bus_subr.h> 47 48#include "gic_v3_reg.h" 49#include "gic_v3_var.h" 50 51/* 52 * FDT glue. 53 */ 54static int gic_v3_fdt_probe(device_t); 55static int gic_v3_fdt_attach(device_t); 56static int gic_v3_fdt_print_child(device_t, device_t); 57 58static struct resource *gic_v3_ofw_bus_alloc_res(device_t, device_t, int, int *, 59 rman_res_t, rman_res_t, rman_res_t, u_int); 60static const struct ofw_bus_devinfo *gic_v3_ofw_get_devinfo(device_t, device_t); 61 62static device_method_t gic_v3_fdt_methods[] = { 63 /* Device interface */ 64 DEVMETHOD(device_probe, gic_v3_fdt_probe), 65 DEVMETHOD(device_attach, gic_v3_fdt_attach), 66 67 /* Bus interface */ 68 DEVMETHOD(bus_print_child, gic_v3_fdt_print_child), 69 DEVMETHOD(bus_alloc_resource, gic_v3_ofw_bus_alloc_res), 70 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 71 72 /* ofw_bus interface */ 73 DEVMETHOD(ofw_bus_get_devinfo, gic_v3_ofw_get_devinfo), 74 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 75 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 76 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 77 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 78 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 79 80 /* End */ 81 DEVMETHOD_END 82}; 83 84DEFINE_CLASS_1(gic, gic_v3_fdt_driver, gic_v3_fdt_methods, 85 sizeof(struct gic_v3_softc), gic_v3_driver); 86 87static devclass_t gic_v3_fdt_devclass; 88 89EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, gic_v3_fdt_devclass, 90 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 91EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, gic_v3_fdt_devclass, 92 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 93 94/* 95 * Helper functions declarations. 96 */ 97static int gic_v3_ofw_bus_attach(device_t); 98 99/* 100 * Device interface. 101 */ 102static int 103gic_v3_fdt_probe(device_t dev) 104{ 105 106 if (!ofw_bus_status_okay(dev)) 107 return (ENXIO); 108 109 if (!ofw_bus_is_compatible(dev, "arm,gic-v3")) 110 return (ENXIO); 111 112 device_set_desc(dev, GIC_V3_DEVSTR); 113 return (BUS_PROBE_DEFAULT); 114} 115 116static int 117gic_v3_fdt_attach(device_t dev) 118{ 119 struct gic_v3_softc *sc; 120 pcell_t redist_regions; 121 intptr_t xref; 122 int err; 123 124 sc = device_get_softc(dev); 125 sc->dev = dev; 126 127 /* 128 * Recover number of the Re-Distributor regions. 129 */ 130 if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions", 131 &redist_regions, sizeof(redist_regions)) <= 0) 132 sc->gic_redists.nregions = 1; 133 else 134 sc->gic_redists.nregions = redist_regions; 135 136 err = gic_v3_attach(dev); 137 if (err != 0) 138 goto error; 139 140 xref = OF_xref_from_node(ofw_bus_get_node(dev)); 141 sc->gic_pic = intr_pic_register(dev, xref); 142 if (sc->gic_pic == NULL) { 143 device_printf(dev, "could not register PIC\n"); 144 err = ENXIO; 145 goto error; 146 } 147 148 if (intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc, 149 GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) { 150 err = ENXIO; 151 goto error; 152 } 153 154 /* 155 * Try to register ITS to this GIC. 156 * GIC will act as a bus in that case. 157 * Failure here will not affect main GIC functionality. 158 */ 159 if (gic_v3_ofw_bus_attach(dev) != 0) { 160 if (bootverbose) { 161 device_printf(dev, 162 "Failed to attach ITS to this GIC\n"); 163 } 164 } 165 166 if (device_get_children(dev, &sc->gic_children, &sc->gic_nchildren) != 0) 167 sc->gic_nchildren = 0; 168 169 return (err); 170 171error: 172 if (bootverbose) { 173 device_printf(dev, 174 "Failed to attach. Error %d\n", err); 175 } 176 /* Failure so free resources */ 177 gic_v3_detach(dev); 178 179 return (err); 180} 181 182/* OFW bus interface */ 183struct gic_v3_ofw_devinfo { 184 struct ofw_bus_devinfo di_dinfo; 185 struct resource_list di_rl; 186}; 187 188static int 189gic_v3_fdt_print_child(device_t bus, device_t child) 190{ 191 struct gic_v3_ofw_devinfo *di = device_get_ivars(child); 192 struct resource_list *rl = &di->di_rl; 193 int retval = 0; 194 195 retval += bus_print_child_header(bus, child); 196 retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 197 retval += bus_print_child_footer(bus, child); 198 199 return (retval); 200} 201 202static const struct ofw_bus_devinfo * 203gic_v3_ofw_get_devinfo(device_t bus __unused, device_t child) 204{ 205 struct gic_v3_ofw_devinfo *di; 206 207 di = device_get_ivars(child); 208 return (&di->di_dinfo); 209} 210 211static struct resource * 212gic_v3_ofw_bus_alloc_res(device_t bus, device_t child, int type, int *rid, 213 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 214{ 215 struct gic_v3_ofw_devinfo *di; 216 struct resource_list_entry *rle; 217 int ranges_len; 218 219 if (RMAN_IS_DEFAULT_RANGE(start, end)) { 220 if ((di = device_get_ivars(child)) == NULL) 221 return (NULL); 222 if (type != SYS_RES_MEMORY) 223 return (NULL); 224 225 /* Find defaults for this rid */ 226 rle = resource_list_find(&di->di_rl, type, *rid); 227 if (rle == NULL) 228 return (NULL); 229 230 start = rle->start; 231 end = rle->end; 232 count = rle->count; 233 } 234 /* 235 * XXX: No ranges remap! 236 * Absolute address is expected. 237 */ 238 if (ofw_bus_has_prop(bus, "ranges")) { 239 ranges_len = OF_getproplen(ofw_bus_get_node(bus), "ranges"); 240 if (ranges_len != 0) { 241 if (bootverbose) { 242 device_printf(child, 243 "Ranges remap not supported\n"); 244 } 245 return (NULL); 246 } 247 } 248 return (bus_generic_alloc_resource(bus, child, type, rid, start, end, 249 count, flags)); 250} 251 252/* Helper functions */ 253 254/* 255 * Bus capability support for GICv3. 256 * Collects and configures device informations and finally 257 * adds ITS device as a child of GICv3 in Newbus hierarchy. 258 */ 259static int 260gic_v3_ofw_bus_attach(device_t dev) 261{ 262 struct gic_v3_ofw_devinfo *di; 263 device_t child; 264 phandle_t parent, node; 265 pcell_t addr_cells, size_cells; 266 267 parent = ofw_bus_get_node(dev); 268 if (parent > 0) { 269 addr_cells = 2; 270 OF_getencprop(parent, "#address-cells", &addr_cells, 271 sizeof(addr_cells)); 272 size_cells = 2; 273 OF_getencprop(parent, "#size-cells", &size_cells, 274 sizeof(size_cells)); 275 /* Iterate through all GIC subordinates */ 276 for (node = OF_child(parent); node > 0; node = OF_peer(node)) { 277 /* Allocate and populate devinfo. */ 278 di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO); 279 if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) { 280 if (bootverbose) { 281 device_printf(dev, 282 "Could not set up devinfo for ITS\n"); 283 } 284 free(di, M_GIC_V3); 285 continue; 286 } 287 288 /* Initialize and populate resource list. */ 289 resource_list_init(&di->di_rl); 290 ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells, 291 &di->di_rl); 292 293 /* Should not have any interrupts, so don't add any */ 294 295 /* Add newbus device for this FDT node */ 296 child = device_add_child(dev, NULL, -1); 297 if (!child) { 298 if (bootverbose) { 299 device_printf(dev, 300 "Could not add child: %s\n", 301 di->di_dinfo.obd_name); 302 } 303 resource_list_free(&di->di_rl); 304 ofw_bus_gen_destroy_devinfo(&di->di_dinfo); 305 free(di, M_GIC_V3); 306 continue; 307 } 308 309 device_set_ivars(child, di); 310 } 311 } 312 313 return (bus_generic_attach(dev)); 314} 315