gic_v3_fdt.c revision 301265 
1/*-
2 * Copyright (c) 2015 The FreeBSD Foundation
3 * All rights reserved.
4 *
5 * This software was developed by Semihalf under
6 * the sponsorship of the FreeBSD Foundation.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/arm64/arm64/gic_v3_fdt.c 301265 2016-06-03 10:28:06Z andrew $");
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/bitstring.h>
36#include <sys/bus.h>
37#include <sys/kernel.h>
38#include <sys/module.h>
39#include <sys/rman.h>
40
41#include <machine/intr.h>
42#include <machine/resource.h>
43
44#include <dev/ofw/openfirm.h>
45#include <dev/ofw/ofw_bus.h>
46#include <dev/ofw/ofw_bus_subr.h>
47
48#include "gic_v3_reg.h"
49#include "gic_v3_var.h"
50
51/*
52 * FDT glue.
53 */
54static int gic_v3_fdt_probe(device_t);
55static int gic_v3_fdt_attach(device_t);
56
57static struct resource *gic_v3_ofw_bus_alloc_res(device_t, device_t, int, int *,
58    rman_res_t, rman_res_t, rman_res_t, u_int);
59static const struct ofw_bus_devinfo *gic_v3_ofw_get_devinfo(device_t, device_t);
60
61static device_method_t gic_v3_fdt_methods[] = {
62	/* Device interface */
63	DEVMETHOD(device_probe,		gic_v3_fdt_probe),
64	DEVMETHOD(device_attach,	gic_v3_fdt_attach),
65
66	/* Bus interface */
67	DEVMETHOD(bus_alloc_resource,		gic_v3_ofw_bus_alloc_res),
68	DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
69
70	/* ofw_bus interface */
71	DEVMETHOD(ofw_bus_get_devinfo,	gic_v3_ofw_get_devinfo),
72	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
73	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
74	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
75	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
76	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
77
78	/* End */
79	DEVMETHOD_END
80};
81
82DEFINE_CLASS_1(gic, gic_v3_fdt_driver, gic_v3_fdt_methods,
83    sizeof(struct gic_v3_softc), gic_v3_driver);
84
85static devclass_t gic_v3_fdt_devclass;
86
87EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, gic_v3_fdt_devclass,
88    0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
89EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, gic_v3_fdt_devclass,
90    0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
91
92/*
93 * Helper functions declarations.
94 */
95static int gic_v3_ofw_bus_attach(device_t);
96
97/*
98 * Device interface.
99 */
100static int
101gic_v3_fdt_probe(device_t dev)
102{
103
104	if (!ofw_bus_status_okay(dev))
105		return (ENXIO);
106
107	if (!ofw_bus_is_compatible(dev, "arm,gic-v3"))
108		return (ENXIO);
109
110	device_set_desc(dev, GIC_V3_DEVSTR);
111	return (BUS_PROBE_DEFAULT);
112}
113
114static int
115gic_v3_fdt_attach(device_t dev)
116{
117	struct gic_v3_softc *sc;
118	pcell_t redist_regions;
119#ifdef INTRNG
120	intptr_t xref;
121#endif
122	int err;
123
124	sc = device_get_softc(dev);
125	sc->dev = dev;
126
127	/*
128	 * Recover number of the Re-Distributor regions.
129	 */
130	if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions",
131	    &redist_regions, sizeof(redist_regions)) <= 0)
132		sc->gic_redists.nregions = 1;
133	else
134		sc->gic_redists.nregions = redist_regions;
135
136	err = gic_v3_attach(dev);
137	if (err != 0)
138		goto error;
139
140#ifdef INTRNG
141	xref = OF_xref_from_node(ofw_bus_get_node(dev));
142	sc->gic_pic = intr_pic_register(dev, xref);
143	if (sc->gic_pic == NULL) {
144		device_printf(dev, "could not register PIC\n");
145		err = ENXIO;
146		goto error;
147	}
148
149	if (intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc,
150	    GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
151		err = ENXIO;
152		goto error;
153	}
154#endif
155
156	/*
157	 * Try to register ITS to this GIC.
158	 * GIC will act as a bus in that case.
159	 * Failure here will not affect main GIC functionality.
160	 */
161	if (gic_v3_ofw_bus_attach(dev) != 0) {
162		if (bootverbose) {
163			device_printf(dev,
164			    "Failed to attach ITS to this GIC\n");
165		}
166	}
167
168#ifdef INTRNG
169	if (device_get_children(dev, &sc->gic_children, &sc->gic_nchildren) != 0)
170		sc->gic_nchildren = 0;
171#endif
172
173	return (err);
174
175error:
176	if (bootverbose) {
177		device_printf(dev,
178		    "Failed to attach. Error %d\n", err);
179	}
180	/* Failure so free resources */
181	gic_v3_detach(dev);
182
183	return (err);
184}
185
186/* OFW bus interface */
187struct gic_v3_ofw_devinfo {
188	struct ofw_bus_devinfo	di_dinfo;
189	struct resource_list	di_rl;
190};
191
192static const struct ofw_bus_devinfo *
193gic_v3_ofw_get_devinfo(device_t bus __unused, device_t child)
194{
195	struct gic_v3_ofw_devinfo *di;
196
197	di = device_get_ivars(child);
198	return (&di->di_dinfo);
199}
200
201static struct resource *
202gic_v3_ofw_bus_alloc_res(device_t bus, device_t child, int type, int *rid,
203    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
204{
205	struct gic_v3_ofw_devinfo *di;
206	struct resource_list_entry *rle;
207	int ranges_len;
208
209	if (RMAN_IS_DEFAULT_RANGE(start, end)) {
210		if ((di = device_get_ivars(child)) == NULL)
211			return (NULL);
212		if (type != SYS_RES_MEMORY)
213			return (NULL);
214
215		/* Find defaults for this rid */
216		rle = resource_list_find(&di->di_rl, type, *rid);
217		if (rle == NULL)
218			return (NULL);
219
220		start = rle->start;
221		end = rle->end;
222		count = rle->count;
223	}
224	/*
225	 * XXX: No ranges remap!
226	 *	Absolute address is expected.
227	 */
228	if (ofw_bus_has_prop(bus, "ranges")) {
229		ranges_len = OF_getproplen(ofw_bus_get_node(bus), "ranges");
230		if (ranges_len != 0) {
231			if (bootverbose) {
232				device_printf(child,
233				    "Ranges remap not supported\n");
234			}
235			return (NULL);
236		}
237	}
238	return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
239	    count, flags));
240}
241
242/* Helper functions */
243
244/*
245 * Bus capability support for GICv3.
246 * Collects and configures device informations and finally
247 * adds ITS device as a child of GICv3 in Newbus hierarchy.
248 */
249static int
250gic_v3_ofw_bus_attach(device_t dev)
251{
252	struct gic_v3_ofw_devinfo *di;
253	device_t child;
254	phandle_t parent, node;
255	pcell_t addr_cells, size_cells;
256
257	parent = ofw_bus_get_node(dev);
258	if (parent > 0) {
259		addr_cells = 2;
260		OF_getencprop(parent, "#address-cells", &addr_cells,
261		    sizeof(addr_cells));
262		size_cells = 2;
263		OF_getencprop(parent, "#size-cells", &size_cells,
264		    sizeof(size_cells));
265		/* Iterate through all GIC subordinates */
266		for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
267			/* Allocate and populate devinfo. */
268			di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO);
269			if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
270				if (bootverbose) {
271					device_printf(dev,
272					    "Could not set up devinfo for ITS\n");
273				}
274				free(di, M_GIC_V3);
275				continue;
276			}
277
278			/* Initialize and populate resource list. */
279			resource_list_init(&di->di_rl);
280			ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells,
281			    &di->di_rl);
282
283			/* Should not have any interrupts, so don't add any */
284
285			/* Add newbus device for this FDT node */
286			child = device_add_child(dev, NULL, -1);
287			if (!child) {
288				if (bootverbose) {
289					device_printf(dev,
290					    "Could not add child: %s\n",
291					    di->di_dinfo.obd_name);
292				}
293				resource_list_free(&di->di_rl);
294				ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
295				free(di, M_GIC_V3);
296				continue;
297			}
298
299			device_set_ivars(child, di);
300		}
301	}
302
303	return (bus_generic_attach(dev));
304}
305
306#ifndef INTRNG
307static int gic_v3_its_fdt_probe(device_t dev);
308
309static device_method_t gic_v3_its_fdt_methods[] = {
310	/* Device interface */
311	DEVMETHOD(device_probe,		gic_v3_its_fdt_probe),
312
313	/* End */
314	DEVMETHOD_END
315};
316
317DEFINE_CLASS_1(its, gic_v3_its_fdt_driver, gic_v3_its_fdt_methods,
318    sizeof(struct gic_v3_its_softc), gic_v3_its_driver);
319
320static devclass_t gic_v3_its_fdt_devclass;
321
322EARLY_DRIVER_MODULE(its, gic, gic_v3_its_fdt_driver,
323    gic_v3_its_fdt_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
324
325static int
326gic_v3_its_fdt_probe(device_t dev)
327{
328
329	if (!ofw_bus_status_okay(dev))
330		return (ENXIO);
331
332	if (!ofw_bus_is_compatible(dev, GIC_V3_ITS_COMPSTR))
333		return (ENXIO);
334
335	device_set_desc(dev, GIC_V3_ITS_DEVSTR);
336	return (BUS_PROBE_DEFAULT);
337}
338#endif
339