gic_v3_fdt.c revision 300149 
1/*-
2 * Copyright (c) 2015 The FreeBSD Foundation
3 * All rights reserved.
4 *
5 * This software was developed by Semihalf under
6 * the sponsorship of the FreeBSD Foundation.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/arm64/arm64/gic_v3_fdt.c 300149 2016-05-18 15:05:44Z andrew $");
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/bitstring.h>
36#include <sys/bus.h>
37#include <sys/kernel.h>
38#include <sys/module.h>
39#include <sys/rman.h>
40
41#include <machine/intr.h>
42#include <machine/resource.h>
43
44#include <dev/ofw/openfirm.h>
45#include <dev/ofw/ofw_bus.h>
46#include <dev/ofw/ofw_bus_subr.h>
47
48#include "gic_v3_reg.h"
49#include "gic_v3_var.h"
50
51/*
52 * FDT glue.
53 */
54static int gic_v3_fdt_probe(device_t);
55static int gic_v3_fdt_attach(device_t);
56
57static struct resource *gic_v3_ofw_bus_alloc_res(device_t, device_t, int, int *,
58    rman_res_t, rman_res_t, rman_res_t, u_int);
59static const struct ofw_bus_devinfo *gic_v3_ofw_get_devinfo(device_t, device_t);
60
61static device_method_t gic_v3_fdt_methods[] = {
62	/* Device interface */
63	DEVMETHOD(device_probe,		gic_v3_fdt_probe),
64	DEVMETHOD(device_attach,	gic_v3_fdt_attach),
65
66	/* Bus interface */
67	DEVMETHOD(bus_alloc_resource,		gic_v3_ofw_bus_alloc_res),
68	DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
69
70	/* ofw_bus interface */
71	DEVMETHOD(ofw_bus_get_devinfo,	gic_v3_ofw_get_devinfo),
72	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
73	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
74	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
75	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
76	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
77
78	/* End */
79	DEVMETHOD_END
80};
81
82DEFINE_CLASS_1(gic, gic_v3_fdt_driver, gic_v3_fdt_methods,
83    sizeof(struct gic_v3_softc), gic_v3_driver);
84
85static devclass_t gic_v3_fdt_devclass;
86
87EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, gic_v3_fdt_devclass,
88    0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
89EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, gic_v3_fdt_devclass,
90    0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
91
92/*
93 * Helper functions declarations.
94 */
95static int gic_v3_ofw_bus_attach(device_t);
96
97/*
98 * Device interface.
99 */
100static int
101gic_v3_fdt_probe(device_t dev)
102{
103
104	if (!ofw_bus_status_okay(dev))
105		return (ENXIO);
106
107	if (!ofw_bus_is_compatible(dev, "arm,gic-v3"))
108		return (ENXIO);
109
110	device_set_desc(dev, GIC_V3_DEVSTR);
111	return (BUS_PROBE_DEFAULT);
112}
113
114static int
115gic_v3_fdt_attach(device_t dev)
116{
117	struct gic_v3_softc *sc;
118	pcell_t redist_regions;
119#ifdef INTRNG
120	intptr_t xref;
121#endif
122	int err;
123
124	sc = device_get_softc(dev);
125	sc->dev = dev;
126
127	/*
128	 * Recover number of the Re-Distributor regions.
129	 */
130	if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions",
131	    &redist_regions, sizeof(redist_regions)) <= 0)
132		sc->gic_redists.nregions = 1;
133	else
134		sc->gic_redists.nregions = redist_regions;
135
136	err = gic_v3_attach(dev);
137	if (err != 0)
138		goto error;
139
140#ifdef INTRNG
141	xref = OF_xref_from_node(ofw_bus_get_node(dev));
142	if (intr_pic_register(dev, xref) == NULL) {
143		device_printf(dev, "could not register PIC\n");
144		goto error;
145	}
146
147	if (intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc,
148	    GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
149		goto error;
150	}
151#endif
152
153	/*
154	 * Try to register ITS to this GIC.
155	 * GIC will act as a bus in that case.
156	 * Failure here will not affect main GIC functionality.
157	 */
158	if (gic_v3_ofw_bus_attach(dev) != 0) {
159		if (bootverbose) {
160			device_printf(dev,
161			    "Failed to attach ITS to this GIC\n");
162		}
163	}
164
165	return (err);
166
167error:
168	if (bootverbose) {
169		device_printf(dev,
170		    "Failed to attach. Error %d\n", err);
171	}
172	/* Failure so free resources */
173	gic_v3_detach(dev);
174
175	return (ENXIO);
176}
177
178/* OFW bus interface */
179struct gic_v3_ofw_devinfo {
180	struct ofw_bus_devinfo	di_dinfo;
181	struct resource_list	di_rl;
182};
183
184static const struct ofw_bus_devinfo *
185gic_v3_ofw_get_devinfo(device_t bus __unused, device_t child)
186{
187	struct gic_v3_ofw_devinfo *di;
188
189	di = device_get_ivars(child);
190	return (&di->di_dinfo);
191}
192
193static struct resource *
194gic_v3_ofw_bus_alloc_res(device_t bus, device_t child, int type, int *rid,
195    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
196{
197	struct gic_v3_ofw_devinfo *di;
198	struct resource_list_entry *rle;
199	int ranges_len;
200
201	if (RMAN_IS_DEFAULT_RANGE(start, end)) {
202		if ((di = device_get_ivars(child)) == NULL)
203			return (NULL);
204		if (type != SYS_RES_MEMORY)
205			return (NULL);
206
207		/* Find defaults for this rid */
208		rle = resource_list_find(&di->di_rl, type, *rid);
209		if (rle == NULL)
210			return (NULL);
211
212		start = rle->start;
213		end = rle->end;
214		count = rle->count;
215	}
216	/*
217	 * XXX: No ranges remap!
218	 *	Absolute address is expected.
219	 */
220	if (ofw_bus_has_prop(bus, "ranges")) {
221		ranges_len = OF_getproplen(ofw_bus_get_node(bus), "ranges");
222		if (ranges_len != 0) {
223			if (bootverbose) {
224				device_printf(child,
225				    "Ranges remap not supported\n");
226			}
227			return (NULL);
228		}
229	}
230	return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
231	    count, flags));
232}
233
234/* Helper functions */
235
236/*
237 * Bus capability support for GICv3.
238 * Collects and configures device informations and finally
239 * adds ITS device as a child of GICv3 in Newbus hierarchy.
240 */
241static int
242gic_v3_ofw_bus_attach(device_t dev)
243{
244	struct gic_v3_ofw_devinfo *di;
245	device_t child;
246	phandle_t parent, node;
247	pcell_t addr_cells, size_cells;
248
249	parent = ofw_bus_get_node(dev);
250	if (parent > 0) {
251		addr_cells = 2;
252		OF_getencprop(parent, "#address-cells", &addr_cells,
253		    sizeof(addr_cells));
254		size_cells = 2;
255		OF_getencprop(parent, "#size-cells", &size_cells,
256		    sizeof(size_cells));
257		/* Iterate through all GIC subordinates */
258		for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
259			/* Allocate and populate devinfo. */
260			di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO);
261			if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
262				if (bootverbose) {
263					device_printf(dev,
264					    "Could not set up devinfo for ITS\n");
265				}
266				free(di, M_GIC_V3);
267				continue;
268			}
269
270			/* Initialize and populate resource list. */
271			resource_list_init(&di->di_rl);
272			ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells,
273			    &di->di_rl);
274
275			/* Should not have any interrupts, so don't add any */
276
277			/* Add newbus device for this FDT node */
278			child = device_add_child(dev, NULL, -1);
279			if (!child) {
280				if (bootverbose) {
281					device_printf(dev,
282					    "Could not add child: %s\n",
283					    di->di_dinfo.obd_name);
284				}
285				resource_list_free(&di->di_rl);
286				ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
287				free(di, M_GIC_V3);
288				continue;
289			}
290
291			device_set_ivars(child, di);
292		}
293	}
294
295	return (bus_generic_attach(dev));
296}
297
298#ifndef INTRNG
299static int gic_v3_its_fdt_probe(device_t dev);
300
301static device_method_t gic_v3_its_fdt_methods[] = {
302	/* Device interface */
303	DEVMETHOD(device_probe,		gic_v3_its_fdt_probe),
304
305	/* End */
306	DEVMETHOD_END
307};
308
309DEFINE_CLASS_1(its, gic_v3_its_fdt_driver, gic_v3_its_fdt_methods,
310    sizeof(struct gic_v3_its_softc), gic_v3_its_driver);
311
312static devclass_t gic_v3_its_fdt_devclass;
313
314EARLY_DRIVER_MODULE(its, gic, gic_v3_its_fdt_driver,
315    gic_v3_its_fdt_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
316
317static int
318gic_v3_its_fdt_probe(device_t dev)
319{
320
321	if (!ofw_bus_status_okay(dev))
322		return (ENXIO);
323
324	if (!ofw_bus_is_compatible(dev, GIC_V3_ITS_COMPSTR))
325		return (ENXIO);
326
327	device_set_desc(dev, GIC_V3_ITS_DEVSTR);
328	return (BUS_PROBE_DEFAULT);
329}
330#endif
331