am335x_lcd.c revision 277716
1251018Sgonzo/*-
2251018Sgonzo * Copyright 2013 Oleksandr Tymoshenko <gonzo@freebsd.org>
3251018Sgonzo * All rights reserved.
4251018Sgonzo *
5251018Sgonzo * Redistribution and use in source and binary forms, with or without
6251018Sgonzo * modification, are permitted provided that the following conditions
7251018Sgonzo * are met:
8251018Sgonzo * 1. Redistributions of source code must retain the above copyright
9251018Sgonzo *    notice, this list of conditions and the following disclaimer.
10251018Sgonzo * 2. Redistributions in binary form must reproduce the above copyright
11251018Sgonzo *    notice, this list of conditions and the following disclaimer in the
12251018Sgonzo *    documentation and/or other materials provided with the distribution.
13251018Sgonzo *
14251018Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15251018Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16251018Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17251018Sgonzo * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18251018Sgonzo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19251018Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20251018Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21251018Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22251018Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23251018Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24251018Sgonzo * SUCH DAMAGE.
25251018Sgonzo */
26251018Sgonzo
27251018Sgonzo#include <sys/cdefs.h>
28251018Sgonzo__FBSDID("$FreeBSD: head/sys/arm/ti/am335x/am335x_lcd.c 277716 2015-01-25 22:08:36Z gonzo $");
29251018Sgonzo
30277716Sgonzo#include "opt_syscons.h"
31251018Sgonzo#include <sys/param.h>
32251018Sgonzo#include <sys/systm.h>
33251018Sgonzo#include <sys/kernel.h>
34251018Sgonzo#include <sys/module.h>
35251018Sgonzo#include <sys/clock.h>
36251018Sgonzo#include <sys/time.h>
37251018Sgonzo#include <sys/bus.h>
38251018Sgonzo#include <sys/lock.h>
39251018Sgonzo#include <sys/mutex.h>
40251018Sgonzo#include <sys/resource.h>
41251018Sgonzo#include <sys/rman.h>
42251018Sgonzo#include <sys/sysctl.h>
43251018Sgonzo#include <vm/vm.h>
44251018Sgonzo#include <vm/pmap.h>
45252282Sgonzo#include <sys/fbio.h>
46252282Sgonzo#include <sys/consio.h>
47252282Sgonzo
48251018Sgonzo#include <machine/bus.h>
49251018Sgonzo
50251018Sgonzo#include <dev/fdt/fdt_common.h>
51251018Sgonzo#include <dev/ofw/openfirm.h>
52251018Sgonzo#include <dev/ofw/ofw_bus.h>
53251018Sgonzo#include <dev/ofw/ofw_bus_subr.h>
54251018Sgonzo
55252282Sgonzo#include <dev/fb/fbreg.h>
56277716Sgonzo#ifdef DEV_SC
57252282Sgonzo#include <dev/syscons/syscons.h>
58277716Sgonzo#else /* VT */
59277716Sgonzo#include <dev/vt/vt.h>
60277716Sgonzo#endif
61252282Sgonzo
62251018Sgonzo#include <arm/ti/ti_prcm.h>
63251018Sgonzo#include <arm/ti/ti_scm.h>
64251018Sgonzo
65251018Sgonzo#include "am335x_lcd.h"
66251018Sgonzo#include "am335x_pwm.h"
67251018Sgonzo
68277716Sgonzo#include "fb_if.h"
69277716Sgonzo
70251018Sgonzo#define	LCD_PID			0x00
71251018Sgonzo#define	LCD_CTRL		0x04
72251018Sgonzo#define		CTRL_DIV_MASK		0xff
73251018Sgonzo#define		CTRL_DIV_SHIFT		8
74251018Sgonzo#define		CTRL_AUTO_UFLOW_RESTART	(1 << 1)
75251018Sgonzo#define		CTRL_RASTER_MODE	1
76251018Sgonzo#define		CTRL_LIDD_MODE		0
77251018Sgonzo#define	LCD_LIDD_CTRL		0x0C
78251018Sgonzo#define	LCD_LIDD_CS0_CONF	0x10
79251018Sgonzo#define	LCD_LIDD_CS0_ADDR	0x14
80251018Sgonzo#define	LCD_LIDD_CS0_DATA	0x18
81251018Sgonzo#define	LCD_LIDD_CS1_CONF	0x1C
82251018Sgonzo#define	LCD_LIDD_CS1_ADDR	0x20
83251018Sgonzo#define	LCD_LIDD_CS1_DATA	0x24
84251018Sgonzo#define	LCD_RASTER_CTRL		0x28
85251018Sgonzo#define		RASTER_CTRL_TFT24_UNPACKED	(1 << 26)
86251018Sgonzo#define		RASTER_CTRL_TFT24		(1 << 25)
87251018Sgonzo#define		RASTER_CTRL_STN565		(1 << 24)
88251018Sgonzo#define		RASTER_CTRL_TFTPMAP		(1 << 23)
89251018Sgonzo#define		RASTER_CTRL_NIBMODE		(1 << 22)
90251018Sgonzo#define		RASTER_CTRL_PALMODE_SHIFT	20
91251018Sgonzo#define		PALETTE_PALETTE_AND_DATA	0x00
92251018Sgonzo#define		PALETTE_PALETTE_ONLY		0x01
93251018Sgonzo#define		PALETTE_DATA_ONLY		0x02
94251018Sgonzo#define		RASTER_CTRL_REQDLY_SHIFT	12
95251018Sgonzo#define		RASTER_CTRL_MONO8B		(1 << 9)
96251018Sgonzo#define		RASTER_CTRL_RBORDER		(1 << 8)
97251018Sgonzo#define		RASTER_CTRL_LCDTFT		(1 << 7)
98251018Sgonzo#define		RASTER_CTRL_LCDBW		(1 << 1)
99251018Sgonzo#define		RASTER_CTRL_LCDEN		(1 << 0)
100251018Sgonzo#define	LCD_RASTER_TIMING_0	0x2C
101251018Sgonzo#define		RASTER_TIMING_0_HBP_SHIFT	24
102251018Sgonzo#define		RASTER_TIMING_0_HFP_SHIFT	16
103251018Sgonzo#define		RASTER_TIMING_0_HSW_SHIFT	10
104251018Sgonzo#define		RASTER_TIMING_0_PPLLSB_SHIFT	4
105251018Sgonzo#define		RASTER_TIMING_0_PPLMSB_SHIFT	3
106251018Sgonzo#define	LCD_RASTER_TIMING_1	0x30
107251018Sgonzo#define		RASTER_TIMING_1_VBP_SHIFT	24
108251018Sgonzo#define		RASTER_TIMING_1_VFP_SHIFT	16
109251018Sgonzo#define		RASTER_TIMING_1_VSW_SHIFT	10
110251018Sgonzo#define		RASTER_TIMING_1_LPP_SHIFT	0
111251018Sgonzo#define	LCD_RASTER_TIMING_2	0x34
112251018Sgonzo#define		RASTER_TIMING_2_HSWHI_SHIFT	27
113251018Sgonzo#define		RASTER_TIMING_2_LPP_B10_SHIFT	26
114251018Sgonzo#define		RASTER_TIMING_2_PHSVS		(1 << 25)
115251018Sgonzo#define		RASTER_TIMING_2_PHSVS_RISE	(1 << 24)
116251018Sgonzo#define		RASTER_TIMING_2_PHSVS_FALL	(0 << 24)
117251018Sgonzo#define		RASTER_TIMING_2_IOE		(1 << 23)
118251018Sgonzo#define		RASTER_TIMING_2_IPC		(1 << 22)
119251018Sgonzo#define		RASTER_TIMING_2_IHS		(1 << 21)
120251018Sgonzo#define		RASTER_TIMING_2_IVS		(1 << 20)
121251018Sgonzo#define		RASTER_TIMING_2_ACBI_SHIFT	16
122251018Sgonzo#define		RASTER_TIMING_2_ACB_SHIFT	8
123251018Sgonzo#define		RASTER_TIMING_2_HBPHI_SHIFT	4
124251018Sgonzo#define		RASTER_TIMING_2_HFPHI_SHIFT	0
125251018Sgonzo#define	LCD_RASTER_SUBPANEL	0x38
126251018Sgonzo#define	LCD_RASTER_SUBPANEL2	0x3C
127251018Sgonzo#define	LCD_LCDDMA_CTRL		0x40
128251018Sgonzo#define		LCDDMA_CTRL_DMA_MASTER_PRIO_SHIFT		16
129251018Sgonzo#define		LCDDMA_CTRL_TH_FIFO_RDY_SHIFT	8
130251018Sgonzo#define		LCDDMA_CTRL_BURST_SIZE_SHIFT	4
131251018Sgonzo#define		LCDDMA_CTRL_BYTES_SWAP		(1 << 3)
132251018Sgonzo#define		LCDDMA_CTRL_BE			(1 << 1)
133251018Sgonzo#define		LCDDMA_CTRL_FB0_ONLY		0
134251018Sgonzo#define		LCDDMA_CTRL_FB0_FB1		(1 << 0)
135251018Sgonzo#define	LCD_LCDDMA_FB0_BASE	0x44
136251018Sgonzo#define	LCD_LCDDMA_FB0_CEILING	0x48
137251018Sgonzo#define	LCD_LCDDMA_FB1_BASE	0x4C
138251018Sgonzo#define	LCD_LCDDMA_FB1_CEILING	0x50
139251018Sgonzo#define	LCD_SYSCONFIG		0x54
140251018Sgonzo#define		SYSCONFIG_STANDBY_FORCE		(0 << 4)
141251018Sgonzo#define		SYSCONFIG_STANDBY_NONE		(1 << 4)
142251018Sgonzo#define		SYSCONFIG_STANDBY_SMART		(2 << 4)
143251018Sgonzo#define		SYSCONFIG_IDLE_FORCE		(0 << 2)
144251018Sgonzo#define		SYSCONFIG_IDLE_NONE		(1 << 2)
145251018Sgonzo#define		SYSCONFIG_IDLE_SMART		(2 << 2)
146251018Sgonzo#define	LCD_IRQSTATUS_RAW	0x58
147251018Sgonzo#define	LCD_IRQSTATUS		0x5C
148251018Sgonzo#define	LCD_IRQENABLE_SET	0x60
149251018Sgonzo#define	LCD_IRQENABLE_CLEAR	0x64
150251018Sgonzo#define		IRQ_EOF1		(1 << 9)
151251018Sgonzo#define		IRQ_EOF0		(1 << 8)
152251018Sgonzo#define		IRQ_PL			(1 << 6)
153251018Sgonzo#define		IRQ_FUF			(1 << 5)
154251018Sgonzo#define		IRQ_ACB			(1 << 3)
155251018Sgonzo#define		IRQ_SYNC_LOST		(1 << 2)
156251018Sgonzo#define		IRQ_RASTER_DONE		(1 << 1)
157251018Sgonzo#define		IRQ_FRAME_DONE		(1 << 0)
158277405Sgonzo#define	LCD_END_OF_INT_IND	0x68
159251018Sgonzo#define	LCD_CLKC_ENABLE		0x6C
160251018Sgonzo#define		CLKC_ENABLE_DMA		(1 << 2)
161251018Sgonzo#define		CLKC_ENABLE_LDID	(1 << 1)
162251018Sgonzo#define		CLKC_ENABLE_CORE	(1 << 0)
163251018Sgonzo#define	LCD_CLKC_RESET		0x70
164251018Sgonzo#define		CLKC_RESET_MAIN		(1 << 3)
165251018Sgonzo#define		CLKC_RESET_DMA		(1 << 2)
166251018Sgonzo#define		CLKC_RESET_LDID		(1 << 1)
167251018Sgonzo#define		CLKC_RESET_CORE		(1 << 0)
168251018Sgonzo
169251018Sgonzo#define	LCD_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
170251018Sgonzo#define	LCD_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
171251018Sgonzo#define	LCD_LOCK_INIT(_sc)	mtx_init(&(_sc)->sc_mtx, \
172251018Sgonzo    device_get_nameunit(_sc->sc_dev), "am335x_lcd", MTX_DEF)
173251018Sgonzo#define	LCD_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->sc_mtx);
174251018Sgonzo
175251018Sgonzo#define	LCD_READ4(_sc, reg)	bus_read_4((_sc)->sc_mem_res, reg);
176251018Sgonzo#define	LCD_WRITE4(_sc, reg, value)	\
177251018Sgonzo    bus_write_4((_sc)->sc_mem_res, reg, value);
178251018Sgonzo
179251018Sgonzo
180251018Sgonzo/* Backlight is controlled by eCAS interface on PWM unit 0 */
181251018Sgonzo#define	PWM_UNIT	0
182251018Sgonzo#define	PWM_PERIOD	100
183251018Sgonzo
184251018Sgonzostruct am335x_lcd_softc {
185251018Sgonzo	device_t		sc_dev;
186277716Sgonzo	struct fb_info		sc_fb_info;
187251018Sgonzo	struct resource		*sc_mem_res;
188251018Sgonzo	struct resource		*sc_irq_res;
189251018Sgonzo	void			*sc_intr_hl;
190251018Sgonzo	struct mtx		sc_mtx;
191251018Sgonzo	int			sc_backlight;
192251018Sgonzo	struct sysctl_oid	*sc_oid;
193251018Sgonzo
194251018Sgonzo	/* Framebuffer */
195251018Sgonzo	bus_dma_tag_t		sc_dma_tag;
196251018Sgonzo	bus_dmamap_t		sc_dma_map;
197251018Sgonzo	size_t			sc_fb_size;
198251018Sgonzo	bus_addr_t		sc_fb_phys;
199251018Sgonzo	uint8_t			*sc_fb_base;
200251018Sgonzo};
201251018Sgonzo
202251018Sgonzostatic void
203251018Sgonzoam335x_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err)
204251018Sgonzo{
205251018Sgonzo	bus_addr_t *addr;
206251018Sgonzo
207251018Sgonzo	if (err)
208251018Sgonzo		return;
209251018Sgonzo
210251018Sgonzo	addr = (bus_addr_t*)arg;
211251018Sgonzo	*addr = segs[0].ds_addr;
212251018Sgonzo}
213251018Sgonzo
214251018Sgonzostatic uint32_t
215251018Sgonzoam335x_lcd_calc_divisor(uint32_t reference, uint32_t freq)
216251018Sgonzo{
217251018Sgonzo	uint32_t div;
218251018Sgonzo	/* Raster mode case: divisors are in range from 2 to 255 */
219251018Sgonzo	for (div = 2; div < 255; div++)
220251018Sgonzo		if (reference/div <= freq)
221251018Sgonzo			return (div);
222251018Sgonzo
223251018Sgonzo	return (255);
224251018Sgonzo}
225251018Sgonzo
226251018Sgonzostatic int
227251018Sgonzoam335x_lcd_sysctl_backlight(SYSCTL_HANDLER_ARGS)
228251018Sgonzo{
229251018Sgonzo	struct am335x_lcd_softc *sc = (struct am335x_lcd_softc*)arg1;
230251018Sgonzo	int error;
231251018Sgonzo	int backlight;
232251018Sgonzo
233267171Skevlo	backlight = sc->sc_backlight;
234251018Sgonzo	error = sysctl_handle_int(oidp, &backlight, 0, req);
235251018Sgonzo
236251018Sgonzo	if (error != 0 || req->newptr == NULL)
237251018Sgonzo		return (error);
238251018Sgonzo
239251018Sgonzo	if (backlight < 0)
240251018Sgonzo		backlight = 0;
241251018Sgonzo	if (backlight > 100)
242251018Sgonzo		backlight = 100;
243251018Sgonzo
244251018Sgonzo	LCD_LOCK(sc);
245251018Sgonzo	error = am335x_pwm_config_ecas(PWM_UNIT, PWM_PERIOD,
246251018Sgonzo	    backlight*PWM_PERIOD/100);
247251018Sgonzo	if (error == 0)
248251018Sgonzo		sc->sc_backlight = backlight;
249251018Sgonzo	LCD_UNLOCK(sc);
250251018Sgonzo
251251018Sgonzo	return (error);
252251018Sgonzo}
253251018Sgonzo
254251018Sgonzostatic int
255251018Sgonzoam335x_read_panel_property(device_t dev, const char *name, uint32_t *val)
256251018Sgonzo{
257251018Sgonzo	phandle_t node;
258251018Sgonzo	pcell_t cell;
259251018Sgonzo
260251018Sgonzo	node = ofw_bus_get_node(dev);
261251018Sgonzo	if ((OF_getprop(node, name, &cell, sizeof(cell))) <= 0) {
262251018Sgonzo		device_printf(dev, "missing '%s' attribute in LCD panel info\n",
263251018Sgonzo		    name);
264251018Sgonzo		return (ENXIO);
265251018Sgonzo	}
266251018Sgonzo
267251018Sgonzo	*val = fdt32_to_cpu(cell);
268251018Sgonzo
269251018Sgonzo	return (0);
270251018Sgonzo}
271251018Sgonzo
272251018Sgonzostatic int
273251018Sgonzoam335x_read_panel_info(device_t dev, struct panel_info *panel)
274251018Sgonzo{
275251018Sgonzo	int error;
276251018Sgonzo
277251018Sgonzo	error = 0;
278251018Sgonzo	if ((error = am335x_read_panel_property(dev,
279251018Sgonzo	    "panel_width", &panel->panel_width)))
280251018Sgonzo		goto out;
281251018Sgonzo
282251018Sgonzo	if ((error = am335x_read_panel_property(dev,
283251018Sgonzo	    "panel_height", &panel->panel_height)))
284251018Sgonzo		goto out;
285251018Sgonzo
286251018Sgonzo	if ((error = am335x_read_panel_property(dev,
287251018Sgonzo	    "panel_hfp", &panel->panel_hfp)))
288251018Sgonzo		goto out;
289251018Sgonzo
290251018Sgonzo	if ((error = am335x_read_panel_property(dev,
291251018Sgonzo	    "panel_hbp", &panel->panel_hbp)))
292251018Sgonzo		goto out;
293251018Sgonzo
294251018Sgonzo	if ((error = am335x_read_panel_property(dev,
295251018Sgonzo	    "panel_hsw", &panel->panel_hsw)))
296251018Sgonzo		goto out;
297251018Sgonzo
298251018Sgonzo	if ((error = am335x_read_panel_property(dev,
299251018Sgonzo	    "panel_vfp", &panel->panel_vfp)))
300251018Sgonzo		goto out;
301251018Sgonzo
302251018Sgonzo	if ((error = am335x_read_panel_property(dev,
303251018Sgonzo	    "panel_vbp", &panel->panel_vbp)))
304251018Sgonzo		goto out;
305251018Sgonzo
306251018Sgonzo	if ((error = am335x_read_panel_property(dev,
307251018Sgonzo	    "panel_vsw", &panel->panel_vsw)))
308251018Sgonzo		goto out;
309251018Sgonzo
310251018Sgonzo	if ((error = am335x_read_panel_property(dev,
311251018Sgonzo	    "panel_pxl_clk", &panel->panel_pxl_clk)))
312251018Sgonzo		goto out;
313251018Sgonzo
314251018Sgonzo	if ((error = am335x_read_panel_property(dev,
315251018Sgonzo	    "panel_invert_pxl_clk", &panel->panel_invert_pxl_clk)))
316251018Sgonzo		goto out;
317251018Sgonzo
318251018Sgonzo	if ((error = am335x_read_panel_property(dev,
319251018Sgonzo	    "ac_bias", &panel->ac_bias)))
320251018Sgonzo		goto out;
321251018Sgonzo
322251018Sgonzo	if ((error = am335x_read_panel_property(dev,
323251018Sgonzo	    "ac_bias_intrpt", &panel->ac_bias_intrpt)))
324251018Sgonzo		goto out;
325251018Sgonzo
326251018Sgonzo	if ((error = am335x_read_panel_property(dev,
327251018Sgonzo	    "dma_burst_sz", &panel->dma_burst_sz)))
328251018Sgonzo		goto out;
329251018Sgonzo
330251018Sgonzo	if ((error = am335x_read_panel_property(dev,
331251018Sgonzo	    "bpp", &panel->bpp)))
332251018Sgonzo		goto out;
333251018Sgonzo
334251018Sgonzo	if ((error = am335x_read_panel_property(dev,
335251018Sgonzo	    "fdd", &panel->fdd)))
336251018Sgonzo		goto out;
337251018Sgonzo
338251018Sgonzo	if ((error = am335x_read_panel_property(dev,
339251018Sgonzo	    "invert_line_clock", &panel->invert_line_clock)))
340251018Sgonzo		goto out;
341251018Sgonzo
342251018Sgonzo	if ((error = am335x_read_panel_property(dev,
343251018Sgonzo	    "invert_frm_clock", &panel->invert_frm_clock)))
344251018Sgonzo		goto out;
345251018Sgonzo
346251018Sgonzo	if ((error = am335x_read_panel_property(dev,
347251018Sgonzo	    "sync_edge", &panel->sync_edge)))
348251018Sgonzo		goto out;
349251018Sgonzo
350251018Sgonzo	error = am335x_read_panel_property(dev,
351251018Sgonzo	    "sync_ctrl", &panel->sync_ctrl);
352251018Sgonzo
353251018Sgonzoout:
354251018Sgonzo	return (error);
355251018Sgonzo}
356251018Sgonzo
357251018Sgonzostatic void
358251018Sgonzoam335x_lcd_intr(void *arg)
359251018Sgonzo{
360251018Sgonzo	struct am335x_lcd_softc *sc = arg;
361251018Sgonzo	uint32_t reg;
362251018Sgonzo
363251018Sgonzo	reg = LCD_READ4(sc, LCD_IRQSTATUS);
364251018Sgonzo	LCD_WRITE4(sc, LCD_IRQSTATUS, reg);
365277632Sgonzo	/* Read value back to make sure it reached the hardware */
366277632Sgonzo	reg = LCD_READ4(sc, LCD_IRQSTATUS);
367251018Sgonzo
368251018Sgonzo	if (reg & IRQ_SYNC_LOST) {
369251018Sgonzo		reg = LCD_READ4(sc, LCD_RASTER_CTRL);
370251018Sgonzo		reg &= ~RASTER_CTRL_LCDEN;
371251018Sgonzo		LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
372251018Sgonzo
373251018Sgonzo		reg = LCD_READ4(sc, LCD_RASTER_CTRL);
374251018Sgonzo		reg |= RASTER_CTRL_LCDEN;
375251018Sgonzo		LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
376277522Sgonzo		goto done;
377251018Sgonzo	}
378251018Sgonzo
379251018Sgonzo	if (reg & IRQ_PL) {
380251018Sgonzo		reg = LCD_READ4(sc, LCD_RASTER_CTRL);
381251018Sgonzo		reg &= ~RASTER_CTRL_LCDEN;
382251018Sgonzo		LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
383251018Sgonzo
384251018Sgonzo		reg = LCD_READ4(sc, LCD_RASTER_CTRL);
385251018Sgonzo		reg |= RASTER_CTRL_LCDEN;
386251018Sgonzo		LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
387277522Sgonzo		goto done;
388251018Sgonzo	}
389251018Sgonzo
390251018Sgonzo	if (reg & IRQ_EOF0) {
391251018Sgonzo		LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys);
392251018Sgonzo		LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1);
393251018Sgonzo		reg &= ~IRQ_EOF0;
394251018Sgonzo	}
395251018Sgonzo
396251018Sgonzo	if (reg & IRQ_EOF1) {
397251018Sgonzo		LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys);
398251018Sgonzo		LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1);
399251018Sgonzo		reg &= ~IRQ_EOF1;
400251018Sgonzo	}
401251018Sgonzo
402251018Sgonzo	if (reg & IRQ_FUF) {
403251018Sgonzo		/* TODO: Handle FUF */
404251018Sgonzo	}
405251018Sgonzo
406251018Sgonzo	if (reg & IRQ_ACB) {
407251018Sgonzo		/* TODO: Handle ACB */
408251018Sgonzo	}
409277405Sgonzo
410277522Sgonzodone:
411277405Sgonzo	LCD_WRITE4(sc, LCD_END_OF_INT_IND, 0);
412277632Sgonzo	/* Read value back to make sure it reached the hardware */
413277632Sgonzo	reg = LCD_READ4(sc, LCD_END_OF_INT_IND);
414251018Sgonzo}
415251018Sgonzo
416251018Sgonzostatic int
417251018Sgonzoam335x_lcd_probe(device_t dev)
418251018Sgonzo{
419277716Sgonzo#ifdef DEV_SC
420252282Sgonzo	int err;
421277716Sgonzo#endif
422252282Sgonzo
423261410Sian	if (!ofw_bus_status_okay(dev))
424261410Sian		return (ENXIO);
425261410Sian
426251018Sgonzo	if (!ofw_bus_is_compatible(dev, "ti,am335x-lcd"))
427251018Sgonzo		return (ENXIO);
428251018Sgonzo
429251018Sgonzo	device_set_desc(dev, "AM335x LCD controller");
430251018Sgonzo
431277716Sgonzo#ifdef DEV_SC
432252282Sgonzo	err = sc_probe_unit(device_get_unit(dev),
433252282Sgonzo	    device_get_flags(dev) | SC_AUTODETECT_KBD);
434252282Sgonzo	if (err != 0)
435252282Sgonzo		return (err);
436277716Sgonzo#endif
437252282Sgonzo
438252282Sgonzo	return (BUS_PROBE_DEFAULT);
439251018Sgonzo}
440251018Sgonzo
441251018Sgonzostatic int
442251018Sgonzoam335x_lcd_attach(device_t dev)
443251018Sgonzo{
444251018Sgonzo	struct am335x_lcd_softc *sc;
445251018Sgonzo	int rid;
446251018Sgonzo	int div;
447251018Sgonzo	struct panel_info panel;
448251018Sgonzo	uint32_t reg, timing0, timing1, timing2;
449251018Sgonzo	struct sysctl_ctx_list *ctx;
450251018Sgonzo	struct sysctl_oid *tree;
451251018Sgonzo	uint32_t burst_log;
452251018Sgonzo	int err;
453251018Sgonzo	size_t dma_size;
454277313Sgonzo	uint32_t hbp, hfp, hsw;
455277313Sgonzo	uint32_t vbp, vfp, vsw;
456277313Sgonzo	uint32_t width, height;
457251018Sgonzo
458251018Sgonzo	sc = device_get_softc(dev);
459251018Sgonzo	sc->sc_dev = dev;
460251018Sgonzo
461251018Sgonzo	if (am335x_read_panel_info(dev, &panel))
462251018Sgonzo		return (ENXIO);
463251018Sgonzo
464251018Sgonzo	int ref_freq = 0;
465251018Sgonzo	ti_prcm_clk_enable(LCDC_CLK);
466251018Sgonzo	if (ti_prcm_clk_get_source_freq(LCDC_CLK, &ref_freq)) {
467251018Sgonzo		device_printf(dev, "Can't get reference frequency\n");
468251018Sgonzo		return (ENXIO);
469251018Sgonzo	}
470251018Sgonzo
471251018Sgonzo	rid = 0;
472251018Sgonzo	sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
473251018Sgonzo	    RF_ACTIVE);
474251018Sgonzo	if (!sc->sc_mem_res) {
475251018Sgonzo		device_printf(dev, "cannot allocate memory window\n");
476251018Sgonzo		return (ENXIO);
477251018Sgonzo	}
478251018Sgonzo
479251018Sgonzo	rid = 0;
480251018Sgonzo	sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
481251018Sgonzo	    RF_ACTIVE);
482251018Sgonzo	if (!sc->sc_irq_res) {
483251018Sgonzo		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
484251018Sgonzo		device_printf(dev, "cannot allocate interrupt\n");
485251018Sgonzo		return (ENXIO);
486251018Sgonzo	}
487251018Sgonzo
488251018Sgonzo	if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
489251018Sgonzo			NULL, am335x_lcd_intr, sc,
490251018Sgonzo			&sc->sc_intr_hl) != 0) {
491251018Sgonzo		bus_release_resource(dev, SYS_RES_IRQ, rid,
492251018Sgonzo		    sc->sc_irq_res);
493251018Sgonzo		bus_release_resource(dev, SYS_RES_MEMORY, rid,
494251018Sgonzo		    sc->sc_mem_res);
495251018Sgonzo		device_printf(dev, "Unable to setup the irq handler.\n");
496251018Sgonzo		return (ENXIO);
497251018Sgonzo	}
498251018Sgonzo
499251018Sgonzo	LCD_LOCK_INIT(sc);
500251018Sgonzo
501251018Sgonzo	/* Panle initialization */
502251018Sgonzo	dma_size = round_page(panel.panel_width*panel.panel_height*panel.bpp/8);
503251018Sgonzo
504251018Sgonzo	/*
505251018Sgonzo	 * Now allocate framebuffer memory
506251018Sgonzo	 */
507251018Sgonzo	err = bus_dma_tag_create(
508251018Sgonzo	    bus_get_dma_tag(dev),
509251018Sgonzo	    4, 0,		/* alignment, boundary */
510251018Sgonzo	    BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
511251018Sgonzo	    BUS_SPACE_MAXADDR,		/* highaddr */
512251018Sgonzo	    NULL, NULL,			/* filter, filterarg */
513251018Sgonzo	    dma_size, 1,			/* maxsize, nsegments */
514251018Sgonzo	    dma_size, 0,			/* maxsegsize, flags */
515251018Sgonzo	    NULL, NULL,			/* lockfunc, lockarg */
516251018Sgonzo	    &sc->sc_dma_tag);
517251018Sgonzo	if (err)
518251018Sgonzo		goto fail;
519251018Sgonzo
520251018Sgonzo	err = bus_dmamem_alloc(sc->sc_dma_tag, (void **)&sc->sc_fb_base,
521252282Sgonzo	    BUS_DMA_COHERENT, &sc->sc_dma_map);
522251018Sgonzo
523251018Sgonzo	if (err) {
524251018Sgonzo		device_printf(dev, "cannot allocate framebuffer\n");
525251018Sgonzo		goto fail;
526251018Sgonzo	}
527251018Sgonzo
528251018Sgonzo	err = bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, sc->sc_fb_base,
529251018Sgonzo	    dma_size, am335x_fb_dmamap_cb, &sc->sc_fb_phys, BUS_DMA_NOWAIT);
530251018Sgonzo
531251018Sgonzo	if (err) {
532251018Sgonzo		device_printf(dev, "cannot load DMA map\n");
533251018Sgonzo		goto fail;
534251018Sgonzo	}
535251018Sgonzo
536251018Sgonzo	/* Make sure it's blank */
537251018Sgonzo	memset(sc->sc_fb_base, 0x00, dma_size);
538251018Sgonzo
539251018Sgonzo	/* Calculate actual FB Size */
540251018Sgonzo	sc->sc_fb_size = panel.panel_width*panel.panel_height*panel.bpp/8;
541251018Sgonzo
542251018Sgonzo	/* Only raster mode is supported */
543251018Sgonzo	reg = CTRL_RASTER_MODE;
544251018Sgonzo	div = am335x_lcd_calc_divisor(ref_freq, panel.panel_pxl_clk);
545251018Sgonzo	reg |= (div << CTRL_DIV_SHIFT);
546251018Sgonzo	LCD_WRITE4(sc, LCD_CTRL, reg);
547251018Sgonzo
548251018Sgonzo	/* Set timing */
549251018Sgonzo	timing0 = timing1 = timing2 = 0;
550251018Sgonzo
551277313Sgonzo	hbp = panel.panel_hbp - 1;
552277313Sgonzo	hfp = panel.panel_hfp - 1;
553277313Sgonzo	hsw = panel.panel_hsw - 1;
554277313Sgonzo
555277313Sgonzo	vbp = panel.panel_vbp;
556277313Sgonzo	vfp = panel.panel_vfp;
557277313Sgonzo	vsw = panel.panel_vsw - 1;
558277313Sgonzo
559277313Sgonzo	height = panel.panel_height - 1;
560277313Sgonzo	width = panel.panel_width - 1;
561277313Sgonzo
562251018Sgonzo	/* Horizontal back porch */
563277313Sgonzo	timing0 |= (hbp & 0xff) << RASTER_TIMING_0_HBP_SHIFT;
564277313Sgonzo	timing2 |= ((hbp >> 8) & 3) << RASTER_TIMING_2_HBPHI_SHIFT;
565251018Sgonzo	/* Horizontal front porch */
566277313Sgonzo	timing0 |= (hfp & 0xff) << RASTER_TIMING_0_HFP_SHIFT;
567277313Sgonzo	timing2 |= ((hfp >> 8) & 3) << RASTER_TIMING_2_HFPHI_SHIFT;
568251018Sgonzo	/* Horizontal sync width */
569277313Sgonzo	timing0 |= (hsw & 0x3f) << RASTER_TIMING_0_HSW_SHIFT;
570277313Sgonzo	timing2 |= ((hsw >> 6) & 0xf) << RASTER_TIMING_2_HSWHI_SHIFT;
571251018Sgonzo
572251018Sgonzo	/* Vertical back porch, front porch, sync width */
573277313Sgonzo	timing1 |= (vbp & 0xff) << RASTER_TIMING_1_VBP_SHIFT;
574277313Sgonzo	timing1 |= (vfp & 0xff) << RASTER_TIMING_1_VFP_SHIFT;
575277313Sgonzo	timing1 |= (vsw & 0x3f) << RASTER_TIMING_1_VSW_SHIFT;
576251018Sgonzo
577251018Sgonzo	/* Pixels per line */
578277313Sgonzo	timing0 |= ((width >> 10) & 1)
579251018Sgonzo	    << RASTER_TIMING_0_PPLMSB_SHIFT;
580277313Sgonzo	timing0 |= ((width >> 4) & 0x3f)
581251018Sgonzo	    << RASTER_TIMING_0_PPLLSB_SHIFT;
582251018Sgonzo
583251018Sgonzo	/* Lines per panel */
584277313Sgonzo	timing1 |= (height & 0x3ff)
585251018Sgonzo	    << RASTER_TIMING_1_LPP_SHIFT;
586277313Sgonzo	timing2 |= ((height >> 10 ) & 1)
587251018Sgonzo	    << RASTER_TIMING_2_LPP_B10_SHIFT;
588251018Sgonzo
589251018Sgonzo	/* clock signal settings */
590251018Sgonzo	if (panel.sync_ctrl)
591251018Sgonzo		timing2 |= RASTER_TIMING_2_PHSVS;
592251018Sgonzo	if (panel.sync_edge)
593251018Sgonzo		timing2 |= RASTER_TIMING_2_PHSVS_RISE;
594251018Sgonzo	else
595251018Sgonzo		timing2 |= RASTER_TIMING_2_PHSVS_FALL;
596251018Sgonzo	if (panel.invert_line_clock)
597251018Sgonzo		timing2 |= RASTER_TIMING_2_IHS;
598251018Sgonzo	if (panel.invert_frm_clock)
599251018Sgonzo		timing2 |= RASTER_TIMING_2_IVS;
600251018Sgonzo	if (panel.panel_invert_pxl_clk)
601251018Sgonzo		timing2 |= RASTER_TIMING_2_IPC;
602251018Sgonzo
603251018Sgonzo	/* AC bias */
604251018Sgonzo	timing2 |= (panel.ac_bias << RASTER_TIMING_2_ACB_SHIFT);
605251018Sgonzo	timing2 |= (panel.ac_bias_intrpt << RASTER_TIMING_2_ACBI_SHIFT);
606251018Sgonzo
607251018Sgonzo	LCD_WRITE4(sc, LCD_RASTER_TIMING_0, timing0);
608251018Sgonzo	LCD_WRITE4(sc, LCD_RASTER_TIMING_1, timing1);
609251018Sgonzo	LCD_WRITE4(sc, LCD_RASTER_TIMING_2, timing2);
610251018Sgonzo
611251018Sgonzo	/* DMA settings */
612251018Sgonzo	reg = LCDDMA_CTRL_FB0_FB1;
613251018Sgonzo	/* Find power of 2 for current burst size */
614251018Sgonzo	switch (panel.dma_burst_sz) {
615251018Sgonzo	case 1:
616251018Sgonzo		burst_log = 0;
617251018Sgonzo		break;
618251018Sgonzo	case 2:
619251018Sgonzo		burst_log = 1;
620251018Sgonzo		break;
621251018Sgonzo	case 4:
622251018Sgonzo		burst_log = 2;
623251018Sgonzo		break;
624251018Sgonzo	case 8:
625251018Sgonzo		burst_log = 3;
626251018Sgonzo		break;
627251018Sgonzo	case 16:
628251018Sgonzo	default:
629251018Sgonzo		burst_log = 4;
630251018Sgonzo		break;
631251018Sgonzo	}
632251018Sgonzo	reg |= (burst_log << LCDDMA_CTRL_BURST_SIZE_SHIFT);
633251018Sgonzo	/* XXX: FIFO TH */
634251018Sgonzo	reg |= (0 << LCDDMA_CTRL_TH_FIFO_RDY_SHIFT);
635251018Sgonzo	LCD_WRITE4(sc, LCD_LCDDMA_CTRL, reg);
636251018Sgonzo
637251018Sgonzo	LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys);
638251018Sgonzo	LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1);
639251018Sgonzo	LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys);
640251018Sgonzo	LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1);
641251018Sgonzo
642251018Sgonzo	/* Enable LCD */
643251018Sgonzo	reg = RASTER_CTRL_LCDTFT;
644251018Sgonzo	reg |= (panel.fdd << RASTER_CTRL_REQDLY_SHIFT);
645251018Sgonzo	reg |= (PALETTE_DATA_ONLY << RASTER_CTRL_PALMODE_SHIFT);
646251018Sgonzo	if (panel.bpp >= 24)
647251018Sgonzo		reg |= RASTER_CTRL_TFT24;
648251018Sgonzo	if (panel.bpp == 32)
649251018Sgonzo		reg |= RASTER_CTRL_TFT24_UNPACKED;
650251018Sgonzo	LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
651251018Sgonzo
652251018Sgonzo	LCD_WRITE4(sc, LCD_CLKC_ENABLE,
653251018Sgonzo	    CLKC_ENABLE_DMA | CLKC_ENABLE_LDID | CLKC_ENABLE_CORE);
654251018Sgonzo
655251018Sgonzo	LCD_WRITE4(sc, LCD_CLKC_RESET, CLKC_RESET_MAIN);
656251018Sgonzo	DELAY(100);
657251018Sgonzo	LCD_WRITE4(sc, LCD_CLKC_RESET, 0);
658251018Sgonzo
659251018Sgonzo	reg = IRQ_EOF1 | IRQ_EOF0 | IRQ_FUF | IRQ_PL |
660251018Sgonzo	    IRQ_ACB | IRQ_SYNC_LOST |  IRQ_RASTER_DONE |
661251018Sgonzo	    IRQ_FRAME_DONE;
662251018Sgonzo	LCD_WRITE4(sc, LCD_IRQENABLE_SET, reg);
663251018Sgonzo
664251018Sgonzo	reg = LCD_READ4(sc, LCD_RASTER_CTRL);
665251018Sgonzo 	reg |= RASTER_CTRL_LCDEN;
666251018Sgonzo	LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
667251018Sgonzo
668251018Sgonzo	LCD_WRITE4(sc, LCD_SYSCONFIG,
669251018Sgonzo	    SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLE_SMART);
670251018Sgonzo
671251018Sgonzo	/* Init backlight interface */
672251018Sgonzo	ctx = device_get_sysctl_ctx(sc->sc_dev);
673251018Sgonzo	tree = device_get_sysctl_tree(sc->sc_dev);
674251018Sgonzo	sc->sc_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
675251018Sgonzo	    "backlight", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
676251018Sgonzo	    am335x_lcd_sysctl_backlight, "I", "LCD backlight");
677251018Sgonzo	sc->sc_backlight = 0;
678251018Sgonzo	/* Check if eCAS interface is available at this point */
679251018Sgonzo	if (am335x_pwm_config_ecas(PWM_UNIT,
680251018Sgonzo	    PWM_PERIOD, PWM_PERIOD) == 0)
681251018Sgonzo		sc->sc_backlight = 100;
682251018Sgonzo
683277716Sgonzo	sc->sc_fb_info.fb_name = device_get_nameunit(sc->sc_dev);
684277716Sgonzo	sc->sc_fb_info.fb_vbase = (intptr_t)sc->sc_fb_base;
685277716Sgonzo	sc->sc_fb_info.fb_pbase = sc->sc_fb_phys;
686277716Sgonzo	sc->sc_fb_info.fb_size = sc->sc_fb_size;
687277716Sgonzo	sc->sc_fb_info.fb_bpp = sc->sc_fb_info.fb_depth = panel.bpp;
688277716Sgonzo	sc->sc_fb_info.fb_stride = panel.panel_width*panel.bpp / 8;
689277716Sgonzo	sc->sc_fb_info.fb_width = panel.panel_width;
690277716Sgonzo	sc->sc_fb_info.fb_height = panel.panel_height;
691277716Sgonzo
692277716Sgonzo#ifdef	DEV_SC
693252282Sgonzo	err = (sc_attach_unit(device_get_unit(dev),
694252282Sgonzo	    device_get_flags(dev) | SC_AUTODETECT_KBD));
695252282Sgonzo
696252282Sgonzo	if (err) {
697252282Sgonzo		device_printf(dev, "failed to attach syscons\n");
698252282Sgonzo		goto fail;
699252282Sgonzo	}
700252282Sgonzo
701251018Sgonzo	am335x_lcd_syscons_setup((vm_offset_t)sc->sc_fb_base, sc->sc_fb_phys, &panel);
702277716Sgonzo#else /* VT */
703277716Sgonzo	device_t fbd = device_add_child(dev, "fbd",
704277716Sgonzo	device_get_unit(dev));
705277716Sgonzo	if (fbd == NULL) {
706277716Sgonzo		device_printf(dev, "Failed to add fbd child\n");
707277716Sgonzo		goto fail;
708277716Sgonzo	}
709277716Sgonzo	if (device_probe_and_attach(fbd) != 0) {
710277716Sgonzo		device_printf(dev, "Failed to attach fbd device\n");
711277716Sgonzo		goto fail;
712277716Sgonzo	}
713277716Sgonzo#endif
714251018Sgonzo
715251018Sgonzo	return (0);
716251018Sgonzo
717251018Sgonzofail:
718251018Sgonzo	return (err);
719251018Sgonzo}
720251018Sgonzo
721251018Sgonzostatic int
722251018Sgonzoam335x_lcd_detach(device_t dev)
723251018Sgonzo{
724251018Sgonzo	/* Do not let unload driver */
725251018Sgonzo	return (EBUSY);
726251018Sgonzo}
727251018Sgonzo
728277716Sgonzostatic struct fb_info *
729277716Sgonzoam335x_lcd_fb_getinfo(device_t dev)
730277716Sgonzo{
731277716Sgonzo	struct am335x_lcd_softc *sc;
732277716Sgonzo
733277716Sgonzo	sc = device_get_softc(dev);
734277716Sgonzo
735277716Sgonzo	return (&sc->sc_fb_info);
736277716Sgonzo}
737277716Sgonzo
738251018Sgonzostatic device_method_t am335x_lcd_methods[] = {
739251018Sgonzo	DEVMETHOD(device_probe,		am335x_lcd_probe),
740251018Sgonzo	DEVMETHOD(device_attach,	am335x_lcd_attach),
741251018Sgonzo	DEVMETHOD(device_detach,	am335x_lcd_detach),
742251018Sgonzo
743277716Sgonzo	/* Framebuffer service methods */
744277716Sgonzo	DEVMETHOD(fb_getinfo,		am335x_lcd_fb_getinfo),
745277716Sgonzo
746251018Sgonzo	DEVMETHOD_END
747251018Sgonzo};
748251018Sgonzo
749251018Sgonzostatic driver_t am335x_lcd_driver = {
750277716Sgonzo	"fb",
751251018Sgonzo	am335x_lcd_methods,
752251018Sgonzo	sizeof(struct am335x_lcd_softc),
753251018Sgonzo};
754251018Sgonzo
755251018Sgonzostatic devclass_t am335x_lcd_devclass;
756251018Sgonzo
757251018SgonzoDRIVER_MODULE(am335x_lcd, simplebus, am335x_lcd_driver, am335x_lcd_devclass, 0, 0);
758251018SgonzoMODULE_VERSION(am335x_lcd, 1);
759251018SgonzoMODULE_DEPEND(am335x_lcd, simplebus, 1, 1, 1);
760