1/*-
2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27/*
28 * Exynos 5 Power Management Unit (PMU)
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD$");
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/bus.h>
37#include <sys/kernel.h>
38#include <sys/module.h>
39#include <sys/malloc.h>
40#include <sys/rman.h>
41#include <sys/timeet.h>
42#include <sys/timetc.h>
43#include <sys/watchdog.h>
44
45#include <dev/ofw/openfirm.h>
46#include <dev/ofw/ofw_bus.h>
47#include <dev/ofw/ofw_bus_subr.h>
48
49#include <machine/bus.h>
50#include <machine/cpu.h>
51#include <machine/intr.h>
52
53#include <arm/samsung/exynos/exynos5_common.h>
54#include <arm/samsung/exynos/exynos5_pmu.h>
55
56#define	EXYNOS5250	1
57#define	EXYNOS5420	2
58
59/* PWR control */
60#define	EXYNOS5_PWR_USBHOST_PHY		0x708
61#define	EXYNOS5_USBDRD_PHY_CTRL		0x704
62#define	EXYNOS5420_USBDRD1_PHY_CTRL	0x708
63
64#define	PHY_POWER_ON			1
65#define	PHY_POWER_OFF			0
66
67struct pmu_softc {
68	struct resource		*res[1];
69	bus_space_tag_t		bst;
70	bus_space_handle_t	bsh;
71	device_t		dev;
72	int			model;
73};
74
75struct pmu_softc *pmu_sc;
76
77static struct ofw_compat_data compat_data[] = {
78	{"samsung,exynos5420-pmu",	EXYNOS5420},
79	{"samsung,exynos5250-pmu",	EXYNOS5250},
80	{NULL, 0}
81};
82
83static struct resource_spec pmu_spec[] = {
84	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
85	{ -1, 0 }
86};
87
88static int
89pmu_probe(device_t dev)
90{
91
92	if (!ofw_bus_status_okay(dev))
93		return (ENXIO);
94
95	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) {
96		device_set_desc(dev, "Samsung Exynos 5 Power Management Unit");
97		return (BUS_PROBE_DEFAULT);
98	}
99
100	return (ENXIO);
101}
102
103int
104usb2_phy_power_on(void)
105{
106	struct pmu_softc *sc;
107
108	sc = pmu_sc;
109	if (sc == NULL)
110		return (-1);
111
112	/* EHCI */
113	WRITE4(sc, EXYNOS5_PWR_USBHOST_PHY, PHY_POWER_ON);
114
115	return (0);
116}
117
118int
119usbdrd_phy_power_on(void)
120{
121	struct pmu_softc *sc;
122
123	sc = pmu_sc;
124	if (sc == NULL)
125		return (-1);
126
127	/*
128	 * First XHCI controller (left-side USB port on chromebook2)
129	 */
130	WRITE4(sc, EXYNOS5_USBDRD_PHY_CTRL, PHY_POWER_ON);
131
132	/*
133	 * Second XHCI controller (right-side USB port on chrombook2)
134	 * Only available on 5420.
135	 */
136	if (sc->model == EXYNOS5420)
137		WRITE4(sc, EXYNOS5420_USBDRD1_PHY_CTRL, PHY_POWER_ON);
138
139	return (0);
140}
141
142static int
143pmu_attach(device_t dev)
144{
145	struct pmu_softc *sc;
146
147	sc = device_get_softc(dev);
148	sc->dev = dev;
149	sc->model = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
150
151	if (bus_alloc_resources(dev, pmu_spec, sc->res)) {
152		device_printf(dev, "could not allocate resources\n");
153		return (ENXIO);
154	}
155
156	/* Memory interface */
157	sc->bst = rman_get_bustag(sc->res[0]);
158	sc->bsh = rman_get_bushandle(sc->res[0]);
159
160	pmu_sc = sc;
161
162	return (0);
163}
164
165static device_method_t pmu_methods[] = {
166	DEVMETHOD(device_probe,		pmu_probe),
167	DEVMETHOD(device_attach,	pmu_attach),
168	{ 0, 0 }
169};
170
171static driver_t pmu_driver = {
172	"pmu",
173	pmu_methods,
174	sizeof(struct pmu_softc),
175};
176
177static devclass_t pmu_devclass;
178
179DRIVER_MODULE(pmu, simplebus, pmu_driver, pmu_devclass, 0, 0);
180