1/*-
2 * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
3 * All rights reserved.
4 *
5 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *	This product includes software developed for the NetBSD Project by
18 *	Wasabi Systems, Inc.
19 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
20 *    or promote products derived from this software without specific prior
21 *    written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 *
35 * from: FreeBSD: //depot/projects/arm/src/sys/arm/xscale/pxa2x0/pxa2x0var.h, rev 1
36 *
37 * $FreeBSD$
38 */
39
40#ifndef _MVVAR_H_
41#define _MVVAR_H_
42
43#include <sys/rman.h>
44#include <machine/bus.h>
45#include <vm/vm.h>
46#include <vm/pmap.h>
47
48#include <dev/ofw/openfirm.h>
49
50#define	MV_TYPE_PCI		0
51#define	MV_TYPE_PCIE		1
52
53#define MV_MODE_ENDPOINT	0
54#define MV_MODE_ROOT		1
55
56struct gpio_config {
57	int		gc_gpio;	/* GPIO number */
58	uint32_t	gc_flags;	/* GPIO flags */
59	int		gc_output;	/* GPIO output value */
60};
61
62struct decode_win {
63	int		target;		/* Mbus unit ID */
64	int		attr;		/* Attributes of the target interface */
65	vm_paddr_t	base;		/* Physical base addr */
66	uint32_t	size;
67	vm_paddr_t	remap;
68};
69
70extern const struct gpio_config mv_gpio_config[];
71extern const struct decode_win *cpu_wins;
72extern const struct decode_win *idma_wins;
73extern const struct decode_win *xor_wins;
74extern int idma_wins_no;
75extern int xor_wins_no;
76
77/* Function prototypes */
78int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt,
79    void (*hand)(void *), void *arg, int pin, int flags, void **cookiep);
80void mv_gpio_intr_mask(int pin);
81void mv_gpio_intr_unmask(int pin);
82void mv_gpio_out(uint32_t pin, uint8_t val, uint8_t enable);
83uint8_t mv_gpio_in(uint32_t pin);
84
85int soc_decode_win(void);
86void soc_id(uint32_t *dev, uint32_t *rev);
87void soc_dump_decode_win(void);
88uint32_t soc_power_ctrl_get(uint32_t mask);
89void soc_power_ctrl_set(uint32_t mask);
90uint64_t get_sar_value(void);
91
92int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size,
93    vm_paddr_t remap);
94int decode_win_overlap(int, int, const struct decode_win *);
95int win_cpu_can_remap(int);
96void decode_win_pcie_setup(u_long);
97
98void ddr_disable(int i);
99int ddr_is_active(int i);
100uint32_t ddr_base(int i);
101uint32_t ddr_size(int i);
102uint32_t ddr_attr(int i);
103uint32_t ddr_target(int i);
104
105uint32_t cpu_extra_feat(void);
106uint32_t get_tclk(void);
107uint32_t get_l2clk(void);
108uint32_t read_cpu_ctrl(uint32_t);
109void write_cpu_ctrl(uint32_t, uint32_t);
110
111#if defined(SOC_MV_ARMADAXP) || defined(SOC_MV_ARMADA38X)
112uint32_t read_cpu_mp_clocks(uint32_t reg);
113void write_cpu_mp_clocks(uint32_t reg, uint32_t val);
114uint32_t read_cpu_misc(uint32_t reg);
115void write_cpu_misc(uint32_t reg, uint32_t val);
116#endif
117
118int mv_pcib_bar_win_set(device_t dev, uint32_t base, uint32_t size,
119    uint32_t remap, int winno, int busno);
120int mv_pcib_cpu_win_remap(device_t dev, uint32_t remap, uint32_t size);
121
122void mv_mask_endpoint_irq(uintptr_t nb, int unit);
123void mv_unmask_endpoint_irq(uintptr_t nb, int unit);
124
125int	mv_drbl_get_next_irq(int dir, int unit);
126void	mv_drbl_mask_all(int unit);
127void	mv_drbl_mask_irq(uint32_t irq, int dir, int unit);
128void	mv_drbl_unmask_irq(uint32_t irq, int dir, int unit);
129void	mv_drbl_set_mask(uint32_t val, int dir, int unit);
130uint32_t mv_drbl_get_mask(int dir, int unit);
131void	mv_drbl_set_cause(uint32_t val, int dir, int unit);
132uint32_t mv_drbl_get_cause(int dir, int unit);
133void	mv_drbl_set_msg(uint32_t val, int mnr, int dir, int unit);
134uint32_t mv_drbl_get_msg(int mnr, int dir, int unit);
135
136int	mv_msi_data(int irq, uint64_t *addr, uint32_t *data);
137
138struct devmap_entry;
139
140int mv_pci_devmap(phandle_t, struct devmap_entry *, vm_offset_t,
141    vm_offset_t);
142int fdt_localbus_devmap(phandle_t, struct devmap_entry *, int, int *);
143
144#endif /* _MVVAR_H_ */
145