1258057Sbr/*- 2258057Sbr * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 3258057Sbr * All rights reserved. 4258057Sbr * 5258057Sbr * Redistribution and use in source and binary forms, with or without 6258057Sbr * modification, are permitted provided that the following conditions 7258057Sbr * are met: 8258057Sbr * 1. Redistributions of source code must retain the above copyright 9258057Sbr * notice, this list of conditions and the following disclaimer. 10258057Sbr * 2. Redistributions in binary form must reproduce the above copyright 11258057Sbr * notice, this list of conditions and the following disclaimer in the 12258057Sbr * documentation and/or other materials provided with the distribution. 13258057Sbr * 14258057Sbr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15258057Sbr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16258057Sbr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17258057Sbr * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18258057Sbr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19258057Sbr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20258057Sbr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21258057Sbr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22258057Sbr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23258057Sbr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24258057Sbr * SUCH DAMAGE. 25258057Sbr */ 26258057Sbr 27258057Sbr#include <sys/cdefs.h> 28258057Sbr__FBSDID("$FreeBSD: stable/11/sys/arm/freescale/vybrid/vf_common.c 314506 2017-03-01 19:55:04Z ian $"); 29258057Sbr 30258057Sbr#include <sys/param.h> 31258057Sbr#include <sys/systm.h> 32258057Sbr#include <sys/bus.h> 33258057Sbr#include <sys/kernel.h> 34258057Sbr 35258057Sbr#include <dev/ofw/openfirm.h> 36258057Sbr 37258057Sbr#include <machine/bus.h> 38258057Sbr#include <machine/fdt.h> 39258057Sbr 40258057Sbr#include <arm/freescale/vybrid/vf_src.h> 41258057Sbr 42258057Sbrvoid 43258057Sbrcpu_reset(void) 44258057Sbr{ 45258057Sbr phandle_t src; 46314503Sian uint32_t paddr; 47258057Sbr bus_addr_t vaddr; 48258057Sbr 49258057Sbr if (src_swreset() == 0) 50258057Sbr goto end; 51258057Sbr 52258057Sbr src = OF_finddevice("src"); 53314503Sian if ((src != 0) && (OF_getencprop(src, "reg", &paddr, sizeof(paddr))) > 0) { 54314503Sian if (bus_space_map(fdtbus_bs_tag, paddr, 0x10, 0, &vaddr) == 0) { 55258057Sbr bus_space_write_4(fdtbus_bs_tag, vaddr, 0x00, SW_RST); 56258057Sbr } 57258057Sbr } 58258057Sbr 59258057Sbrend: 60258057Sbr while (1); 61258057Sbr} 62258057Sbr 63298068Sandrew#ifndef INTRNG 64258057Sbrstatic int 65258057Sbrfdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, 66258057Sbr int *pol) 67258057Sbr{ 68258057Sbr 69258057Sbr if (!fdt_is_compatible(node, "arm,gic")) 70258057Sbr return (ENXIO); 71258057Sbr 72258057Sbr *interrupt = fdt32_to_cpu(intr[0]); 73258057Sbr *trig = INTR_TRIGGER_CONFORM; 74258057Sbr *pol = INTR_POLARITY_CONFORM; 75258057Sbr return (0); 76258057Sbr} 77258057Sbr 78258057Sbrfdt_pic_decode_t fdt_pic_table[] = { 79258057Sbr &fdt_pic_decode_ic, 80258057Sbr NULL 81258057Sbr}; 82295509Sandrew#endif 83