1/*- 2 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: stable/11/sys/arm/freescale/vybrid/vf_common.c 314506 2017-03-01 19:55:04Z ian $"); 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/kernel.h> 34 35#include <dev/ofw/openfirm.h> 36 37#include <machine/bus.h> 38#include <machine/fdt.h> 39 40#include <arm/freescale/vybrid/vf_src.h> 41 42void 43cpu_reset(void) 44{ 45 phandle_t src; 46 uint32_t paddr; 47 bus_addr_t vaddr; 48 49 if (src_swreset() == 0) 50 goto end; 51 52 src = OF_finddevice("src"); 53 if ((src != 0) && (OF_getencprop(src, "reg", &paddr, sizeof(paddr))) > 0) { 54 if (bus_space_map(fdtbus_bs_tag, paddr, 0x10, 0, &vaddr) == 0) { 55 bus_space_write_4(fdtbus_bs_tag, vaddr, 0x00, SW_RST); 56 } 57 } 58 59end: 60 while (1); 61} 62 63#ifndef INTRNG 64static int 65fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, 66 int *pol) 67{ 68 69 if (!fdt_is_compatible(node, "arm,gic")) 70 return (ENXIO); 71 72 *interrupt = fdt32_to_cpu(intr[0]); 73 *trig = INTR_TRIGGER_CONFORM; 74 *pol = INTR_POLARITY_CONFORM; 75 return (0); 76} 77 78fdt_pic_decode_t fdt_pic_table[] = { 79 &fdt_pic_decode_ic, 80 NULL 81}; 82#endif 83