1/*-
2 * Copyright (C) 2015 Daisuke Aoyama <aoyama@peach.ne.jp>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: stable/11/sys/arm/broadcom/bcm2835/bcm2836_mp.c 331894 2018-04-02 23:30:21Z gonzo $");
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/kernel.h>
37#include <sys/bus.h>
38#include <sys/smp.h>
39
40#include <vm/vm.h>
41#include <vm/pmap.h>
42
43#include <machine/cpu.h>
44#include <machine/smp.h>
45#include <machine/bus.h>
46#include <machine/fdt.h>
47#include <machine/intr.h>
48#include <machine/platformvar.h>
49
50#include <arm/broadcom/bcm2835/bcm2836_mp.h>
51
52#ifdef DEBUG
53#define	DPRINTF(fmt, ...) do {			\
54	printf("%s:%u: ", __func__, __LINE__);	\
55	printf(fmt, ##__VA_ARGS__);		\
56} while (0)
57#else
58#define	DPRINTF(fmt, ...)
59#endif
60
61#define	ARM_LOCAL_BASE		0x40000000
62#define	ARM_LOCAL_SIZE		0x00001000
63
64/* mailbox registers */
65#define	MBOXINTRCTRL_CORE(n)	(0x00000050 + (0x04 * (n)))
66#define	MBOX0SET_CORE(n)	(0x00000080 + (0x10 * (n)))
67#define	MBOX1SET_CORE(n)	(0x00000084 + (0x10 * (n)))
68#define	MBOX2SET_CORE(n)	(0x00000088 + (0x10 * (n)))
69#define	MBOX3SET_CORE(n)	(0x0000008C + (0x10 * (n)))
70#define	MBOX0CLR_CORE(n)	(0x000000C0 + (0x10 * (n)))
71#define	MBOX1CLR_CORE(n)	(0x000000C4 + (0x10 * (n)))
72#define	MBOX2CLR_CORE(n)	(0x000000C8 + (0x10 * (n)))
73#define	MBOX3CLR_CORE(n)	(0x000000CC + (0x10 * (n)))
74
75static bus_space_handle_t bs_periph;
76
77#define	BSRD4(addr) \
78	bus_space_read_4(fdtbus_bs_tag, bs_periph, (addr))
79#define	BSWR4(addr, val) \
80	bus_space_write_4(fdtbus_bs_tag, bs_periph, (addr), (val))
81
82void
83bcm2836_mp_setmaxid(platform_t plat)
84{
85
86	DPRINTF("platform_mp_setmaxid\n");
87	if (mp_ncpus != 0)
88		return;
89
90	mp_ncpus = 4;
91	mp_maxid = mp_ncpus - 1;
92	DPRINTF("mp_maxid=%d\n", mp_maxid);
93}
94
95void
96bcm2836_mp_start_ap(platform_t plat)
97{
98	uint32_t val;
99	int i, retry;
100
101	DPRINTF("platform_mp_start_ap\n");
102
103	/* initialize */
104	if (bus_space_map(fdtbus_bs_tag, ARM_LOCAL_BASE, ARM_LOCAL_SIZE,
105	    0, &bs_periph) != 0)
106		panic("can't map local peripheral\n");
107	for (i = 0; i < mp_ncpus; i++) {
108		/* clear mailbox 0/3 */
109		BSWR4(MBOX0CLR_CORE(i), 0xffffffff);
110		BSWR4(MBOX3CLR_CORE(i), 0xffffffff);
111	}
112	wmb();
113	dcache_wbinv_poc_all();
114
115	/* boot secondary CPUs */
116	for (i = 1; i < mp_ncpus; i++) {
117		/* set entry point to mailbox 3 */
118		BSWR4(MBOX3SET_CORE(i),
119		    (uint32_t)pmap_kextract((vm_offset_t)mpentry));
120		/* Firmware put cores in WFE state, need SEV to wake up. */
121		dsb();
122		sev();
123
124		/* wait for bootup */
125		retry = 1000;
126		do {
127			/* check entry point */
128			val = BSRD4(MBOX3CLR_CORE(i));
129			if (val == 0)
130				break;
131			DELAY(100);
132			retry--;
133			if (retry <= 0) {
134				printf("can't start for CPU%d\n", i);
135				break;
136			}
137		} while (1);
138
139		/* dsb and sev */
140		dsb();
141		sev();
142
143		/* recode AP in CPU map */
144		CPU_SET(i, &all_cpus);
145	}
146}
147
148#ifndef INTRNG
149void
150pic_ipi_send(cpuset_t cpus, u_int ipi)
151{
152	int i;
153
154	dsb();
155	for (i = 0; i < mp_ncpus; i++) {
156		if (CPU_ISSET(i, &cpus))
157			BSWR4(MBOX0SET_CORE(i), 1 << ipi);
158	}
159	wmb();
160}
161
162int
163pic_ipi_read(int i)
164{
165	uint32_t val;
166	int cpu, ipi;
167
168	cpu = PCPU_GET(cpuid);
169	dsb();
170	if (i != -1) {
171		val = BSRD4(MBOX0CLR_CORE(cpu));
172		if (val == 0)
173			return (0);
174		ipi = ffs(val) - 1;
175		BSWR4(MBOX0CLR_CORE(cpu), 1 << ipi);
176		dsb();
177		return (ipi);
178	}
179	return (0x3ff);
180}
181
182void
183pic_ipi_clear(int ipi)
184{
185}
186#endif
187