1/*- 2 * Copyright (c) 2012 Ganbold Tsagaankhuu <ganbold@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * Allwinner A10 attachment driver for the USB Enhanced Host Controller. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: stable/11/sys/arm/allwinner/a10_ehci.c 346524 2019-04-22 04:56:41Z ian $"); 33 34#include "opt_bus.h" 35 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/bus.h> 39#include <sys/rman.h> 40#include <sys/condvar.h> 41#include <sys/kernel.h> 42#include <sys/module.h> 43 44#include <machine/bus.h> 45#include <dev/ofw/ofw_bus.h> 46#include <dev/ofw/ofw_bus_subr.h> 47 48#include <dev/usb/usb.h> 49#include <dev/usb/usbdi.h> 50 51#include <dev/usb/usb_core.h> 52#include <dev/usb/usb_busdma.h> 53#include <dev/usb/usb_process.h> 54#include <dev/usb/usb_util.h> 55 56#include <dev/usb/usb_controller.h> 57#include <dev/usb/usb_bus.h> 58#include <dev/usb/controller/ehci.h> 59#include <dev/usb/controller/ehcireg.h> 60 61#include <arm/allwinner/aw_machdep.h> 62#include <dev/extres/clk/clk.h> 63#include <dev/extres/hwreset/hwreset.h> 64#include <dev/extres/phy/phy.h> 65 66#define EHCI_HC_DEVSTR "Allwinner Integrated USB 2.0 controller" 67 68#define SW_USB_PMU_IRQ_ENABLE 0x800 69 70#define SW_SDRAM_REG_HPCR_USB1 (0x250 + ((1 << 2) * 4)) 71#define SW_SDRAM_REG_HPCR_USB2 (0x250 + ((1 << 2) * 5)) 72#define SW_SDRAM_BP_HPCR_ACCESS (1 << 0) 73 74#define SW_ULPI_BYPASS (1 << 0) 75#define SW_AHB_INCRX_ALIGN (1 << 8) 76#define SW_AHB_INCR4 (1 << 9) 77#define SW_AHB_INCR8 (1 << 10) 78 79#define USB_CONF(d) \ 80 (void *)ofw_bus_search_compatible((d), compat_data)->ocd_data 81 82#define A10_READ_4(sc, reg) \ 83 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg) 84 85#define A10_WRITE_4(sc, reg, data) \ 86 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data) 87 88static device_attach_t a10_ehci_attach; 89static device_detach_t a10_ehci_detach; 90 91struct aw_ehci_softc { 92 ehci_softc_t sc; 93 clk_t clk; 94 hwreset_t rst; 95 phy_t phy; 96}; 97 98struct aw_ehci_conf { 99 bool sdram_init; 100}; 101 102static const struct aw_ehci_conf a10_ehci_conf = { 103 .sdram_init = true, 104}; 105 106static const struct aw_ehci_conf a31_ehci_conf = { 107 .sdram_init = false, 108}; 109 110static struct ofw_compat_data compat_data[] = { 111 { "allwinner,sun4i-a10-ehci", (uintptr_t)&a10_ehci_conf }, 112 { "allwinner,sun5i-a13-ehci", (uintptr_t)&a10_ehci_conf }, 113 { "allwinner,sun6i-a31-ehci", (uintptr_t)&a31_ehci_conf }, 114 { "allwinner,sun7i-a20-ehci", (uintptr_t)&a10_ehci_conf }, 115 { "allwinner,sun8i-a83t-ehci", (uintptr_t)&a31_ehci_conf }, 116 { "allwinner,sun8i-h3-ehci", (uintptr_t)&a31_ehci_conf }, 117 { NULL, (uintptr_t)NULL } 118}; 119 120static int 121a10_ehci_probe(device_t self) 122{ 123 124 if (!ofw_bus_status_okay(self)) 125 return (ENXIO); 126 127 if (ofw_bus_search_compatible(self, compat_data)->ocd_data == 0) 128 return (ENXIO); 129 130 device_set_desc(self, EHCI_HC_DEVSTR); 131 132 return (BUS_PROBE_DEFAULT); 133} 134 135static int 136a10_ehci_attach(device_t self) 137{ 138 struct aw_ehci_softc *aw_sc = device_get_softc(self); 139 ehci_softc_t *sc = &aw_sc->sc; 140 const struct aw_ehci_conf *conf; 141 bus_space_handle_t bsh; 142 int err; 143 int rid; 144 uint32_t reg_value = 0; 145 146 conf = USB_CONF(self); 147 148 /* initialise some bus fields */ 149 sc->sc_bus.parent = self; 150 sc->sc_bus.devices = sc->sc_devices; 151 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 152 sc->sc_bus.dma_bits = 32; 153 154 /* get all DMA memory */ 155 if (usb_bus_mem_alloc_all(&sc->sc_bus, 156 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 157 return (ENOMEM); 158 } 159 160 sc->sc_bus.usbrev = USB_REV_2_0; 161 162 rid = 0; 163 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 164 if (!sc->sc_io_res) { 165 device_printf(self, "Could not map memory\n"); 166 goto error; 167 } 168 169 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 170 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 171 bsh = rman_get_bushandle(sc->sc_io_res); 172 173 sc->sc_io_size = rman_get_size(sc->sc_io_res); 174 175 if (bus_space_subregion(sc->sc_io_tag, bsh, 0x00, 176 sc->sc_io_size, &sc->sc_io_hdl) != 0) 177 panic("%s: unable to subregion USB host registers", 178 device_get_name(self)); 179 180 rid = 0; 181 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 182 RF_SHAREABLE | RF_ACTIVE); 183 if (sc->sc_irq_res == NULL) { 184 device_printf(self, "Could not allocate irq\n"); 185 goto error; 186 } 187 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 188 if (!sc->sc_bus.bdev) { 189 device_printf(self, "Could not add USB device\n"); 190 goto error; 191 } 192 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 193 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); 194 195 sprintf(sc->sc_vendor, "Allwinner"); 196 197 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 198 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 199 if (err) { 200 device_printf(self, "Could not setup irq, %d\n", err); 201 sc->sc_intr_hdl = NULL; 202 goto error; 203 } 204 205 sc->sc_flags |= EHCI_SCFLG_DONTRESET; 206 207 /* De-assert reset */ 208 if (hwreset_get_by_ofw_idx(self, 0, 0, &aw_sc->rst) == 0) { 209 err = hwreset_deassert(aw_sc->rst); 210 if (err != 0) { 211 device_printf(self, "Could not de-assert reset\n"); 212 goto error; 213 } 214 } 215 216 /* Enable clock for USB */ 217 err = clk_get_by_ofw_index(self, 0, 0, &aw_sc->clk); 218 if (err != 0) { 219 device_printf(self, "Could not get clock\n"); 220 goto error; 221 } 222 err = clk_enable(aw_sc->clk); 223 if (err != 0) { 224 device_printf(self, "Could not enable clock\n"); 225 goto error; 226 } 227 228 /* Enable USB PHY */ 229 err = phy_get_by_ofw_name(self, 0, "usb", &aw_sc->phy); 230 if (err != 0) { 231 device_printf(self, "Could not get phy\n"); 232 goto error; 233 } 234 err = phy_enable(aw_sc->phy); 235 if (err != 0) { 236 device_printf(self, "Could not enable phy\n"); 237 goto error; 238 } 239 240 /* Enable passby */ 241 reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE); 242 reg_value |= SW_AHB_INCR8; /* AHB INCR8 enable */ 243 reg_value |= SW_AHB_INCR4; /* AHB burst type INCR4 enable */ 244 reg_value |= SW_AHB_INCRX_ALIGN; /* AHB INCRX align enable */ 245 reg_value |= SW_ULPI_BYPASS; /* ULPI bypass enable */ 246 A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value); 247 248 /* Configure port */ 249 if (conf->sdram_init) { 250 reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2); 251 reg_value |= SW_SDRAM_BP_HPCR_ACCESS; 252 A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value); 253 } 254 255 err = ehci_init(sc); 256 if (!err) { 257 err = device_probe_and_attach(sc->sc_bus.bdev); 258 } 259 if (err) { 260 device_printf(self, "USB init failed err=%d\n", err); 261 goto error; 262 } 263 return (0); 264 265error: 266 if (aw_sc->clk != NULL) { 267 clk_disable(aw_sc->clk); 268 clk_release(aw_sc->clk); 269 } 270 a10_ehci_detach(self); 271 return (ENXIO); 272} 273 274static int 275a10_ehci_detach(device_t self) 276{ 277 struct aw_ehci_softc *aw_sc = device_get_softc(self); 278 ehci_softc_t *sc = &aw_sc->sc; 279 const struct aw_ehci_conf *conf; 280 int err; 281 uint32_t reg_value = 0; 282 283 conf = USB_CONF(self); 284 285 /* during module unload there are lots of children leftover */ 286 device_delete_children(self); 287 288 if (sc->sc_irq_res && sc->sc_intr_hdl) { 289 /* 290 * only call ehci_detach() after ehci_init() 291 */ 292 ehci_detach(sc); 293 294 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 295 296 if (err) 297 /* XXX or should we panic? */ 298 device_printf(self, "Could not tear down irq, %d\n", 299 err); 300 sc->sc_intr_hdl = NULL; 301 } 302 303 if (sc->sc_irq_res) { 304 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 305 sc->sc_irq_res = NULL; 306 } 307 if (sc->sc_io_res) { 308 bus_release_resource(self, SYS_RES_MEMORY, 0, 309 sc->sc_io_res); 310 sc->sc_io_res = NULL; 311 } 312 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 313 314 /* Disable configure port */ 315 if (conf->sdram_init) { 316 reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2); 317 reg_value &= ~SW_SDRAM_BP_HPCR_ACCESS; 318 A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value); 319 } 320 321 /* Disable passby */ 322 reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE); 323 reg_value &= ~SW_AHB_INCR8; /* AHB INCR8 disable */ 324 reg_value &= ~SW_AHB_INCR4; /* AHB burst type INCR4 disable */ 325 reg_value &= ~SW_AHB_INCRX_ALIGN; /* AHB INCRX align disable */ 326 reg_value &= ~SW_ULPI_BYPASS; /* ULPI bypass disable */ 327 A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value); 328 329 /* Disable clock for USB */ 330 if (aw_sc->clk != NULL) { 331 clk_disable(aw_sc->clk); 332 clk_release(aw_sc->clk); 333 } 334 335 /* Assert reset */ 336 if (aw_sc->rst != NULL) { 337 hwreset_assert(aw_sc->rst); 338 hwreset_release(aw_sc->rst); 339 } 340 341 return (0); 342} 343 344static device_method_t ehci_methods[] = { 345 /* Device interface */ 346 DEVMETHOD(device_probe, a10_ehci_probe), 347 DEVMETHOD(device_attach, a10_ehci_attach), 348 DEVMETHOD(device_detach, a10_ehci_detach), 349 DEVMETHOD(device_suspend, bus_generic_suspend), 350 DEVMETHOD(device_resume, bus_generic_resume), 351 DEVMETHOD(device_shutdown, bus_generic_shutdown), 352 353 DEVMETHOD_END 354}; 355 356static driver_t ehci_driver = { 357 .name = "ehci", 358 .methods = ehci_methods, 359 .size = sizeof(struct aw_ehci_softc), 360}; 361 362static devclass_t ehci_devclass; 363 364DRIVER_MODULE(a10_ehci, simplebus, ehci_driver, ehci_devclass, 0, 0); 365MODULE_DEPEND(a10_ehci, usb, 1, 1, 1); 366