1/*- 2 * Copyright (C) 1994, David Greenman 3 * Copyright (c) 1990, 1993 4 * The Regents of the University of California. All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * the University of Utah, and William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)trap.c 7.4 (Berkeley) 5/13/91 38 */ 39 40#include <sys/cdefs.h> 41__FBSDID("$FreeBSD: stable/11/sys/amd64/amd64/trap.c 349303 2019-06-23 11:04:34Z kib $"); 42 43/* 44 * AMD64 Trap and System call handling 45 */ 46 47#include "opt_clock.h" 48#include "opt_compat.h" 49#include "opt_cpu.h" 50#include "opt_hwpmc_hooks.h" 51#include "opt_isa.h" 52#include "opt_kdb.h" 53#include "opt_stack.h" 54 55#include <sys/param.h> 56#include <sys/bus.h> 57#include <sys/systm.h> 58#include <sys/proc.h> 59#include <sys/pioctl.h> 60#include <sys/ptrace.h> 61#include <sys/kdb.h> 62#include <sys/kernel.h> 63#include <sys/ktr.h> 64#include <sys/lock.h> 65#include <sys/mutex.h> 66#include <sys/resourcevar.h> 67#include <sys/signalvar.h> 68#include <sys/syscall.h> 69#include <sys/sysctl.h> 70#include <sys/sysent.h> 71#include <sys/uio.h> 72#include <sys/vmmeter.h> 73#ifdef HWPMC_HOOKS 74#include <sys/pmckern.h> 75PMC_SOFT_DEFINE( , , page_fault, all); 76PMC_SOFT_DEFINE( , , page_fault, read); 77PMC_SOFT_DEFINE( , , page_fault, write); 78#endif 79 80#include <vm/vm.h> 81#include <vm/vm_param.h> 82#include <vm/pmap.h> 83#include <vm/vm_kern.h> 84#include <vm/vm_map.h> 85#include <vm/vm_page.h> 86#include <vm/vm_extern.h> 87 88#include <machine/cpu.h> 89#include <machine/intr_machdep.h> 90#include <x86/mca.h> 91#include <machine/md_var.h> 92#include <machine/pcb.h> 93#ifdef SMP 94#include <machine/smp.h> 95#endif 96#include <machine/stack.h> 97#include <machine/tss.h> 98 99#ifdef KDTRACE_HOOKS 100#include <sys/dtrace_bsd.h> 101#endif 102 103extern inthand_t IDTVEC(bpt), IDTVEC(bpt_pti), IDTVEC(dbg), 104 IDTVEC(fast_syscall), IDTVEC(fast_syscall_pti), IDTVEC(fast_syscall32), 105 IDTVEC(int0x80_syscall_pti), IDTVEC(int0x80_syscall); 106 107void __noinline trap(struct trapframe *frame); 108void trap_check(struct trapframe *frame); 109void dblfault_handler(struct trapframe *frame); 110 111static int trap_pfault(struct trapframe *, int); 112static void trap_fatal(struct trapframe *, vm_offset_t); 113 114static const char UNKNOWN[] = "unknown"; 115static const char *const trap_msg[] = { 116 [0] = UNKNOWN, /* unused */ 117 [T_PRIVINFLT] = "privileged instruction fault", 118 [2] = UNKNOWN, /* unused */ 119 [T_BPTFLT] = "breakpoint instruction fault", 120 [4] = UNKNOWN, /* unused */ 121 [5] = UNKNOWN, /* unused */ 122 [T_ARITHTRAP] = "arithmetic trap", 123 [7] = UNKNOWN, /* unused */ 124 [8] = UNKNOWN, /* unused */ 125 [T_PROTFLT] = "general protection fault", 126 [T_TRCTRAP] = "debug exception", 127 [11] = UNKNOWN, /* unused */ 128 [T_PAGEFLT] = "page fault", 129 [13] = UNKNOWN, /* unused */ 130 [T_ALIGNFLT] = "alignment fault", 131 [15] = UNKNOWN, /* unused */ 132 [16] = UNKNOWN, /* unused */ 133 [17] = UNKNOWN, /* unused */ 134 [T_DIVIDE] = "integer divide fault", 135 [T_NMI] = "non-maskable interrupt trap", 136 [T_OFLOW] = "overflow trap", 137 [T_BOUND] = "FPU bounds check fault", 138 [T_DNA] = "FPU device not available", 139 [T_DOUBLEFLT] = "double fault", 140 [T_FPOPFLT] = "FPU operand fetch fault", 141 [T_TSSFLT] = "invalid TSS fault", 142 [T_SEGNPFLT] = "segment not present fault", 143 [T_STKFLT] = "stack fault", 144 [T_MCHK] = "machine check trap", 145 [T_XMMFLT] = "SIMD floating-point exception", 146 [T_RESERVED] = "reserved (unknown) fault", 147 [31] = UNKNOWN, /* reserved */ 148 [T_DTRACE_RET] = "DTrace pid return trap", 149}; 150 151static int prot_fault_translation; 152SYSCTL_INT(_machdep, OID_AUTO, prot_fault_translation, CTLFLAG_RWTUN, 153 &prot_fault_translation, 0, 154 "Select signal to deliver on protection fault"); 155static int uprintf_signal; 156SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RWTUN, 157 &uprintf_signal, 0, 158 "Print debugging information on trap signal to ctty"); 159 160/* 161 * Control L1D flush on return from NMI. 162 * 163 * Tunable can be set to the following values: 164 * 0 - only enable flush on return from NMI if required by vmm.ko (default) 165 * >1 - always flush on return from NMI. 166 * 167 * Post-boot, the sysctl indicates if flushing is currently enabled. 168 */ 169int nmi_flush_l1d_sw; 170SYSCTL_INT(_machdep, OID_AUTO, nmi_flush_l1d_sw, CTLFLAG_RWTUN, 171 &nmi_flush_l1d_sw, 0, 172 "Flush L1 Data Cache on NMI exit, software bhyve L1TF mitigation assist"); 173 174/* 175 * Exception, fault, and trap interface to the FreeBSD kernel. 176 * This common code is called from assembly language IDT gate entry 177 * routines that prepare a suitable stack frame, and restore this 178 * frame after the exception has been processed. 179 */ 180 181void 182trap(struct trapframe *frame) 183{ 184 ksiginfo_t ksi; 185 struct thread *td; 186 struct proc *p; 187 register_t addr, dr6; 188 int signo, ucode; 189 u_int type; 190 191 td = curthread; 192 p = td->td_proc; 193 signo = 0; 194 ucode = 0; 195 addr = 0; 196 dr6 = 0; 197 198 PCPU_INC(cnt.v_trap); 199 type = frame->tf_trapno; 200 201#ifdef SMP 202 /* Handler for NMI IPIs used for stopping CPUs. */ 203 if (type == T_NMI && ipi_nmi_handler() == 0) 204 return; 205#endif 206 207#ifdef KDB 208 if (kdb_active) { 209 kdb_reenter(); 210 return; 211 } 212#endif 213 214 if (type == T_RESERVED) { 215 trap_fatal(frame, 0); 216 return; 217 } 218 219 if (type == T_NMI) { 220#ifdef HWPMC_HOOKS 221 /* 222 * CPU PMCs interrupt using an NMI. If the PMC module is 223 * active, pass the 'rip' value to the PMC module's interrupt 224 * handler. A non-zero return value from the handler means that 225 * the NMI was consumed by it and we can return immediately. 226 */ 227 if (pmc_intr != NULL && 228 (*pmc_intr)(PCPU_GET(cpuid), frame) != 0) 229 return; 230#endif 231 232#ifdef STACK 233 if (stack_nmi_handler(frame) != 0) 234 return; 235#endif 236 } 237 238 if ((frame->tf_rflags & PSL_I) == 0) { 239 /* 240 * Buggy application or kernel code has disabled 241 * interrupts and then trapped. Enabling interrupts 242 * now is wrong, but it is better than running with 243 * interrupts disabled until they are accidentally 244 * enabled later. 245 */ 246 if (TRAPF_USERMODE(frame)) 247 uprintf( 248 "pid %ld (%s): trap %d with interrupts disabled\n", 249 (long)curproc->p_pid, curthread->td_name, type); 250 else if (type != T_NMI && type != T_BPTFLT && 251 type != T_TRCTRAP) { 252 /* 253 * XXX not quite right, since this may be for a 254 * multiple fault in user mode. 255 */ 256 printf("kernel trap %d with interrupts disabled\n", 257 type); 258 259 /* 260 * We shouldn't enable interrupts while holding a 261 * spin lock. 262 */ 263 if (td->td_md.md_spinlock_count == 0) 264 enable_intr(); 265 } 266 } 267 268 if (TRAPF_USERMODE(frame)) { 269 /* user trap */ 270 271 td->td_pticks = 0; 272 td->td_frame = frame; 273 addr = frame->tf_rip; 274 if (td->td_cowgen != p->p_cowgen) 275 thread_cow_update(td); 276 277 switch (type) { 278 case T_PRIVINFLT: /* privileged instruction fault */ 279 signo = SIGILL; 280 ucode = ILL_PRVOPC; 281 break; 282 283 case T_BPTFLT: /* bpt instruction fault */ 284 enable_intr(); 285#ifdef KDTRACE_HOOKS 286 if (dtrace_pid_probe_ptr != NULL && 287 dtrace_pid_probe_ptr(frame) == 0) 288 return; 289#endif 290 signo = SIGTRAP; 291 ucode = TRAP_BRKPT; 292 break; 293 294 case T_TRCTRAP: /* debug exception */ 295 enable_intr(); 296 signo = SIGTRAP; 297 ucode = TRAP_TRACE; 298 dr6 = rdr6(); 299 if ((dr6 & DBREG_DR6_BS) != 0) { 300 PROC_LOCK(td->td_proc); 301 if ((td->td_dbgflags & TDB_STEP) != 0) { 302 td->td_frame->tf_rflags &= ~PSL_T; 303 td->td_dbgflags &= ~TDB_STEP; 304 } 305 PROC_UNLOCK(td->td_proc); 306 } 307 break; 308 309 case T_ARITHTRAP: /* arithmetic trap */ 310 ucode = fputrap_x87(); 311 if (ucode == -1) 312 return; 313 signo = SIGFPE; 314 break; 315 316 case T_PROTFLT: /* general protection fault */ 317 signo = SIGBUS; 318 ucode = BUS_OBJERR; 319 break; 320 case T_STKFLT: /* stack fault */ 321 case T_SEGNPFLT: /* segment not present fault */ 322 signo = SIGBUS; 323 ucode = BUS_ADRERR; 324 break; 325 case T_TSSFLT: /* invalid TSS fault */ 326 signo = SIGBUS; 327 ucode = BUS_OBJERR; 328 break; 329 case T_ALIGNFLT: 330 signo = SIGBUS; 331 ucode = BUS_ADRALN; 332 break; 333 case T_DOUBLEFLT: /* double fault */ 334 default: 335 signo = SIGBUS; 336 ucode = BUS_OBJERR; 337 break; 338 339 case T_PAGEFLT: /* page fault */ 340 /* 341 * Emulator can take care about this trap? 342 */ 343 if (*p->p_sysent->sv_trap != NULL && 344 (*p->p_sysent->sv_trap)(td) == 0) 345 return; 346 347 addr = frame->tf_addr; 348 signo = trap_pfault(frame, TRUE); 349 if (signo == -1) 350 return; 351 if (signo == 0) 352 goto userret; 353 if (signo == SIGSEGV) { 354 ucode = SEGV_MAPERR; 355 } else if (prot_fault_translation == 0) { 356 /* 357 * Autodetect. This check also covers 358 * the images without the ABI-tag ELF 359 * note. 360 */ 361 if (SV_CURPROC_ABI() == SV_ABI_FREEBSD && 362 p->p_osrel >= P_OSREL_SIGSEGV) { 363 signo = SIGSEGV; 364 ucode = SEGV_ACCERR; 365 } else { 366 signo = SIGBUS; 367 ucode = BUS_PAGE_FAULT; 368 } 369 } else if (prot_fault_translation == 1) { 370 /* 371 * Always compat mode. 372 */ 373 signo = SIGBUS; 374 ucode = BUS_PAGE_FAULT; 375 } else { 376 /* 377 * Always SIGSEGV mode. 378 */ 379 signo = SIGSEGV; 380 ucode = SEGV_ACCERR; 381 } 382 break; 383 384 case T_DIVIDE: /* integer divide fault */ 385 ucode = FPE_INTDIV; 386 signo = SIGFPE; 387 break; 388 389#ifdef DEV_ISA 390 case T_NMI: 391 nmi_handle_intr(type, frame); 392 return; 393#endif 394 395 case T_OFLOW: /* integer overflow fault */ 396 ucode = FPE_INTOVF; 397 signo = SIGFPE; 398 break; 399 400 case T_BOUND: /* bounds check fault */ 401 ucode = FPE_FLTSUB; 402 signo = SIGFPE; 403 break; 404 405 case T_DNA: 406 /* transparent fault (due to context switch "late") */ 407 KASSERT(PCB_USER_FPU(td->td_pcb), 408 ("kernel FPU ctx has leaked")); 409 fpudna(); 410 return; 411 412 case T_FPOPFLT: /* FPU operand fetch fault */ 413 ucode = ILL_COPROC; 414 signo = SIGILL; 415 break; 416 417 case T_XMMFLT: /* SIMD floating-point exception */ 418 ucode = fputrap_sse(); 419 if (ucode == -1) 420 return; 421 signo = SIGFPE; 422 break; 423#ifdef KDTRACE_HOOKS 424 case T_DTRACE_RET: 425 enable_intr(); 426 if (dtrace_return_probe_ptr != NULL) 427 dtrace_return_probe_ptr(frame); 428 return; 429#endif 430 } 431 } else { 432 /* kernel trap */ 433 434 KASSERT(cold || td->td_ucred != NULL, 435 ("kernel trap doesn't have ucred")); 436 switch (type) { 437 case T_PAGEFLT: /* page fault */ 438 (void) trap_pfault(frame, FALSE); 439 return; 440 441 case T_DNA: 442 if (PCB_USER_FPU(td->td_pcb)) 443 panic("Unregistered use of FPU in kernel"); 444 fpudna(); 445 return; 446 447 case T_ARITHTRAP: /* arithmetic trap */ 448 case T_XMMFLT: /* SIMD floating-point exception */ 449 case T_FPOPFLT: /* FPU operand fetch fault */ 450 /* 451 * For now, supporting kernel handler 452 * registration for FPU traps is overkill. 453 */ 454 trap_fatal(frame, 0); 455 return; 456 457 case T_STKFLT: /* stack fault */ 458 case T_PROTFLT: /* general protection fault */ 459 case T_SEGNPFLT: /* segment not present fault */ 460 if (td->td_intr_nesting_level != 0) 461 break; 462 463 /* 464 * Invalid segment selectors and out of bounds 465 * %rip's and %rsp's can be set up in user mode. 466 * This causes a fault in kernel mode when the 467 * kernel tries to return to user mode. We want 468 * to get this fault so that we can fix the 469 * problem here and not have to check all the 470 * selectors and pointers when the user changes 471 * them. 472 * 473 * In case of PTI, the IRETQ faulted while the 474 * kernel used the pti stack, and exception 475 * frame records %rsp value pointing to that 476 * stack. If we return normally to 477 * doreti_iret_fault, the trapframe is 478 * reconstructed on pti stack, and calltrap() 479 * called on it as well. Due to the very 480 * limited pti stack size, kernel does not 481 * survive for too long. Switch to the normal 482 * thread stack for the trap handling. 483 * 484 * Magic '5' is the number of qwords occupied by 485 * the hardware trap frame. 486 */ 487 if (frame->tf_rip == (long)doreti_iret) { 488 frame->tf_rip = (long)doreti_iret_fault; 489 if ((PCPU_GET(curpmap)->pm_ucr3 != 490 PMAP_NO_CR3) && 491 (frame->tf_rsp == (uintptr_t)PCPU_GET( 492 pti_rsp0) - 5 * sizeof(register_t))) { 493 frame->tf_rsp = PCPU_GET(rsp0) - 5 * 494 sizeof(register_t); 495 } 496 return; 497 } 498 if (frame->tf_rip == (long)ld_ds) { 499 frame->tf_rip = (long)ds_load_fault; 500 return; 501 } 502 if (frame->tf_rip == (long)ld_es) { 503 frame->tf_rip = (long)es_load_fault; 504 return; 505 } 506 if (frame->tf_rip == (long)ld_fs) { 507 frame->tf_rip = (long)fs_load_fault; 508 return; 509 } 510 if (frame->tf_rip == (long)ld_gs) { 511 frame->tf_rip = (long)gs_load_fault; 512 return; 513 } 514 if (frame->tf_rip == (long)ld_gsbase) { 515 frame->tf_rip = (long)gsbase_load_fault; 516 return; 517 } 518 if (frame->tf_rip == (long)ld_fsbase) { 519 frame->tf_rip = (long)fsbase_load_fault; 520 return; 521 } 522 if (curpcb->pcb_onfault != NULL) { 523 frame->tf_rip = (long)curpcb->pcb_onfault; 524 return; 525 } 526 break; 527 528 case T_TSSFLT: 529 /* 530 * PSL_NT can be set in user mode and isn't cleared 531 * automatically when the kernel is entered. This 532 * causes a TSS fault when the kernel attempts to 533 * `iret' because the TSS link is uninitialized. We 534 * want to get this fault so that we can fix the 535 * problem here and not every time the kernel is 536 * entered. 537 */ 538 if (frame->tf_rflags & PSL_NT) { 539 frame->tf_rflags &= ~PSL_NT; 540 return; 541 } 542 break; 543 544 case T_TRCTRAP: /* debug exception */ 545 /* Clear any pending debug events. */ 546 dr6 = rdr6(); 547 load_dr6(0); 548 549 /* 550 * Ignore debug register exceptions due to 551 * accesses in the user's address space, which 552 * can happen under several conditions such as 553 * if a user sets a watchpoint on a buffer and 554 * then passes that buffer to a system call. 555 * We still want to get TRCTRAPS for addresses 556 * in kernel space because that is useful when 557 * debugging the kernel. 558 */ 559 if (user_dbreg_trap(dr6)) 560 return; 561 562 /* 563 * Malicious user code can configure a debug 564 * register watchpoint to trap on data access 565 * to the top of stack and then execute 'pop 566 * %ss; int 3'. Due to exception deferral for 567 * 'pop %ss', the CPU will not interrupt 'int 568 * 3' to raise the DB# exception for the debug 569 * register but will postpone the DB# until 570 * execution of the first instruction of the 571 * BP# handler (in kernel mode). Normally the 572 * previous check would ignore DB# exceptions 573 * for watchpoints on user addresses raised in 574 * kernel mode. However, some CPU errata 575 * include cases where DB# exceptions do not 576 * properly set bits in %dr6, e.g. Haswell 577 * HSD23 and Skylake-X SKZ24. 578 * 579 * A deferred DB# can also be raised on the 580 * first instructions of system call entry 581 * points or single-step traps via similar use 582 * of 'pop %ss' or 'mov xxx, %ss'. 583 */ 584 if (pti) { 585 if (frame->tf_rip == 586 (uintptr_t)IDTVEC(fast_syscall_pti) || 587#ifdef COMPAT_FREEBSD32 588 frame->tf_rip == 589 (uintptr_t)IDTVEC(int0x80_syscall_pti) || 590#endif 591 frame->tf_rip == (uintptr_t)IDTVEC(bpt_pti)) 592 return; 593 } else { 594 if (frame->tf_rip == 595 (uintptr_t)IDTVEC(fast_syscall) || 596#ifdef COMPAT_FREEBSD32 597 frame->tf_rip == 598 (uintptr_t)IDTVEC(int0x80_syscall) || 599#endif 600 frame->tf_rip == (uintptr_t)IDTVEC(bpt)) 601 return; 602 } 603 if (frame->tf_rip == (uintptr_t)IDTVEC(dbg) || 604 /* Needed for AMD. */ 605 frame->tf_rip == (uintptr_t)IDTVEC(fast_syscall32)) 606 return; 607 /* 608 * FALLTHROUGH (TRCTRAP kernel mode, kernel address) 609 */ 610 case T_BPTFLT: 611 /* 612 * If KDB is enabled, let it handle the debugger trap. 613 * Otherwise, debugger traps "can't happen". 614 */ 615#ifdef KDB 616 if (kdb_trap(type, dr6, frame)) 617 return; 618#endif 619 break; 620 621#ifdef DEV_ISA 622 case T_NMI: 623 nmi_handle_intr(type, frame); 624 return; 625#endif 626 } 627 628 trap_fatal(frame, 0); 629 return; 630 } 631 632 /* Translate fault for emulators (e.g. Linux) */ 633 if (*p->p_sysent->sv_transtrap != NULL) 634 signo = (*p->p_sysent->sv_transtrap)(signo, type); 635 636 ksiginfo_init_trap(&ksi); 637 ksi.ksi_signo = signo; 638 ksi.ksi_code = ucode; 639 ksi.ksi_trapno = type; 640 ksi.ksi_addr = (void *)addr; 641 if (uprintf_signal) { 642 uprintf("pid %d comm %s: signal %d err %lx code %d type %d " 643 "addr 0x%lx rsp 0x%lx rip 0x%lx " 644 "<%02x %02x %02x %02x %02x %02x %02x %02x>\n", 645 p->p_pid, p->p_comm, signo, frame->tf_err, ucode, type, 646 addr, frame->tf_rsp, frame->tf_rip, 647 fubyte((void *)(frame->tf_rip + 0)), 648 fubyte((void *)(frame->tf_rip + 1)), 649 fubyte((void *)(frame->tf_rip + 2)), 650 fubyte((void *)(frame->tf_rip + 3)), 651 fubyte((void *)(frame->tf_rip + 4)), 652 fubyte((void *)(frame->tf_rip + 5)), 653 fubyte((void *)(frame->tf_rip + 6)), 654 fubyte((void *)(frame->tf_rip + 7))); 655 } 656 KASSERT((read_rflags() & PSL_I) != 0, ("interrupts disabled")); 657 trapsignal(td, &ksi); 658 659userret: 660 userret(td, frame); 661 KASSERT(PCB_USER_FPU(td->td_pcb), 662 ("Return from trap with kernel FPU ctx leaked")); 663} 664 665/* 666 * Ensure that we ignore any DTrace-induced faults. This function cannot 667 * be instrumented, so it cannot generate such faults itself. 668 */ 669void 670trap_check(struct trapframe *frame) 671{ 672 673#ifdef KDTRACE_HOOKS 674 if (dtrace_trap_func != NULL && 675 (*dtrace_trap_func)(frame, frame->tf_trapno) != 0) 676 return; 677#endif 678 trap(frame); 679} 680 681static bool 682trap_is_pti(struct trapframe *frame) 683{ 684 685 return (PCPU_GET(curpmap)->pm_ucr3 != PMAP_NO_CR3 && 686 pg_nx != 0 && (frame->tf_err & (PGEX_P | PGEX_W | 687 PGEX_U | PGEX_I)) == (PGEX_P | PGEX_U | PGEX_I) && 688 (curpcb->pcb_saved_ucr3 & ~CR3_PCID_MASK) == 689 (PCPU_GET(curpmap)->pm_cr3 & ~CR3_PCID_MASK)); 690} 691 692static int 693trap_pfault(struct trapframe *frame, int usermode) 694{ 695 struct thread *td; 696 struct proc *p; 697 vm_map_t map; 698 vm_offset_t va; 699 int rv; 700 vm_prot_t ftype; 701 vm_offset_t eva; 702 703 td = curthread; 704 p = td->td_proc; 705 eva = frame->tf_addr; 706 707 if (__predict_false((td->td_pflags & TDP_NOFAULTING) != 0)) { 708 /* 709 * Due to both processor errata and lazy TLB invalidation when 710 * access restrictions are removed from virtual pages, memory 711 * accesses that are allowed by the physical mapping layer may 712 * nonetheless cause one spurious page fault per virtual page. 713 * When the thread is executing a "no faulting" section that 714 * is bracketed by vm_fault_{disable,enable}_pagefaults(), 715 * every page fault is treated as a spurious page fault, 716 * unless it accesses the same virtual address as the most 717 * recent page fault within the same "no faulting" section. 718 */ 719 if (td->td_md.md_spurflt_addr != eva || 720 (td->td_pflags & TDP_RESETSPUR) != 0) { 721 /* 722 * Do nothing to the TLB. A stale TLB entry is 723 * flushed automatically by a page fault. 724 */ 725 td->td_md.md_spurflt_addr = eva; 726 td->td_pflags &= ~TDP_RESETSPUR; 727 return (0); 728 } 729 } else { 730 /* 731 * If we get a page fault while in a critical section, then 732 * it is most likely a fatal kernel page fault. The kernel 733 * is already going to panic trying to get a sleep lock to 734 * do the VM lookup, so just consider it a fatal trap so the 735 * kernel can print out a useful trap message and even get 736 * to the debugger. 737 * 738 * If we get a page fault while holding a non-sleepable 739 * lock, then it is most likely a fatal kernel page fault. 740 * If WITNESS is enabled, then it's going to whine about 741 * bogus LORs with various VM locks, so just skip to the 742 * fatal trap handling directly. 743 */ 744 if (td->td_critnest != 0 || 745 WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL, 746 "Kernel page fault") != 0) { 747 trap_fatal(frame, eva); 748 return (-1); 749 } 750 } 751 va = trunc_page(eva); 752 if (va >= VM_MIN_KERNEL_ADDRESS) { 753 /* 754 * Don't allow user-mode faults in kernel address space. 755 */ 756 if (usermode) 757 return (SIGSEGV); 758 759 map = kernel_map; 760 } else { 761 map = &p->p_vmspace->vm_map; 762 763 /* 764 * When accessing a usermode address, kernel must be 765 * ready to accept the page fault, and provide a 766 * handling routine. Since accessing the address 767 * without the handler is a bug, do not try to handle 768 * it normally, and panic immediately. 769 */ 770 if (!usermode && (td->td_intr_nesting_level != 0 || 771 curpcb->pcb_onfault == NULL)) { 772 trap_fatal(frame, eva); 773 return (-1); 774 } 775 } 776 777 /* 778 * If the trap was caused by errant bits in the PTE then panic. 779 */ 780 if (frame->tf_err & PGEX_RSV) { 781 trap_fatal(frame, eva); 782 return (-1); 783 } 784 785 /* 786 * If nx protection of the usermode portion of kernel page 787 * tables caused trap, panic. 788 */ 789 if (usermode && trap_is_pti(frame)) 790 panic("PTI: pid %d comm %s tf_err %#lx", p->p_pid, 791 p->p_comm, frame->tf_err); 792 793 /* 794 * PGEX_I is defined only if the execute disable bit capability is 795 * supported and enabled. 796 */ 797 if (frame->tf_err & PGEX_W) 798 ftype = VM_PROT_WRITE; 799 else if ((frame->tf_err & PGEX_I) && pg_nx != 0) 800 ftype = VM_PROT_EXECUTE; 801 else 802 ftype = VM_PROT_READ; 803 804 /* Fault in the page. */ 805 rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL); 806 if (rv == KERN_SUCCESS) { 807#ifdef HWPMC_HOOKS 808 if (ftype == VM_PROT_READ || ftype == VM_PROT_WRITE) { 809 PMC_SOFT_CALL_TF( , , page_fault, all, frame); 810 if (ftype == VM_PROT_READ) 811 PMC_SOFT_CALL_TF( , , page_fault, read, 812 frame); 813 else 814 PMC_SOFT_CALL_TF( , , page_fault, write, 815 frame); 816 } 817#endif 818 return (0); 819 } 820 if (!usermode) { 821 if (td->td_intr_nesting_level == 0 && 822 curpcb->pcb_onfault != NULL) { 823 frame->tf_rip = (long)curpcb->pcb_onfault; 824 return (0); 825 } 826 trap_fatal(frame, eva); 827 return (-1); 828 } 829 return ((rv == KERN_PROTECTION_FAILURE) ? SIGBUS : SIGSEGV); 830} 831 832static void 833trap_fatal(frame, eva) 834 struct trapframe *frame; 835 vm_offset_t eva; 836{ 837 int code, ss; 838 u_int type; 839 struct soft_segment_descriptor softseg; 840#ifdef KDB 841 bool handled; 842#endif 843 844 code = frame->tf_err; 845 type = frame->tf_trapno; 846 sdtossd(&gdt[NGDT * PCPU_GET(cpuid) + IDXSEL(frame->tf_cs & 0xffff)], 847 &softseg); 848 849 printf("\n\nFatal trap %d: %s while in %s mode\n", type, 850 type < nitems(trap_msg) ? trap_msg[type] : UNKNOWN, 851 TRAPF_USERMODE(frame) ? "user" : "kernel"); 852#ifdef SMP 853 /* two separate prints in case of a trap on an unmapped page */ 854 printf("cpuid = %d; ", PCPU_GET(cpuid)); 855 printf("apic id = %02x\n", PCPU_GET(apic_id)); 856#endif 857 if (type == T_PAGEFLT) { 858 printf("fault virtual address = 0x%lx\n", eva); 859 printf("fault code = %s %s %s, %s\n", 860 code & PGEX_U ? "user" : "supervisor", 861 code & PGEX_W ? "write" : "read", 862 code & PGEX_I ? "instruction" : "data", 863 code & PGEX_RSV ? "reserved bits in PTE" : 864 code & PGEX_P ? "protection violation" : "page not present"); 865 } 866 printf("instruction pointer = 0x%lx:0x%lx\n", 867 frame->tf_cs & 0xffff, frame->tf_rip); 868 ss = frame->tf_ss & 0xffff; 869 printf("stack pointer = 0x%x:0x%lx\n", ss, frame->tf_rsp); 870 printf("frame pointer = 0x%x:0x%lx\n", ss, frame->tf_rbp); 871 printf("code segment = base 0x%lx, limit 0x%lx, type 0x%x\n", 872 softseg.ssd_base, softseg.ssd_limit, softseg.ssd_type); 873 printf(" = DPL %d, pres %d, long %d, def32 %d, gran %d\n", 874 softseg.ssd_dpl, softseg.ssd_p, softseg.ssd_long, softseg.ssd_def32, 875 softseg.ssd_gran); 876 printf("processor eflags = "); 877 if (frame->tf_rflags & PSL_T) 878 printf("trace trap, "); 879 if (frame->tf_rflags & PSL_I) 880 printf("interrupt enabled, "); 881 if (frame->tf_rflags & PSL_NT) 882 printf("nested task, "); 883 if (frame->tf_rflags & PSL_RF) 884 printf("resume, "); 885 printf("IOPL = %ld\n", (frame->tf_rflags & PSL_IOPL) >> 12); 886 printf("current process = %d (%s)\n", 887 curproc->p_pid, curthread->td_name); 888 889#ifdef KDB 890 if (debugger_on_trap) { 891 kdb_why = KDB_WHY_TRAP; 892 handled = kdb_trap(type, 0, frame); 893 kdb_why = KDB_WHY_UNSET; 894 if (handled) 895 return; 896 } 897#endif 898 printf("trap number = %d\n", type); 899 panic("%s", type < nitems(trap_msg) ? trap_msg[type] : 900 "unknown/reserved trap"); 901} 902 903/* 904 * Double fault handler. Called when a fault occurs while writing 905 * a frame for a trap/exception onto the stack. This usually occurs 906 * when the stack overflows (such is the case with infinite recursion, 907 * for example). 908 */ 909void 910dblfault_handler(struct trapframe *frame) 911{ 912#ifdef KDTRACE_HOOKS 913 if (dtrace_doubletrap_func != NULL) 914 (*dtrace_doubletrap_func)(); 915#endif 916 printf("\nFatal double fault\n" 917 "rip %#lx rsp %#lx rbp %#lx\n" 918 "rax %#lx rdx %#lx rbx %#lx\n" 919 "rcx %#lx rsi %#lx rdi %#lx\n" 920 "r8 %#lx r9 %#lx r10 %#lx\n" 921 "r11 %#lx r12 %#lx r13 %#lx\n" 922 "r14 %#lx r15 %#lx rflags %#lx\n" 923 "cs %#lx ss %#lx ds %#hx es %#hx fs %#hx gs %#hx\n" 924 "fsbase %#lx gsbase %#lx kgsbase %#lx\n", 925 frame->tf_rip, frame->tf_rsp, frame->tf_rbp, 926 frame->tf_rax, frame->tf_rdx, frame->tf_rbx, 927 frame->tf_rcx, frame->tf_rdi, frame->tf_rsi, 928 frame->tf_r8, frame->tf_r9, frame->tf_r10, 929 frame->tf_r11, frame->tf_r12, frame->tf_r13, 930 frame->tf_r14, frame->tf_r15, frame->tf_rflags, 931 frame->tf_cs, frame->tf_ss, frame->tf_ds, frame->tf_es, 932 frame->tf_fs, frame->tf_gs, 933 rdmsr(MSR_FSBASE), rdmsr(MSR_GSBASE), rdmsr(MSR_KGSBASE)); 934#ifdef SMP 935 /* two separate prints in case of a trap on an unmapped page */ 936 printf("cpuid = %d; ", PCPU_GET(cpuid)); 937 printf("apic id = %02x\n", PCPU_GET(apic_id)); 938#endif 939 panic("double fault"); 940} 941 942int 943cpu_fetch_syscall_args(struct thread *td) 944{ 945 struct proc *p; 946 struct trapframe *frame; 947 register_t *argp; 948 struct syscall_args *sa; 949 caddr_t params; 950 int reg, regcnt, error; 951 952 p = td->td_proc; 953 frame = td->td_frame; 954 sa = &td->td_sa; 955 reg = 0; 956 regcnt = 6; 957 958 params = (caddr_t)frame->tf_rsp + sizeof(register_t); 959 sa->code = frame->tf_rax; 960 961 if (sa->code == SYS_syscall || sa->code == SYS___syscall) { 962 sa->code = frame->tf_rdi; 963 reg++; 964 regcnt--; 965 } 966 if (p->p_sysent->sv_mask) 967 sa->code &= p->p_sysent->sv_mask; 968 969 if (sa->code >= p->p_sysent->sv_size) 970 sa->callp = &p->p_sysent->sv_table[0]; 971 else 972 sa->callp = &p->p_sysent->sv_table[sa->code]; 973 974 sa->narg = sa->callp->sy_narg; 975 KASSERT(sa->narg <= sizeof(sa->args) / sizeof(sa->args[0]), 976 ("Too many syscall arguments!")); 977 error = 0; 978 argp = &frame->tf_rdi; 979 argp += reg; 980 bcopy(argp, sa->args, sizeof(sa->args[0]) * regcnt); 981 if (sa->narg > regcnt) { 982 KASSERT(params != NULL, ("copyin args with no params!")); 983 error = copyin(params, &sa->args[regcnt], 984 (sa->narg - regcnt) * sizeof(sa->args[0])); 985 } 986 987 if (error == 0) { 988 td->td_retval[0] = 0; 989 td->td_retval[1] = frame->tf_rdx; 990 } 991 992 return (error); 993} 994 995#include "../../kern/subr_syscall.c" 996 997/* 998 * System call handler for native binaries. The trap frame is already 999 * set up by the assembler trampoline and a pointer to it is saved in 1000 * td_frame. 1001 */ 1002void 1003amd64_syscall(struct thread *td, int traced) 1004{ 1005 int error; 1006 ksiginfo_t ksi; 1007 1008#ifdef DIAGNOSTIC 1009 if (!TRAPF_USERMODE(td->td_frame)) { 1010 panic("syscall"); 1011 /* NOT REACHED */ 1012 } 1013#endif 1014 error = syscallenter(td); 1015 1016 /* 1017 * Traced syscall. 1018 */ 1019 if (__predict_false(traced)) { 1020 td->td_frame->tf_rflags &= ~PSL_T; 1021 ksiginfo_init_trap(&ksi); 1022 ksi.ksi_signo = SIGTRAP; 1023 ksi.ksi_code = TRAP_TRACE; 1024 ksi.ksi_addr = (void *)td->td_frame->tf_rip; 1025 trapsignal(td, &ksi); 1026 } 1027 1028 KASSERT(PCB_USER_FPU(td->td_pcb), 1029 ("System call %s returning with kernel FPU ctx leaked", 1030 syscallname(td->td_proc, td->td_sa.code))); 1031 KASSERT(td->td_pcb->pcb_save == get_pcb_user_save_td(td), 1032 ("System call %s returning with mangled pcb_save", 1033 syscallname(td->td_proc, td->td_sa.code))); 1034 KASSERT(td->td_md.md_invl_gen.gen == 0, 1035 ("System call %s returning with leaked invl_gen %lu", 1036 syscallname(td->td_proc, td->td_sa.code), 1037 td->td_md.md_invl_gen.gen)); 1038 1039 syscallret(td, error); 1040 1041 /* 1042 * If the user-supplied value of %rip is not a canonical 1043 * address, then some CPUs will trigger a ring 0 #GP during 1044 * the sysret instruction. However, the fault handler would 1045 * execute in ring 0 with the user's %gs and %rsp which would 1046 * not be safe. Instead, use the full return path which 1047 * catches the problem safely. 1048 */ 1049 if (__predict_false(td->td_frame->tf_rip >= VM_MAXUSER_ADDRESS)) 1050 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 1051} 1052