1/* 2 * Copyright (c) 1992, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * This software was developed by the Computer Systems Engineering group 6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 7 * contributed to Berkeley. 8 * 9 * All advertising materials mentioning features or use of this software 10 * must display the following acknowledgement: 11 * This product includes software developed by the University of 12 * California, Lawrence Berkeley Laboratory. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)fpu_div.c 8.1 (Berkeley) 6/11/93 39 * $NetBSD: fpu_div.c,v 1.2 1994/11/20 20:52:38 deraadt Exp $ 40 */ 41 42#include <sys/cdefs.h> 43__FBSDID("$FreeBSD$"); 44 45/* 46 * Perform an FPU divide (return x / y). 47 */ 48 49#include <sys/types.h> 50 51#include <machine/frame.h> 52#include <machine/fp.h> 53#include <machine/fsr.h> 54 55#include "fpu_arith.h" 56#include "fpu_emu.h" 57#include "fpu_extern.h" 58 59/* 60 * Division of normal numbers is done as follows: 61 * 62 * x and y are floating point numbers, i.e., in the form 1.bbbb * 2^e. 63 * If X and Y are the mantissas (1.bbbb's), the quotient is then: 64 * 65 * q = (X / Y) * 2^((x exponent) - (y exponent)) 66 * 67 * Since X and Y are both in [1.0,2.0), the quotient's mantissa (X / Y) 68 * will be in [0.5,2.0). Moreover, it will be less than 1.0 if and only 69 * if X < Y. In that case, it will have to be shifted left one bit to 70 * become a normal number, and the exponent decremented. Thus, the 71 * desired exponent is: 72 * 73 * left_shift = x->fp_mant < y->fp_mant; 74 * result_exp = x->fp_exp - y->fp_exp - left_shift; 75 * 76 * The quotient mantissa X/Y can then be computed one bit at a time 77 * using the following algorithm: 78 * 79 * Q = 0; -- Initial quotient. 80 * R = X; -- Initial remainder, 81 * if (left_shift) -- but fixed up in advance. 82 * R *= 2; 83 * for (bit = FP_NMANT; --bit >= 0; R *= 2) { 84 * if (R >= Y) { 85 * Q |= 1 << bit; 86 * R -= Y; 87 * } 88 * } 89 * 90 * The subtraction R -= Y always removes the uppermost bit from R (and 91 * can sometimes remove additional lower-order 1 bits); this proof is 92 * left to the reader. 93 * 94 * This loop correctly calculates the guard and round bits since they are 95 * included in the expanded internal representation. The sticky bit 96 * is to be set if and only if any other bits beyond guard and round 97 * would be set. From the above it is obvious that this is true if and 98 * only if the remainder R is nonzero when the loop terminates. 99 * 100 * Examining the loop above, we can see that the quotient Q is built 101 * one bit at a time ``from the top down''. This means that we can 102 * dispense with the multi-word arithmetic and just build it one word 103 * at a time, writing each result word when it is done. 104 * 105 * Furthermore, since X and Y are both in [1.0,2.0), we know that, 106 * initially, R >= Y. (Recall that, if X < Y, R is set to X * 2 and 107 * is therefore at in [2.0,4.0).) Thus Q is sure to have bit FP_NMANT-1 108 * set, and R can be set initially to either X - Y (when X >= Y) or 109 * 2X - Y (when X < Y). In addition, comparing R and Y is difficult, 110 * so we will simply calculate R - Y and see if that underflows. 111 * This leads to the following revised version of the algorithm: 112 * 113 * R = X; 114 * bit = FP_1; 115 * D = R - Y; 116 * if (D >= 0) { 117 * result_exp = x->fp_exp - y->fp_exp; 118 * R = D; 119 * q = bit; 120 * bit >>= 1; 121 * } else { 122 * result_exp = x->fp_exp - y->fp_exp - 1; 123 * q = 0; 124 * } 125 * R <<= 1; 126 * do { 127 * D = R - Y; 128 * if (D >= 0) { 129 * q |= bit; 130 * R = D; 131 * } 132 * R <<= 1; 133 * } while ((bit >>= 1) != 0); 134 * Q[0] = q; 135 * for (i = 1; i < 4; i++) { 136 * q = 0, bit = 1 << 31; 137 * do { 138 * D = R - Y; 139 * if (D >= 0) { 140 * q |= bit; 141 * R = D; 142 * } 143 * R <<= 1; 144 * } while ((bit >>= 1) != 0); 145 * Q[i] = q; 146 * } 147 * 148 * This can be refined just a bit further by moving the `R <<= 1' 149 * calculations to the front of the do-loops and eliding the first one. 150 * The process can be terminated immediately whenever R becomes 0, but 151 * this is relatively rare, and we do not bother. 152 */ 153 154struct fpn * 155__fpu_div(fe) 156 struct fpemu *fe; 157{ 158 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2; 159 u_int q, bit; 160 u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3; 161 FPU_DECL_CARRY 162 163 /* 164 * Since divide is not commutative, we cannot just use ORDER. 165 * Check either operand for NaN first; if there is at least one, 166 * order the signalling one (if only one) onto the right, then 167 * return it. Otherwise we have the following cases: 168 * 169 * Inf / Inf = NaN, plus NV exception 170 * Inf / num = Inf [i.e., return x #] 171 * Inf / 0 = Inf [i.e., return x #] 172 * 0 / Inf = 0 [i.e., return x #] 173 * 0 / num = 0 [i.e., return x #] 174 * 0 / 0 = NaN, plus NV exception 175 * num / Inf = 0 # 176 * num / num = num (do the divide) 177 * num / 0 = Inf #, plus DZ exception 178 * 179 * # Sign of result is XOR of operand signs. 180 */ 181 if (ISNAN(x) || ISNAN(y)) { 182 ORDER(x, y); 183 return (y); 184 } 185 if (ISINF(x) || ISZERO(x)) { 186 if (x->fp_class == y->fp_class) 187 return (__fpu_newnan(fe)); 188 x->fp_sign ^= y->fp_sign; 189 return (x); 190 } 191 192 x->fp_sign ^= y->fp_sign; 193 if (ISINF(y)) { 194 x->fp_class = FPC_ZERO; 195 return (x); 196 } 197 if (ISZERO(y)) { 198 fe->fe_cx = FSR_DZ; 199 x->fp_class = FPC_INF; 200 return (x); 201 } 202 203 /* 204 * Macros for the divide. See comments at top for algorithm. 205 * Note that we expand R, D, and Y here. 206 */ 207 208#define SUBTRACT /* D = R - Y */ \ 209 FPU_SUBS(d3, r3, y3); FPU_SUBCS(d2, r2, y2); \ 210 FPU_SUBCS(d1, r1, y1); FPU_SUBC(d0, r0, y0) 211 212#define NONNEGATIVE /* D >= 0 */ \ 213 ((int)d0 >= 0) 214 215#ifdef FPU_SHL1_BY_ADD 216#define SHL1 /* R <<= 1 */ \ 217 FPU_ADDS(r3, r3, r3); FPU_ADDCS(r2, r2, r2); \ 218 FPU_ADDCS(r1, r1, r1); FPU_ADDC(r0, r0, r0) 219#else 220#define SHL1 \ 221 r0 = (r0 << 1) | (r1 >> 31), r1 = (r1 << 1) | (r2 >> 31), \ 222 r2 = (r2 << 1) | (r3 >> 31), r3 <<= 1 223#endif 224 225#define LOOP /* do ... while (bit >>= 1) */ \ 226 do { \ 227 SHL1; \ 228 SUBTRACT; \ 229 if (NONNEGATIVE) { \ 230 q |= bit; \ 231 r0 = d0, r1 = d1, r2 = d2, r3 = d3; \ 232 } \ 233 } while ((bit >>= 1) != 0) 234 235#define WORD(r, i) /* calculate r->fp_mant[i] */ \ 236 q = 0; \ 237 bit = 1 << 31; \ 238 LOOP; \ 239 (x)->fp_mant[i] = q 240 241 /* Setup. Note that we put our result in x. */ 242 r0 = x->fp_mant[0]; 243 r1 = x->fp_mant[1]; 244 r2 = x->fp_mant[2]; 245 r3 = x->fp_mant[3]; 246 y0 = y->fp_mant[0]; 247 y1 = y->fp_mant[1]; 248 y2 = y->fp_mant[2]; 249 y3 = y->fp_mant[3]; 250 251 bit = FP_1; 252 SUBTRACT; 253 if (NONNEGATIVE) { 254 x->fp_exp -= y->fp_exp; 255 r0 = d0, r1 = d1, r2 = d2, r3 = d3; 256 q = bit; 257 bit >>= 1; 258 } else { 259 x->fp_exp -= y->fp_exp + 1; 260 q = 0; 261 } 262 LOOP; 263 x->fp_mant[0] = q; 264 WORD(x, 1); 265 WORD(x, 2); 266 WORD(x, 3); 267 x->fp_sticky = r0 | r1 | r2 | r3; 268 269 return (x); 270} 271