WebAssemblyInstrInfo.td revision 341825
1// WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*- 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9/// 10/// \file 11/// WebAssembly Instruction definitions. 12/// 13//===----------------------------------------------------------------------===// 14 15//===----------------------------------------------------------------------===// 16// WebAssembly Instruction Predicate Definitions. 17//===----------------------------------------------------------------------===// 18 19def HasAddr32 : Predicate<"!Subtarget->hasAddr64()">; 20def HasAddr64 : Predicate<"Subtarget->hasAddr64()">; 21def HasSIMD128 : Predicate<"Subtarget->hasSIMD128()">, 22 AssemblerPredicate<"FeatureSIMD128", "simd128">; 23def HasAtomics : Predicate<"Subtarget->hasAtomics()">, 24 AssemblerPredicate<"FeatureAtomics", "atomics">; 25def HasNontrappingFPToInt : 26 Predicate<"Subtarget->hasNontrappingFPToInt()">, 27 AssemblerPredicate<"FeatureNontrappingFPToInt", 28 "nontrapping-fptoint">; 29def NotHasNontrappingFPToInt : 30 Predicate<"!Subtarget->hasNontrappingFPToInt()">, 31 AssemblerPredicate<"!FeatureNontrappingFPToInt", 32 "nontrapping-fptoint">; 33def HasSignExt : 34 Predicate<"Subtarget->hasSignExt()">, 35 AssemblerPredicate<"FeatureSignExt", 36 "sign-ext">; 37def NotHasSignExt : 38 Predicate<"!Subtarget->hasSignExt()">, 39 AssemblerPredicate<"!FeatureSignExt", 40 "sign-ext">; 41 42def HasExceptionHandling : 43 Predicate<"Subtarget->hasExceptionHandling()">, 44 AssemblerPredicate<"FeatureExceptionHandling", 45 "exception-handling">; 46 47def NotHasExceptionHandling : 48 Predicate<"!Subtarget->hasExceptionHandling()">, 49 AssemblerPredicate<"!FeatureExceptionHandling", 50 "exception-handling">; 51 52//===----------------------------------------------------------------------===// 53// WebAssembly-specific DAG Node Types. 54//===----------------------------------------------------------------------===// 55 56def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>, 57 SDTCisVT<1, iPTR>]>; 58def SDT_WebAssemblyCallSeqEnd : 59 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; 60def SDT_WebAssemblyCall0 : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 61def SDT_WebAssemblyCall1 : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>; 62def SDT_WebAssemblyBrTable : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 63def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>; 64def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>; 65def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, 66 SDTCisPtrTy<0>]>; 67 68//===----------------------------------------------------------------------===// 69// WebAssembly-specific DAG Nodes. 70//===----------------------------------------------------------------------===// 71 72def WebAssemblycallseq_start : 73 SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart, 74 [SDNPHasChain, SDNPOutGlue]>; 75def WebAssemblycallseq_end : 76 SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd, 77 [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>; 78def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0", 79 SDT_WebAssemblyCall0, 80 [SDNPHasChain, SDNPVariadic]>; 81def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1", 82 SDT_WebAssemblyCall1, 83 [SDNPHasChain, SDNPVariadic]>; 84def WebAssemblybr_table : SDNode<"WebAssemblyISD::BR_TABLE", 85 SDT_WebAssemblyBrTable, 86 [SDNPHasChain, SDNPVariadic]>; 87def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT", 88 SDT_WebAssemblyArgument>; 89def WebAssemblyreturn : SDNode<"WebAssemblyISD::RETURN", 90 SDT_WebAssemblyReturn, [SDNPHasChain]>; 91def WebAssemblywrapper : SDNode<"WebAssemblyISD::Wrapper", 92 SDT_WebAssemblyWrapper>; 93 94//===----------------------------------------------------------------------===// 95// WebAssembly-specific Operands. 96//===----------------------------------------------------------------------===// 97 98let OperandNamespace = "WebAssembly" in { 99 100let OperandType = "OPERAND_BASIC_BLOCK" in 101def bb_op : Operand<OtherVT>; 102 103let OperandType = "OPERAND_LOCAL" in 104def local_op : Operand<i32>; 105 106let OperandType = "OPERAND_GLOBAL" in 107def global_op : Operand<i32>; 108 109let OperandType = "OPERAND_I32IMM" in 110def i32imm_op : Operand<i32>; 111 112let OperandType = "OPERAND_I64IMM" in 113def i64imm_op : Operand<i64>; 114 115let OperandType = "OPERAND_F32IMM" in 116def f32imm_op : Operand<f32>; 117 118let OperandType = "OPERAND_F64IMM" in 119def f64imm_op : Operand<f64>; 120 121let OperandType = "OPERAND_FUNCTION32" in 122def function32_op : Operand<i32>; 123 124let OperandType = "OPERAND_OFFSET32" in 125def offset32_op : Operand<i32>; 126 127let OperandType = "OPERAND_P2ALIGN" in { 128def P2Align : Operand<i32> { 129 let PrintMethod = "printWebAssemblyP2AlignOperand"; 130} 131} // OperandType = "OPERAND_P2ALIGN" 132 133let OperandType = "OPERAND_SIGNATURE" in { 134def Signature : Operand<i32> { 135 let PrintMethod = "printWebAssemblySignatureOperand"; 136} 137} // OperandType = "OPERAND_SIGNATURE" 138 139let OperandType = "OPERAND_TYPEINDEX" in 140def TypeIndex : Operand<i32>; 141 142} // OperandNamespace = "WebAssembly" 143 144//===----------------------------------------------------------------------===// 145// WebAssembly Instruction Format Definitions. 146//===----------------------------------------------------------------------===// 147 148include "WebAssemblyInstrFormats.td" 149 150//===----------------------------------------------------------------------===// 151// Additional instructions. 152//===----------------------------------------------------------------------===// 153 154multiclass ARGUMENT<WebAssemblyRegClass vt> { 155 let hasSideEffects = 1, Uses = [ARGUMENTS], isCodeGenOnly = 1 in 156 defm ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno), 157 (outs), (ins i32imm:$argno), 158 [(set vt:$res, (WebAssemblyargument timm:$argno))]>; 159} 160multiclass SIMD_ARGUMENT<ValueType vt> { 161 let hasSideEffects = 1, Uses = [ARGUMENTS], isCodeGenOnly = 1 in 162 defm ARGUMENT_#vt : SIMD_I<(outs V128:$res), (ins i32imm:$argno), 163 (outs), (ins i32imm:$argno), 164 [(set (vt V128:$res), 165 (WebAssemblyargument timm:$argno))]>; 166} 167defm "": ARGUMENT<I32>; 168defm "": ARGUMENT<I64>; 169defm "": ARGUMENT<F32>; 170defm "": ARGUMENT<F64>; 171defm "": ARGUMENT<EXCEPT_REF>; 172defm "": SIMD_ARGUMENT<v16i8>; 173defm "": SIMD_ARGUMENT<v8i16>; 174defm "": SIMD_ARGUMENT<v4i32>; 175defm "": SIMD_ARGUMENT<v4f32>; 176 177let Defs = [ARGUMENTS] in { 178 179// get_local and set_local are not generated by instruction selection; they 180// are implied by virtual register uses and defs. 181multiclass LOCAL<WebAssemblyRegClass vt> { 182let hasSideEffects = 0 in { 183 // COPY is not an actual instruction in wasm, but since we allow get_local and 184 // set_local to be implicit during most of codegen, we can have a COPY which 185 // is actually a no-op because all the work is done in the implied get_local 186 // and set_local. COPYs are eliminated (and replaced with 187 // get_local/set_local) in the ExplicitLocals pass. 188 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in 189 defm COPY_#vt : I<(outs vt:$res), (ins vt:$src), (outs), (ins), [], 190 "copy_local\t$res, $src", "copy_local">; 191 192 // TEE is similar to COPY, but writes two copies of its result. Typically 193 // this would be used to stackify one result and write the other result to a 194 // local. 195 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in 196 defm TEE_#vt : I<(outs vt:$res, vt:$also), (ins vt:$src), (outs), (ins), [], 197 "tee_local\t$res, $also, $src", "tee_local">; 198 199 // This is the actual get_local instruction in wasm. These are made explicit 200 // by the ExplicitLocals pass. It has mayLoad because it reads from a wasm 201 // local, which is a side effect not otherwise modeled in LLVM. 202 let mayLoad = 1, isAsCheapAsAMove = 1 in 203 defm GET_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local), 204 (outs), (ins local_op:$local), [], 205 "get_local\t$res, $local", "get_local\t$local", 0x20>; 206 207 // This is the actual set_local instruction in wasm. These are made explicit 208 // by the ExplicitLocals pass. It has mayStore because it writes to a wasm 209 // local, which is a side effect not otherwise modeled in LLVM. 210 let mayStore = 1, isAsCheapAsAMove = 1 in 211 defm SET_LOCAL_#vt : I<(outs), (ins local_op:$local, vt:$src), 212 (outs), (ins local_op:$local), [], 213 "set_local\t$local, $src", "set_local\t$local", 0x21>; 214 215 // This is the actual tee_local instruction in wasm. TEEs are turned into 216 // TEE_LOCALs by the ExplicitLocals pass. It has mayStore for the same reason 217 // as SET_LOCAL. 218 let mayStore = 1, isAsCheapAsAMove = 1 in 219 defm TEE_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local, vt:$src), 220 (outs), (ins local_op:$local), [], 221 "tee_local\t$res, $local, $src", "tee_local\t$local", 222 0x22>; 223 224 // Unused values must be dropped in some contexts. 225 defm DROP_#vt : I<(outs), (ins vt:$src), (outs), (ins), [], 226 "drop\t$src", "drop", 0x1a>; 227 228 let mayLoad = 1 in 229 defm GET_GLOBAL_#vt : I<(outs vt:$res), (ins global_op:$local), 230 (outs), (ins global_op:$local), [], 231 "get_global\t$res, $local", "get_global\t$local", 232 0x23>; 233 234 let mayStore = 1 in 235 defm SET_GLOBAL_#vt : I<(outs), (ins global_op:$local, vt:$src), 236 (outs), (ins global_op:$local), [], 237 "set_global\t$local, $src", "set_global\t$local", 238 0x24>; 239 240} // hasSideEffects = 0 241} 242defm "" : LOCAL<I32>; 243defm "" : LOCAL<I64>; 244defm "" : LOCAL<F32>; 245defm "" : LOCAL<F64>; 246defm "" : LOCAL<V128>, Requires<[HasSIMD128]>; 247defm "" : LOCAL<EXCEPT_REF>, Requires<[HasExceptionHandling]>; 248 249let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in { 250defm CONST_I32 : I<(outs I32:$res), (ins i32imm_op:$imm), 251 (outs), (ins i32imm_op:$imm), 252 [(set I32:$res, imm:$imm)], 253 "i32.const\t$res, $imm", "i32.const\t$imm", 0x41>; 254defm CONST_I64 : I<(outs I64:$res), (ins i64imm_op:$imm), 255 (outs), (ins i64imm_op:$imm), 256 [(set I64:$res, imm:$imm)], 257 "i64.const\t$res, $imm", "i64.const\t$imm", 0x42>; 258defm CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm), 259 (outs), (ins f32imm_op:$imm), 260 [(set F32:$res, fpimm:$imm)], 261 "f32.const\t$res, $imm", "f32.const\t$imm", 0x43>; 262defm CONST_F64 : I<(outs F64:$res), (ins f64imm_op:$imm), 263 (outs), (ins f64imm_op:$imm), 264 [(set F64:$res, fpimm:$imm)], 265 "f64.const\t$res, $imm", "f64.const\t$imm", 0x44>; 266} // isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 267 268} // Defs = [ARGUMENTS] 269 270def : Pat<(i32 (WebAssemblywrapper tglobaladdr:$addr)), 271 (CONST_I32 tglobaladdr:$addr)>; 272def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)), 273 (CONST_I32 texternalsym:$addr)>; 274 275//===----------------------------------------------------------------------===// 276// Additional sets of instructions. 277//===----------------------------------------------------------------------===// 278 279include "WebAssemblyInstrMemory.td" 280include "WebAssemblyInstrCall.td" 281include "WebAssemblyInstrControl.td" 282include "WebAssemblyInstrInteger.td" 283include "WebAssemblyInstrConv.td" 284include "WebAssemblyInstrFloat.td" 285include "WebAssemblyInstrAtomics.td" 286include "WebAssemblyInstrSIMD.td" 287include "WebAssemblyInstrExceptRef.td" 288