1//===- PPCInstrQPX.td - The PowerPC QPX Extension --*- tablegen -*-===//
2// 
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6// 
7//===----------------------------------------------------------------------===//
8//
9// This file describes the QPX extension to the PowerPC instruction set.
10// Reference:
11// Book Q: QPX Architecture Definition. IBM (as updated in) 2011.
12//
13//===----------------------------------------------------------------------===//
14
15def PPCRegQFRCAsmOperand : AsmOperandClass {
16  let Name = "RegQFRC"; let PredicateMethod = "isRegNumber";
17}
18def qfrc : RegisterOperand<QFRC> {
19  let ParserMatchClass = PPCRegQFRCAsmOperand;
20}
21def PPCRegQSRCAsmOperand : AsmOperandClass {
22  let Name = "RegQSRC"; let PredicateMethod = "isRegNumber";
23}
24def qsrc : RegisterOperand<QSRC> {
25  let ParserMatchClass = PPCRegQSRCAsmOperand;
26}
27def PPCRegQBRCAsmOperand : AsmOperandClass {
28  let Name = "RegQBRC"; let PredicateMethod = "isRegNumber";
29}
30def qbrc : RegisterOperand<QBRC> {
31  let ParserMatchClass = PPCRegQBRCAsmOperand;
32}
33
34//===----------------------------------------------------------------------===//
35// Helpers for defining instructions that directly correspond to intrinsics.
36
37// QPXA1_Int - A AForm_1 intrinsic definition.
38class QPXA1_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
39  : AForm_1<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
40              !strconcat(opc, " $FRT, $FRA, $FRC, $FRB"), IIC_FPFused,
41                       [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
42// QPXA1s_Int - A AForm_1 intrinsic definition (simple instructions).
43class QPXA1s_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
44  : AForm_1<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
45              !strconcat(opc, " $FRT, $FRA, $FRC, $FRB"), IIC_VecPerm,
46                       [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
47// QPXA2_Int - A AForm_2 intrinsic definition.
48class QPXA2_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
49  : AForm_2<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
50              !strconcat(opc, " $FRT, $FRA, $FRB"), IIC_FPGeneral,
51                       [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB))]>;
52// QPXA3_Int - A AForm_3 intrinsic definition.
53class QPXA3_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
54  : AForm_3<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRC),
55              !strconcat(opc, " $FRT, $FRA, $FRC"), IIC_FPGeneral,
56                       [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRC))]>;
57// QPXA4_Int - A AForm_4a intrinsic definition.
58class QPXA4_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
59  : AForm_4a<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRB),
60              !strconcat(opc, " $FRT, $FRB"), IIC_FPGeneral,
61                       [(set v4f64:$FRT, (IntID v4f64:$FRB))]>;
62// QPXX18_Int - A XForm_18 intrinsic definition.
63class QPXX18_Int<bits<6> opcode, bits<10> xo, string opc, Intrinsic IntID>
64  : XForm_18<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
65              !strconcat(opc, " $FRT, $FRA, $FRB"), IIC_FPCompare,
66                       [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB))]>;
67// QPXX19_Int - A XForm_19 intrinsic definition.
68class QPXX19_Int<bits<6> opcode, bits<10> xo, string opc, Intrinsic IntID>
69  : XForm_19<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRB),
70              !strconcat(opc, " $FRT, $FRB"), IIC_FPGeneral,
71                       [(set v4f64:$FRT, (IntID v4f64:$FRB))]>;
72
73//===----------------------------------------------------------------------===//
74// Pattern Frags.
75
76def extloadv4f32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
77  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::v4f32;
78}]>;
79
80def truncstorev4f32 : PatFrag<(ops node:$val, node:$ptr),
81                            (truncstore node:$val, node:$ptr), [{
82  return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4f32;
83}]>;
84def pre_truncstv4f32 : PatFrag<(ops node:$val, node:$base, node:$offset),
85                               (pre_truncst node:$val,
86                                            node:$base, node:$offset), [{
87  return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4f32;
88}]>;
89
90def fround_inexact : PatFrag<(ops node:$val), (fpround node:$val), [{
91  return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() == 0;
92}]>;
93
94def fround_exact : PatFrag<(ops node:$val), (fpround node:$val), [{
95  return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() == 1;
96}]>;
97
98let FastIselShouldIgnore = 1 in // FastIsel should ignore all u12 instrs.
99  def u12 : ImmLeaf<i32, [{ return (Imm & 0xFFF) == Imm; }]>;
100
101//===----------------------------------------------------------------------===//
102// Instruction Definitions.
103
104def HasQPX : Predicate<"PPCSubTarget->hasQPX()">;
105let Predicates = [HasQPX] in {
106let DecoderNamespace = "QPX" in {
107let hasSideEffects = 0 in { // QPX instructions don't have side effects.
108let Uses = [RM] in {
109  // Add Instructions
110  let isCommutable = 1 in {
111    def QVFADD : AForm_2<4, 21,
112                        (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
113                        "qvfadd $FRT, $FRA, $FRB", IIC_FPGeneral,
114                        [(set v4f64:$FRT, (fadd v4f64:$FRA, v4f64:$FRB))]>;
115    let isCodeGenOnly = 1 in
116      def QVFADDS : QPXA2_Int<0, 21, "qvfadds", int_ppc_qpx_qvfadds>;
117    def QVFADDSs : AForm_2<0, 21,
118                          (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
119                          "qvfadds $FRT, $FRA, $FRB", IIC_FPGeneral,
120                          [(set v4f32:$FRT, (fadd v4f32:$FRA, v4f32:$FRB))]>;
121  }
122  def QVFSUB : AForm_2<4, 20,
123                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
124                      "qvfsub $FRT, $FRA, $FRB", IIC_FPGeneral,
125                      [(set v4f64:$FRT, (fsub v4f64:$FRA, v4f64:$FRB))]>;
126  let isCodeGenOnly = 1 in
127    def QVFSUBS : QPXA2_Int<0, 20, "qvfsubs", int_ppc_qpx_qvfsubs>;
128  def QVFSUBSs : AForm_2<0, 20,
129                        (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
130                        "qvfsubs $FRT, $FRA, $FRB", IIC_FPGeneral,
131                        [(set v4f32:$FRT, (fsub v4f32:$FRA, v4f32:$FRB))]>;
132
133  // Estimate Instructions
134  def QVFRE : AForm_4a<4, 24, (outs qfrc:$FRT), (ins qfrc:$FRB),
135                       "qvfre $FRT, $FRB", IIC_FPGeneral,
136                       [(set v4f64:$FRT, (PPCfre v4f64:$FRB))]>;
137  def QVFRES : QPXA4_Int<0, 24, "qvfres", int_ppc_qpx_qvfres>;
138  let isCodeGenOnly = 1 in
139  def QVFRESs : AForm_4a<0, 24, (outs qsrc:$FRT), (ins qsrc:$FRB),
140                         "qvfres $FRT, $FRB", IIC_FPGeneral,
141                         [(set v4f32:$FRT, (PPCfre v4f32:$FRB))]>;
142
143  def QVFRSQRTE : AForm_4a<4, 26, (outs qfrc:$FRT), (ins qfrc:$FRB),
144                           "qvfrsqrte $FRT, $FRB", IIC_FPGeneral,
145                           [(set v4f64:$FRT, (PPCfrsqrte v4f64:$FRB))]>;
146  def QVFRSQRTES : QPXA4_Int<0, 26, "qvfrsqrtes", int_ppc_qpx_qvfrsqrtes>;
147  let isCodeGenOnly = 1 in
148  def QVFRSQRTESs : AForm_4a<0, 26, (outs qsrc:$FRT), (ins qsrc:$FRB),
149                             "qvfrsqrtes $FRT, $FRB", IIC_FPGeneral,
150                             [(set v4f32:$FRT, (PPCfrsqrte v4f32:$FRB))]>;
151
152  // Multiply Instructions
153  let isCommutable = 1 in {
154    def QVFMUL : AForm_3<4, 25,
155                        (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRC),
156                        "qvfmul $FRT, $FRA, $FRC", IIC_FPGeneral,
157                        [(set v4f64:$FRT, (fmul v4f64:$FRA, v4f64:$FRC))]>;
158    let isCodeGenOnly = 1 in
159      def QVFMULS : QPXA3_Int<0, 25, "qvfmuls", int_ppc_qpx_qvfmuls>;
160    def QVFMULSs : AForm_3<0, 25,
161                          (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRC),
162                          "qvfmuls $FRT, $FRA, $FRC", IIC_FPGeneral,
163                          [(set v4f32:$FRT, (fmul v4f32:$FRA, v4f32:$FRC))]>;
164  }
165  def QVFXMUL : QPXA3_Int<4, 17, "qvfxmul", int_ppc_qpx_qvfxmul>;
166  def QVFXMULS : QPXA3_Int<0, 17, "qvfxmuls", int_ppc_qpx_qvfxmuls>;
167
168  // Multiply-add instructions
169  def QVFMADD : AForm_1<4, 29,
170                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
171                      "qvfmadd $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
172                      [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>;
173  let isCodeGenOnly = 1 in
174    def QVFMADDS : QPXA1_Int<0, 29, "qvfmadds", int_ppc_qpx_qvfmadds>;
175  def QVFMADDSs : AForm_1<0, 29,
176                        (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
177                        "qvfmadds $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
178                        [(set v4f32:$FRT, (fma v4f32:$FRA, v4f32:$FRC, v4f32:$FRB))]>;
179  def QVFNMADD : AForm_1<4, 31,
180                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
181                      "qvfnmadd $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
182                      [(set v4f64:$FRT, (fneg (fma v4f64:$FRA, v4f64:$FRC,
183                                                   v4f64:$FRB)))]>;
184  let isCodeGenOnly = 1 in
185    def QVFNMADDS : QPXA1_Int<0, 31, "qvfnmadds", int_ppc_qpx_qvfnmadds>;
186  def QVFNMADDSs : AForm_1<0, 31,
187                        (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
188                        "qvfnmadds $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
189                        [(set v4f32:$FRT, (fneg (fma v4f32:$FRA, v4f32:$FRC,
190                                                     v4f32:$FRB)))]>;
191  def QVFMSUB : AForm_1<4, 28,
192                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
193                      "qvfmsub $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
194                      [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC,
195                                             (fneg v4f64:$FRB)))]>;
196  let isCodeGenOnly = 1 in
197    def QVFMSUBS : QPXA1_Int<0, 28, "qvfmsubs", int_ppc_qpx_qvfmsubs>;
198  def QVFMSUBSs : AForm_1<0, 28,
199                      (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
200                      "qvfmsubs $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
201                      [(set v4f32:$FRT, (fma v4f32:$FRA, v4f32:$FRC,
202                                             (fneg v4f32:$FRB)))]>;
203  def QVFNMSUB : AForm_1<4, 30,
204                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
205                      "qvfnmsub $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
206                      [(set v4f64:$FRT, (fneg (fma v4f64:$FRA, v4f64:$FRC,
207                                              (fneg v4f64:$FRB))))]>;
208  let isCodeGenOnly = 1 in
209    def QVFNMSUBS : QPXA1_Int<0, 30, "qvfnmsubs", int_ppc_qpx_qvfnmsubs>;
210  def QVFNMSUBSs : AForm_1<0, 30,
211                      (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
212                      "qvfnmsubs $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
213                      [(set v4f32:$FRT, (fneg (fma v4f32:$FRA, v4f32:$FRC,
214                                              (fneg v4f32:$FRB))))]>;
215  def QVFXMADD : QPXA1_Int<4, 9, "qvfxmadd", int_ppc_qpx_qvfxmadd>;
216  def QVFXMADDS : QPXA1_Int<0, 9, "qvfxmadds", int_ppc_qpx_qvfxmadds>;
217  def QVFXXNPMADD : QPXA1_Int<4, 11, "qvfxxnpmadd", int_ppc_qpx_qvfxxnpmadd>;
218  def QVFXXNPMADDS : QPXA1_Int<0, 11, "qvfxxnpmadds", int_ppc_qpx_qvfxxnpmadds>;
219  def QVFXXCPNMADD : QPXA1_Int<4, 3, "qvfxxcpnmadd", int_ppc_qpx_qvfxxcpnmadd>;
220  def QVFXXCPNMADDS : QPXA1_Int<0, 3, "qvfxxcpnmadds", int_ppc_qpx_qvfxxcpnmadds>;
221  def QVFXXMADD : QPXA1_Int<4, 1, "qvfxxmadd", int_ppc_qpx_qvfxxmadd>;
222  def QVFXXMADDS : QPXA1_Int<0, 1, "qvfxxmadds", int_ppc_qpx_qvfxxmadds>;
223
224  // Select Instruction
225  let isCodeGenOnly = 1 in
226    def QVFSEL : QPXA1s_Int<4, 23, "qvfsel", int_ppc_qpx_qvfsel>;
227  def QVFSELb : AForm_1<4, 23, (outs qfrc:$FRT),
228                        (ins qbrc:$FRA, qfrc:$FRB, qfrc:$FRC),
229                        "qvfsel $FRT, $FRA, $FRC, $FRB", IIC_VecPerm,
230                        [(set v4f64:$FRT, (vselect v4i1:$FRA,
231                                                   v4f64:$FRC, v4f64:$FRB))]>;
232  let isCodeGenOnly = 1 in
233  def QVFSELbs : AForm_1<4, 23, (outs qsrc:$FRT),
234                        (ins qbrc:$FRA, qsrc:$FRB, qsrc:$FRC),
235                        "qvfsel $FRT, $FRA, $FRC, $FRB", IIC_VecPerm,
236                        [(set v4f32:$FRT, (vselect v4i1:$FRA,
237                                                   v4f32:$FRC, v4f32:$FRB))]>;
238  let isCodeGenOnly = 1 in
239  def QVFSELbb: AForm_1<4, 23, (outs qbrc:$FRT),
240                        (ins qbrc:$FRA, qbrc:$FRB, qbrc:$FRC),
241                        "qvfsel $FRT, $FRA, $FRC, $FRB", IIC_VecPerm,
242                        [(set v4i1:$FRT, (vselect v4i1:$FRA,
243                                                  v4i1:$FRC, v4i1:$FRB))]>;
244
245  // SELECT_CC_* - Used to implement the SELECT_CC DAG operation.  Expanded after
246  // instruction selection into a branch sequence.
247  def SELECT_CC_QFRC: PPCCustomInserterPseudo<(outs qfrc:$dst), (ins crrc:$cond, qfrc:$T, qfrc:$F,
248                              i32imm:$BROPC), "#SELECT_CC_QFRC",
249                              []>;
250  def SELECT_CC_QSRC: PPCCustomInserterPseudo<(outs qsrc:$dst), (ins crrc:$cond, qsrc:$T, qsrc:$F,
251                              i32imm:$BROPC), "#SELECT_CC_QSRC",
252                              []>;
253  def SELECT_CC_QBRC: PPCCustomInserterPseudo<(outs qbrc:$dst), (ins crrc:$cond, qbrc:$T, qbrc:$F,
254                              i32imm:$BROPC), "#SELECT_CC_QBRC",
255                              []>;
256
257  // SELECT_* pseudo instructions, like SELECT_CC_* but taking condition
258  // register bit directly.
259  def SELECT_QFRC: PPCCustomInserterPseudo<(outs qfrc:$dst), (ins crbitrc:$cond,
260                          qfrc:$T, qfrc:$F), "#SELECT_QFRC",
261                          [(set v4f64:$dst,
262                                (select i1:$cond, v4f64:$T, v4f64:$F))]>;
263  def SELECT_QSRC: PPCCustomInserterPseudo<(outs qsrc:$dst), (ins crbitrc:$cond,
264                          qsrc:$T, qsrc:$F), "#SELECT_QSRC",
265                          [(set v4f32:$dst,
266                                (select i1:$cond, v4f32:$T, v4f32:$F))]>;
267  def SELECT_QBRC: PPCCustomInserterPseudo<(outs qbrc:$dst), (ins crbitrc:$cond,
268                          qbrc:$T, qbrc:$F), "#SELECT_QBRC",
269                          [(set v4i1:$dst,
270                                (select i1:$cond, v4i1:$T, v4i1:$F))]>;
271
272  // Convert and Round Instructions
273  def QVFCTID : QPXX19_Int<4, 814, "qvfctid", int_ppc_qpx_qvfctid>;
274  let isCodeGenOnly = 1 in
275    def QVFCTIDb : XForm_19<4, 814, (outs qbrc:$FRT), (ins qbrc:$FRB),
276                            "qvfctid $FRT, $FRB", IIC_FPGeneral, []>;
277
278  def QVFCTIDU : QPXX19_Int<4, 942, "qvfctidu", int_ppc_qpx_qvfctidu>;
279  def QVFCTIDZ : QPXX19_Int<4, 815, "qvfctidz", int_ppc_qpx_qvfctidz>;
280  def QVFCTIDUZ : QPXX19_Int<4, 943, "qvfctiduz", int_ppc_qpx_qvfctiduz>;
281  def QVFCTIW : QPXX19_Int<4, 14, "qvfctiw", int_ppc_qpx_qvfctiw>;
282  def QVFCTIWU : QPXX19_Int<4, 142, "qvfctiwu", int_ppc_qpx_qvfctiwu>;
283  def QVFCTIWZ : QPXX19_Int<4, 15, "qvfctiwz", int_ppc_qpx_qvfctiwz>;
284  def QVFCTIWUZ : QPXX19_Int<4, 143, "qvfctiwuz", int_ppc_qpx_qvfctiwuz>;
285  def QVFCFID : QPXX19_Int<4, 846, "qvfcfid", int_ppc_qpx_qvfcfid>;
286  let isCodeGenOnly = 1 in
287    def QVFCFIDb : XForm_19<4, 846, (outs qbrc:$FRT), (ins qbrc:$FRB),
288                            "qvfcfid $FRT, $FRB", IIC_FPGeneral, []>;
289
290  def QVFCFIDU : QPXX19_Int<4, 974, "qvfcfidu", int_ppc_qpx_qvfcfidu>;
291  def QVFCFIDS : QPXX19_Int<0, 846, "qvfcfids", int_ppc_qpx_qvfcfids>;
292  def QVFCFIDUS : QPXX19_Int<0, 974, "qvfcfidus", int_ppc_qpx_qvfcfidus>;
293
294  let isCodeGenOnly = 1 in
295    def QVFRSP : QPXX19_Int<4, 12, "qvfrsp", int_ppc_qpx_qvfrsp>;
296  def QVFRSPs : XForm_19<4, 12,
297                      (outs qsrc:$FRT), (ins qfrc:$FRB),
298                      "qvfrsp $FRT, $FRB", IIC_FPGeneral,
299                      [(set v4f32:$FRT, (fround_inexact v4f64:$FRB))]>;
300
301  def QVFRIZ : XForm_19<4, 424, (outs qfrc:$FRT), (ins qfrc:$FRB),
302                        "qvfriz $FRT, $FRB", IIC_FPGeneral,
303                        [(set v4f64:$FRT, (ftrunc v4f64:$FRB))]>;
304  let isCodeGenOnly = 1 in
305    def QVFRIZs : XForm_19<4, 424, (outs qsrc:$FRT), (ins qsrc:$FRB),
306                           "qvfriz $FRT, $FRB", IIC_FPGeneral,
307                           [(set v4f32:$FRT, (ftrunc v4f32:$FRB))]>;
308
309  def QVFRIN : XForm_19<4, 392, (outs qfrc:$FRT), (ins qfrc:$FRB),
310                        "qvfrin $FRT, $FRB", IIC_FPGeneral,
311                        [(set v4f64:$FRT, (fround v4f64:$FRB))]>;
312  let isCodeGenOnly = 1 in
313    def QVFRINs : XForm_19<4, 392, (outs qsrc:$FRT), (ins qsrc:$FRB),
314                           "qvfrin $FRT, $FRB", IIC_FPGeneral,
315                           [(set v4f32:$FRT, (fround v4f32:$FRB))]>;
316
317  def QVFRIP : XForm_19<4, 456, (outs qfrc:$FRT), (ins qfrc:$FRB),
318                        "qvfrip $FRT, $FRB", IIC_FPGeneral,
319                        [(set v4f64:$FRT, (fceil v4f64:$FRB))]>;
320  let isCodeGenOnly = 1 in
321    def QVFRIPs : XForm_19<4, 456, (outs qsrc:$FRT), (ins qsrc:$FRB),
322                           "qvfrip $FRT, $FRB", IIC_FPGeneral,
323                           [(set v4f32:$FRT, (fceil v4f32:$FRB))]>;
324
325  def QVFRIM : XForm_19<4, 488, (outs qfrc:$FRT), (ins qfrc:$FRB),
326                        "qvfrim $FRT, $FRB", IIC_FPGeneral,
327                        [(set v4f64:$FRT, (ffloor v4f64:$FRB))]>;
328  let isCodeGenOnly = 1 in
329    def QVFRIMs : XForm_19<4, 488, (outs qsrc:$FRT), (ins qsrc:$FRB),
330                           "qvfrim $FRT, $FRB", IIC_FPGeneral,
331                           [(set v4f32:$FRT, (ffloor v4f32:$FRB))]>;
332
333  // Move Instructions
334  def QVFMR : XForm_19<4, 72,
335                      (outs qfrc:$FRT), (ins qfrc:$FRB),
336                      "qvfmr $FRT, $FRB", IIC_VecPerm,
337                      [/* (set v4f64:$FRT, v4f64:$FRB) */]>;
338  let isCodeGenOnly = 1 in {
339    def QVFMRs : XForm_19<4, 72,
340                         (outs qsrc:$FRT), (ins qsrc:$FRB),
341                         "qvfmr $FRT, $FRB", IIC_VecPerm,
342                         [/* (set v4f32:$FRT, v4f32:$FRB) */]>;
343    def QVFMRb : XForm_19<4, 72,
344                         (outs qbrc:$FRT), (ins qbrc:$FRB),
345                         "qvfmr $FRT, $FRB", IIC_VecPerm,
346                         [/* (set v4i1:$FRT, v4i1:$FRB) */]>;
347  }
348  def QVFNEG : XForm_19<4, 40,
349                      (outs qfrc:$FRT), (ins qfrc:$FRB),
350                      "qvfneg $FRT, $FRB", IIC_VecPerm,
351                      [(set v4f64:$FRT, (fneg v4f64:$FRB))]>;
352  let isCodeGenOnly = 1 in
353    def QVFNEGs : XForm_19<4, 40,
354                         (outs qsrc:$FRT), (ins qsrc:$FRB),
355                         "qvfneg $FRT, $FRB", IIC_VecPerm,
356                         [(set v4f32:$FRT, (fneg v4f32:$FRB))]>;
357  def QVFABS : XForm_19<4, 264,
358                      (outs qfrc:$FRT), (ins qfrc:$FRB),
359                      "qvfabs $FRT, $FRB", IIC_VecPerm,
360                      [(set v4f64:$FRT, (fabs v4f64:$FRB))]>;
361  let isCodeGenOnly = 1 in
362    def QVFABSs : XForm_19<4, 264,
363                         (outs qsrc:$FRT), (ins qsrc:$FRB),
364                         "qvfabs $FRT, $FRB", IIC_VecPerm,
365                         [(set v4f32:$FRT, (fabs v4f32:$FRB))]>;
366  def QVFNABS : XForm_19<4, 136,
367                      (outs qfrc:$FRT), (ins qfrc:$FRB),
368                      "qvfnabs $FRT, $FRB", IIC_VecPerm,
369                      [(set v4f64:$FRT, (fneg (fabs v4f64:$FRB)))]>;
370  let isCodeGenOnly = 1 in
371    def QVFNABSs : XForm_19<4, 136,
372                         (outs qsrc:$FRT), (ins qsrc:$FRB),
373                         "qvfnabs $FRT, $FRB", IIC_VecPerm,
374                         [(set v4f32:$FRT, (fneg (fabs v4f32:$FRB)))]>;
375  def QVFCPSGN : XForm_18<4, 8,
376                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
377                      "qvfcpsgn $FRT, $FRA, $FRB", IIC_VecPerm,
378                      [(set v4f64:$FRT, (fcopysign v4f64:$FRB, v4f64:$FRA))]>;
379  let isCodeGenOnly = 1 in
380    def QVFCPSGNs : XForm_18<4, 8,
381                         (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
382                         "qvfcpsgn $FRT, $FRA, $FRB", IIC_VecPerm,
383                         [(set v4f32:$FRT, (fcopysign v4f32:$FRB, v4f32:$FRA))]>;
384
385  def QVALIGNI : Z23Form_1<4, 5,
386                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, u2imm:$idx),
387                      "qvaligni $FRT, $FRA, $FRB, $idx", IIC_VecPerm,
388                      [(set v4f64:$FRT,
389                            (PPCqvaligni v4f64:$FRA, v4f64:$FRB,
390                                         (i32 imm:$idx)))]>;
391  let isCodeGenOnly = 1 in
392     def QVALIGNIs : Z23Form_1<4, 5,
393                         (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, u2imm:$idx),
394                         "qvaligni $FRT, $FRA, $FRB, $idx", IIC_VecPerm,
395                         [(set v4f32:$FRT,
396                               (PPCqvaligni v4f32:$FRA, v4f32:$FRB,
397                                            (i32 imm:$idx)))]>;
398  let isCodeGenOnly = 1 in
399     def QVALIGNIb : Z23Form_1<4, 5,
400                         (outs qbrc:$FRT), (ins qbrc:$FRA, qbrc:$FRB, u2imm:$idx),
401                         "qvaligni $FRT, $FRA, $FRB, $idx", IIC_VecPerm,
402                         [(set v4i1:$FRT,
403                               (PPCqvaligni v4i1:$FRA, v4i1:$FRB,
404                                            (i32 imm:$idx)))]>;
405
406  def QVESPLATI : Z23Form_2<4, 37,
407                      (outs qfrc:$FRT), (ins qfrc:$FRA, u2imm:$idx),
408                      "qvesplati $FRT, $FRA, $idx", IIC_VecPerm,
409                      [(set v4f64:$FRT,
410                            (PPCqvesplati v4f64:$FRA, (i32 imm:$idx)))]>;
411  let isCodeGenOnly = 1 in
412     def QVESPLATIs : Z23Form_2<4, 37,
413                         (outs qsrc:$FRT), (ins qsrc:$FRA, u2imm:$idx),
414                         "qvesplati $FRT, $FRA, $idx", IIC_VecPerm,
415                         [(set v4f32:$FRT,
416                               (PPCqvesplati v4f32:$FRA, (i32 imm:$idx)))]>;
417  let isCodeGenOnly = 1 in
418     def QVESPLATIb : Z23Form_2<4, 37,
419                         (outs qbrc:$FRT), (ins qbrc:$FRA, u2imm:$idx),
420                         "qvesplati $FRT, $FRA, $idx", IIC_VecPerm,
421                         [(set v4i1:$FRT,
422                               (PPCqvesplati v4i1:$FRA, (i32 imm:$idx)))]>;
423
424  def QVFPERM : AForm_1<4, 6,
425                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
426                      "qvfperm $FRT, $FRA, $FRB, $FRC", IIC_VecPerm,
427                      [(set v4f64:$FRT,
428                            (PPCqvfperm v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
429  let isCodeGenOnly = 1 in
430     def QVFPERMs : AForm_1<4, 6,
431                         (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qfrc:$FRC),
432                         "qvfperm $FRT, $FRA, $FRB, $FRC", IIC_VecPerm,
433                         [(set v4f32:$FRT,
434                               (PPCqvfperm v4f32:$FRA, v4f32:$FRB, v4f64:$FRC))]>;
435
436  let isReMaterializable = 1, isAsCheapAsAMove = 1 in
437  def QVGPCI : Z23Form_3<4, 133,
438                      (outs qfrc:$FRT), (ins u12imm:$idx),
439                      "qvgpci $FRT, $idx", IIC_VecPerm,
440                      [(set v4f64:$FRT, (PPCqvgpci (u12:$idx)))]>;
441
442  // Compare Instruction
443  let isCodeGenOnly = 1 in
444    def QVFTSTNAN : QPXX18_Int<4, 64, "qvftstnan", int_ppc_qpx_qvftstnan>;
445  def QVFTSTNANb : XForm_18<4, 64, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
446                           "qvftstnan $FRT, $FRA, $FRB", IIC_FPCompare,
447                           [(set v4i1:$FRT,
448                                 (setcc v4f64:$FRA, v4f64:$FRB, SETUO))]>;
449  let isCodeGenOnly = 1 in
450  def QVFTSTNANbs : XForm_18<4, 64, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
451                            "qvftstnan $FRT, $FRA, $FRB", IIC_FPCompare,
452                            [(set v4i1:$FRT,
453                                  (setcc v4f32:$FRA, v4f32:$FRB, SETUO))]>;
454  let isCodeGenOnly = 1 in
455    def QVFCMPLT : QPXX18_Int<4, 96, "qvfcmplt", int_ppc_qpx_qvfcmplt>;
456  def QVFCMPLTb : XForm_18<4, 96, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
457                           "qvfcmplt $FRT, $FRA, $FRB", IIC_FPCompare,
458                           [(set v4i1:$FRT,
459                                 (setcc v4f64:$FRA, v4f64:$FRB, SETOLT))]>;
460  let isCodeGenOnly = 1 in
461  def QVFCMPLTbs : XForm_18<4, 96, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
462                            "qvfcmplt $FRT, $FRA, $FRB", IIC_FPCompare,
463                            [(set v4i1:$FRT,
464                                  (setcc v4f32:$FRA, v4f32:$FRB, SETOLT))]>;
465  let isCodeGenOnly = 1 in
466    def QVFCMPGT : QPXX18_Int<4, 32, "qvfcmpgt", int_ppc_qpx_qvfcmpgt>;
467  def QVFCMPGTb : XForm_18<4, 32, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
468                           "qvfcmpgt $FRT, $FRA, $FRB", IIC_FPCompare,
469                           [(set v4i1:$FRT,
470                                 (setcc v4f64:$FRA, v4f64:$FRB, SETOGT))]>;
471  let isCodeGenOnly = 1 in
472  def QVFCMPGTbs : XForm_18<4, 32, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
473                            "qvfcmpgt $FRT, $FRA, $FRB", IIC_FPCompare,
474                            [(set v4i1:$FRT,
475                                  (setcc v4f32:$FRA, v4f32:$FRB, SETOGT))]>;
476  let isCodeGenOnly = 1 in
477    def QVFCMPEQ : QPXX18_Int<4, 0, "qvfcmpeq", int_ppc_qpx_qvfcmpeq>;
478  def QVFCMPEQb : XForm_18<4, 0, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
479                           "qvfcmpeq $FRT, $FRA, $FRB", IIC_FPCompare,
480                           [(set v4i1:$FRT,
481                                 (setcc v4f64:$FRA, v4f64:$FRB, SETOEQ))]>;
482  let isCodeGenOnly = 1 in
483  def QVFCMPEQbs : XForm_18<4, 0, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
484                            "qvfcmpeq $FRT, $FRA, $FRB", IIC_FPCompare,
485                            [(set v4i1:$FRT,
486                                  (setcc v4f32:$FRA, v4f32:$FRB, SETOEQ))]>;
487
488  let isCodeGenOnly = 1 in
489  def QVFLOGICAL : XForm_20<4, 4,
490                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, u12imm:$tttt),
491                      "qvflogical $FRT, $FRA, $FRB, $tttt", IIC_VecPerm, []>;
492  def QVFLOGICALb : XForm_20<4, 4,
493                      (outs qbrc:$FRT), (ins qbrc:$FRA, qbrc:$FRB, u12imm:$tttt),
494                      "qvflogical $FRT, $FRA, $FRB, $tttt", IIC_VecPerm, []>;
495  let isCodeGenOnly = 1 in
496  def QVFLOGICALs : XForm_20<4, 4,
497                      (outs qbrc:$FRT), (ins qbrc:$FRA, qbrc:$FRB, u12imm:$tttt),
498                      "qvflogical $FRT, $FRA, $FRB, $tttt", IIC_VecPerm, []>;
499
500  // Load indexed instructions
501  let mayLoad = 1 in {
502    def QVLFDX : XForm_1_memOp<31, 583,
503                              (outs qfrc:$FRT), (ins memrr:$src),
504                              "qvlfdx $FRT, $src", IIC_LdStLFD,
505                              [(set v4f64:$FRT, (load xoaddr:$src))]>;
506    let isCodeGenOnly = 1 in
507    def QVLFDXb : XForm_1_memOp<31, 583,
508                                (outs qbrc:$FRT), (ins memrr:$src),
509                                "qvlfdx $FRT, $src", IIC_LdStLFD, []>;
510
511    let RC = 1 in
512    def QVLFDXA : XForm_1<31, 583,
513                        (outs qfrc:$FRT), (ins memrr:$src),
514                        "qvlfdxa $FRT, $src", IIC_LdStLFD, []>;
515
516    def QVLFDUX : XForm_1<31, 615,
517                        (outs qfrc:$FRT, ptr_rc_nor0:$ea_result),
518                        (ins memrr:$src),
519                        "qvlfdux $FRT, $src", IIC_LdStLFDU, []>,
520                        RegConstraint<"$src.ptrreg = $ea_result">,
521                        NoEncode<"$ea_result">;
522    let RC = 1 in
523    def QVLFDUXA : XForm_1<31, 615,
524                        (outs qfrc:$FRT), (ins memrr:$src),
525                        "qvlfduxa $FRT, $src", IIC_LdStLFD, []>;
526
527    def QVLFSX : XForm_1_memOp<31, 519,
528                              (outs qfrc:$FRT), (ins memrr:$src),
529                              "qvlfsx $FRT, $src", IIC_LdStLFD,
530                              [(set v4f64:$FRT, (extloadv4f32 xoaddr:$src))]>;
531
532    let isCodeGenOnly = 1 in
533    def QVLFSXb : XForm_1<31, 519,
534                        (outs qbrc:$FRT), (ins memrr:$src),
535                        "qvlfsx $FRT, $src", IIC_LdStLFD,
536                        [(set v4i1:$FRT, (PPCqvlfsb xoaddr:$src))]>;
537    let isCodeGenOnly = 1 in
538    def QVLFSXs : XForm_1_memOp<31, 519,
539                                (outs qsrc:$FRT), (ins memrr:$src),
540                                "qvlfsx $FRT, $src", IIC_LdStLFD,
541                                [(set v4f32:$FRT, (load xoaddr:$src))]>;
542
543    let RC = 1 in
544    def QVLFSXA : XForm_1<31, 519,
545                        (outs qfrc:$FRT), (ins memrr:$src),
546                        "qvlfsxa $FRT, $src", IIC_LdStLFD, []>;
547
548    def QVLFSUX : XForm_1<31, 551,
549                        (outs qsrc:$FRT, ptr_rc_nor0:$ea_result),
550                        (ins memrr:$src),
551                        "qvlfsux $FRT, $src", IIC_LdStLFDU, []>,
552                        RegConstraint<"$src.ptrreg = $ea_result">,
553                        NoEncode<"$ea_result">;
554
555    let RC = 1 in
556    def QVLFSUXA : XForm_1<31, 551,
557                        (outs qfrc:$FRT), (ins memrr:$src),
558                        "qvlfsuxa $FRT, $src", IIC_LdStLFD, []>;
559
560    def QVLFCDX : XForm_1<31, 71,
561                        (outs qfrc:$FRT), (ins memrr:$src),
562                        "qvlfcdx $FRT, $src", IIC_LdStLFD, []>;
563    let RC = 1 in
564    def QVLFCDXA : XForm_1<31, 71,
565                        (outs qfrc:$FRT), (ins memrr:$src),
566                        "qvlfcdxa $FRT, $src", IIC_LdStLFD, []>;
567
568    def QVLFCDUX : XForm_1<31, 103,
569                        (outs qfrc:$FRT), (ins memrr:$src),
570                        "qvlfcdux $FRT, $src", IIC_LdStLFD, []>;
571    let RC = 1 in
572    def QVLFCDUXA : XForm_1<31, 103,
573                        (outs qfrc:$FRT), (ins memrr:$src),
574                        "qvlfcduxa $FRT, $src", IIC_LdStLFD, []>;
575
576    def QVLFCSX : XForm_1<31, 7,
577                        (outs qfrc:$FRT), (ins memrr:$src),
578                        "qvlfcsx $FRT, $src", IIC_LdStLFD, []>;
579    let isCodeGenOnly = 1 in
580    def QVLFCSXs : XForm_1<31, 7,
581                         (outs qsrc:$FRT), (ins memrr:$src),
582                         "qvlfcsx $FRT, $src", IIC_LdStLFD, []>;
583
584    let RC = 1 in
585    def QVLFCSXA : XForm_1<31, 7,
586                        (outs qfrc:$FRT), (ins memrr:$src),
587                        "qvlfcsxa $FRT, $src", IIC_LdStLFD, []>;
588
589    def QVLFCSUX : XForm_1<31, 39,
590                        (outs qfrc:$FRT), (ins memrr:$src),
591                        "qvlfcsux $FRT, $src", IIC_LdStLFD, []>;
592    let RC = 1 in
593    def QVLFCSUXA : XForm_1<31, 39,
594                        (outs qfrc:$FRT), (ins memrr:$src),
595                        "qvlfcsuxa $FRT, $src", IIC_LdStLFD, []>;
596
597    def QVLFIWAX : XForm_1<31, 871,
598                        (outs qfrc:$FRT), (ins memrr:$src),
599                        "qvlfiwax $FRT, $src", IIC_LdStLFD, []>;
600    let RC = 1 in
601    def QVLFIWAXA : XForm_1<31, 871,
602                        (outs qfrc:$FRT), (ins memrr:$src),
603                        "qvlfiwaxa $FRT, $src", IIC_LdStLFD, []>;
604
605    def QVLFIWZX : XForm_1<31, 839,
606                        (outs qfrc:$FRT), (ins memrr:$src),
607                        "qvlfiwzx $FRT, $src", IIC_LdStLFD, []>;
608    let RC = 1 in
609    def QVLFIWZXA : XForm_1<31, 839,
610                        (outs qfrc:$FRT), (ins memrr:$src),
611                        "qvlfiwzxa $FRT, $src", IIC_LdStLFD, []>;
612  }
613
614
615  def QVLPCLDX : XForm_1<31, 582,
616                      (outs qfrc:$FRT), (ins memrr:$src),
617                      "qvlpcldx $FRT, $src", IIC_LdStLFD, []>;
618  def QVLPCLSX : XForm_1<31, 518,
619                      (outs qfrc:$FRT), (ins memrr:$src),
620                      "qvlpclsx $FRT, $src", IIC_LdStLFD, []>;
621  let isCodeGenOnly = 1 in
622    def QVLPCLSXint : XForm_11<31, 518,
623                              (outs qfrc:$FRT), (ins G8RC:$src),
624                              "qvlpclsx $FRT, 0, $src", IIC_LdStLFD, []>;
625  def QVLPCRDX : XForm_1<31, 70,
626                      (outs qfrc:$FRT), (ins memrr:$src),
627                      "qvlpcrdx $FRT, $src", IIC_LdStLFD, []>;
628  def QVLPCRSX : XForm_1<31, 6,
629                      (outs qfrc:$FRT), (ins memrr:$src),
630                      "qvlpcrsx $FRT, $src", IIC_LdStLFD, []>;
631
632  // Store indexed instructions
633  let mayStore = 1 in {
634    def QVSTFDX : XForm_8_memOp<31, 711,
635                        (outs), (ins qfrc:$FRT, memrr:$dst),
636                        "qvstfdx $FRT, $dst", IIC_LdStSTFD,
637                        [(store qfrc:$FRT, xoaddr:$dst)]>;
638    let isCodeGenOnly = 1 in
639    def QVSTFDXb : XForm_8_memOp<31, 711,
640                        (outs), (ins qbrc:$FRT, memrr:$dst),
641                        "qvstfdx $FRT, $dst", IIC_LdStSTFD, []>;
642
643    let RC = 1 in
644    def QVSTFDXA : XForm_8<31, 711,
645                        (outs), (ins qfrc:$FRT, memrr:$dst),
646                        "qvstfdxa $FRT, $dst", IIC_LdStSTFD, []>;
647
648    def QVSTFDUX : XForm_8<31, 743, (outs ptr_rc_nor0:$ea_res),
649                           (ins qfrc:$FRT, memrr:$dst),
650                           "qvstfdux $FRT, $dst", IIC_LdStSTFDU, []>,
651                           RegConstraint<"$dst.ptrreg = $ea_res">,
652                           NoEncode<"$ea_res">;
653
654    let RC = 1 in
655    def QVSTFDUXA : XForm_8<31, 743,
656                        (outs), (ins qfrc:$FRT, memrr:$dst),
657                        "qvstfduxa $FRT, $dst", IIC_LdStSTFD, []>;
658
659    def QVSTFDXI : XForm_8<31, 709,
660                        (outs), (ins qfrc:$FRT, memrr:$dst),
661                        "qvstfdxi $FRT, $dst", IIC_LdStSTFD, []>;
662    let RC = 1 in
663    def QVSTFDXIA : XForm_8<31, 709,
664                        (outs), (ins qfrc:$FRT, memrr:$dst),
665                        "qvstfdxia $FRT, $dst", IIC_LdStSTFD, []>;
666
667    def QVSTFDUXI : XForm_8<31, 741,
668                        (outs), (ins qfrc:$FRT, memrr:$dst),
669                        "qvstfduxi $FRT, $dst", IIC_LdStSTFD, []>;
670    let RC = 1 in
671    def QVSTFDUXIA : XForm_8<31, 741,
672                        (outs), (ins qfrc:$FRT, memrr:$dst),
673                        "qvstfduxia $FRT, $dst", IIC_LdStSTFD, []>;
674
675    def QVSTFSX : XForm_8_memOp<31, 647,
676                        (outs), (ins qfrc:$FRT, memrr:$dst),
677                        "qvstfsx $FRT, $dst", IIC_LdStSTFD,
678                        [(truncstorev4f32 qfrc:$FRT, xoaddr:$dst)]>;
679    let isCodeGenOnly = 1 in
680    def QVSTFSXs : XForm_8_memOp<31, 647,
681                         (outs), (ins qsrc:$FRT, memrr:$dst),
682                         "qvstfsx $FRT, $dst", IIC_LdStSTFD,
683                         [(store qsrc:$FRT, xoaddr:$dst)]>;
684
685    let RC = 1 in
686    def QVSTFSXA : XForm_8<31, 647,
687                        (outs), (ins qfrc:$FRT, memrr:$dst),
688                        "qvstfsxa $FRT, $dst", IIC_LdStSTFD, []>;
689
690    def QVSTFSUX : XForm_8<31, 679, (outs ptr_rc_nor0:$ea_res),
691                           (ins qsrc:$FRT, memrr:$dst),
692                           "qvstfsux $FRT, $dst", IIC_LdStSTFDU, []>,
693                           RegConstraint<"$dst.ptrreg = $ea_res">,
694                           NoEncode<"$ea_res">;
695    let isCodeGenOnly = 1 in
696    def QVSTFSUXs: XForm_8<31, 679, (outs ptr_rc_nor0:$ea_res),
697                           (ins qfrc:$FRT, memrr:$dst),
698                           "qvstfsux $FRT, $dst", IIC_LdStSTFDU, []>,
699                           RegConstraint<"$dst.ptrreg = $ea_res">,
700                           NoEncode<"$ea_res">;
701
702    let RC = 1 in
703    def QVSTFSUXA : XForm_8<31, 679,
704                        (outs), (ins qfrc:$FRT, memrr:$dst),
705                        "qvstfsuxa $FRT, $dst", IIC_LdStSTFD, []>;
706
707    def QVSTFSXI : XForm_8<31, 645,
708                        (outs), (ins qfrc:$FRT, memrr:$dst),
709                        "qvstfsxi $FRT, $dst", IIC_LdStSTFD, []>;
710    let RC = 1 in
711    def QVSTFSXIA : XForm_8<31, 645,
712                        (outs), (ins qfrc:$FRT, memrr:$dst),
713                        "qvstfsxia $FRT, $dst", IIC_LdStSTFD, []>;
714
715    def QVSTFSUXI : XForm_8<31, 677,
716                        (outs), (ins qfrc:$FRT, memrr:$dst),
717                        "qvstfsuxi $FRT, $dst", IIC_LdStSTFD, []>;
718    let RC = 1 in
719    def QVSTFSUXIA : XForm_8<31, 677,
720                        (outs), (ins qfrc:$FRT, memrr:$dst),
721                        "qvstfsuxia $FRT, $dst", IIC_LdStSTFD, []>;
722
723    def QVSTFCDX : XForm_8<31, 199,
724                        (outs), (ins qfrc:$FRT, memrr:$dst),
725                        "qvstfcdx $FRT, $dst", IIC_LdStSTFD, []>;
726    let RC = 1 in
727    def QVSTFCDXA : XForm_8<31, 199,
728                        (outs), (ins qfrc:$FRT, memrr:$dst),
729                        "qvstfcdxa $FRT, $dst", IIC_LdStSTFD, []>;
730
731    def QVSTFCSX : XForm_8<31, 135,
732                        (outs), (ins qfrc:$FRT, memrr:$dst),
733                        "qvstfcsx $FRT, $dst", IIC_LdStSTFD, []>;
734    let isCodeGenOnly = 1 in
735    def QVSTFCSXs : XForm_8<31, 135,
736                         (outs), (ins qsrc:$FRT, memrr:$dst),
737                         "qvstfcsx $FRT, $dst", IIC_LdStSTFD, []>;
738
739    let RC = 1 in
740    def QVSTFCSXA : XForm_8<31, 135,
741                        (outs), (ins qfrc:$FRT, memrr:$dst),
742                        "qvstfcsxa $FRT, $dst", IIC_LdStSTFD, []>;
743
744    def QVSTFCDUX : XForm_8<31, 231,
745                        (outs), (ins qfrc:$FRT, memrr:$dst),
746                        "qvstfcdux $FRT, $dst", IIC_LdStSTFD, []>;
747    let RC = 1 in
748    def QVSTFCDUXA : XForm_8<31, 231,
749                        (outs), (ins qfrc:$FRT, memrr:$dst),
750                        "qvstfcduxa $FRT, $dst", IIC_LdStSTFD, []>;
751
752    def QVSTFCSUX : XForm_8<31, 167,
753                        (outs), (ins qfrc:$FRT, memrr:$dst),
754                        "qvstfcsux $FRT, $dst", IIC_LdStSTFD, []>;
755    let RC = 1 in
756    def QVSTFCSUXA : XForm_8<31, 167,
757                        (outs), (ins qfrc:$FRT, memrr:$dst),
758                        "qvstfcsuxa $FRT, $dst", IIC_LdStSTFD, []>;
759
760    def QVSTFCDXI : XForm_8<31, 197,
761                        (outs), (ins qfrc:$FRT, memrr:$dst),
762                        "qvstfcdxi $FRT, $dst", IIC_LdStSTFD, []>;
763    let RC = 1 in
764    def QVSTFCDXIA : XForm_8<31, 197,
765                        (outs), (ins qfrc:$FRT, memrr:$dst),
766                        "qvstfcdxia $FRT, $dst", IIC_LdStSTFD, []>;
767
768    def QVSTFCSXI : XForm_8<31, 133,
769                        (outs), (ins qfrc:$FRT, memrr:$dst),
770                        "qvstfcsxi $FRT, $dst", IIC_LdStSTFD, []>;
771    let RC = 1 in
772    def QVSTFCSXIA : XForm_8<31, 133,
773                        (outs), (ins qfrc:$FRT, memrr:$dst),
774                        "qvstfcsxia $FRT, $dst", IIC_LdStSTFD, []>;
775
776    def QVSTFCDUXI : XForm_8<31, 229,
777                        (outs), (ins qfrc:$FRT, memrr:$dst),
778                        "qvstfcduxi $FRT, $dst", IIC_LdStSTFD, []>;
779    let RC = 1 in
780    def QVSTFCDUXIA : XForm_8<31, 229,
781                        (outs), (ins qfrc:$FRT, memrr:$dst),
782                        "qvstfcduxia $FRT, $dst", IIC_LdStSTFD, []>;
783
784    def QVSTFCSUXI : XForm_8<31, 165,
785                        (outs), (ins qfrc:$FRT, memrr:$dst),
786                        "qvstfcsuxi $FRT, $dst", IIC_LdStSTFD, []>;
787    let RC = 1 in
788    def QVSTFCSUXIA : XForm_8<31, 165,
789                        (outs), (ins qfrc:$FRT, memrr:$dst),
790                        "qvstfcsuxia $FRT, $dst", IIC_LdStSTFD, []>;
791
792    def QVSTFIWX : XForm_8<31, 967,
793                        (outs), (ins qfrc:$FRT, memrr:$dst),
794                        "qvstfiwx $FRT, $dst", IIC_LdStSTFD, []>;
795    let RC = 1 in
796    def QVSTFIWXA : XForm_8<31, 967,
797                        (outs), (ins qfrc:$FRT, memrr:$dst),
798                        "qvstfiwxa $FRT, $dst", IIC_LdStSTFD, []>;
799  }
800}
801
802} // neverHasSideEffects
803}
804
805def : InstAlias<"qvfclr $FRT",
806                (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
807def : InstAlias<"qvfand $FRT, $FRA, $FRB",
808                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 1)>;
809def : InstAlias<"qvfandc $FRT, $FRA, $FRB",
810                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 4)>;
811def : InstAlias<"qvfctfb $FRT, $FRA",
812                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 5)>;
813def : InstAlias<"qvfxor $FRT, $FRA, $FRB",
814                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 6)>;
815def : InstAlias<"qvfor $FRT, $FRA, $FRB",
816                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 7)>;
817def : InstAlias<"qvfnor $FRT, $FRA, $FRB",
818                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 8)>;
819def : InstAlias<"qvfequ $FRT, $FRA, $FRB",
820                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 9)>;
821def : InstAlias<"qvfnot $FRT, $FRA",
822                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 10)>;
823def : InstAlias<"qvforc $FRT, $FRA, $FRB",
824                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 13)>;
825def : InstAlias<"qvfnand $FRT, $FRA, $FRB",
826                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 14)>;
827def : InstAlias<"qvfset $FRT",
828                (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 15)>;
829
830//===----------------------------------------------------------------------===//
831// Additional QPX Patterns
832//
833
834def : Pat<(v4f64 (scalar_to_vector f64:$A)),
835          (INSERT_SUBREG (v4f64 (IMPLICIT_DEF)), $A, sub_64)>;
836def : Pat<(v4f32 (scalar_to_vector f32:$A)),
837          (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), $A, sub_64)>;
838
839def : Pat<(f64 (extractelt v4f64:$S, 0)),
840          (EXTRACT_SUBREG $S, sub_64)>;
841def : Pat<(f32 (extractelt v4f32:$S, 0)),
842          (EXTRACT_SUBREG $S, sub_64)>;
843
844def : Pat<(f64 (extractelt v4f64:$S, 1)),
845          (EXTRACT_SUBREG (QVESPLATI $S, 1), sub_64)>;
846def : Pat<(f64 (extractelt v4f64:$S, 2)),
847          (EXTRACT_SUBREG (QVESPLATI $S, 2), sub_64)>;
848def : Pat<(f64 (extractelt v4f64:$S, 3)),
849          (EXTRACT_SUBREG (QVESPLATI $S, 3), sub_64)>;
850
851def : Pat<(f32 (extractelt v4f32:$S, 1)),
852          (EXTRACT_SUBREG (QVESPLATIs $S, 1), sub_64)>;
853def : Pat<(f32 (extractelt v4f32:$S, 2)),
854          (EXTRACT_SUBREG (QVESPLATIs $S, 2), sub_64)>;
855def : Pat<(f32 (extractelt v4f32:$S, 3)),
856          (EXTRACT_SUBREG (QVESPLATIs $S, 3), sub_64)>;
857
858def : Pat<(f64 (extractelt v4f64:$S, i64:$F)),
859          (EXTRACT_SUBREG (QVFPERM $S, $S,
860                                   (QVLPCLSXint (RLDICR $F, 2,
861                                                        /* 63-2 = */ 61))),
862                          sub_64)>;
863def : Pat<(f32 (extractelt v4f32:$S, i64:$F)),
864          (EXTRACT_SUBREG (QVFPERMs $S, $S,
865                                    (QVLPCLSXint (RLDICR $F, 2,
866                                                         /* 63-2 = */ 61))),
867                          sub_64)>;
868
869def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C),
870          (QVFPERM $A, $B, $C)>;
871
872def : Pat<(int_ppc_qpx_qvfcpsgn v4f64:$A, v4f64:$B),
873          (QVFCPSGN $A, $B)>;
874
875// FCOPYSIGN's operand types need not agree.
876def : Pat<(fcopysign v4f64:$frB, v4f32:$frA),
877          (QVFCPSGN (COPY_TO_REGCLASS $frA, QFRC), $frB)>;
878def : Pat<(fcopysign QSRC:$frB, QFRC:$frA),
879          (QVFCPSGNs (COPY_TO_REGCLASS $frA, QSRC), $frB)>;
880
881def : Pat<(int_ppc_qpx_qvfneg v4f64:$A), (QVFNEG $A)>;
882def : Pat<(int_ppc_qpx_qvfabs v4f64:$A), (QVFABS $A)>;
883def : Pat<(int_ppc_qpx_qvfnabs v4f64:$A), (QVFNABS $A)>;
884
885def : Pat<(int_ppc_qpx_qvfriz v4f64:$A), (QVFRIZ $A)>;
886def : Pat<(int_ppc_qpx_qvfrin v4f64:$A), (QVFRIN $A)>;
887def : Pat<(int_ppc_qpx_qvfrip v4f64:$A), (QVFRIP $A)>;
888def : Pat<(int_ppc_qpx_qvfrim v4f64:$A), (QVFRIM $A)>;
889
890def : Pat<(int_ppc_qpx_qvfre v4f64:$A), (QVFRE $A)>;
891def : Pat<(int_ppc_qpx_qvfrsqrte v4f64:$A), (QVFRSQRTE $A)>;
892
893def : Pat<(int_ppc_qpx_qvfadd v4f64:$A, v4f64:$B),
894          (QVFADD $A, $B)>;
895def : Pat<(int_ppc_qpx_qvfsub v4f64:$A, v4f64:$B),
896          (QVFSUB $A, $B)>;
897def : Pat<(int_ppc_qpx_qvfmul v4f64:$A, v4f64:$B),
898          (QVFMUL $A, $B)>;
899
900// Additional QVFNMSUB patterns: -a*c + b == -(a*c - b)
901def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B),
902          (QVFNMSUB $A, $B, $C)>;
903def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B),
904          (QVFNMSUB $A, $B, $C)>;
905def : Pat<(fma (fneg v4f32:$A), v4f32:$C, v4f32:$B),
906          (QVFNMSUBSs $A, $B, $C)>;
907def : Pat<(fma v4f32:$A, (fneg v4f32:$C), v4f32:$B),
908          (QVFNMSUBSs $A, $B, $C)>;
909
910def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C),
911          (QVFMADD $A, $B, $C)>;
912def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C),
913          (QVFNMADD $A, $B, $C)>;
914def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C),
915          (QVFMSUB $A, $B, $C)>;
916def : Pat<(int_ppc_qpx_qvfnmsub v4f64:$A, v4f64:$B, v4f64:$C),
917          (QVFNMSUB $A, $B, $C)>;
918
919def : Pat<(int_ppc_qpx_qvlfd xoaddr:$src),
920          (QVLFDX xoaddr:$src)>;
921def : Pat<(int_ppc_qpx_qvlfda xoaddr:$src),
922          (QVLFDXA xoaddr:$src)>;
923def : Pat<(int_ppc_qpx_qvlfs xoaddr:$src),
924          (QVLFSX xoaddr:$src)>;
925def : Pat<(int_ppc_qpx_qvlfsa xoaddr:$src),
926          (QVLFSXA xoaddr:$src)>;
927def : Pat<(int_ppc_qpx_qvlfcda xoaddr:$src),
928          (QVLFCDXA xoaddr:$src)>;
929def : Pat<(int_ppc_qpx_qvlfcd xoaddr:$src),
930          (QVLFCDX xoaddr:$src)>;
931def : Pat<(int_ppc_qpx_qvlfcsa xoaddr:$src),
932          (QVLFCSXA xoaddr:$src)>;
933def : Pat<(int_ppc_qpx_qvlfcs xoaddr:$src),
934          (QVLFCSX xoaddr:$src)>;
935def : Pat<(int_ppc_qpx_qvlfda xoaddr:$src),
936          (QVLFDXA xoaddr:$src)>;
937def : Pat<(int_ppc_qpx_qvlfiwaa xoaddr:$src),
938          (QVLFIWAXA xoaddr:$src)>;
939def : Pat<(int_ppc_qpx_qvlfiwa xoaddr:$src),
940          (QVLFIWAX xoaddr:$src)>;
941def : Pat<(int_ppc_qpx_qvlfiwza xoaddr:$src),
942          (QVLFIWZXA xoaddr:$src)>;
943def : Pat<(int_ppc_qpx_qvlfiwz xoaddr:$src),
944          (QVLFIWZX xoaddr:$src)>;
945def : Pat<(int_ppc_qpx_qvlfsa xoaddr:$src),
946          (QVLFSXA xoaddr:$src)>;
947def : Pat<(int_ppc_qpx_qvlpcld xoaddr:$src),
948          (QVLPCLDX xoaddr:$src)>;
949def : Pat<(int_ppc_qpx_qvlpcls xoaddr:$src),
950          (QVLPCLSX xoaddr:$src)>;
951def : Pat<(int_ppc_qpx_qvlpcrd xoaddr:$src),
952          (QVLPCRDX xoaddr:$src)>;
953def : Pat<(int_ppc_qpx_qvlpcrs xoaddr:$src),
954          (QVLPCRSX xoaddr:$src)>;
955
956def : Pat<(int_ppc_qpx_qvstfd v4f64:$T, xoaddr:$dst),
957          (QVSTFDX $T, xoaddr:$dst)>;
958def : Pat<(int_ppc_qpx_qvstfs v4f64:$T, xoaddr:$dst),
959          (QVSTFSX $T, xoaddr:$dst)>;
960def : Pat<(int_ppc_qpx_qvstfcda v4f64:$T, xoaddr:$dst),
961          (QVSTFCDXA $T, xoaddr:$dst)>;
962def : Pat<(int_ppc_qpx_qvstfcd v4f64:$T, xoaddr:$dst),
963          (QVSTFCDX $T, xoaddr:$dst)>;
964def : Pat<(int_ppc_qpx_qvstfcsa v4f64:$T, xoaddr:$dst),
965          (QVSTFCSXA $T, xoaddr:$dst)>;
966def : Pat<(int_ppc_qpx_qvstfcs v4f64:$T, xoaddr:$dst),
967          (QVSTFCSX $T, xoaddr:$dst)>;
968def : Pat<(int_ppc_qpx_qvstfda v4f64:$T, xoaddr:$dst),
969          (QVSTFDXA $T, xoaddr:$dst)>;
970def : Pat<(int_ppc_qpx_qvstfiwa v4f64:$T, xoaddr:$dst),
971          (QVSTFIWXA $T, xoaddr:$dst)>;
972def : Pat<(int_ppc_qpx_qvstfiw v4f64:$T, xoaddr:$dst),
973          (QVSTFIWX $T, xoaddr:$dst)>;
974def : Pat<(int_ppc_qpx_qvstfsa v4f64:$T, xoaddr:$dst),
975          (QVSTFSXA $T, xoaddr:$dst)>;
976
977def : Pat<(pre_store v4f64:$rS, iPTR:$ptrreg, iPTR:$ptroff),
978          (QVSTFDUX $rS, $ptrreg, $ptroff)>;
979def : Pat<(pre_store v4f32:$rS, iPTR:$ptrreg, iPTR:$ptroff),
980          (QVSTFSUX $rS, $ptrreg, $ptroff)>;
981def : Pat<(pre_truncstv4f32 v4f64:$rS, iPTR:$ptrreg, iPTR:$ptroff),
982          (QVSTFSUXs $rS, $ptrreg, $ptroff)>;
983
984def : Pat<(int_ppc_qpx_qvflogical  v4f64:$A, v4f64:$B, (i32 imm:$idx)),
985          (QVFLOGICAL $A, $B, imm:$idx)>;
986def : Pat<(int_ppc_qpx_qvgpci (u12:$idx)),
987          (QVGPCI imm:$idx)>;
988
989def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETOGE),
990          (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
991                       (QVFTSTNANb $FRA, $FRB), (i32 8))>;
992def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETOLE),
993          (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
994                       (QVFTSTNANb $FRA, $FRB), (i32 8))>;
995def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETONE),
996          (QVFLOGICALb (QVFCMPEQb $FRA, $FRB),
997                       (QVFTSTNANb $FRA, $FRB), (i32 8))>;
998def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETO),
999          (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1000                       (QVFTSTNANb $FRA, $FRB), (i32 10))>;
1001def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUEQ),
1002          (QVFLOGICALb (QVFCMPEQb $FRA, $FRB),
1003                       (QVFTSTNANb $FRA, $FRB), (i32 7))>;
1004def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUGT),
1005          (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
1006                       (QVFTSTNANb $FRA, $FRB), (i32 7))>;
1007def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUGE),
1008          (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1009                       (QVFCMPLTb $FRA, $FRB), (i32 13))>;
1010def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETULT),
1011          (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
1012                       (QVFTSTNANb $FRA, $FRB), (i32 7))>;
1013def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETULE),
1014          (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1015                       (QVFCMPGTb $FRA, $FRB), (i32 13))>;
1016def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUNE),
1017          (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1018                       (QVFCMPEQb $FRA, $FRB), (i32 13))>;
1019
1020def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETEQ),
1021          (QVFCMPEQb $FRA, $FRB)>;
1022def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETGT),
1023          (QVFCMPGTb $FRA, $FRB)>;
1024def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETGE),
1025          (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
1026                       (QVFCMPLTb $FRA, $FRB), (i32 10))>;
1027def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETLT),
1028          (QVFCMPLTb $FRA, $FRB)>;
1029def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETLE),
1030          (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
1031                       (QVFCMPGTb $FRA, $FRB), (i32 10))>;
1032def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETNE),
1033          (QVFLOGICALb (QVFCMPEQb $FRA, $FRB),
1034                       (QVFCMPEQb $FRA, $FRB), (i32 10))>;
1035
1036def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETOGE),
1037          (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1038                       (QVFTSTNANbs $FRA, $FRB), (i32 8))>;
1039def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETOLE),
1040          (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1041                       (QVFTSTNANbs $FRA, $FRB), (i32 8))>;
1042def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETONE),
1043          (QVFLOGICALb (QVFCMPEQbs $FRA, $FRB),
1044                       (QVFTSTNANbs $FRA, $FRB), (i32 8))>;
1045def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETO),
1046          (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1047                       (QVFTSTNANbs $FRA, $FRB), (i32 10))>;
1048def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUEQ),
1049          (QVFLOGICALb (QVFCMPEQbs $FRA, $FRB),
1050                       (QVFTSTNANbs $FRA, $FRB), (i32 7))>;
1051def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUGT),
1052          (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1053                       (QVFTSTNANbs $FRA, $FRB), (i32 7))>;
1054def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUGE),
1055          (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1056                       (QVFCMPLTbs $FRA, $FRB), (i32 13))>;
1057def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETULT),
1058          (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1059                       (QVFTSTNANbs $FRA, $FRB), (i32 7))>;
1060def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETULE),
1061          (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1062                       (QVFCMPGTbs $FRA, $FRB), (i32 13))>;
1063def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUNE),
1064          (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1065                       (QVFCMPEQbs $FRA, $FRB), (i32 13))>;
1066
1067def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETEQ),
1068          (QVFCMPEQbs $FRA, $FRB)>;
1069def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETGT),
1070          (QVFCMPGTbs $FRA, $FRB)>;
1071def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETGE),
1072          (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1073                       (QVFCMPLTbs $FRA, $FRB), (i32 10))>;
1074def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETLT),
1075          (QVFCMPLTbs $FRA, $FRB)>;
1076def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETLE),
1077          (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1078                       (QVFCMPGTbs $FRA, $FRB), (i32 10))>;
1079def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETNE),
1080          (QVFLOGICALb (QVFCMPEQbs $FRA, $FRB),
1081                       (QVFCMPEQbs $FRA, $FRB), (i32 10))>;
1082
1083def : Pat<(and v4i1:$FRA, (not v4i1:$FRB)),
1084          (QVFLOGICALb $FRA, $FRB, (i32 4))>;
1085def : Pat<(not (or v4i1:$FRA, v4i1:$FRB)),
1086          (QVFLOGICALb $FRA, $FRB, (i32 8))>;
1087def : Pat<(not (xor v4i1:$FRA, v4i1:$FRB)),
1088          (QVFLOGICALb $FRA, $FRB, (i32 9))>;
1089def : Pat<(or v4i1:$FRA, (not v4i1:$FRB)),
1090          (QVFLOGICALb $FRA, $FRB, (i32 13))>;
1091def : Pat<(not (and v4i1:$FRA, v4i1:$FRB)),
1092          (QVFLOGICALb $FRA, $FRB, (i32 14))>;
1093
1094def : Pat<(and v4i1:$FRA, v4i1:$FRB),
1095          (QVFLOGICALb $FRA, $FRB, (i32 1))>;
1096def : Pat<(or v4i1:$FRA, v4i1:$FRB),
1097          (QVFLOGICALb $FRA, $FRB, (i32 7))>;
1098def : Pat<(xor v4i1:$FRA, v4i1:$FRB),
1099          (QVFLOGICALb $FRA, $FRB, (i32 6))>;
1100def : Pat<(not v4i1:$FRA),
1101          (QVFLOGICALb $FRA, $FRA, (i32 10))>;
1102
1103def : Pat<(v4f64 (fpextend v4f32:$src)),
1104          (COPY_TO_REGCLASS $src, QFRC)>;
1105
1106def : Pat<(v4f32 (fround_exact v4f64:$src)),
1107          (COPY_TO_REGCLASS $src, QSRC)>;
1108
1109// Extract the underlying floating-point values from the
1110// QPX (-1.0, 1.0) boolean representation.
1111def : Pat<(v4f64 (PPCqbflt v4i1:$src)),
1112          (COPY_TO_REGCLASS $src, QFRC)>;
1113
1114def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETLT)),
1115          (SELECT_QFRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1116def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETULT)),
1117          (SELECT_QFRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1118def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETLE)),
1119          (SELECT_QFRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1120def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETULE)),
1121          (SELECT_QFRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1122def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETEQ)),
1123          (SELECT_QFRC (CREQV $lhs, $rhs), $tval, $fval)>;
1124def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETGE)),
1125          (SELECT_QFRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1126def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETUGE)),
1127          (SELECT_QFRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1128def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETGT)),
1129          (SELECT_QFRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1130def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETUGT)),
1131          (SELECT_QFRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1132def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETNE)),
1133          (SELECT_QFRC (CRXOR $lhs, $rhs), $tval, $fval)>;
1134
1135def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETLT)),
1136          (SELECT_QSRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1137def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETULT)),
1138          (SELECT_QSRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1139def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETLE)),
1140          (SELECT_QSRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1141def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETULE)),
1142          (SELECT_QSRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1143def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETEQ)),
1144          (SELECT_QSRC (CREQV $lhs, $rhs), $tval, $fval)>;
1145def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETGE)),
1146          (SELECT_QSRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1147def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETUGE)),
1148          (SELECT_QSRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1149def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETGT)),
1150          (SELECT_QSRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1151def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETUGT)),
1152          (SELECT_QSRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1153def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETNE)),
1154          (SELECT_QSRC (CRXOR $lhs, $rhs), $tval, $fval)>;
1155
1156def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETLT)),
1157          (SELECT_QBRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1158def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETULT)),
1159          (SELECT_QBRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1160def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETLE)),
1161          (SELECT_QBRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1162def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETULE)),
1163          (SELECT_QBRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1164def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETEQ)),
1165          (SELECT_QBRC (CREQV $lhs, $rhs), $tval, $fval)>;
1166def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETGE)),
1167          (SELECT_QBRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1168def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETUGE)),
1169          (SELECT_QBRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1170def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETGT)),
1171          (SELECT_QBRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1172def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETUGT)),
1173          (SELECT_QBRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1174def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETNE)),
1175          (SELECT_QBRC (CRXOR $lhs, $rhs), $tval, $fval)>;
1176
1177} // end HasQPX
1178
1179let Predicates = [HasQPX, NoNaNsFPMath] in {
1180def : Pat<(fminnum v4f64:$FRA, v4f64:$FRB),
1181          (QVFSELb (QVFCMPLTb $FRA, $FRB), $FRB, $FRA)>;
1182def : Pat<(fmaxnum v4f64:$FRA, v4f64:$FRB),
1183          (QVFSELb (QVFCMPGTb $FRA, $FRB), $FRB, $FRA)>;
1184
1185def : Pat<(fminnum v4f32:$FRA, v4f32:$FRB),
1186          (QVFSELbs (QVFCMPLTbs $FRA, $FRB), $FRB, $FRA)>;
1187def : Pat<(fmaxnum v4f32:$FRA, v4f32:$FRB),
1188          (QVFSELbs (QVFCMPGTbs $FRA, $FRB), $FRB, $FRA)>;
1189}
1190
1191let Predicates = [HasQPX, NaNsFPMath] in {
1192// When either of these operands is NaN, we should return the other operand.
1193// QVFCMPLT/QVFCMPGT return false is either operand is NaN, which means we need
1194// to explicitly or with a NaN test on the second operand.
1195def : Pat<(fminnum v4f64:$FRA, v4f64:$FRB),
1196          (QVFSELb (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
1197                                (QVFTSTNANb $FRB, $FRB), (i32 7)),
1198                   $FRB, $FRA)>;
1199def : Pat<(fmaxnum v4f64:$FRA, v4f64:$FRB),
1200          (QVFSELb (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
1201                                (QVFTSTNANb $FRB, $FRB), (i32 7)),
1202                   $FRB, $FRA)>;
1203
1204def : Pat<(fminnum v4f32:$FRA, v4f32:$FRB),
1205          (QVFSELbs (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1206                                 (QVFTSTNANbs $FRB, $FRB), (i32 7)),
1207                   $FRB, $FRA)>;
1208def : Pat<(fmaxnum v4f32:$FRA, v4f32:$FRB),
1209          (QVFSELbs (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1210                                 (QVFTSTNANbs $FRB, $FRB), (i32 7)),
1211                   $FRB, $FRA)>;
1212}
1213
1214