1//===-- MSP430InstrFormats.td - MSP430 Instruction Formats -*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9//===----------------------------------------------------------------------===//
10//  Describe MSP430 instructions format here
11//
12
13class SourceMode<bits<2> val> {
14  bits<2> Value = val;
15}
16
17def SrcReg      : SourceMode<0>; // r
18def SrcMem      : SourceMode<1>; // m
19def SrcIndReg   : SourceMode<2>; // n
20def SrcPostInc  : SourceMode<3>; // p
21def SrcImm      : SourceMode<3>; // i
22//  SrcCGImm    : SourceMode< >; // c
23
24class DestMode<bit val> {
25  bit Value = val;
26}
27
28def DstReg      : DestMode<0>;   // r
29def DstMem      : DestMode<1>;   // m
30
31// Generic MSP430 Format
32class MSP430Inst<dag outs, dag ins, int size, string asmstr> : Instruction {
33  field bits<48> Inst;
34  field bits<48> SoftFail = 0;
35
36  let Namespace = "MSP430";
37
38  dag OutOperandList = outs;
39  dag InOperandList  = ins;
40
41  let AsmString = asmstr;
42  let Size = size;
43}
44
45// MSP430 Double Operand (Format I) Instructions
46class IForm<bits<4> opcode, DestMode ad, bit bw, SourceMode as, int size,
47            dag outs, dag ins, string asmstr, list<dag> pattern>
48  : MSP430Inst<outs, ins, size, asmstr> {
49  let Pattern = pattern;
50
51  bits<4> rs;
52  bits<4> rd;
53
54  let Inst{15-12} = opcode;
55  let Inst{11-8}  = rs;
56  let Inst{7}     = ad.Value;
57  let Inst{6}     = bw;
58  let Inst{5-4}   = as.Value;
59  let Inst{3-0}   = rd;
60}
61
62// 8 bit IForm instructions
63class IForm8<bits<4> opcode, DestMode dest, SourceMode src, int size,
64             dag outs, dag ins, string asmstr, list<dag> pattern>
65  : IForm<opcode, dest, 1, src, size, outs, ins, asmstr, pattern>;
66
67class I8rr<bits<4> opcode,
68           dag outs, dag ins, string asmstr, list<dag> pattern>
69  : IForm8<opcode, DstReg, SrcReg, 2, outs, ins, asmstr, pattern> {
70  let DecoderNamespace = "Alpha";
71}
72
73class I8ri<bits<4> opcode,
74           dag outs, dag ins, string asmstr, list<dag> pattern>
75  : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> {
76  let DecoderNamespace = "Gamma";
77  bits<16> imm;
78  let Inst{31-16} = imm;
79  let rs = 0b0000;
80}
81
82class I8rc<bits<4> opcode,
83           dag outs, dag ins, string asmstr, list<dag> pattern>
84  : MSP430Inst<outs, ins, 2, asmstr> {
85  let DecoderNamespace = "Beta";
86  let Pattern = pattern;
87
88  bits<6> imm;
89  bits<4> rd;
90
91  let Inst{15-12} = opcode;
92  let Inst{11-8}  = imm{3-0};
93  let Inst{7}     = DstReg.Value;
94  let Inst{6}     = 1;
95  let Inst{5-4}   = imm{5-4};
96  let Inst{3-0}   = rd;
97}
98
99class I8rm<bits<4> opcode,
100           dag outs, dag ins, string asmstr, list<dag> pattern>
101  : IForm8<opcode, DstReg, SrcMem, 4, outs, ins, asmstr, pattern> {
102  let DecoderNamespace = "Gamma";
103  bits<20> src;
104  let rs = src{3-0};
105  let Inst{31-16} = src{19-4};
106}
107
108class I8rn<bits<4> opcode,
109           dag outs, dag ins, string asmstr, list<dag> pattern>
110  : IForm8<opcode, DstReg, SrcIndReg, 2, outs, ins, asmstr, pattern> {
111  let DecoderNamespace = "Delta";
112}
113
114class I8rp<bits<4> opcode,
115           dag outs, dag ins, string asmstr, list<dag> pattern>
116  : IForm8<opcode, DstReg, SrcPostInc, 2, outs, ins, asmstr, pattern> {
117  let DecoderNamespace = "Delta";
118}
119
120class I8mr<bits<4> opcode,
121           dag outs, dag ins, string asmstr, list<dag> pattern>
122  : IForm8<opcode, DstMem, SrcReg, 4, outs, ins, asmstr, pattern> {
123  let DecoderNamespace = "Alpha";
124  bits<20> dst;
125  let rd = dst{3-0};
126  let Inst{31-16} = dst{19-4};
127}
128
129class I8mi<bits<4> opcode,
130           dag outs, dag ins, string asmstr, list<dag> pattern>
131  : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> {
132  let DecoderNamespace = "Gamma";
133  bits<16> imm;
134  bits<20> dst;
135  let rs = 0b0000;
136  let Inst{31-16} = imm;
137  let rd = dst{3-0};
138  let Inst{47-32} = dst{19-4};
139}
140
141class I8mc<bits<4> opcode,
142           dag outs, dag ins, string asmstr, list<dag> pattern>
143  : MSP430Inst<outs, ins, 4, asmstr> {
144  let DecoderNamespace = "Beta";
145  let Pattern = pattern;
146
147  bits<6> imm;
148  bits<20> dst;
149
150  let Inst{31-16} = dst{19-4};
151  let Inst{15-12} = opcode;
152  let Inst{11-8}  = imm{3-0};
153  let Inst{7}     = DstMem.Value;
154  let Inst{6}     = 1;
155  let Inst{5-4}   = imm{5-4};
156  let Inst{3-0}   = dst{3-0};
157}
158
159class I8mm<bits<4> opcode,
160           dag outs, dag ins, string asmstr, list<dag> pattern>
161  : IForm8<opcode, DstMem, SrcMem, 6, outs, ins, asmstr, pattern> {
162  let DecoderNamespace = "Gamma";
163  bits<20> src;
164  bits<20> dst;
165  let rs = src{3-0};
166  let Inst{31-16} = src{19-4};
167  let rd = dst{3-0};
168  let Inst{47-32} = dst{19-4};
169}
170
171class I8mn<bits<4> opcode,
172           dag outs, dag ins, string asmstr, list<dag> pattern>
173  : IForm8<opcode, DstMem, SrcIndReg, 4, outs, ins, asmstr, pattern> {
174  let DecoderNamespace = "Delta";
175  bits<20> dst;
176  let rd = dst{3-0};
177  let Inst{31-16} = dst{19-4};
178}
179
180class I8mp<bits<4> opcode,
181           dag outs, dag ins, string asmstr, list<dag> pattern>
182  : IForm8<opcode, DstMem, SrcPostInc, 4, outs, ins, asmstr, pattern> {
183  let DecoderNamespace = "Delta";
184  bits<20> dst;
185  let rd = dst{3-0};
186  let Inst{31-16} = dst{19-4};
187}
188
189// 16 bit IForm instructions
190class IForm16<bits<4> opcode, DestMode dest, SourceMode src, int size,
191              dag outs, dag ins, string asmstr, list<dag> pattern>
192  : IForm<opcode, dest, 0, src, size, outs, ins, asmstr, pattern>;
193
194class I16rr<bits<4> opcode,
195            dag outs, dag ins, string asmstr, list<dag> pattern>
196  : IForm16<opcode, DstReg, SrcReg, 2, outs, ins, asmstr, pattern> {
197  let DecoderNamespace = "Alpha";
198}
199
200class I16ri<bits<4> opcode,
201            dag outs, dag ins, string asmstr, list<dag> pattern>
202  : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> {
203  let DecoderNamespace = "Gamma";
204  bits<16> imm;
205  let Inst{31-16} = imm;
206  let rs = 0b0000;
207}
208
209class I16rc<bits<4> opcode,
210            dag outs, dag ins, string asmstr, list<dag> pattern>
211  : MSP430Inst<outs, ins, 2, asmstr> {
212  let DecoderNamespace = "Beta";
213  let Pattern = pattern;
214
215  bits<6> imm;
216  bits<4> rd;
217
218  let Inst{15-12} = opcode;
219  let Inst{11-8}  = imm{3-0};
220  let Inst{7}     = DstReg.Value;
221  let Inst{6}     = 0;
222  let Inst{5-4}   = imm{5-4};
223  let Inst{3-0}   = rd;
224}
225
226class I16rm<bits<4> opcode,
227            dag outs, dag ins, string asmstr, list<dag> pattern>
228  : IForm16<opcode, DstReg, SrcMem, 4, outs, ins, asmstr, pattern> {
229  let DecoderNamespace = "Gamma";
230  bits<20> src;
231  let rs = src{3-0};
232  let Inst{31-16} = src{19-4};
233}
234
235class I16rn<bits<4> opcode,
236            dag outs, dag ins, string asmstr, list<dag> pattern>
237  : IForm16<opcode, DstReg, SrcIndReg, 2, outs, ins, asmstr, pattern> {
238  let DecoderNamespace = "Delta";
239}
240
241class I16rp<bits<4> opcode,
242            dag outs, dag ins, string asmstr, list<dag> pattern>
243  : IForm16<opcode, DstReg, SrcPostInc, 2, outs, ins, asmstr, pattern> {
244  let DecoderNamespace = "Delta";
245}
246
247class I16mr<bits<4> opcode,
248            dag outs, dag ins, string asmstr, list<dag> pattern>
249  : IForm16<opcode, DstMem, SrcReg, 4, outs, ins, asmstr, pattern> {
250  let DecoderNamespace = "Alpha";
251  bits<20> dst;
252  let rd = dst{3-0};
253  let Inst{31-16} = dst{19-4};
254}
255
256class I16mi<bits<4> opcode,
257            dag outs, dag ins, string asmstr, list<dag> pattern>
258  : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> {
259  let DecoderNamespace = "Gamma";
260  bits<16> imm;
261  bits<20> dst;
262  let Inst{31-16} = imm;
263  let rs = 0b0000;
264  let rd = dst{3-0};
265  let Inst{47-32} = dst{19-4};
266}
267
268class I16mc<bits<4> opcode,
269            dag outs, dag ins, string asmstr, list<dag> pattern>
270  : MSP430Inst<outs, ins, 4, asmstr> {
271  let DecoderNamespace = "Beta";
272  let Pattern = pattern;
273
274  bits<6> imm;
275  bits<20> dst;
276
277  let Inst{31-16} = dst{19-4};
278  let Inst{15-12} = opcode;
279  let Inst{11-8}  = imm{3-0};
280  let Inst{7}     = DstMem.Value;
281  let Inst{6}     = 0;
282  let Inst{5-4}   = imm{5-4};
283  let Inst{3-0}   = dst{3-0};
284}
285
286class I16mm<bits<4> opcode,
287            dag outs, dag ins, string asmstr, list<dag> pattern>
288  : IForm16<opcode, DstMem, SrcMem, 6, outs, ins, asmstr, pattern> {
289  let DecoderNamespace = "Gamma";
290  bits<20> src;
291  bits<20> dst;
292  let rs = src{3-0};
293  let Inst{31-16} = src{19-4};
294  let rd = dst{3-0};
295  let Inst{47-32} = dst{19-4};
296}
297
298class I16mn<bits<4> opcode,
299            dag outs, dag ins, string asmstr, list<dag> pattern>
300  : IForm16<opcode, DstMem, SrcIndReg, 4, outs, ins, asmstr, pattern> {
301  let DecoderNamespace = "Delta";
302  bits<20> dst;
303  let rd = dst{3-0};
304  let Inst{31-16} = dst{19-4};
305}
306
307class I16mp<bits<4> opcode,
308            dag outs, dag ins, string asmstr, list<dag> pattern>
309  : IForm16<opcode, DstMem, SrcPostInc, 4, outs, ins, asmstr, pattern> {
310  let DecoderNamespace = "Delta";
311  bits<20> dst;
312  let rd = dst{3-0};
313  let Inst{31-16} = dst{19-4};
314}
315
316// MSP430 Single Operand (Format II) Instructions
317class IIForm<bits<3> opcode, bit bw, SourceMode as, int size,
318             dag outs, dag ins, string asmstr, list<dag> pattern>
319  : MSP430Inst<outs, ins, size, asmstr> {
320  let Pattern = pattern;
321
322  bits<4> rs;
323
324  let Inst{15-10} = 0b000100;
325  let Inst{9-7}   = opcode;
326  let Inst{6}     = bw;
327  let Inst{5-4}   = as.Value;
328  let Inst{3-0}   = rs;
329}
330
331// 8 bit IIForm instructions
332class IIForm8<bits<3> opcode, SourceMode src, int size,
333              dag outs, dag ins, string asmstr, list<dag> pattern>
334  : IIForm<opcode, 1, src, size, outs, ins, asmstr, pattern>;
335
336class II8r<bits<3> opcode,
337           dag outs, dag ins, string asmstr, list<dag> pattern>
338  : IIForm8<opcode, SrcReg, 2, outs, ins, asmstr, pattern>;
339
340class II8m<bits<3> opcode,
341           dag outs, dag ins, string asmstr, list<dag> pattern>
342  : IIForm8<opcode, SrcMem, 4, outs, ins, asmstr, pattern> {
343  bits<20> src;
344  let rs = src{3-0};
345  let Inst{31-16} = src{19-4};
346}
347
348class II8i<bits<3> opcode,
349           dag outs, dag ins, string asmstr, list<dag> pattern>
350  : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
351  bits<16> imm;
352  let rs = 0b0000;
353  let Inst{31-16} = imm;
354}
355
356class II8c<bits<3> opcode,
357           dag outs, dag ins, string asmstr, list<dag> pattern>
358  : MSP430Inst<outs, ins, 2, asmstr> {
359  let Pattern = pattern;
360
361  bits<6> imm;
362
363  let Inst{15-10} = 0b000100;
364  let Inst{9-7}   = opcode;
365  let Inst{6}     = 1;
366  let Inst{5-0}   = imm;
367}
368
369class II8n<bits<3> opcode,
370           dag outs, dag ins, string asmstr, list<dag> pattern>
371  : IIForm8<opcode, SrcIndReg, 2, outs, ins, asmstr, pattern>;
372
373class II8p<bits<3> opcode,
374           dag outs, dag ins, string asmstr, list<dag> pattern>
375  : IIForm8<opcode, SrcPostInc, 2, outs, ins, asmstr, pattern>;
376
377// 16 bit IIForm instructions
378class IIForm16<bits<3> opcode, SourceMode src, int size,
379               dag outs, dag ins, string asmstr, list<dag> pattern>
380  : IIForm<opcode, 0, src, size, outs, ins, asmstr, pattern>;
381
382class II16r<bits<3> opcode,
383            dag outs, dag ins, string asmstr, list<dag> pattern>
384  : IIForm16<opcode, SrcReg, 2, outs, ins, asmstr, pattern>;
385
386class II16m<bits<3> opcode,
387            dag outs, dag ins, string asmstr, list<dag> pattern>
388  : IIForm16<opcode, SrcMem, 4, outs, ins, asmstr, pattern> {
389  bits<20> src;
390  let rs = src{3-0};
391  let Inst{31-16} = src{19-4};
392}
393
394class II16i<bits<3> opcode,
395            dag outs, dag ins, string asmstr, list<dag> pattern>
396  : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
397  bits<16> imm;
398  let rs = 0b0000;
399  let Inst{31-16} = imm;
400}
401
402class II16c<bits<3> opcode,
403            dag outs, dag ins, string asmstr, list<dag> pattern>
404  : MSP430Inst<outs, ins, 2, asmstr> {
405  let Pattern = pattern;
406
407  bits<6> imm;
408
409  let Inst{15-10} = 0b000100;
410  let Inst{9-7}   = opcode;
411  let Inst{6}     = 0;
412  let Inst{5-0}   = imm;
413}
414
415class II16n<bits<3> opcode,
416            dag outs, dag ins, string asmstr, list<dag> pattern>
417  : IIForm16<opcode, SrcIndReg, 2, outs, ins, asmstr, pattern>;
418
419class II16p<bits<3> opcode,
420            dag outs, dag ins, string asmstr, list<dag> pattern>
421  : IIForm16<opcode, SrcPostInc, 2, outs, ins, asmstr, pattern>;
422
423// MSP430 Conditional Jumps Instructions
424class CJForm<dag outs, dag ins, string asmstr, list<dag> pattern>
425  : MSP430Inst<outs, ins, 2, asmstr> {
426  let Pattern = pattern;
427  
428  bits<3> cond;
429  bits<10> dst;
430
431  let Inst{15-13} = 0b001;
432  let Inst{12-10} = cond;
433  let Inst{9-0} = dst;
434}
435
436// Pseudo instructions
437class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
438  : MSP430Inst<outs, ins, 0, asmstr> {
439  let Pattern = pattern;
440}
441