1284677Sdim//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2284677Sdim//
3353358Sdim// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4353358Sdim// See https://llvm.org/LICENSE.txt for license information.
5353358Sdim// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6284677Sdim//
7284677Sdim//===----------------------------------------------------------------------===//
8284677Sdim//
9284677Sdim/// \file
10341825Sdim/// The AMDGPU TargetMachine interface definition for hw codgen targets.
11284677Sdim//
12284677Sdim//===----------------------------------------------------------------------===//
13284677Sdim
14309124Sdim#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
15309124Sdim#define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
16284677Sdim
17284677Sdim#include "AMDGPUSubtarget.h"
18314564Sdim#include "llvm/ADT/Optional.h"
19314564Sdim#include "llvm/ADT/StringMap.h"
20314564Sdim#include "llvm/ADT/StringRef.h"
21314564Sdim#include "llvm/Analysis/TargetTransformInfo.h"
22314564Sdim#include "llvm/Support/CodeGen.h"
23314564Sdim#include "llvm/Target/TargetMachine.h"
24314564Sdim#include <memory>
25284677Sdim
26284677Sdimnamespace llvm {
27284677Sdim
28284677Sdim//===----------------------------------------------------------------------===//
29284677Sdim// AMDGPU Target Machine (R600+)
30284677Sdim//===----------------------------------------------------------------------===//
31284677Sdim
32284677Sdimclass AMDGPUTargetMachine : public LLVMTargetMachine {
33284677Sdimprotected:
34296417Sdim  std::unique_ptr<TargetLoweringObjectFile> TLOF;
35284677Sdim
36309124Sdim  StringRef getGPUName(const Function &F) const;
37309124Sdim  StringRef getFeatureString(const Function &F) const;
38309124Sdim
39284677Sdimpublic:
40327952Sdim  static bool EnableLateStructurizeCFG;
41341825Sdim  static bool EnableFunctionCalls;
42327952Sdim
43309124Sdim  AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
44309124Sdim                      StringRef FS, TargetOptions Options,
45327952Sdim                      Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
46309124Sdim                      CodeGenOpt::Level OL);
47314564Sdim  ~AMDGPUTargetMachine() override;
48284677Sdim
49341825Sdim  const TargetSubtargetInfo *getSubtargetImpl() const;
50341825Sdim  const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
51309124Sdim
52284677Sdim  TargetLoweringObjectFile *getObjFileLowering() const override {
53296417Sdim    return TLOF.get();
54284677Sdim  }
55321369Sdim
56321369Sdim  void adjustPassManager(PassManagerBuilder &) override;
57344779Sdim
58321369Sdim  /// Get the integer value of a null pointer in the given address space.
59321369Sdim  uint64_t getNullPointerValue(unsigned AddrSpace) const {
60344779Sdim    return (AddrSpace == AMDGPUAS::LOCAL_ADDRESS ||
61344779Sdim            AddrSpace == AMDGPUAS::REGION_ADDRESS) ? -1 : 0;
62321369Sdim  }
63284677Sdim};
64284677Sdim
65284677Sdim//===----------------------------------------------------------------------===//
66284677Sdim// R600 Target Machine (R600 -> Cayman)
67284677Sdim//===----------------------------------------------------------------------===//
68284677Sdim
69309124Sdimclass R600TargetMachine final : public AMDGPUTargetMachine {
70309124Sdimprivate:
71309124Sdim  mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
72284677Sdim
73284677Sdimpublic:
74309124Sdim  R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
75309124Sdim                    StringRef FS, TargetOptions Options,
76327952Sdim                    Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
77327952Sdim                    CodeGenOpt::Level OL, bool JIT);
78284677Sdim
79284677Sdim  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
80309124Sdim
81309124Sdim  const R600Subtarget *getSubtargetImpl(const Function &) const override;
82321369Sdim
83341825Sdim  TargetTransformInfo getTargetTransformInfo(const Function &F) override;
84341825Sdim
85321369Sdim  bool isMachineVerifierClean() const override {
86321369Sdim    return false;
87321369Sdim  }
88284677Sdim};
89284677Sdim
90284677Sdim//===----------------------------------------------------------------------===//
91284677Sdim// GCN Target Machine (SI+)
92284677Sdim//===----------------------------------------------------------------------===//
93284677Sdim
94309124Sdimclass GCNTargetMachine final : public AMDGPUTargetMachine {
95309124Sdimprivate:
96341825Sdim  mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
97284677Sdim
98284677Sdimpublic:
99309124Sdim  GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
100309124Sdim                   StringRef FS, TargetOptions Options,
101327952Sdim                   Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
102327952Sdim                   CodeGenOpt::Level OL, bool JIT);
103284677Sdim
104284677Sdim  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
105309124Sdim
106341825Sdim  const GCNSubtarget *getSubtargetImpl(const Function &) const override;
107327952Sdim
108341825Sdim  TargetTransformInfo getTargetTransformInfo(const Function &F) override;
109341825Sdim
110327952Sdim  bool useIPRA() const override {
111327952Sdim    return true;
112327952Sdim  }
113353358Sdim
114353358Sdim  yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
115353358Sdim  yaml::MachineFunctionInfo *
116353358Sdim  convertFuncInfoToYAML(const MachineFunction &MF) const override;
117353358Sdim  bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
118353358Sdim                                PerFunctionMIParsingState &PFS,
119353358Sdim                                SMDiagnostic &Error,
120353358Sdim                                SMRange &SourceRange) const override;
121284677Sdim};
122284677Sdim
123314564Sdim} // end namespace llvm
124309124Sdim
125314564Sdim#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
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