1//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// The AMDGPU TargetMachine interface definition for hw codgen targets.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
15#define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
16
17#include "AMDGPUSubtarget.h"
18#include "llvm/ADT/Optional.h"
19#include "llvm/ADT/StringMap.h"
20#include "llvm/ADT/StringRef.h"
21#include "llvm/Analysis/TargetTransformInfo.h"
22#include "llvm/Support/CodeGen.h"
23#include "llvm/Target/TargetMachine.h"
24#include <memory>
25
26namespace llvm {
27
28//===----------------------------------------------------------------------===//
29// AMDGPU Target Machine (R600+)
30//===----------------------------------------------------------------------===//
31
32class AMDGPUTargetMachine : public LLVMTargetMachine {
33protected:
34  std::unique_ptr<TargetLoweringObjectFile> TLOF;
35
36  StringRef getGPUName(const Function &F) const;
37  StringRef getFeatureString(const Function &F) const;
38
39public:
40  static bool EnableLateStructurizeCFG;
41  static bool EnableFunctionCalls;
42
43  AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
44                      StringRef FS, TargetOptions Options,
45                      Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
46                      CodeGenOpt::Level OL);
47  ~AMDGPUTargetMachine() override;
48
49  const TargetSubtargetInfo *getSubtargetImpl() const;
50  const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
51
52  TargetLoweringObjectFile *getObjFileLowering() const override {
53    return TLOF.get();
54  }
55
56  void adjustPassManager(PassManagerBuilder &) override;
57
58  /// Get the integer value of a null pointer in the given address space.
59  uint64_t getNullPointerValue(unsigned AddrSpace) const {
60    return (AddrSpace == AMDGPUAS::LOCAL_ADDRESS ||
61            AddrSpace == AMDGPUAS::REGION_ADDRESS) ? -1 : 0;
62  }
63};
64
65//===----------------------------------------------------------------------===//
66// R600 Target Machine (R600 -> Cayman)
67//===----------------------------------------------------------------------===//
68
69class R600TargetMachine final : public AMDGPUTargetMachine {
70private:
71  mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
72
73public:
74  R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
75                    StringRef FS, TargetOptions Options,
76                    Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
77                    CodeGenOpt::Level OL, bool JIT);
78
79  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
80
81  const R600Subtarget *getSubtargetImpl(const Function &) const override;
82
83  TargetTransformInfo getTargetTransformInfo(const Function &F) override;
84
85  bool isMachineVerifierClean() const override {
86    return false;
87  }
88};
89
90//===----------------------------------------------------------------------===//
91// GCN Target Machine (SI+)
92//===----------------------------------------------------------------------===//
93
94class GCNTargetMachine final : public AMDGPUTargetMachine {
95private:
96  mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
97
98public:
99  GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
100                   StringRef FS, TargetOptions Options,
101                   Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
102                   CodeGenOpt::Level OL, bool JIT);
103
104  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
105
106  const GCNSubtarget *getSubtargetImpl(const Function &) const override;
107
108  TargetTransformInfo getTargetTransformInfo(const Function &F) override;
109
110  bool useIPRA() const override {
111    return true;
112  }
113
114  yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
115  yaml::MachineFunctionInfo *
116  convertFuncInfoToYAML(const MachineFunction &MF) const override;
117  bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
118                                PerFunctionMIParsingState &PFS,
119                                SMDiagnostic &Error,
120                                SMRange &SourceRange) const override;
121};
122
123} // end namespace llvm
124
125#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
126