1//===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise ARM hardware features
10// such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/Support/ARMTargetParser.h"
15#include "llvm/ADT/StringSwitch.h"
16#include <cctype>
17
18using namespace llvm;
19
20static StringRef getHWDivSynonym(StringRef HWDiv) {
21  return StringSwitch<StringRef>(HWDiv)
22      .Case("thumb,arm", "arm,thumb")
23      .Default(HWDiv);
24}
25
26// Allows partial match, ex. "v7a" matches "armv7a".
27ARM::ArchKind ARM::parseArch(StringRef Arch) {
28  Arch = getCanonicalArchName(Arch);
29  StringRef Syn = getArchSynonym(Arch);
30  for (const auto A : ARCHNames) {
31    if (A.getName().endswith(Syn))
32      return A.ID;
33  }
34  return ArchKind::INVALID;
35}
36
37// Version number (ex. v7 = 7).
38unsigned ARM::parseArchVersion(StringRef Arch) {
39  Arch = getCanonicalArchName(Arch);
40  switch (parseArch(Arch)) {
41  case ArchKind::ARMV2:
42  case ArchKind::ARMV2A:
43    return 2;
44  case ArchKind::ARMV3:
45  case ArchKind::ARMV3M:
46    return 3;
47  case ArchKind::ARMV4:
48  case ArchKind::ARMV4T:
49    return 4;
50  case ArchKind::ARMV5T:
51  case ArchKind::ARMV5TE:
52  case ArchKind::IWMMXT:
53  case ArchKind::IWMMXT2:
54  case ArchKind::XSCALE:
55  case ArchKind::ARMV5TEJ:
56    return 5;
57  case ArchKind::ARMV6:
58  case ArchKind::ARMV6K:
59  case ArchKind::ARMV6T2:
60  case ArchKind::ARMV6KZ:
61  case ArchKind::ARMV6M:
62    return 6;
63  case ArchKind::ARMV7A:
64  case ArchKind::ARMV7VE:
65  case ArchKind::ARMV7R:
66  case ArchKind::ARMV7M:
67  case ArchKind::ARMV7S:
68  case ArchKind::ARMV7EM:
69  case ArchKind::ARMV7K:
70    return 7;
71  case ArchKind::ARMV8A:
72  case ArchKind::ARMV8_1A:
73  case ArchKind::ARMV8_2A:
74  case ArchKind::ARMV8_3A:
75  case ArchKind::ARMV8_4A:
76  case ArchKind::ARMV8_5A:
77  case ArchKind::ARMV8R:
78  case ArchKind::ARMV8MBaseline:
79  case ArchKind::ARMV8MMainline:
80  case ArchKind::ARMV8_1MMainline:
81    return 8;
82  case ArchKind::INVALID:
83    return 0;
84  }
85  llvm_unreachable("Unhandled architecture");
86}
87
88// Profile A/R/M
89ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {
90  Arch = getCanonicalArchName(Arch);
91  switch (parseArch(Arch)) {
92  case ArchKind::ARMV6M:
93  case ArchKind::ARMV7M:
94  case ArchKind::ARMV7EM:
95  case ArchKind::ARMV8MMainline:
96  case ArchKind::ARMV8MBaseline:
97  case ArchKind::ARMV8_1MMainline:
98    return ProfileKind::M;
99  case ArchKind::ARMV7R:
100  case ArchKind::ARMV8R:
101    return ProfileKind::R;
102  case ArchKind::ARMV7A:
103  case ArchKind::ARMV7VE:
104  case ArchKind::ARMV7K:
105  case ArchKind::ARMV8A:
106  case ArchKind::ARMV8_1A:
107  case ArchKind::ARMV8_2A:
108  case ArchKind::ARMV8_3A:
109  case ArchKind::ARMV8_4A:
110  case ArchKind::ARMV8_5A:
111    return ProfileKind::A;
112  case ArchKind::ARMV2:
113  case ArchKind::ARMV2A:
114  case ArchKind::ARMV3:
115  case ArchKind::ARMV3M:
116  case ArchKind::ARMV4:
117  case ArchKind::ARMV4T:
118  case ArchKind::ARMV5T:
119  case ArchKind::ARMV5TE:
120  case ArchKind::ARMV5TEJ:
121  case ArchKind::ARMV6:
122  case ArchKind::ARMV6K:
123  case ArchKind::ARMV6T2:
124  case ArchKind::ARMV6KZ:
125  case ArchKind::ARMV7S:
126  case ArchKind::IWMMXT:
127  case ArchKind::IWMMXT2:
128  case ArchKind::XSCALE:
129  case ArchKind::INVALID:
130    return ProfileKind::INVALID;
131  }
132  llvm_unreachable("Unhandled architecture");
133}
134
135StringRef ARM::getArchSynonym(StringRef Arch) {
136  return StringSwitch<StringRef>(Arch)
137      .Case("v5", "v5t")
138      .Case("v5e", "v5te")
139      .Case("v6j", "v6")
140      .Case("v6hl", "v6k")
141      .Cases("v6m", "v6sm", "v6s-m", "v6-m")
142      .Cases("v6z", "v6zk", "v6kz")
143      .Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
144      .Case("v7r", "v7-r")
145      .Case("v7m", "v7-m")
146      .Case("v7em", "v7e-m")
147      .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a")
148      .Case("v8.1a", "v8.1-a")
149      .Case("v8.2a", "v8.2-a")
150      .Case("v8.3a", "v8.3-a")
151      .Case("v8.4a", "v8.4-a")
152      .Case("v8.5a", "v8.5-a")
153      .Case("v8r", "v8-r")
154      .Case("v8m.base", "v8-m.base")
155      .Case("v8m.main", "v8-m.main")
156      .Case("v8.1m.main", "v8.1-m.main")
157      .Default(Arch);
158}
159
160bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) {
161
162  if (FPUKind >= FK_LAST || FPUKind == FK_INVALID)
163    return false;
164
165  static const struct FPUFeatureNameInfo {
166    const char *PlusName, *MinusName;
167    FPUVersion MinVersion;
168    FPURestriction MaxRestriction;
169  } FPUFeatureInfoList[] = {
170    // We have to specify the + and - versions of the name in full so
171    // that we can return them as static StringRefs.
172    //
173    // Also, the SubtargetFeatures ending in just "sp" are listed here
174    // under FPURestriction::None, which is the only FPURestriction in
175    // which they would be valid (since FPURestriction::SP doesn't
176    // exist).
177    {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16},
178    {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
179    {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None},
180    {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},
181    {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},
182    {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None},
183    {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},
184    {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None},
185    {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},
186    {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},
187    {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None},
188    {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None},
189    {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},
190    {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},
191    {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None},
192    {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},
193    {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16},
194    {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None},
195  };
196
197  for (const auto &Info: FPUFeatureInfoList) {
198    if (FPUNames[FPUKind].FPUVer >= Info.MinVersion &&
199        FPUNames[FPUKind].Restriction <= Info.MaxRestriction)
200      Features.push_back(Info.PlusName);
201    else
202      Features.push_back(Info.MinusName);
203  }
204
205  static const struct NeonFeatureNameInfo {
206    const char *PlusName, *MinusName;
207    NeonSupportLevel MinSupportLevel;
208  } NeonFeatureInfoList[] = {
209    {"+neon", "-neon", NeonSupportLevel::Neon},
210    {"+crypto", "-crypto", NeonSupportLevel::Crypto},
211  };
212
213  for (const auto &Info: NeonFeatureInfoList) {
214    if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel)
215      Features.push_back(Info.PlusName);
216    else
217      Features.push_back(Info.MinusName);
218  }
219
220  return true;
221}
222
223// Little/Big endian
224ARM::EndianKind ARM::parseArchEndian(StringRef Arch) {
225  if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
226      Arch.startswith("aarch64_be"))
227    return EndianKind::BIG;
228
229  if (Arch.startswith("arm") || Arch.startswith("thumb")) {
230    if (Arch.endswith("eb"))
231      return EndianKind::BIG;
232    else
233      return EndianKind::LITTLE;
234  }
235
236  if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32"))
237    return EndianKind::LITTLE;
238
239  return EndianKind::INVALID;
240}
241
242// ARM, Thumb, AArch64
243ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
244  return StringSwitch<ISAKind>(Arch)
245      .StartsWith("aarch64", ISAKind::AARCH64)
246      .StartsWith("arm64", ISAKind::AARCH64)
247      .StartsWith("thumb", ISAKind::THUMB)
248      .StartsWith("arm", ISAKind::ARM)
249      .Default(ISAKind::INVALID);
250}
251
252unsigned ARM::parseFPU(StringRef FPU) {
253  StringRef Syn = getFPUSynonym(FPU);
254  for (const auto F : FPUNames) {
255    if (Syn == F.getName())
256      return F.ID;
257  }
258  return FK_INVALID;
259}
260
261ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
262  if (FPUKind >= FK_LAST)
263    return NeonSupportLevel::None;
264  return FPUNames[FPUKind].NeonSupport;
265}
266
267// MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
268// (iwmmxt|xscale)(eb)? is also permitted. If the former, return
269// "v.+", if the latter, return unmodified string, minus 'eb'.
270// If invalid, return empty string.
271StringRef ARM::getCanonicalArchName(StringRef Arch) {
272  size_t offset = StringRef::npos;
273  StringRef A = Arch;
274  StringRef Error = "";
275
276  // Begins with "arm" / "thumb", move past it.
277  if (A.startswith("arm64_32"))
278    offset = 8;
279  else if (A.startswith("arm64"))
280    offset = 5;
281  else if (A.startswith("aarch64_32"))
282    offset = 10;
283  else if (A.startswith("arm"))
284    offset = 3;
285  else if (A.startswith("thumb"))
286    offset = 5;
287  else if (A.startswith("aarch64")) {
288    offset = 7;
289    // AArch64 uses "_be", not "eb" suffix.
290    if (A.find("eb") != StringRef::npos)
291      return Error;
292    if (A.substr(offset, 3) == "_be")
293      offset += 3;
294  }
295
296  // Ex. "armebv7", move past the "eb".
297  if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
298    offset += 2;
299  // Or, if it ends with eb ("armv7eb"), chop it off.
300  else if (A.endswith("eb"))
301    A = A.substr(0, A.size() - 2);
302  // Trim the head
303  if (offset != StringRef::npos)
304    A = A.substr(offset);
305
306  // Empty string means offset reached the end, which means it's valid.
307  if (A.empty())
308    return Arch;
309
310  // Only match non-marketing names
311  if (offset != StringRef::npos) {
312    // Must start with 'vN'.
313    if (A.size() >= 2 && (A[0] != 'v' || !std::isdigit(A[1])))
314      return Error;
315    // Can't have an extra 'eb'.
316    if (A.find("eb") != StringRef::npos)
317      return Error;
318  }
319
320  // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
321  return A;
322}
323
324StringRef ARM::getFPUSynonym(StringRef FPU) {
325  return StringSwitch<StringRef>(FPU)
326      .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
327      .Case("vfp2", "vfpv2")
328      .Case("vfp3", "vfpv3")
329      .Case("vfp4", "vfpv4")
330      .Case("vfp3-d16", "vfpv3-d16")
331      .Case("vfp4-d16", "vfpv4-d16")
332      .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
333      .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
334      .Case("fp5-sp-d16", "fpv5-sp-d16")
335      .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
336      // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
337      .Case("neon-vfpv3", "neon")
338      .Default(FPU);
339}
340
341StringRef ARM::getFPUName(unsigned FPUKind) {
342  if (FPUKind >= FK_LAST)
343    return StringRef();
344  return FPUNames[FPUKind].getName();
345}
346
347ARM::FPUVersion ARM::getFPUVersion(unsigned FPUKind) {
348  if (FPUKind >= FK_LAST)
349    return FPUVersion::NONE;
350  return FPUNames[FPUKind].FPUVer;
351}
352
353ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) {
354  if (FPUKind >= FK_LAST)
355    return FPURestriction::None;
356  return FPUNames[FPUKind].Restriction;
357}
358
359unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
360  if (CPU == "generic")
361    return ARM::ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
362
363  return StringSwitch<unsigned>(CPU)
364#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
365  .Case(NAME, DEFAULT_FPU)
366#include "llvm/Support/ARMTargetParser.def"
367   .Default(ARM::FK_INVALID);
368}
369
370unsigned ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
371  if (CPU == "generic")
372    return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
373
374  return StringSwitch<unsigned>(CPU)
375#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
376  .Case(NAME,                                                                  \
377        ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions |    \
378            DEFAULT_EXT)
379#include "llvm/Support/ARMTargetParser.def"
380  .Default(ARM::AEK_INVALID);
381}
382
383bool ARM::getHWDivFeatures(unsigned HWDivKind,
384                           std::vector<StringRef> &Features) {
385
386  if (HWDivKind == AEK_INVALID)
387    return false;
388
389  if (HWDivKind & AEK_HWDIVARM)
390    Features.push_back("+hwdiv-arm");
391  else
392    Features.push_back("-hwdiv-arm");
393
394  if (HWDivKind & AEK_HWDIVTHUMB)
395    Features.push_back("+hwdiv");
396  else
397    Features.push_back("-hwdiv");
398
399  return true;
400}
401
402bool ARM::getExtensionFeatures(unsigned Extensions,
403                               std::vector<StringRef> &Features) {
404
405  if (Extensions == AEK_INVALID)
406    return false;
407
408  for (const auto AE : ARCHExtNames) {
409    if ((Extensions & AE.ID) == AE.ID && AE.Feature)
410      Features.push_back(AE.Feature);
411    else if (AE.NegFeature)
412      Features.push_back(AE.NegFeature);
413  }
414
415  return getHWDivFeatures(Extensions, Features);
416}
417
418StringRef ARM::getArchName(ARM::ArchKind AK) {
419  return ARCHNames[static_cast<unsigned>(AK)].getName();
420}
421
422StringRef ARM::getCPUAttr(ARM::ArchKind AK) {
423  return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
424}
425
426StringRef ARM::getSubArch(ARM::ArchKind AK) {
427  return ARCHNames[static_cast<unsigned>(AK)].getSubArch();
428}
429
430unsigned ARM::getArchAttr(ARM::ArchKind AK) {
431  return ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
432}
433
434StringRef ARM::getArchExtName(unsigned ArchExtKind) {
435  for (const auto AE : ARCHExtNames) {
436    if (ArchExtKind == AE.ID)
437      return AE.getName();
438  }
439  return StringRef();
440}
441
442static bool stripNegationPrefix(StringRef &Name) {
443  if (Name.startswith("no")) {
444    Name = Name.substr(2);
445    return true;
446  }
447  return false;
448}
449
450StringRef ARM::getArchExtFeature(StringRef ArchExt) {
451  bool Negated = stripNegationPrefix(ArchExt);
452  for (const auto AE : ARCHExtNames) {
453    if (AE.Feature && ArchExt == AE.getName())
454      return StringRef(Negated ? AE.NegFeature : AE.Feature);
455  }
456
457  return StringRef();
458}
459
460static unsigned findDoublePrecisionFPU(unsigned InputFPUKind) {
461  const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];
462
463  // If the input FPU already supports double-precision, then there
464  // isn't any different FPU we can return here.
465  //
466  // The current available FPURestriction values are None (no
467  // restriction), D16 (only 16 d-regs) and SP_D16 (16 d-regs
468  // and single precision only); there's no value representing
469  // SP restriction without D16. So this test just means 'is it
470  // SP only?'.
471  if (InputFPU.Restriction != ARM::FPURestriction::SP_D16)
472    return ARM::FK_INVALID;
473
474  // Otherwise, look for an FPU entry with all the same fields, except
475  // that SP_D16 has been replaced with just D16, representing adding
476  // double precision and not changing anything else.
477  for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {
478    if (CandidateFPU.FPUVer == InputFPU.FPUVer &&
479        CandidateFPU.NeonSupport == InputFPU.NeonSupport &&
480        CandidateFPU.Restriction == ARM::FPURestriction::D16) {
481      return CandidateFPU.ID;
482    }
483  }
484
485  // nothing found
486  return ARM::FK_INVALID;
487}
488
489static unsigned getAEKID(StringRef ArchExtName) {
490  for (const auto AE : ARM::ARCHExtNames)
491    if (AE.getName() == ArchExtName)
492      return AE.ID;
493  return ARM::AEK_INVALID;
494}
495
496bool ARM::appendArchExtFeatures(
497  StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
498  std::vector<StringRef> &Features) {
499
500  size_t StartingNumFeatures = Features.size();
501  const bool Negated = stripNegationPrefix(ArchExt);
502  unsigned ID = getAEKID(ArchExt);
503
504  if (ID == AEK_INVALID)
505    return false;
506
507  for (const auto AE : ARCHExtNames) {
508    if (Negated && (AE.ID & ID) == ID && AE.NegFeature)
509      Features.push_back(AE.NegFeature);
510    else if (AE.ID == ID && AE.Feature)
511      Features.push_back(AE.Feature);
512  }
513
514  if (CPU == "")
515    CPU = "generic";
516
517  if (ArchExt == "fp" || ArchExt == "fp.dp") {
518    unsigned FPUKind;
519    if (ArchExt == "fp.dp") {
520      if (Negated) {
521        Features.push_back("-fp64");
522        return true;
523      }
524      FPUKind = findDoublePrecisionFPU(getDefaultFPU(CPU, AK));
525    } else if (Negated) {
526      FPUKind = ARM::FK_NONE;
527    } else {
528      FPUKind = getDefaultFPU(CPU, AK);
529    }
530    return ARM::getFPUFeatures(FPUKind, Features);
531  }
532  return StartingNumFeatures != Features.size();
533}
534
535StringRef ARM::getHWDivName(unsigned HWDivKind) {
536  for (const auto D : HWDivNames) {
537    if (HWDivKind == D.ID)
538      return D.getName();
539  }
540  return StringRef();
541}
542
543StringRef ARM::getDefaultCPU(StringRef Arch) {
544  ArchKind AK = parseArch(Arch);
545  if (AK == ArchKind::INVALID)
546    return StringRef();
547
548  // Look for multiple AKs to find the default for pair AK+Name.
549  for (const auto CPU : CPUNames) {
550    if (CPU.ArchID == AK && CPU.Default)
551      return CPU.getName();
552  }
553
554  // If we can't find a default then target the architecture instead
555  return "generic";
556}
557
558unsigned ARM::parseHWDiv(StringRef HWDiv) {
559  StringRef Syn = getHWDivSynonym(HWDiv);
560  for (const auto D : HWDivNames) {
561    if (Syn == D.getName())
562      return D.ID;
563  }
564  return AEK_INVALID;
565}
566
567unsigned ARM::parseArchExt(StringRef ArchExt) {
568  for (const auto A : ARCHExtNames) {
569    if (ArchExt == A.getName())
570      return A.ID;
571  }
572  return AEK_INVALID;
573}
574
575ARM::ArchKind ARM::parseCPUArch(StringRef CPU) {
576  for (const auto C : CPUNames) {
577    if (CPU == C.getName())
578      return C.ArchID;
579  }
580  return ArchKind::INVALID;
581}
582
583void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
584  for (const CpuNames<ArchKind> &Arch : CPUNames) {
585    if (Arch.ArchID != ArchKind::INVALID)
586      Values.push_back(Arch.getName());
587  }
588}
589
590StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) {
591  StringRef ArchName =
592      CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU));
593
594  if (TT.isOSBinFormatMachO()) {
595    if (TT.getEnvironment() == Triple::EABI ||
596        TT.getOS() == Triple::UnknownOS ||
597        parseArchProfile(ArchName) == ProfileKind::M)
598      return "aapcs";
599    if (TT.isWatchABI())
600      return "aapcs16";
601    return "apcs-gnu";
602  } else if (TT.isOSWindows())
603    // FIXME: this is invalid for WindowsCE.
604    return "aapcs";
605
606  // Select the default based on the platform.
607  switch (TT.getEnvironment()) {
608  case Triple::Android:
609  case Triple::GNUEABI:
610  case Triple::GNUEABIHF:
611  case Triple::MuslEABI:
612  case Triple::MuslEABIHF:
613    return "aapcs-linux";
614  case Triple::EABIHF:
615  case Triple::EABI:
616    return "aapcs";
617  default:
618    if (TT.isOSNetBSD())
619      return "apcs-gnu";
620    if (TT.isOSOpenBSD())
621      return "aapcs-linux";
622    return "aapcs";
623  }
624}
625