1314564Sdim//===-- RegisterContextPOSIXCore_mips64.cpp ---------------------*- C++ -*-===// 2257752Semaste// 3353358Sdim// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4353358Sdim// See https://llvm.org/LICENSE.txt for license information. 5353358Sdim// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6257752Semaste// 7257752Semaste//===----------------------------------------------------------------------===// 8257752Semaste 9314564Sdim#include "RegisterContextPOSIXCore_mips64.h" 10314564Sdim 11257752Semaste#include "lldb/Target/Thread.h" 12344779Sdim#include "lldb/Utility/RegisterValue.h" 13257752Semaste 14353358Sdim#include <memory> 15353358Sdim 16257752Semasteusing namespace lldb_private; 17257752Semaste 18314564SdimRegisterContextCorePOSIX_mips64::RegisterContextCorePOSIX_mips64( 19314564Sdim Thread &thread, RegisterInfoInterface *register_info, 20327952Sdim const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes) 21314564Sdim : RegisterContextPOSIX_mips64(thread, 0, register_info) { 22353358Sdim m_gpr_buffer = std::make_shared<DataBufferHeap>(gpregset.GetDataStart(), 23353358Sdim gpregset.GetByteSize()); 24314564Sdim m_gpr.SetData(m_gpr_buffer); 25314564Sdim m_gpr.SetByteOrder(gpregset.GetByteOrder()); 26327952Sdim 27327952Sdim DataExtractor fpregset = getRegset( 28327952Sdim notes, register_info->GetTargetArchitecture().GetTriple(), FPR_Desc); 29353358Sdim m_fpr_buffer = std::make_shared<DataBufferHeap>(fpregset.GetDataStart(), 30353358Sdim fpregset.GetByteSize()); 31321369Sdim m_fpr.SetData(m_fpr_buffer); 32321369Sdim m_fpr.SetByteOrder(fpregset.GetByteOrder()); 33257752Semaste} 34257752Semaste 35314564SdimRegisterContextCorePOSIX_mips64::~RegisterContextCorePOSIX_mips64() {} 36257752Semaste 37314564Sdimbool RegisterContextCorePOSIX_mips64::ReadGPR() { return true; } 38257752Semaste 39314564Sdimbool RegisterContextCorePOSIX_mips64::ReadFPR() { return false; } 40257752Semaste 41314564Sdimbool RegisterContextCorePOSIX_mips64::WriteGPR() { 42314564Sdim assert(0); 43314564Sdim return false; 44257752Semaste} 45257752Semaste 46314564Sdimbool RegisterContextCorePOSIX_mips64::WriteFPR() { 47314564Sdim assert(0); 48314564Sdim return false; 49257752Semaste} 50257752Semaste 51314564Sdimbool RegisterContextCorePOSIX_mips64::ReadRegister(const RegisterInfo *reg_info, 52314564Sdim RegisterValue &value) { 53321369Sdim 54314564Sdim lldb::offset_t offset = reg_info->byte_offset; 55353358Sdim lldb_private::ArchSpec arch = m_register_info_up->GetTargetArchitecture(); 56321369Sdim uint64_t v; 57321369Sdim if (IsGPR(reg_info->kinds[lldb::eRegisterKindLLDB])) { 58321369Sdim if (reg_info->byte_size == 4 && !(arch.GetMachine() == llvm::Triple::mips64el)) 59321369Sdim // In case of 32bit core file, the register data are placed at 4 byte 60341825Sdim // offset. 61321369Sdim offset = offset / 2; 62321369Sdim v = m_gpr.GetMaxU64(&offset, reg_info->byte_size); 63314564Sdim value = v; 64314564Sdim return true; 65321369Sdim } else if (IsFPR(reg_info->kinds[lldb::eRegisterKindLLDB])) { 66321369Sdim offset = offset - sizeof(GPR_linux_mips); 67321369Sdim v =m_fpr.GetMaxU64(&offset, reg_info->byte_size); 68321369Sdim value = v; 69321369Sdim return true; 70321369Sdim } 71314564Sdim return false; 72257752Semaste} 73257752Semaste 74314564Sdimbool RegisterContextCorePOSIX_mips64::ReadAllRegisterValues( 75314564Sdim lldb::DataBufferSP &data_sp) { 76314564Sdim return false; 77257752Semaste} 78257752Semaste 79314564Sdimbool RegisterContextCorePOSIX_mips64::WriteRegister( 80314564Sdim const RegisterInfo *reg_info, const RegisterValue &value) { 81314564Sdim return false; 82257752Semaste} 83257752Semaste 84314564Sdimbool RegisterContextCorePOSIX_mips64::WriteAllRegisterValues( 85314564Sdim const lldb::DataBufferSP &data_sp) { 86314564Sdim return false; 87257752Semaste} 88257752Semaste 89314564Sdimbool RegisterContextCorePOSIX_mips64::HardwareSingleStep(bool enable) { 90314564Sdim return false; 91257752Semaste} 92