1//===-- lldb-mips-linux-register-enums.h -------------------------------*- C++
2//-*-===//
3//
4// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5// See https://llvm.org/LICENSE.txt for license information.
6// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7//
8//===----------------------------------------------------------------------===//
9
10#ifndef lldb_mips_linux_register_enums_h
11#define lldb_mips_linux_register_enums_h
12
13namespace lldb_private {
14// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
15
16// Internal codes for all mips registers.
17enum {
18  k_first_gpr_mips,
19  gpr_zero_mips = k_first_gpr_mips,
20  gpr_r1_mips,
21  gpr_r2_mips,
22  gpr_r3_mips,
23  gpr_r4_mips,
24  gpr_r5_mips,
25  gpr_r6_mips,
26  gpr_r7_mips,
27  gpr_r8_mips,
28  gpr_r9_mips,
29  gpr_r10_mips,
30  gpr_r11_mips,
31  gpr_r12_mips,
32  gpr_r13_mips,
33  gpr_r14_mips,
34  gpr_r15_mips,
35  gpr_r16_mips,
36  gpr_r17_mips,
37  gpr_r18_mips,
38  gpr_r19_mips,
39  gpr_r20_mips,
40  gpr_r21_mips,
41  gpr_r22_mips,
42  gpr_r23_mips,
43  gpr_r24_mips,
44  gpr_r25_mips,
45  gpr_r26_mips,
46  gpr_r27_mips,
47  gpr_gp_mips,
48  gpr_sp_mips,
49  gpr_r30_mips,
50  gpr_ra_mips,
51  gpr_sr_mips,
52  gpr_mullo_mips,
53  gpr_mulhi_mips,
54  gpr_badvaddr_mips,
55  gpr_cause_mips,
56  gpr_pc_mips,
57  gpr_config5_mips,
58
59  k_last_gpr_mips = gpr_config5_mips,
60
61  k_first_fpr_mips,
62  fpr_f0_mips = k_first_fpr_mips,
63  fpr_f1_mips,
64  fpr_f2_mips,
65  fpr_f3_mips,
66  fpr_f4_mips,
67  fpr_f5_mips,
68  fpr_f6_mips,
69  fpr_f7_mips,
70  fpr_f8_mips,
71  fpr_f9_mips,
72  fpr_f10_mips,
73  fpr_f11_mips,
74  fpr_f12_mips,
75  fpr_f13_mips,
76  fpr_f14_mips,
77  fpr_f15_mips,
78  fpr_f16_mips,
79  fpr_f17_mips,
80  fpr_f18_mips,
81  fpr_f19_mips,
82  fpr_f20_mips,
83  fpr_f21_mips,
84  fpr_f22_mips,
85  fpr_f23_mips,
86  fpr_f24_mips,
87  fpr_f25_mips,
88  fpr_f26_mips,
89  fpr_f27_mips,
90  fpr_f28_mips,
91  fpr_f29_mips,
92  fpr_f30_mips,
93  fpr_f31_mips,
94  fpr_fcsr_mips,
95  fpr_fir_mips,
96  fpr_config5_mips,
97  k_last_fpr_mips = fpr_config5_mips,
98
99  k_first_msa_mips,
100  msa_w0_mips = k_first_msa_mips,
101  msa_w1_mips,
102  msa_w2_mips,
103  msa_w3_mips,
104  msa_w4_mips,
105  msa_w5_mips,
106  msa_w6_mips,
107  msa_w7_mips,
108  msa_w8_mips,
109  msa_w9_mips,
110  msa_w10_mips,
111  msa_w11_mips,
112  msa_w12_mips,
113  msa_w13_mips,
114  msa_w14_mips,
115  msa_w15_mips,
116  msa_w16_mips,
117  msa_w17_mips,
118  msa_w18_mips,
119  msa_w19_mips,
120  msa_w20_mips,
121  msa_w21_mips,
122  msa_w22_mips,
123  msa_w23_mips,
124  msa_w24_mips,
125  msa_w25_mips,
126  msa_w26_mips,
127  msa_w27_mips,
128  msa_w28_mips,
129  msa_w29_mips,
130  msa_w30_mips,
131  msa_w31_mips,
132  msa_fcsr_mips,
133  msa_fir_mips,
134  msa_mcsr_mips,
135  msa_mir_mips,
136  msa_config5_mips,
137  k_last_msa_mips = msa_config5_mips,
138
139  k_num_registers_mips,
140
141  k_num_gpr_registers_mips = k_last_gpr_mips - k_first_gpr_mips + 1,
142  k_num_fpr_registers_mips = k_last_fpr_mips - k_first_fpr_mips + 1,
143  k_num_msa_registers_mips = k_last_msa_mips - k_first_msa_mips + 1,
144  k_num_user_registers_mips = k_num_gpr_registers_mips +
145                              k_num_fpr_registers_mips +
146                              k_num_msa_registers_mips
147};
148
149// Internal codes for all mips64 registers.
150enum {
151  k_first_gpr_mips64,
152  gpr_zero_mips64 = k_first_gpr_mips64,
153  gpr_r1_mips64,
154  gpr_r2_mips64,
155  gpr_r3_mips64,
156  gpr_r4_mips64,
157  gpr_r5_mips64,
158  gpr_r6_mips64,
159  gpr_r7_mips64,
160  gpr_r8_mips64,
161  gpr_r9_mips64,
162  gpr_r10_mips64,
163  gpr_r11_mips64,
164  gpr_r12_mips64,
165  gpr_r13_mips64,
166  gpr_r14_mips64,
167  gpr_r15_mips64,
168  gpr_r16_mips64,
169  gpr_r17_mips64,
170  gpr_r18_mips64,
171  gpr_r19_mips64,
172  gpr_r20_mips64,
173  gpr_r21_mips64,
174  gpr_r22_mips64,
175  gpr_r23_mips64,
176  gpr_r24_mips64,
177  gpr_r25_mips64,
178  gpr_r26_mips64,
179  gpr_r27_mips64,
180  gpr_gp_mips64,
181  gpr_sp_mips64,
182  gpr_r30_mips64,
183  gpr_ra_mips64,
184  gpr_sr_mips64,
185  gpr_mullo_mips64,
186  gpr_mulhi_mips64,
187  gpr_badvaddr_mips64,
188  gpr_cause_mips64,
189  gpr_pc_mips64,
190  gpr_config5_mips64,
191  k_last_gpr_mips64 = gpr_config5_mips64,
192
193  k_first_fpr_mips64,
194  fpr_f0_mips64 = k_first_fpr_mips64,
195  fpr_f1_mips64,
196  fpr_f2_mips64,
197  fpr_f3_mips64,
198  fpr_f4_mips64,
199  fpr_f5_mips64,
200  fpr_f6_mips64,
201  fpr_f7_mips64,
202  fpr_f8_mips64,
203  fpr_f9_mips64,
204  fpr_f10_mips64,
205  fpr_f11_mips64,
206  fpr_f12_mips64,
207  fpr_f13_mips64,
208  fpr_f14_mips64,
209  fpr_f15_mips64,
210  fpr_f16_mips64,
211  fpr_f17_mips64,
212  fpr_f18_mips64,
213  fpr_f19_mips64,
214  fpr_f20_mips64,
215  fpr_f21_mips64,
216  fpr_f22_mips64,
217  fpr_f23_mips64,
218  fpr_f24_mips64,
219  fpr_f25_mips64,
220  fpr_f26_mips64,
221  fpr_f27_mips64,
222  fpr_f28_mips64,
223  fpr_f29_mips64,
224  fpr_f30_mips64,
225  fpr_f31_mips64,
226  fpr_fcsr_mips64,
227  fpr_fir_mips64,
228  fpr_config5_mips64,
229  k_last_fpr_mips64 = fpr_config5_mips64,
230
231  k_first_msa_mips64,
232  msa_w0_mips64 = k_first_msa_mips64,
233  msa_w1_mips64,
234  msa_w2_mips64,
235  msa_w3_mips64,
236  msa_w4_mips64,
237  msa_w5_mips64,
238  msa_w6_mips64,
239  msa_w7_mips64,
240  msa_w8_mips64,
241  msa_w9_mips64,
242  msa_w10_mips64,
243  msa_w11_mips64,
244  msa_w12_mips64,
245  msa_w13_mips64,
246  msa_w14_mips64,
247  msa_w15_mips64,
248  msa_w16_mips64,
249  msa_w17_mips64,
250  msa_w18_mips64,
251  msa_w19_mips64,
252  msa_w20_mips64,
253  msa_w21_mips64,
254  msa_w22_mips64,
255  msa_w23_mips64,
256  msa_w24_mips64,
257  msa_w25_mips64,
258  msa_w26_mips64,
259  msa_w27_mips64,
260  msa_w28_mips64,
261  msa_w29_mips64,
262  msa_w30_mips64,
263  msa_w31_mips64,
264  msa_fcsr_mips64,
265  msa_fir_mips64,
266  msa_mcsr_mips64,
267  msa_mir_mips64,
268  msa_config5_mips64,
269  k_last_msa_mips64 = msa_config5_mips64,
270
271  k_num_registers_mips64,
272
273  k_num_gpr_registers_mips64 = k_last_gpr_mips64 - k_first_gpr_mips64 + 1,
274  k_num_fpr_registers_mips64 = k_last_fpr_mips64 - k_first_fpr_mips64 + 1,
275  k_num_msa_registers_mips64 = k_last_msa_mips64 - k_first_msa_mips64 + 1,
276  k_num_user_registers_mips64 = k_num_gpr_registers_mips64 +
277                                k_num_fpr_registers_mips64 +
278                                k_num_msa_registers_mips64
279};
280
281// Register no. for RegisterKind = eRegisterKindProcessPlugin
282// The ptrace request PTRACE_PEEKUSER/PTRACE_POKEUSER used this number
283enum {
284  ptrace_zero_mips,
285  ptrace_r1_mips,
286  ptrace_r2_mips,
287  ptrace_r3_mips,
288  ptrace_r4_mips,
289  ptrace_r5_mips,
290  ptrace_r6_mips,
291  ptrace_r7_mips,
292  ptrace_r8_mips,
293  ptrace_r9_mips,
294  ptrace_r10_mips,
295  ptrace_r11_mips,
296  ptrace_r12_mips,
297  ptrace_r13_mips,
298  ptrace_r14_mips,
299  ptrace_r15_mips,
300  ptrace_r16_mips,
301  ptrace_r17_mips,
302  ptrace_r18_mips,
303  ptrace_r19_mips,
304  ptrace_r20_mips,
305  ptrace_r21_mips,
306  ptrace_r22_mips,
307  ptrace_r23_mips,
308  ptrace_r24_mips,
309  ptrace_r25_mips,
310  ptrace_r26_mips,
311  ptrace_r27_mips,
312  ptrace_gp_mips,
313  ptrace_sp_mips,
314  ptrace_r30_mips,
315  ptrace_ra_mips,
316  ptrace_f0_mips,
317  ptrace_f1_mips,
318  ptrace_f2_mips,
319  ptrace_f3_mips,
320  ptrace_f4_mips,
321  ptrace_f5_mips,
322  ptrace_f6_mips,
323  ptrace_f7_mips,
324  ptrace_f8_mips,
325  ptrace_f9_mips,
326  ptrace_f10_mips,
327  ptrace_f11_mips,
328  ptrace_f12_mips,
329  ptrace_f13_mips,
330  ptrace_f14_mips,
331  ptrace_f15_mips,
332  ptrace_f16_mips,
333  ptrace_f17_mips,
334  ptrace_f18_mips,
335  ptrace_f19_mips,
336  ptrace_f20_mips,
337  ptrace_f21_mips,
338  ptrace_f22_mips,
339  ptrace_f23_mips,
340  ptrace_f24_mips,
341  ptrace_f25_mips,
342  ptrace_f26_mips,
343  ptrace_f27_mips,
344  ptrace_f28_mips,
345  ptrace_f29_mips,
346  ptrace_f30_mips,
347  ptrace_f31_mips,
348  ptrace_pc_mips,
349  ptrace_cause_mips,
350  ptrace_badvaddr_mips,
351  ptrace_mulhi_mips,
352  ptrace_mullo_mips,
353  ptrace_fcsr_mips,
354  ptrace_fir_mips,
355  ptrace_sr_mips,
356  ptrace_config5_mips
357};
358}
359
360#endif // #ifndef lldb_mips_linux_register_enums_h
361