1//===-- EmulateInstructionMIPS64.h ------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef EmulateInstructionMIPS64_h_
10#define EmulateInstructionMIPS64_h_
11
12#include "lldb/Core/EmulateInstruction.h"
13#include "lldb/Interpreter/OptionValue.h"
14#include "lldb/Utility/Status.h"
15
16namespace llvm {
17class MCDisassembler;
18class MCSubtargetInfo;
19class MCRegisterInfo;
20class MCAsmInfo;
21class MCContext;
22class MCInstrInfo;
23class MCInst;
24} // namespace llvm
25
26class EmulateInstructionMIPS64 : public lldb_private::EmulateInstruction {
27public:
28  EmulateInstructionMIPS64(const lldb_private::ArchSpec &arch);
29
30  static void Initialize();
31
32  static void Terminate();
33
34  static lldb_private::ConstString GetPluginNameStatic();
35
36  static const char *GetPluginDescriptionStatic();
37
38  static lldb_private::EmulateInstruction *
39  CreateInstance(const lldb_private::ArchSpec &arch,
40                 lldb_private::InstructionType inst_type);
41
42  static bool SupportsEmulatingInstructionsOfTypeStatic(
43      lldb_private::InstructionType inst_type) {
44    switch (inst_type) {
45    case lldb_private::eInstructionTypeAny:
46    case lldb_private::eInstructionTypePrologueEpilogue:
47    case lldb_private::eInstructionTypePCModifying:
48      return true;
49
50    case lldb_private::eInstructionTypeAll:
51      return false;
52    }
53    return false;
54  }
55
56  lldb_private::ConstString GetPluginName() override;
57
58  uint32_t GetPluginVersion() override { return 1; }
59
60  bool SetTargetTriple(const lldb_private::ArchSpec &arch) override;
61
62  bool SupportsEmulatingInstructionsOfType(
63      lldb_private::InstructionType inst_type) override {
64    return SupportsEmulatingInstructionsOfTypeStatic(inst_type);
65  }
66
67  bool ReadInstruction() override;
68
69  bool EvaluateInstruction(uint32_t evaluate_options) override;
70
71  bool TestEmulation(lldb_private::Stream *out_stream,
72                     lldb_private::ArchSpec &arch,
73                     lldb_private::OptionValueDictionary *test_data) override {
74    return false;
75  }
76
77  bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
78                       lldb_private::RegisterInfo &reg_info) override;
79
80  bool
81  CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;
82
83protected:
84  typedef struct {
85    const char *op_name;
86    bool (EmulateInstructionMIPS64::*callback)(llvm::MCInst &insn);
87    const char *insn_name;
88  } MipsOpcode;
89
90  static MipsOpcode *GetOpcodeForInstruction(const char *op_name);
91
92  bool Emulate_DADDiu(llvm::MCInst &insn);
93
94  bool Emulate_DSUBU_DADDU(llvm::MCInst &insn);
95
96  bool Emulate_LUI(llvm::MCInst &insn);
97
98  bool Emulate_SD(llvm::MCInst &insn);
99
100  bool Emulate_LD(llvm::MCInst &insn);
101
102  bool Emulate_LDST_Imm(llvm::MCInst &insn);
103
104  bool Emulate_LDST_Reg(llvm::MCInst &insn);
105
106  bool Emulate_BXX_3ops(llvm::MCInst &insn);
107
108  bool Emulate_BXX_3ops_C(llvm::MCInst &insn);
109
110  bool Emulate_BXX_2ops(llvm::MCInst &insn);
111
112  bool Emulate_BXX_2ops_C(llvm::MCInst &insn);
113
114  bool Emulate_Bcond_Link_C(llvm::MCInst &insn);
115
116  bool Emulate_Bcond_Link(llvm::MCInst &insn);
117
118  bool Emulate_FP_branch(llvm::MCInst &insn);
119
120  bool Emulate_3D_branch(llvm::MCInst &insn);
121
122  bool Emulate_BAL(llvm::MCInst &insn);
123
124  bool Emulate_BALC(llvm::MCInst &insn);
125
126  bool Emulate_BC(llvm::MCInst &insn);
127
128  bool Emulate_J(llvm::MCInst &insn);
129
130  bool Emulate_JAL(llvm::MCInst &insn);
131
132  bool Emulate_JALR(llvm::MCInst &insn);
133
134  bool Emulate_JIALC(llvm::MCInst &insn);
135
136  bool Emulate_JIC(llvm::MCInst &insn);
137
138  bool Emulate_JR(llvm::MCInst &insn);
139
140  bool Emulate_BC1EQZ(llvm::MCInst &insn);
141
142  bool Emulate_BC1NEZ(llvm::MCInst &insn);
143
144  bool Emulate_BNZB(llvm::MCInst &insn);
145
146  bool Emulate_BNZH(llvm::MCInst &insn);
147
148  bool Emulate_BNZW(llvm::MCInst &insn);
149
150  bool Emulate_BNZD(llvm::MCInst &insn);
151
152  bool Emulate_BZB(llvm::MCInst &insn);
153
154  bool Emulate_BZH(llvm::MCInst &insn);
155
156  bool Emulate_BZW(llvm::MCInst &insn);
157
158  bool Emulate_BZD(llvm::MCInst &insn);
159
160  bool Emulate_MSA_Branch_DF(llvm::MCInst &insn, int element_byte_size,
161                             bool bnz);
162
163  bool Emulate_BNZV(llvm::MCInst &insn);
164
165  bool Emulate_BZV(llvm::MCInst &insn);
166
167  bool Emulate_MSA_Branch_V(llvm::MCInst &insn, bool bnz);
168
169  bool nonvolatile_reg_p(uint64_t regnum);
170
171  const char *GetRegisterName(unsigned reg_num, bool altnernate_name);
172
173private:
174  std::unique_ptr<llvm::MCDisassembler> m_disasm;
175  std::unique_ptr<llvm::MCSubtargetInfo> m_subtype_info;
176  std::unique_ptr<llvm::MCRegisterInfo> m_reg_info;
177  std::unique_ptr<llvm::MCAsmInfo> m_asm_info;
178  std::unique_ptr<llvm::MCContext> m_context;
179  std::unique_ptr<llvm::MCInstrInfo> m_insn_info;
180};
181
182#endif // EmulateInstructionMIPS64_h_
183